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ORCIDAli Sheikholeslami
- > Home > Persons > Ali Sheikholeslami
Publications
- 2018
[j33]Joshua Liang
, Ali Sheikholeslami, Hirotaka Tamura, Hisakatsu Yamaguchi:
On-Chip Jitter Measurement Using Jitter Injection in a 28 Gb/s PI-Based CDR. IEEE J. Solid State Circuits 53(3): 750-761 (2018)- [j32]Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Yuuki Ogata, Hisakatsu Yamaguchi:
Loop Gain Adaptation for Optimum Jitter Tolerance in Digital CDRs. IEEE J. Solid State Circuits 53(9): 2696-2708 (2018) - 2017
- [j31]Wahid Rahman, Danny Yoo, Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki, Hisakatsu Yamaguchi:
A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS. IEEE J. Solid State Circuits 52(12): 3517-3531 (2017) - [c38]Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Hisakatsu Yamaguchi:
Jitter injection for on-chip jitter measurement in PI-based CDRs. CICC 2017: 1-4 - [c36]Wahid Rahman, Danny Yoo, Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki, Hisakatsu Yamaguchi:
6.6 A 22.5-to-32Gb/s 3.2pJ/b referenceless baud-rate digital CDR with DFE and CTLE in 28nm CMOS. ISSCC 2017: 120-121 - [c35]Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Yuuki Ogata, Hisakatsu Yamaguchi:
6.7 A 28Gb/s digital CDR with adaptive loop gain for optimum jitter tolerance. ISSCC 2017: 122-123 - 2015
- [j30]Joshua Liang, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
On-Chip Measurement of Clock and Data Jitter With Sub-Picosecond Accuracy for 10 Gb/s Multilane CDRs. IEEE J. Solid State Circuits 50(4): 845-855 (2015) - [j27]Mohammad Sadegh Jalali, Clifford Ting, Joshua Liang, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A 3x blind ADC-based CDR for a 20 dB loss channel. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(6): 1658-1667 (2015) - 2014
- [c29]Joshua Liang, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
On-chip measurement of data jitter with sub-picosecond accuracy for 10Gb/s multilane CDRs. VLSIC 2014: 1-2 - 2013
- [j23]Clifford Ting, Joshua Liang, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A Blind Baud-Rate ADC-Based CDR. IEEE J. Solid State Circuits 48(12): 3285-3295 (2013) - [c26]Clifford Ting, Joshua Liang, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A blind baud-rate ADC-based CDR. ISSCC 2013: 122-123
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