Sumedh W. Sathaye

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Thomas M. Conte

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Publications

2000
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Thomas M. Conte, Sumedh W. Sathaye:
Properties of Rescheduling Size Invariance for Dynamic Rescheduling-Based VLIW Cross-Generation Compatibility. IEEE Trans. Computers 49(8): 814-825 (2000)
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Thomas M. Conte, Kishore N. Menezes, Sumedh W. Sathaye, Mark C. Toburen:
System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design. IEEE Trans. Very Large Scale Integr. Syst. 8(2): 129-137 (2000)
1998
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  - journals/tc/BanerjiaSMC98
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Sanjeev Banerjia, Sumedh W. Sathaye, Kishore N. Menezes, Thomas M. Conte:
MPS: Miss-Path Scheduling for Multiple-Issue Processors. IEEE Trans. Computers 47(12): 1382-1397 (1998)
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  - conf/IEEEpact/OzerSMBJC98
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Emre Özer, Sumedh W. Sathaye, Kishore N. Menezes, Sanjeev Banerjia, Matthew D. Jennings, Thomas M. Conte:
A Fast Interrupt Handling Scheme for VLIW Processors. IEEE PACT 1998: 136-141
1997
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Thomas M. Conte, Sumedh W. Sathaye:
Optimization of VLIW compatibility systems employing dynamic rescheduling. Int. J. Parallel Program. 25(2): 83-112 (1997)
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  - conf/IEEEpact/MenezesSC97
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Kishore N. Menezes, Sumedh W. Sathaye, Thomas M. Conte:
Path Prediction for High Issue-Rate Processors. IEEE PACT 1997: 178-188
1996
[c4]
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Thomas M. Conte, Sumedh W. Sathaye, Sanjeev Banerjia:
A Persistent Rescheduled-page Cache for Low Overhead Object Code Compatibility in VLIW Architectures. MICRO 1996: 4-13
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Thomas M. Conte, Sanjeev Banerjia, Sergei Y. Larin, Kishore N. Menezes, Sumedh W. Sathaye:
Instruction Fetch Mechanisms for VLIW Architectures with Compressed Encodings. MICRO 1996: 201-211
1995
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  - conf/hicss/ConteMS95
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Thomas M. Conte, Kishore N. Menezes, Sumedh W. Sathaye:
A technique to determine power-efficient, high-performance superscalar processors. HICSS (1) 1995: 324-333
[c1]
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Thomas M. Conte, Sumedh W. Sathaye:
Dynamic rescheduling: a technique for object code compatibility in VLIW architectures. MICRO 1995: 208-218

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