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Marc Engels
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Publications
- 2002
- [j16]Yajun Ha, Serge Vernalde, Patrick Schaumont, Marc Engels, Rudy Lauwereins, Hugo De Man:
Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects. J. Supercomput. 21(2): 131-144 (2002) - [c44]Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man:
Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications. FPL 2002: 1135-1138 - 2001
- [c41]Yajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man:
Virtual Java/FPGA interface for networked reconfiguration. ASP-DAC 2001: 558-563 - [c37]Yajun Ha, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man:
A SW/HW Interface API for Java/FPGA Co-Designed Applets. FCCM 2001: 269-270 - 1996
- [j4]Greet Bilsen, Marc Engels, Rudy Lauwereins, J. A. Peperstraete:
Cycle-static dataflow. IEEE Trans. Signal Process. 44(2): 397-408 (1996) - [c7]Luc De Coster, Marc Engels, Rudy Lauwereins, J. A. Peperstraete:
Global Approach for Compiled Bit-True Simulation of DSP Systems. Euro-Par, Vol. II 1996: 236-239 - [c6]Piet Wauters, Marc Engels, Rudy Lauwereins, J. A. Peperstraete:
Cyclo-Dynamic Dataflow. PDP 1996: 319-326 - 1995
- [j3]Rudy Lauwereins, Marc Engels, Marleen Adé, J. A. Peperstraete:
Grape-II: A System-Level Prototyping Environment for DSP Applications. Computer 28(2): 35-43 (1995) - [c5]Greet Bilsen, Marc Engels, Rudy Lauwereins, Jean A. Peperstraete:
Cyclo-static data flow. ICASSP 1995: 3255-3258 - 1993
- [j2]Marc Engels, Rudy Lauwereins, J. A. Peperstraete, Arthur H. M. van Roermund:
Design of a processing board for a programmable multi-VSP system. J. VLSI Signal Process. 5(2-3): 171-184 (1993) - [c3]Greet Bilsen, Marc Engels, Rudy Lauwereins, Jean A. Peperstraete:
Development of a load balancing tool for the GRAPE rapid prototyping environment. RSP 1993: 2-16 - 1992
- [c2]Rudy Lauwereins, Marc Engels, J. A. Peperstraete:
GRAPE-II: a tool for the rapid prototyping of multi-rate asynchronous DSP applications on heterogeneous multiprocessors. RSP 1992: 24-37 - 1991
- [j1]Marc Engels, Rudy Lauwereins, J. A. Peperstraete:
Rapid Prototyping for DSP Systems with Multiprocessors. IEEE Des. Test Comput. 8(2): 52-62 (1991) - 1990
- [c1]Rudy Lauwereins, Marc Engels, J. A. Peperstraete:
Parallel processing enables the real-time emulation of DSP ASICs. RSP 1990: 65-74
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