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Jan-Jan Wu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Sheng-Yu Fu

> Home > Persons > Jan-Jan Wu

Publications

2019
[j33]
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  - journals/jsa/FuHLWH19
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  - https://dblp.org/rec/journals/jsa/FuHLWH19
Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu:
Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator. J. Syst. Archit. 98: 173-190 (2019)
[j32]
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  - journals/taco/HongWLFH19
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Ding-Yong Hong, Jan-Jan Wu, Yu-Ping Liu, Sheng-Yu Fu, Wei-Chung Hsu:
Processor-Tracing Guided Region Formation in Dynamic Binary Translation. ACM Trans. Archit. Code Optim. 15(4): 52:1-52:25 (2019)
[j31]
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  - journals/taco/LiuHWFH19
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Yu-Ping Liu, Ding-Yong Hong, Jan-Jan Wu, Sheng-Yu Fu, Wei-Chung Hsu:
Exploiting SIMD Asymmetry in ARM-to-x86 Dynamic Binary Translation. ACM Trans. Archit. Code Optim. 16(1): 2:1-2:24 (2019)
[c94]
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  dblp key:
  - conf/icpp/LinFHLWH19
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Chih-Min Lin, Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu:
Exploiting Vector Processing in Dynamic Binary Translation. ICPP 2019: 93:1-93:10
2018
[j28]
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  - journals/spe/FuHLWH18
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Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu:
Efficient and retargetable SIMD translation in a dynamic binary translator. Softw. Pract. Exp. 48(6): 1312-1330 (2018)
[j27]
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  - journals/tecs/HongLFWH18
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Ding-Yong Hong, Yu-Ping Liu, Sheng-Yu Fu, Jan-Jan Wu, Wei-Chung Hsu:
Improving SIMD Parallelism via Dynamic Binary Translation. ACM Trans. Embed. Comput. Syst. 17(3): 61:1-61:27 (2018)
[c92]
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  dblp key:
  - conf/cases/FuLHLWH18
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Sheng-Yu Fu, Chih-Min Lin, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu:
Exploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator. CASES 2018: 14:1-14:3
[c84]
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  - conf/racs/LinHFWH18
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Shih-Kai Lin, Ding-Yong Hong, Sheng-Yu Fu, Jan-Jan Wu, Wei-Chung Hsu:
Dynamic tuning of applications using restricted transactional memory. RACS 2018: 249-254
2017
[c83]
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  - conf/IEEEpact/LiuHWFH17
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Yu-Ping Liu, Ding-Yong Hong, Jan-Jan Wu, Sheng-Yu Fu, Wei-Chung Hsu:
Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary Translation. PACT 2017: 343-355
[c79]
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  - conf/lctrts/FuHLWH17
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Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu:
Dynamic translation of structured Loads/Stores and register mapping for architectures with SIMD extensions. LCTES 2017: 31-40
2016
[c77]
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  - conf/icpads/HongFLWH16
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Ding-Yong Hong, Sheng-Yu Fu, Yu-Ping Liu, Jan-Jan Wu, Wei-Chung Hsu:
Exploiting Longer SIMD Lanes in Dynamic Binary Translation. ICPADS 2016: 853-860
2015
[c74]
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  - conf/date/FuWH15
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Sheng-Yu Fu, Jan-Jan Wu, Wei-Chung Hsu:
Improving SIMD code generation in QEMU. DATE 2015: 1233-1236
[c72]
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  - conf/icpads/FuHWLH15
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Sheng-Yu Fu, Ding-Yong Hong, Jan-Jan Wu, Pangfeng Liu, Wei-Chung Hsu:
SIMD Code Translation in an Enhanced HQEMU. ICPADS 2015: 507-514

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