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ORCIDClay S. Gloster Jr.
- > Home > Persons > Clay S. Gloster Jr.
Publications
- 2021
[c30]Shrikant S. Jadhav
, Clay Gloster, Jannatun Naher, Christopher C. Doss, Youngsoo Kim:
A Multi-Memory Field-Programmable Custom Computing Machine for Accelerating Compute-Intensive Applications. UEMCON 2021: 619-628- 2020
- [c27]Shrikant S. Jadhav, Clay Gloster, Jannatun Naher, Christopher C. Doss, Youngsoo Kim:
An FPGA-based Optimized Memory Controller for Accessing Multiple Memories. UEMCON 2020: 635-642 - 2019
- [c26]Shrikant S. Jadhav, Clay Gloster, Christopher C. Doss, Youngsoo Kim, Jannatun Naher:
A Remote Field-Programmable Custom Computing Machine Accelerator. CCWC 2019: 513-520 - 2018
- [c25]Shrikant S. Jadhav, Clay Gloster, Christopher C. Doss, Youngsoo Kim, Jannatun Naher:
AutoRARE: An Automated Tool For Generating FPGA-Based Multi-Memory Hardware Accelerators For Compute-Intensive Applications. IPCCC 2018: 1-8 - [c23]Shrikant S. Jadhav, Noah LaMoyne, Alan Chen, Clay Gloster, Dylan Yang, Sunmin Yun, Youngsoo Kim:
Building an Acceleration Overlay for Novice Students. SoCC 2018: 136-139 - 2017
- [c22]Youngsoo Kim, Marcus Garcia, Alan Chen, Nathan Wong, Shrikant Jadhav, Clay S. Gloster Jr.:
Smart City Service Acceleration on FPGAs. BigDataService 2017: 243-248 - [c21]Youngsoo Kim, Hossein Shahdoost, Shrikant Jadhav, Clay S. Gloster Jr.:
Improving the Accuracy of Arctan for Face Detection. FCCM 2017: 202 - 2016
- [c20]Youngsoo Kim, Alan Chen, Shrikant Jadhav, Clay S. Gloster Jr., Thuy Le, Ping Hsu:
Project based courses in control cyber physical system co-design. WESE 2016: 4:1-4:4 - [c18]Youngsoo Kim, Shrikant Jadhav, Clay S. Gloster Jr.:
Dataflow to Hardware Synthesis Framework on FPGAs. SBAC-PAD (Workshops) 2016: 91-96 - 2015
- [c16]Michaela E. Amoo, Youngsoo Kim, Vance Alford, Shrikant Jadhav, Naser I. El-Bathy, Clay S. Gloster Jr.:
An Automated Design Framework for Floating Point Scientific Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only). FPGA 2015: 263 - [c15]Youngsoo Kim, William Harding, Clay S. Gloster Jr., Winser E. Alexander:
Acceleration of Synthetic Aperture Radar (SAR) Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only). FPGA 2015: 271
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