Toshiyuki Okayasu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▷ joint publications with Daisuke Watanabe

> Home > Persons > Toshiyuki Okayasu

Publications

2013
[c12]
- view
  authority control:
- export record
  dblp key:
  - conf/itc/WatanabeMHASOO13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/WatanabeMHASOO13
Daisuke Watanabe, Shin Masuda, Hideo Hara, Tsuyoshi Ataka, Atsushi Seki, Atsushi Ono, Toshiyuki Okayasu:
30-Gb/s optical and electrical test solution for high-volume testing. ITC 2013: 1-10
2012
[c11]
- view
  authority control:
- export record
  dblp key:
  - conf/itc/IshidaIWKO12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/IshidaIWKO12
Masahiro Ishida, Kiyotaka Ichiyama, Daisuke Watanabe, Masayuki Kawabata, Toshiyuki Okayasu:
Real-time testing method for 16 Gbps 4-PAM signal interface. ITC 2012: 1-10
2011
[c10]
- view
  authority control:
- export record
  dblp key:
  - conf/itc/IshidaIWKO11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/IshidaIWKO11
Masahiro Ishida, Kiyotaka Ichiyama, Daisuke Watanabe, Masayuki Kawabata, Toshiyuki Okayasu:
Real-time testing method for 16 Gbps 4-PAM signal interface. ITC 2011: 1-10
2009
[c9]
- view
  authority control:
- export record
  dblp key:
  - conf/isscc/WatanabeOO09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/WatanabeOO09
Daisuke Watanabe, Atsushi Ono, Toshiyuki Okayasu:
CMOS optical 4-PAM VCSEL driver with modal-dispersion equalizer for 10Gb/s 500m MMF transmission. ISSCC 2009: 106-107
[c8]
- view
  authority control:
- export record
  dblp key:
  - conf/itc/FujibeSYNFWO09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/FujibeSYNFWO09
Tasuku Fujibe, Masakatsu Suda, Kazuhiro Yamamoto, Yoshihito Nagata, Kazuhiro Fujita, Daisuke Watanabe, Toshiyuki Okayasu:
Dynamic arbitrary jitter injection method for ≫6.5Gb/s SerDes testing. ITC 2009: 1-10
2006
[c6]
- view
  authority control:
- export record
  dblp key:
  - conf/isscc/OkayasuSYKSW06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/OkayasuSYKSW06
Toshiyuki Okayasu, Masakatsu Suda, Kazuhiro Yamamoto, Shusuke Kantake, Satoshi Sudou, Daisuke Watanabe:
1.83ps-Resolution CMOS Dynamic Arbitrary Timing Generator for >4GHz ATE Applications. ISSCC 2006: 2122-2131
2005
[c4]
- view
  authority control:
- export record
  dblp key:
  - conf/itc/SudaYOKSW05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/SudaYOKSW05
Masakatsu Suda, Kazuhiro Yamamoto, Toshiyuki Okayasu, Shusuke Kantake, Satoshi Sudou, Daisuke Watanabe:
CMOS high-speed, high-precision timing generator for 4.266-Gbps memory test system. ITC 2005: 9
2004
[c3]
- view
  authority control:
- export record
  dblp key:
  - conf/itc/WatanabeSO04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/WatanabeSO04
Daisuke Watanabe, Masakatsu Suda, Toshiyuki Okayasu:
34.1Gbps Low Jitter, Low BER High-Speed Parallel CMOS Interface for Interconnections in High-Speed Memory Test System. ITC 2004: 1255-1262

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.