Chih-Fan Liao

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◁ ▷ joint publications with coauthor community group 1

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Publications

2014
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Ming-Da Tsai, Chih-Fan Liao, Chi-Yun Wang, Yi-Bin Lee, Bosen Tzeng, Guang-Kaai Dehng:
20.7 A multi-band inductor-less SAW-less 2G/3G-TD-SCDMA cellular receiver in 40nm CMOS. ISSCC 2014: 354-355
2012
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Yuan-Hung Chung, Min Chen, Wei-Kai Hong, Jie-Wei Lai, Sheng-Jau Wong, Chien-Wei Kuan, Hong-Lin Chu, Chihun Lee, Chih-Fan Liao, Hsuan-Yu Liu, Hong-Kai Hsu, Li-Chun Ko, Kuo-Hao Chen, Chao-Hsin Lu, Tsung-Ming Chen, YuLi Hsueh, Chunwei Chang, Yi-Hsien Cho, Chih-Hsien Shen, Yuan Sun, Eng-Chuan Low, Xudong Jiang, Deyong Hu, Weimin Shu, Jhy-Rong Chen, Jui-Lin Hsu, Chia-Jui Hsu, Jing-Hong Conan Zhan, Osama Shana'a, Guang-Kaai Dehng, George Chien:
A 4-in-1 (WiFi/BT/FM/GPS) connectivity SoC with enhanced co-existence performance in 65nm CMOS. ISSCC 2012: 172-174
2008
[j3]
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Chih-Fan Liao, Shen-Iuan Liu:
40 Gb/s Transimpedance-AGC Amplifier and CDR Circuit for Broadband Data Receivers in 90 nm CMOS. IEEE J. Solid State Circuits 43(3): 642-655 (2008)
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Chih-Fan Liao, Shen-Iuan Liu:
A 40 Gb/s CMOS Serial-Link Receiver With Adaptive Equalization and Clock/Data Recovery. IEEE J. Solid State Circuits 43(11): 2492-2502 (2008)
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Chih-Fan Liao, Shen-Iuan Liu:
A 40Gb/s CMOS Serial-Link Receiver with Adaptive Equalization and CDR. ISSCC 2008: 100-101
2007
[j1]
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Chih-Fan Liao, Shen-Iuan Liu:
A Broadband Noise-Canceling CMOS LNA for 3.1-10.6-GHz UWB Receivers. IEEE J. Solid State Circuits 42(2): 329-339 (2007)
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Chih-Fan Liao, Shen-Iuan Liu:
A 40Gb/s Transimpedance-AGC Amplifier with 19dB DR in 90nm CMOS. ISSCC 2007: 54-586
2006
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Chih-Fan Liao, Shen-Iuan Liu:
A 10Gb/s CMOS AGC Amplifier with 35dB Dynamic Range for 10Gb Ethernet. ISSCC 2006: 2092-2101
2005
[c1]
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  - conf/cicc/LiaoL05
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Chih-Fan Liao, Shen-Iuan Liu:
A broadband noise-canceling CMOS LNA for 3.1-10.6-GHz UWB receiver. CICC 2005: 161-164

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