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Xue-mi Zhao
2000 – 2009
- 2007
[c4]Yong Li, Zhiying Wang, Xue-mi Zhao, Jian Ruan, Kui Dai: Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units. Asia-Pacific Computer Systems Architecture Conference 2007: 354-363- 2006
[c3]Xue-mi Zhao, Zhiying Wang: Power Optimization of Interconnection Networks for Transport Triggered Architecture. ESA 2006: 154-159
[c2]Xue-mi Zhao, Zhiying Wang, Hongyi Lu, Kui Dai: A 6.35Mbps 1024-bit RSA crypto coprocessor in a 0.18um CMOS technology. VLSI-SoC 2006: 216-221- 2005
[c1]Jiang-chun Ren, Kui Dai, Zhiying Wang, Xue-mi Zhao, Yuan-man Tong: Design and Implementation a TPM Chip SUP320 by SOC. SEC 2005: 143-154
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last updated on 2012-09-10 15:48 CEST by the dblp team



