Nagaraj Ns

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	2010
c6		Nagaraj Ns, Juan C. Rey, Jamil Kawa, Robert C. Aitken, Christian Lütkemeyer, Vijay Pitchumani, Andrzej J. Strojwas, Steve Trimberger: Who solves the variability problem? DAC 2010: 218-219
c5		Nagaraj Ns, John Byler, Koorosh Nazifi, Venugopal Puvvada, Toshiyuki Saito, Alan Gibbons, S. Balajee: What's cool for the future of ultra low power designs? DAC 2010: 523-524
	2001
c4		Nagaraj Ns, Poras T. Balsara, Cyrus D. Cantrell: Crosstalk Noise Verification in Digital Designs with Interconnect Process Variations. VLSI Design 2001: 365-370
	1999
c3		Lun Ye, Foong-Charn Chang, Peter Feldmann, Rakesh Chadha, Nagaraj Ns, Frank Cano: Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs. DATE 1999: 658-663
c2		Nagaraj Ns, Frank Cano, Sudha Thiruvengadam, Deepak Kapoor: Performance and Reliability Verification of C6201/C6701 Digital Signal Processors. ICCD 1999: 521-
c1		Nagaraj Ns, Poras T. Balsara, Cyrus D. Cantrell: Mini-Tutorial: Bridging the Gap between TCAD and ECAD Methodologies in Deep Sub-Micron Interconnect Extraction and Analysis. VLSI Design 1999: 6-11

Coauthor Index

1	Robert C. Aitken (Rob Aitken)	[c6]
2	S. Balajee	[c5]
3	Poras T. Balsara	[c4] [c1]
4	John Byler	[c5]
5	Frank Cano	[c3] [c2]
6	Cyrus D. Cantrell	[c4] [c1]
7	Rakesh Chadha	[c3]
8	Foong-Charn Chang	[c3]
9	Peter Feldmann	[c3]
10	Alan Gibbons	[c5]
11	Deepak Kapoor	[c2]
12	Jamil Kawa	[c6]
13	Christian Lütkemeyer	[c6]
14	Koorosh Nazifi	[c5]
15	Vijay Pitchumani	[c6]
16	Venugopal Puvvada	[c5]
17	Juan C. Rey	[c6]
18	Toshiyuki Saito	[c5]
19	Andrzej J. Strojwas (Andreas J. Strojwas)	[c6]
20	Sudha Thiruvengadam	[c2]
21	Steve Trimberger	[c6]
22	Lun Ye	[c3]

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