BibTeX records: Hsin-Chou Chi

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@inproceedings{DBLP:conf/gcce/ChiLT14,
  author       = {Hsin{-}Chou Chi and
                  Han{-}Sheng Liu and
                  Hsi{-}Che Tseng},
  title        = {A high-performance {VLSI} architecture for variable block size motion
                  estimation},
  booktitle    = {{IEEE} 3rd Global Conference on Consumer Electronics, {GCCE} 2014,
                  Tokyo, Japan, 7-10 October 2014},
  pages        = {123--124},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/GCCE.2014.7031303},
  doi          = {10.1109/GCCE.2014.7031303},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/gcce/ChiLT14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/gcce/ChiTJ13,
  author       = {Hsin{-}Chou Chi and
                  Hsi{-}Che Tseng and
                  Chia{-}Wei Jeng},
  title        = {Reconfigurable {VLSI} digital filters for tolerating multiple timing
                  errors},
  booktitle    = {{IEEE} 2nd Global Conference on Consumer Electronics, {GCCE} 2013,
                  Tokyo, Japan, 1-4 October 2013},
  pages        = {149--150},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/GCCE.2013.6664779},
  doi          = {10.1109/GCCE.2013.6664779},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/gcce/ChiTJ13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hpcc/ChiFH12,
  author       = {Hsin{-}Chou Chi and
                  Jr{-}Fen Ferng and
                  Yu{-}Chen Hsieh},
  editor       = {Geyong Min and
                  Jia Hu and
                  Lei (Chris) Liu and
                  Laurence Tianruo Yang and
                  Seetharami Seelam and
                  Laurent Lef{\`{e}}vre},
  title        = {Area Utilization Based Mapping for Network-on-chip Architectures with
                  Over-sized {IP} Cores},
  booktitle    = {14th {IEEE} International Conference on High Performance Computing
                  and Communication {\&} 9th {IEEE} International Conference on
                  Embedded Software and Systems, {HPCC-ICESS} 2012, Liverpool, United
                  Kingdom, June 25-27, 2012},
  pages        = {1520--1525},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/HPCC.2012.222},
  doi          = {10.1109/HPCC.2012.222},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/hpcc/ChiFH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isocc/ChiTT11,
  author       = {Hsin{-}Chou Chi and
                  Hsi{-}Che Tseng and
                  Kun{-}Lin Tsai},
  title        = {Design of timing-error-resilient systolic arrays for matrix multiplication},
  booktitle    = {International SoC Design Conference, {ISOCC} 2011, Jeju, South Korea,
                  November 17-18, 2011},
  pages        = {219--222},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISOCC.2011.6138749},
  doi          = {10.1109/ISOCC.2011.6138749},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isocc/ChiTT11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/nesea/ChiTY11,
  author       = {Hsin{-}Chou Chi and
                  Hsi{-}Che Tseng and
                  Chih{-}Ling Yang},
  title        = {Efficient diagnosable design of the {IEEE} {P1500} architecture for
                  SoC testing},
  booktitle    = {Proceedings of the 2nd {IEEE} International Conference on Networked
                  Embedded Systems for Enterprise Applications, {NESEA} 2011, Perth,
                  Australia, December 8-9, 2011},
  pages        = {1--7},
  publisher    = {{IEEE} Computer Society},
  year         = {2011},
  url          = {https://doi.org/10.1109/NESEA.2011.6144939},
  doi          = {10.1109/NESEA.2011.6144939},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/nesea/ChiTY11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isvlsi/ChiJC10,
  author       = {Hsin{-}Chou Chi and
                  Yu{-}Hong Jhang and
                  Wen{-}Shu Chen},
  title        = {Tree-Based Routing for Faulty On-Chip Networks with Mesh Topology},
  booktitle    = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2010, 5-7
                  July 2010, Lixouri Kefalonia, Greece},
  pages        = {321--326},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISVLSI.2010.72},
  doi          = {10.1109/ISVLSI.2010.72},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/ChiJC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sies/ChiCW10,
  author       = {Hsin{-}Chou Chi and
                  Tat{-}Seng Chang and
                  Chia{-}Ming Wu},
  title        = {Design of a Reconfigurable Pipelined Switch for Faulty On-Chip Networks},
  booktitle    = {{IEEE} Fifth International Symposium on Industrial Embedded Systems,
                  {SIES} 2010, University of Trento, Italy, July 7-9, 2010},
  pages        = {51--56},
  publisher    = {{IEEE}},
  year         = {2010},
  timestamp    = {Wed, 25 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/sies/ChiCW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ciss/ChiTY09,
  author       = {Hsin{-}Chou Chi and
                  Hsi{-}Che Tseng and
                  Chih{-}Ling Yang},
  title        = {Efficient diagnosis of scan chains with single stuck-at faults},
  booktitle    = {43rd Annual Conference on Information Sciences and Systems, {CISS}
                  2009, The John Hopkins University, Baltimore, MD, USA, 18-20 March
                  2009},
  pages        = {473--476},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/CISS.2009.5054767},
  doi          = {10.1109/CISS.2009.5054767},
  timestamp    = {Wed, 16 Oct 2019 14:14:51 +0200},
  biburl       = {https://dblp.org/rec/conf/ciss/ChiTY09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/delta/ChiWL08,
  author       = {Hsin{-}Chou Chi and
                  Chia{-}Ming Wu and
                  Jun{-}Hui Lee},
  title        = {Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip
                  Architectures},
  booktitle    = {4th {IEEE} International Symposium on Electronic Design, Test and
                  Applications, {DELTA} 2008, Hong Kong, January 23-25, 2008},
  pages        = {415--420},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/DELTA.2008.18},
  doi          = {10.1109/DELTA.2008.18},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/delta/ChiWL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ddecs/ChiWW06,
  author       = {Hsin{-}Chou Chi and
                  Chia{-}Ming Wu and
                  Sung{-}Tze Wu},
  editor       = {Matteo Sonza Reorda and
                  Ondrej Nov{\'{a}}k and
                  Bernd Straube and
                  Hana Kub{\'{a}}tov{\'{a}} and
                  Zdenek Kot{\'{a}}sek and
                  Pavel Kubal{\'{\i}}k and
                  Raimund Ubar and
                  Jir{\'{\i}} Bucek},
  title        = {A Switch Supporting Circuit and Packet Switching for On-Chip Networks},
  booktitle    = {Proceedings of the 9th {IEEE} Workshop on Design {\&} Diagnostics
                  of Electronic Circuits {\&} Systems {(DDECS} 2006), Prague, Czech
                  Republic, April 18-21, 2006},
  pages        = {226--227},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/DDECS.2006.1649619},
  doi          = {10.1109/DDECS.2006.1649619},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ddecs/ChiWW06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/ChiW06,
  author       = {Hsin{-}Chou Chi and
                  Chia{-}Ming Wu},
  title        = {An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures},
  booktitle    = {{IFIP} VLSI-SoC 2006, {IFIP} {WG} 10.5 International Conference on
                  Very Large Scale Integration of System-on-Chip, Nice, France, 16-18
                  October 2006},
  pages        = {68--73},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/VLSISOC.2006.313206},
  doi          = {10.1109/VLSISOC.2006.313206},
  timestamp    = {Wed, 24 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/ChiW06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/euc/ChiW05,
  author       = {Hsin{-}Chou Chi and
                  Chia{-}Ming Wu},
  editor       = {Laurence Tianruo Yang and
                  Makoto Amamiya and
                  Zhen Liu and
                  Minyi Guo and
                  Franz J. Rammig},
  title        = {Efficient Switches for Network-on-Chip Based Embedded Systems},
  booktitle    = {Embedded and Ubiquitous Computing - {EUC} 2005, International Conference
                  {EUC} 2005, Nagasaki, Japan, December 6-9, 2005, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3824},
  pages        = {67--76},
  publisher    = {Springer},
  year         = {2005},
  url          = {https://doi.org/10.1007/11596356\_10},
  doi          = {10.1007/11596356\_10},
  timestamp    = {Tue, 14 May 2019 10:00:47 +0200},
  biburl       = {https://dblp.org/rec/conf/euc/ChiW05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/pdp/ChiW03,
  author       = {Hsin{-}Chou Chi and
                  Wen{-}Jen Wu},
  title        = {Routing Tree Construction for Interconnection Network with Irregular
                  Topologies},
  booktitle    = {11th Euromicro Workshop on Parallel, Distributed and Network-Based
                  Processing {(PDP} 2003), 5-7 February 2003, Genova, Italy},
  pages        = {157--164},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/EMPDP.2003.1183582},
  doi          = {10.1109/EMPDP.2003.1183582},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/pdp/ChiW03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icpads/ChiT97,
  author       = {Hsin{-}Chou Chi and
                  Chih{-}Tsung Tang},
  title        = {A Deadlock-Free Routing Scheme for Interconnection Networks with Irregular
                  Topologies},
  booktitle    = {1997 International Conference on Parallel and Distributed Systems
                  {(ICPADS} '97), 11-13 December 1997, Seoul, Korea, Proceedings},
  pages        = {88--95},
  publisher    = {{IEEE} Computer Society},
  year         = {1997},
  url          = {https://doi.org/10.1109/ICPADS.1997.652534},
  doi          = {10.1109/ICPADS.1997.652534},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icpads/ChiT97.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/compcon/ChiT94,
  author       = {Hsin{-}Chou Chi and
                  Yuval Tamir},
  title        = {Starvation Prevention for Arbiters of Crossbars with Multi-Queue Input
                  Buffers},
  booktitle    = {Spring {COMPCON} 94, Digest of Papers, San Francisco, California,
                  USA, February 28 - March 4, 1994},
  pages        = {292--297},
  publisher    = {{IEEE} Computer Society},
  year         = {1994},
  url          = {https://doi.org/10.1109/CMPCON.1994.282896},
  doi          = {10.1109/CMPCON.1994.282896},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/compcon/ChiT94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tpds/TamirC93,
  author       = {Yuval Tamir and
                  Hsin{-}Chou Chi},
  title        = {Symmetric Crossbar Arbiters for {VLSI} Communication Switches},
  journal      = {{IEEE} Trans. Parallel Distributed Syst.},
  volume       = {4},
  number       = {1},
  pages        = {13--27},
  year         = {1993},
  url          = {https://doi.org/10.1109/71.205650},
  doi          = {10.1109/71.205650},
  timestamp    = {Fri, 02 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tpds/TamirC93.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/ChiT91,
  author       = {Hsin{-}Chou Chi and
                  Yuval Tamir},
  title        = {Decomposed Arbiters for Large Crossbars with Multi-Queue Input Buffers},
  booktitle    = {Proceedings 1991 {IEEE} International Conference on Computer Design:
                  {VLSI} in Computer {\&} Processors, {ICCD} '91, Cambridge, MA,
                  USA, October 14-16, 1991},
  pages        = {233--238},
  publisher    = {{IEEE} Computer Society},
  year         = {1991},
  url          = {https://doi.org/10.1109/ICCD.1991.139888},
  doi          = {10.1109/ICCD.1991.139888},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/ChiT91.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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