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ORCIDBibTeX records: Jacob A. Abraham
@inproceedings{DBLP:conf/isqed/MaACA23,
author = {Kwondo Ma and
Chandramouli N. Amarnath and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {Secure Control Loop Execution of Cyber-Physical Devices Using Predictive
State Space Checks},
booktitle = {24th International Symposium on Quality Electronic Design, {ISQED}
2023, San Francisco, CA, USA, April 5-7, 2023},
pages = {1--8},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISQED57927.2023.10129293},
doi = {10.1109/ISQED57927.2023.10129293},
timestamp = {Thu, 01 Jun 2023 22:29:52 +0200},
biburl = {https://dblp.org/rec/conf/isqed/MaACA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ewc/AbualigahSDA22,
author = {Laith Mohammad Abualigah and
Mohammad Shehab and
Ali Diabat and
Jacob A. Abraham},
title = {Selection scheme sensitivity for a hybrid Salp Swarm Algorithm: analysis
and applications},
journal = {Eng. Comput.},
volume = {38},
number = {2},
pages = {1149--1175},
year = {2022},
url = {https://doi.org/10.1007/s00366-020-01067-y},
doi = {10.1007/S00366-020-01067-Y},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ewc/AbualigahSDA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/PhamAC21,
author = {Phuoc Pham and
Jacob A. Abraham and
Jaeyong Chung},
title = {Training Multi-Bit Quantized and Binarized Networks with a Learnable
Symmetric Quantizer},
journal = {{IEEE} Access},
volume = {9},
pages = {47194--47203},
year = {2021},
url = {https://doi.org/10.1109/ACCESS.2021.3067889},
doi = {10.1109/ACCESS.2021.3067889},
timestamp = {Thu, 29 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/PhamAC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KalyanamMBA21,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {A Current and Temperature Limiting System in a 7-nm Hexagon{\texttrademark}
Compute Digital Signal Processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {3},
pages = {814--823},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2020.3047612},
doi = {10.1109/JSSC.2020.3047612},
timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/KalyanamMBA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KalyanamMBA21a,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {A Proactive System for Voltage-Droop Mitigation in a 7-nm Hexagon{\texttrademark}
Processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {4},
pages = {1166--1175},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2020.3043786},
doi = {10.1109/JSSC.2020.3043786},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/KalyanamMBA21a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tdsc/BanerjeeSAC21,
author = {Suvadeep Banerjee and
Balavinayagam Samynathan and
Jacob A. Abraham and
Abhijit Chatterjee},
title = {Real-Time Error Detection in Nonlinear Control Systems Using Machine
Learning Assisted State-Space Encoding},
journal = {{IEEE} Trans. Dependable Secur. Comput.},
volume = {18},
number = {2},
pages = {576--592},
year = {2021},
url = {https://doi.org/10.1109/TDSC.2019.2903049},
doi = {10.1109/TDSC.2019.2903049},
timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tdsc/BanerjeeSAC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2104-00210,
author = {Phuoc Pham and
Jacob A. Abraham and
Jaeyong Chung},
title = {Training Multi-bit Quantized and Binarized Networks with {A} Learnable
Symmetric Quantizer},
journal = {CoRR},
volume = {abs/2104.00210},
year = {2021},
url = {https://arxiv.org/abs/2104.00210},
eprinttype = {arXiv},
eprint = {2104.00210},
timestamp = {Mon, 12 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2104-00210.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/KimA20,
author = {Byoungho Kim and
Jacob A. Abraham},
title = {Built-in Harmonic Prediction Scheme for Embedded Segmented-Data-Converters},
journal = {{IEEE} Access},
volume = {8},
pages = {7851--7860},
year = {2020},
url = {https://doi.org/10.1109/ACCESS.2020.2964632},
doi = {10.1109/ACCESS.2020.2964632},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/KimA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/KalyanamMBA20,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {Randomized Pulse-Modulating Instruction-Issue Control Circuit for
a Current and Temperature Limiting System in a 7nm Hexagon{\texttrademark}
Compute {DSP}},
booktitle = {2020 {IEEE} Custom Integrated Circuits Conference, {CICC} 2020, Boston,
MA, USA, March 22-25, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CICC48029.2020.9075933},
doi = {10.1109/CICC48029.2020.9075933},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/KalyanamMBA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KalyanamMSA20,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Michael Spence and
Jacob A. Abraham},
title = {Functional Test Sequences for Inducing Voltage Droops in a Multi-Threaded
Processor},
booktitle = {{IEEE} International Test Conference, {ITC} 2020, Washington, DC,
USA, November 1-6, 2020},
pages = {1--10},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ITC44778.2020.9325271},
doi = {10.1109/ITC44778.2020.9325271},
timestamp = {Mon, 25 Jan 2021 08:44:58 +0100},
biburl = {https://dblp.org/rec/conf/itc/KalyanamMSA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KalyanamMBA20,
author = {Vijay Kiran Kalyanam and
Eric Mahurin and
Keith A. Bowman and
Jacob A. Abraham},
title = {A Proactive Voltage-Droop-Mitigation System in a 7nm Hexagon{\texttrademark}
Processor},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162808},
doi = {10.1109/VLSICIRCUITS18222.2020.9162808},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KalyanamMBA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/FangZSA19,
author = {Jie Fang and
Chaoming Zhang and
Frank Singor and
Jacob A. Abraham},
title = {A Broadband {CMOS} {RF} Front End for Direct Sampling Satellite Receivers},
journal = {{IEEE} J. Solid State Circuits},
volume = {54},
number = {8},
pages = {2140--2148},
year = {2019},
url = {https://doi.org/10.1109/JSSC.2019.2915619},
doi = {10.1109/JSSC.2019.2915619},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/FangZSA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tie/KimA19,
author = {Byoungho Kim and
Jacob A. Abraham},
title = {Spectral Leakage-Driven Loopback Scheme for Prediction of Mixed-Signal
Circuit Specifications},
journal = {{IEEE} Trans. Ind. Electron.},
volume = {66},
number = {1},
pages = {586--594},
year = {2019},
url = {https://doi.org/10.1109/TIE.2018.2829667},
doi = {10.1109/TIE.2018.2829667},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tie/KimA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChengMABBCCLSSS19,
author = {Eric Cheng and
Daniel Mueller{-}Gritschneder and
Jacob A. Abraham and
Pradip Bose and
Alper Buyuktosunoglu and
Deming Chen and
Hyungmin Cho and
Yanjing Li and
Uzair Sharif and
Kevin Skadron and
Mircea Stan and
Ulf Schlichtmann and
Subhasish Mitra},
title = {Cross-Layer Resilience: Challenges, Insights, and the Road Ahead},
booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
{DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
pages = {198},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3316781.3323474},
doi = {10.1145/3316781.3323474},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/ChengMABBCCLSSS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Abraham19,
author = {Jacob A. Abraham},
editor = {Dimitris Gizopoulos and
Dan Alexandrescu and
Panagiota Papavramidou and
Michail Maniatakos},
title = {Resiliency Demands on Next Generation Critical Embedded Systems},
booktitle = {25th {IEEE} International Symposium on On-Line Testing and Robust
System Design, {IOLTS} 2019, Rhodes, Greece, July 1-3, 2019},
pages = {135--138},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IOLTS.2019.8854420},
doi = {10.1109/IOLTS.2019.8854420},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/iolts/Abraham19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChengMSCCSSLABM18,
author = {Eric Cheng and
Shahrzad Mirkhani and
Lukasz G. Szafaryn and
Chen{-}Yong Cher and
Hyungmin Cho and
Kevin Skadron and
Mircea R. Stan and
Klas Lilja and
Jacob A. Abraham and
Pradip Bose and
Subhasish Mitra},
title = {Tolerating Soft Errors in Processor Cores Using {CLEAR} (Cross-Layer
Exploration for Architecting Resilience)},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {9},
pages = {1839--1852},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2017.2752705},
doi = {10.1109/TCAD.2017.2752705},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChengMSCCSSLABM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ChaudhariA18,
author = {Ameya Chaudhari and
Jacob A. Abraham},
editor = {Dimitris Gizopoulos and
Dan Alexandrescu and
Mihalis Maniatakos and
Panagiota Papavramidou},
title = {Effective Control Flow Integrity Checks for Intrusion Detection},
booktitle = {24th {IEEE} International Symposium on On-Line Testing And Robust
System Design, {IOLTS} 2018, Platja D'Aro, Spain, July 2-4, 2018},
pages = {103--108},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/IOLTS.2018.8474130},
doi = {10.1109/IOLTS.2018.8474130},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/iolts/ChaudhariA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/TianSA18,
author = {Ninghan Tian and
Daniel G. Saab and
Jacob A. Abraham},
editor = {Dimitris Gizopoulos and
Dan Alexandrescu and
Mihalis Maniatakos and
Panagiota Papavramidou},
title = {{ESIFT:} Efficient System for Error Injection},
booktitle = {24th {IEEE} International Symposium on On-Line Testing And Robust
System Design, {IOLTS} 2018, Platja D'Aro, Spain, July 2-4, 2018},
pages = {201--206},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/IOLTS.2018.8474160},
doi = {10.1109/IOLTS.2018.8474160},
timestamp = {Mon, 08 Oct 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/TianSA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MomtazBPAC18,
author = {Md Imran Momtaz and
Suvadeep Banerjee and
Sujay Pandey and
Jacob A. Abraham and
Abhijit Chatterjee},
editor = {Dimitris Gizopoulos and
Dan Alexandrescu and
Mihalis Maniatakos and
Panagiota Papavramidou},
title = {Cross-Layer Control Adaptation for Autonomous System Resilience},
booktitle = {24th {IEEE} International Symposium on On-Line Testing And Robust
System Design, {IOLTS} 2018, Platja D'Aro, Spain, July 2-4, 2018},
pages = {261--264},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/IOLTS.2018.8474159},
doi = {10.1109/IOLTS.2018.8474159},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/MomtazBPAC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/FangTYSZSA17,
author = {Jie Fang and
Shankar Thirunakkarasu and
Xuefeng Yu and
Fabian Silva{-}Rivas and
Chaoming Zhang and
Frank Singor and
Jacob A. Abraham},
title = {A 5-GS/s 10-b 76-mW Time-Interleaved {SAR} {ADC} in 28 nm {CMOS}},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {64-I},
number = {7},
pages = {1673--1683},
year = {2017},
url = {https://doi.org/10.1109/TCSI.2017.2661481},
doi = {10.1109/TCSI.2017.2661481},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/FangTYSZSA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChengABBCCCCLLM17,
author = {Eric Cheng and
Jacob A. Abraham and
Pradip Bose and
Alper Buyuktosunoglu and
Keith A. Campbell and
Deming Chen and
Chen{-}Yong Cher and
Hyungmin Cho and
Binh Q. Le and
Klas Lilja and
Shahrzad Mirkhani and
Kevin Skadron and
Mircea Stan and
Lukasz G. Szafaryn and
Christos Vezyrtzis and
Subhasish Mitra},
title = {Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights},
booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017,
Boston, MA, USA, November 5-8, 2017},
pages = {593--596},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICCD.2017.103},
doi = {10.1109/ICCD.2017.103},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChengABBCCCCLLM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/AbrahamBC17,
author = {Jacob A. Abraham and
Suvadeep Banerjee and
Abhijit Chatterjee},
title = {Design of efficient error resilience in signal processing and control
systems: From algorithms to circuits},
booktitle = {23rd {IEEE} International Symposium on On-Line Testing and Robust
System Design, {IOLTS} 2017, Thessaloniki, Greece, July 3-5, 2017},
pages = {192--195},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/IOLTS.2017.8046241},
doi = {10.1109/IOLTS.2017.8046241},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/AbrahamBC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KalyanamSA17,
author = {Vijay Kiran Kalyanam and
Peter G. Sassone and
Jacob A. Abraham},
title = {Power prediction of embedded scalar and vector processor: Challenges
and solutions},
booktitle = {18th International Symposium on Quality Electronic Design, {ISQED}
2017, Santa Clara, CA, USA, March 14-15, 2017},
pages = {221--228},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISQED.2017.7918320},
doi = {10.1109/ISQED.2017.7918320},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/KalyanamSA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ZhangSA17,
author = {Tong Zhang and
Daniel G. Saab and
Jacob A. Abraham},
title = {Automatic Assertion Generation for Simulation, Formal Verification
and Emulation},
booktitle = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
Bochum, Germany, July 3-5, 2017},
pages = {471--476},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISVLSI.2017.88},
doi = {10.1109/ISVLSI.2017.88},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ZhangSA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1709-09921,
author = {Eric Cheng and
Shahrzad Mirkhani and
Lukasz G. Szafaryn and
Chen{-}Yong Cher and
Hyungmin Cho and
Kevin Skadron and
Mircea R. Stan and
Klas Lilja and
Jacob A. Abraham and
Pradip Bose and
Subhasish Mitra},
title = {Tolerating Soft Errors in Processor Cores Using {CLEAR} (Cross-Layer
Exploration for Architecting Resilience)},
journal = {CoRR},
volume = {abs/1709.09921},
year = {2017},
url = {http://arxiv.org/abs/1709.09921},
eprinttype = {arXiv},
eprint = {1709.09921},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1709-09921.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RajaBZA16,
author = {Immanuel Raja and
Gaurab Banerjee and
Mohamad A. Zeidan and
Jacob A. Abraham},
title = {A 0.1-3.5-GHz Duty-Cycle Measurement and Correction Technique in 130-nm
{CMOS}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {5},
pages = {1975--1983},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2478804},
doi = {10.1109/TVLSI.2015.2478804},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/RajaBZA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HuA16,
author = {Shih{-}Hsin Hu and
Jacob A. Abraham},
title = {Quality Aware Error Detection in 2-D Separable Linear Transformation},
booktitle = {25th {IEEE} Asian Test Symposium, {ATS} 2016, Hiroshima, Japan, November
21-24, 2016},
pages = {257--262},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ATS.2016.10},
doi = {10.1109/ATS.2016.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HuA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChengMSCCSSLABM16,
author = {Eric Cheng and
Shahrzad Mirkhani and
Lukasz G. Szafaryn and
Chen{-}Yong Cher and
Hyungmin Cho and
Kevin Skadron and
Mircea R. Stan and
Klas Lilja and
Jacob A. Abraham and
Pradip Bose and
Subhasish Mitra},
title = {Clear: c{\unicode{818}}ross-l{\unicode{818}}ayer e{\unicode{818}}xploration
for a{\unicode{818}}rchitecting r{\unicode{818}}esilience combining
hardware and software techniques to tolerate soft errors in processor
cores},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {68:1--68:6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2897996},
doi = {10.1145/2897937.2897996},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/ChengMSCCSSLABM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/Abraham16,
author = {Jacob A. Abraham},
title = {Cross-layer resilience: are high-level techniques always better?},
booktitle = {{IEEE} International High Level Design Validation and Test Workshop,
{HLDVT} 2016, Santa Cruz, CA, USA, October 7-8, 2016},
pages = {78},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/HLDVT.2016.7748258},
doi = {10.1109/HLDVT.2016.7748258},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/Abraham16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BanerjeeCA16,
author = {Suvadeep Banerjee and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {Efficient cross-layer concurrent error detection in nonlinear control
systems using mapped predictive check states},
booktitle = {2016 {IEEE} International Test Conference, {ITC} 2016, Fort Worth,
TX, USA, November 15-17, 2016},
pages = {1--10},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/TEST.2016.7805861},
doi = {10.1109/TEST.2016.7805861},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/BanerjeeCA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/BhamidipatiSA16,
author = {Harini Bhamidipati and
Daniel G. Saab and
Jacob A. Abraham},
title = {Single Trojan injection model generation and detection},
booktitle = {17th Latin-American Test Symposium, {LATS} 2016, Foz do Iguacu, Brazil,
April 6-8, 2016},
pages = {181},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/LATW.2016.7483361},
doi = {10.1109/LATW.2016.7483361},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/latw/BhamidipatiSA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/BanerjeeCA16,
author = {Suvadeep Banerjee and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {Checksum based error detection in linearized representations of non
linear control systems},
booktitle = {17th Latin-American Test Symposium, {LATS} 2016, Foz do Iguacu, Brazil,
April 6-8, 2016},
pages = {182},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/LATW.2016.7483362},
doi = {10.1109/LATW.2016.7483362},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/BanerjeeCA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AbrahamC16,
author = {Jacob A. Abraham and
Abhijit Chatterjee},
title = {Design of Self Calibrating and Error Resilient Mixed-Signal Systems
for Signal Processing, Communications and Control},
booktitle = {29th International Conference on {VLSI} Design and 15th International
Conference on Embedded Systems, {VLSID} 2016, Kolkata, India, January
4-8, 2016},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/VLSID.2016.127},
doi = {10.1109/VLSID.2016.127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AbrahamC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/StrojwasAHS16,
author = {Andrzej J. Strojwas and
Jacob A. Abraham and
Hong Hao and
Max M. Shulaker},
title = {Keynote address: Challenges and opportunities in electrical characterization
and test for 14nm and below},
booktitle = {34th {IEEE} {VLSI} Test Symposium, {VTS} 2016, Las Vegas, NV, USA,
April 25-27, 2016},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/VTS.2016.7477260},
doi = {10.1109/VTS.2016.7477260},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/StrojwasAHS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ChengMSCCSSLABM16,
author = {Eric Cheng and
Shahrzad Mirkhani and
Lukasz G. Szafaryn and
Chen{-}Yong Cher and
Hyungmin Cho and
Kevin Skadron and
Mircea R. Stan and
Klas Lilja and
Jacob A. Abraham and
Pradip Bose and
Subhasish Mitra},
title = {{CLEAR:} Cross-Layer Exploration for Architecting Resilience - Combining
Hardware and Software Techniques to Tolerate Soft Errors in Processor
Cores},
journal = {CoRR},
volume = {abs/1604.03062},
year = {2016},
url = {http://arxiv.org/abs/1604.03062},
eprinttype = {arXiv},
eprint = {1604.03062},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/ChengMSCCSSLABM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/LeeA15,
author = {Hsun{-}Cheng Lee and
Jacob A. Abraham},
title = {Digital Calibration for 8-bit Delay Line {ADC} Using Harmonic Distortion
Correction},
journal = {J. Electron. Test.},
volume = {31},
number = {2},
pages = {127--138},
year = {2015},
url = {https://doi.org/10.1007/s10836-015-5516-6},
doi = {10.1007/S10836-015-5516-6},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/LeeA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/JangCA15,
author = {Eun Jung Jang and
Jaeyong Chung and
Jacob A. Abraham},
title = {Delay Defect Diagnosis Methodology Using Path Delay Measurements},
journal = {{IEICE} Trans. Electron.},
volume = {98-C},
number = {10},
pages = {991--994},
year = {2015},
url = {https://doi.org/10.1587/transele.E98.C.991},
doi = {10.1587/TRANSELE.E98.C.991},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/JangCA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MirkhaniMCA15,
author = {Shahrzad Mirkhani and
Subhasish Mitra and
Chen{-}Yong Cher and
Jacob A. Abraham},
editor = {Wolfgang Nebel and
David Atienza},
title = {Efficient soft error vulnerability estimation of complex designs},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {103--108},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755776},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MirkhaniMCA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FordKAS15,
author = {Gregory Ford and
Aswin Krishna and
Jacob A. Abraham and
Daniel G. Saab},
editor = {George A. Constantinides and
Deming Chen},
title = {Formal Verification {ATPG} Search Engine Emulator (Abstract Only)},
booktitle = {Proceedings of the 2015 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Monterey, CA, USA, February 22-24, 2015},
pages = {264},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2684746.2689105},
doi = {10.1145/2684746.2689105},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/FordKAS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KalyanamSA15,
author = {Vijay Kiran Kalyanam and
Martin Saint{-}Laurent and
Jacob A. Abraham},
title = {Power-aware multi-voltage custom memory models for enhancing {RTL}
and low power verification},
booktitle = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015,
New York City, NY, USA, October 18-21, 2015},
pages = {24--31},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICCD.2015.7357080},
doi = {10.1109/ICCD.2015.7357080},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KalyanamSA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/AbrahamIGAZ15,
author = {Jacob A. Abraham and
Ravishankar K. Iyer and
Dimitris Gizopoulos and
Dan Alexandrescu and
Yervant Zorian},
title = {The future of fault tolerant computing},
booktitle = {21st {IEEE} International On-Line Testing Symposium, {IOLTS} 2015,
Halkidiki, Greece, July 6-8, 2015},
pages = {108--109},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/IOLTS.2015.7229841},
doi = {10.1109/IOLTS.2015.7229841},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/iolts/AbrahamIGAZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AbrahamC15,
author = {Jacob A. Abraham and
Abhijit Chatterjee},
title = {Tutorial {T3:} Error Resilient Real-Time Embedded Systems: Computing,
Communications and Control},
booktitle = {28th International Conference on {VLSI} Design, {VLSID} 2015, Bangalore,
India, January 3-7, 2015},
pages = {6--7},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/VLSID.2015.111},
doi = {10.1109/VLSID.2015.111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AbrahamC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MirkhaniSA15,
author = {Shahrzad Mirkhani and
Balavinayagam Samynathan and
Jacob A. Abraham},
title = {In-depth soft error vulnerability analysis using synthetic benchmarks},
booktitle = {33rd {IEEE} {VLSI} Test Symposium, {VTS} 2015, Napa, CA, USA, April
27-29, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/VTS.2015.7116254},
doi = {10.1109/VTS.2015.7116254},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MirkhaniSA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpca/SnirWAABBBBCCCCDDEEFGGJKLLMMSSH14,
author = {Marc Snir and
Robert W. Wisniewski and
Jacob A. Abraham and
Sarita V. Adve and
Saurabh Bagchi and
Pavan Balaji and
James F. Belak and
Pradip Bose and
Franck Cappello and
Bill Carlson and
Andrew A. Chien and
Paul Coteus and
Nathan DeBardeleben and
Pedro C. Diniz and
Christian Engelmann and
Mattan Erez and
Saverio Fazzari and
Al Geist and
Rinku Gupta and
Fred Johnson and
Sriram Krishnamoorthy and
Sven Leyffer and
Dean Liberty and
Subhasish Mitra and
Todd S. Munson and
Rob Schreiber and
Jon Stearley and
Eric Van Hensbergen},
title = {Addressing failures in exascale computing},
journal = {Int. J. High Perform. Comput. Appl.},
volume = {28},
number = {2},
pages = {129--173},
year = {2014},
url = {https://doi.org/10.1177/1094342014522573},
doi = {10.1177/1094342014522573},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijhpca/SnirWAABBBBCCCCDDEEFGGJKLLMMSSH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/KimA14,
author = {Byoungho Kim and
Jacob A. Abraham},
title = {Dynamic Performance Characterization of Embedded Single-Ended Mixed-Signal
Circuits},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {61-II},
number = {5},
pages = {329--333},
year = {2014},
url = {https://doi.org/10.1109/TCSII.2014.2312639},
doi = {10.1109/TCSII.2014.2312639},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/KimA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/KimA14a,
author = {Byoungho Kim and
Jacob A. Abraham},
title = {Bitstream-Driven Built-In Characterization for Analog and Mixed-Signal
Embedded Circuits},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {61-II},
number = {10},
pages = {743--747},
year = {2014},
url = {https://doi.org/10.1109/TCSII.2014.2335436},
doi = {10.1109/TCSII.2014.2335436},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/KimA14a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MirkhaniCMA14,
author = {Shahrzad Mirkhani and
Hyungmin Cho and
Subhasish Mitra and
Jacob A. Abraham},
title = {Rethinking error injection for effective resilience},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {390--393},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742922},
doi = {10.1109/ASPDAC.2014.6742922},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MirkhaniCMA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/BanerjeeGCA14,
author = {Suvadeep Banerjee and
{\'{A}}lvaro G{\'{o}}mez{-}Pau and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {Error Resilient Real-Time State Variable Systems for Signal Processing
and Control},
booktitle = {23rd {IEEE} Asian Test Symposium, {ATS} 2014, Hangzhou, China, November
16-19, 2014},
pages = {39--44},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ATS.2014.19},
doi = {10.1109/ATS.2014.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/BanerjeeGCA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeeA14,
author = {Hsun{-}Cheng Lee and
Jacob A. Abraham},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {A novel low power 11-bit hybrid {ADC} using flash and delay line architectures},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--4},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.028},
doi = {10.7873/DATE.2014.028},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/LeeA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SchlichtmannKAEGGHNW14,
author = {Ulf Schlichtmann and
Veit Kleeberger and
Jacob A. Abraham and
Adrian Evans and
Christina Gimmler{-}Dumont and
Michael Gla{\ss} and
Andreas Herkersdorf and
Sani R. Nassif and
Norbert Wehn},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Connecting different worlds - Technology abstraction for reliability-aware
design and Test},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--8},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.265},
doi = {10.7873/DATE.2014.265},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SchlichtmannKAEGGHNW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipccc/AbdullaNA14,
author = {Shakeel S. Abdulla and
Haewoon Nam and
Jacob A. Abraham},
title = {A novel algorithm for sparse {FFT} pruning and its applications to
{OFDMA} technology},
booktitle = {{IEEE} 33rd International Performance Computing and Communications
Conference, {IPCCC} 2014, Austin, TX, USA, December 5-7, 2014},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/PCCC.2014.7017080},
doi = {10.1109/PCCC.2014.7017080},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipccc/AbdullaNA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MirkhaniA14,
author = {Shahrzad Mirkhani and
Jacob A. Abraham},
title = {{EAGLE:} {A} regression model for fault coverage estimation using
a simulation based metric},
booktitle = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
October 20-23, 2014},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/TEST.2014.7035347},
doi = {10.1109/TEST.2014.7035347},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MirkhaniA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/LeeA14,
author = {Hsun{-}Cheng Lee and
Jacob A. Abraham},
title = {Harmonic distortion correction for 8-bit delay line {ADC} using gray
code},
booktitle = {15th Latin American Test Workshop - {LATW} 2014, Fortaleza, Brazil,
March 12-15, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/LATW.2014.6841928},
doi = {10.1109/LATW.2014.6841928},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/latw/LeeA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AbrahamGMRRGR14,
author = {Jacob A. Abraham and
Xinli Gu and
Teresa MacLaurin and
Janusz Rajski and
Paul G. Ryan and
Dimitris Gizopoulos and
Matteo Sonza Reorda},
title = {Special session 8B - Panel: In-field testing of SoC devices: Which
solutions by which players?},
booktitle = {32nd {IEEE} {VLSI} Test Symposium, {VTS} 2014, Napa, CA, USA, April
13-17, 2014},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/VTS.2014.6818780},
doi = {10.1109/VTS.2014.6818780},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AbrahamGMRRGR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MirkhaniA14,
author = {Shahrzad Mirkhani and
Jacob A. Abraham},
title = {Fast evaluation of test vector sets using a simulation-based statistical
metric},
booktitle = {32nd {IEEE} {VLSI} Test Symposium, {VTS} 2014, Napa, CA, USA, April
13-17, 2014},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/VTS.2014.6818739},
doi = {10.1109/VTS.2014.6818739},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MirkhaniA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/KimA13,
author = {Byoungho Kim and
Jacob A. Abraham},
title = {Capacitor-Coupled Built-Off Self-Test in Analog and Mixed-Signal Embedded
Systems},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {60-II},
number = {5},
pages = {257--261},
year = {2013},
url = {https://doi.org/10.1109/TCSII.2013.2251953},
doi = {10.1109/TCSII.2013.2251953},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/KimA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZeidanBA13,
author = {Mohamad A. Zeidan and
Gaurab Banerjee and
Jacob A. Abraham},
title = {Asynchronous Measurement of Transient Phase-Shift Resulting From {RF}
Receiver State-Change},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {60-I},
number = {10},
pages = {2740--2751},
year = {2013},
url = {https://doi.org/10.1109/TCSI.2013.2249179},
doi = {10.1109/TCSI.2013.2249179},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ZeidanBA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChungPA13,
author = {Jaeyong Chung and
Joonsung Park and
Jacob A. Abraham},
title = {A Built-In Repair Analyzer With Optimal Repair Rate for Word-Oriented
Memories},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {2},
pages = {281--291},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2011.2182217},
doi = {10.1109/TVLSI.2011.2182217},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ChungPA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChungA13,
author = {Jaeyong Chung and
Jacob A. Abraham},
title = {Concurrent Path Selection Algorithm in Statistical Timing Analysis},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {9},
pages = {1715--1726},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2218136},
doi = {10.1109/TVLSI.2012.2218136},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ChungA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LeeA13,
author = {Hsun{-}Cheng Lee and
Jacob A. Abraham},
title = {Digital Calibration for 8-Bit Delay Line {ADC} Using Harmonic Distortion
Correction},
booktitle = {22nd Asian Test Symposium, {ATS} 2013, Yilan County, Taiwan, November
18-21, 2013},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ATS.2013.33},
doi = {10.1109/ATS.2013.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LeeA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChoMCAM13,
author = {Hyungmin Cho and
Shahrzad Mirkhani and
Chen{-}Yong Cher and
Jacob A. Abraham and
Subhasish Mitra},
title = {Quantitative evaluation of soft error injection techniques for robust
system design},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {101:1--101:10},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488859},
doi = {10.1145/2463209.2488859},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChoMCAM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ParkCA13,
author = {Junyoung Park and
Ameya Chaudhari and
Jacob A. Abraham},
editor = {Enrico Macii},
title = {Non-speculative double-sampling technique to increase energy-efficiency
in a high-performance processor},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {254--257},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.064},
doi = {10.7873/DATE.2013.064},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/ParkCA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/BanerjeeBCA13,
author = {Suvadeep Banerjee and
Aritra Banerjee and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {Real-time checking of linear control systems using analog checksums},
booktitle = {2013 {IEEE} 19th International On-Line Testing Symposium (IOLTS),
Chania, Crete, Greece, July 8-10, 2013},
pages = {122--127},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/IOLTS.2013.6604062},
doi = {10.1109/IOLTS.2013.6604062},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/BanerjeeBCA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ViswanathMSA13,
author = {Vinod Viswanath and
Rajeev Muralidhar and
Harinarayanan Seshadri and
Jacob A. Abraham},
title = {On a rewriting strategy for dynamically managing power constraints
and power dissipation in SoCs},
booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013,
Santa Clara, CA, USA, March 4-6, 2013},
pages = {128--134},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISQED.2013.6523600},
doi = {10.1109/ISQED.2013.6523600},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/ViswanathMSA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PrabhuA13,
author = {Mahesh Prabhu and
Jacob A. Abraham},
title = {Application of under-approximation techniques to functional test generation
targeting hard to detect stuck-at faults},
booktitle = {2013 {IEEE} International Test Conference, {ITC} 2013, Anaheim, CA,
USA, September 6-13, 2013},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/TEST.2013.6651915},
doi = {10.1109/TEST.2013.6651915},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/PrabhuA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HanYA13,
author = {Kihyuk Han and
Joon{-}Sung Yang and
Jacob A. Abraham},
title = {Dynamic Trace Signal Selection for Post-Silicon Validation},
booktitle = {26th International Conference on {VLSI} Design and 12th International
Conference on Embedded Systems, Pune, India, January 5-10, 2013},
pages = {302--307},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VLSID.2013.205},
doi = {10.1109/VLSID.2013.205},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HanYA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChaudhariPA13,
author = {Ameya Chaudhari and
Junyoung Park and
Jacob A. Abraham},
title = {A framework for low overhead hardware based runtime control flow error
detection and recovery},
booktitle = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
April 29 - May 2, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VTS.2013.6548908},
doi = {10.1109/VTS.2013.6548908},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChaudhariPA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HanYA13,
author = {Kihyuk Han and
Joon{-}Sung Yang and
Jacob A. Abraham},
title = {Enhanced algorithm of combining trace and scan signals in post-silicon
validation},
booktitle = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
April 29 - May 2, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VTS.2013.6548915},
doi = {10.1109/VTS.2013.6548915},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/HanYA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YamaguchiARNC13,
author = {Takahiro J. Yamaguchi and
Jacob A. Abraham and
Gordon W. Roberts and
Suriyaprakash Natarajan and
Dennis J. Ciplickas},
title = {Special session 12B: Panel post-silicon validation {\&} test in
huge variance era},
booktitle = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
April 29 - May 2, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VTS.2013.6548945},
doi = {10.1109/VTS.2013.6548945},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YamaguchiARNC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ZhangGA12,
author = {Chaoming Zhang and
Ranjit Gharpurey and
Jacob A. Abraham},
title = {Built-in Self Test of {RF} Subsystems with Integrated Detectors},
journal = {J. Electron. Test.},
volume = {28},
number = {5},
pages = {557--569},
year = {2012},
url = {https://doi.org/10.1007/s10836-012-5315-2},
doi = {10.1007/S10836-012-5315-2},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ZhangGA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/KimA12,
author = {Hyunjin Kim and
Jacob A. Abraham},
title = {A Built-in Self-Test Scheme for Memory Interfaces Timing Test and
Measurement},
journal = {J. Electron. Test.},
volume = {28},
number = {5},
pages = {585--597},
year = {2012},
url = {https://doi.org/10.1007/s10836-012-5324-1},
doi = {10.1007/S10836-012-5324-1},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/KimA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/DasnurkarA12,
author = {Sachin Dileep Dasnurkar and
Jacob A. Abraham},
title = {Calibration Enabled Scalable Current Sensor Module for Quiescent Current
Testing},
journal = {J. Electron. Test.},
volume = {28},
number = {5},
pages = {697--704},
year = {2012},
url = {https://doi.org/10.1007/s10836-012-5327-y},
doi = {10.1007/S10836-012-5327-Y},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/DasnurkarA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/PuNAT12,
author = {Xiao Pu and
Krishnaswamy Nagaraj and
Jacob A. Abraham and
Axel Thomsen},
title = {A Novel fractional-n {PLL} Based on a Simple Reference Multiplier},
journal = {J. Circuits Syst. Comput.},
volume = {21},
number = {6},
year = {2012},
url = {https://doi.org/10.1142/S0218126612400105},
doi = {10.1142/S0218126612400105},
timestamp = {Wed, 29 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcsc/PuNAT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/ViswanathA12,
author = {Vinod Viswanath and
Jacob A. Abraham},
title = {Automatic and Correct Register Transfer Level Annotations for Low
Power Microprocessor Design},
journal = {J. Low Power Electron.},
volume = {8},
number = {4},
pages = {424--439},
year = {2012},
url = {https://doi.org/10.1166/jolpe.2012.1204},
doi = {10.1166/JOLPE.2012.1204},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/ViswanathA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/MohammadA12,
author = {Baker Mohammad and
Jacob A. Abraham},
title = {A reduced voltage swing circuit using a single supply to enable lower
voltage operation for SRAM-based memory},
journal = {Microelectron. J.},
volume = {43},
number = {2},
pages = {110--118},
year = {2012},
url = {https://doi.org/10.1016/j.mejo.2011.11.006},
doi = {10.1016/J.MEJO.2011.11.006},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/MohammadA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChungA12,
author = {Jaeyong Chung and
Jacob A. Abraham},
title = {Refactoring of Timing Graphs and Its Use in Capturing Topological
Correlation in {SSTA}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {4},
pages = {485--496},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2011.2176731},
doi = {10.1109/TCAD.2011.2176731},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChungA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChungXZA12,
author = {Jaeyong Chung and
Jinjun Xiong and
Vladimir Zolotov and
Jacob A. Abraham},
title = {Path Criticality Computation in Parameterized Statistical Timing Analysis
Using a Novel Operator},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {4},
pages = {497--508},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2011.2179042},
doi = {10.1109/TCAD.2011.2179042},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChungXZA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChungXZA12a,
author = {Jaeyong Chung and
Jinjun Xiong and
Vladimir Zolotov and
Jacob A. Abraham},
title = {Testability-Driven Statistical Path Selection},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {8},
pages = {1275--1287},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2012.2190067},
doi = {10.1109/TCAD.2012.2190067},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChungXZA12a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChungA12a,
author = {Jaeyong Chung and
Jacob A. Abraham},
title = {On Computing Criticality in Refactored Timing Graphs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {12},
pages = {1935--1939},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2012.2213819},
doi = {10.1109/TCAD.2012.2213819},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChungA12a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZeidanBGA12,
author = {Mohamad A. Zeidan and
Gaurab Banerjee and
Ranjit Gharpurey and
Jacob A. Abraham},
title = {Phase-Aware Multitone Digital Signal Based Test for {RF} Receivers},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {59-I},
number = {9},
pages = {2097--2110},
year = {2012},
url = {https://doi.org/10.1109/TCSI.2012.2185309},
doi = {10.1109/TCSI.2012.2185309},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ZeidanBGA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/KimA12,
author = {Byoungho Kim and
Jacob A. Abraham},
title = {Imbalance-Based Self-Test for High-Speed Mixed-Signal Embedded Systems},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {59-II},
number = {11},
pages = {785--789},
year = {2012},
url = {https://doi.org/10.1109/TCSII.2012.2220693},
doi = {10.1109/TCSII.2012.2220693},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/KimA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KimA12,
author = {Hyunjin Kim and
Jacob A. Abraham},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {On-chip source synchronous interface timing test scheme with calibration},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1146--1149},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176574},
doi = {10.1109/DATE.2012.6176574},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/KimA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/LeeCA12,
author = {Jae Wook Lee and
Ji Hwan (Paul) Chun and
Jacob A. Abraham},
title = {Indirect method for random jitter measurement on SoCs using critical
path characterization},
booktitle = {17th {IEEE} European Test Symposium, {ETS} 2012, Annecy, France, May
28 - June 1 2012},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ETS.2012.6233022},
doi = {10.1109/ETS.2012.6233022},
timestamp = {Tue, 28 Apr 2020 11:43:43 +0200},
biburl = {https://dblp.org/rec/conf/ets/LeeCA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/PrabhuA12,
author = {Mahesh Prabhu and
Jacob A. Abraham},
title = {Functional test generation for hard to detect stuck-at faults using
{RTL} model checking},
booktitle = {17th {IEEE} European Test Symposium, {ETS} 2012, Annecy, France, May
28 - June 1 2012},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ETS.2012.6233016},
doi = {10.1109/ETS.2012.6233016},
timestamp = {Tue, 28 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/PrabhuA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ChaudhariA12,
author = {Ameya Chaudhari and
Jacob A. Abraham},
title = {Stream cipher hash based execution monitoring {(SCHEM)} framework
for intrusion detection on embedded processors},
booktitle = {18th {IEEE} International On-Line Testing Symposium, {IOLTS} 2012,
Sitges, Spain, June 27-29, 2012},
pages = {162--167},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IOLTS.2012.6313864},
doi = {10.1109/IOLTS.2012.6313864},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/ChaudhariA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MirkhaniAVJE12,
author = {Shahrzad Mirkhani and
Jacob A. Abraham and
Toai Vo and
Hong Shin Jun and
Bill Eklow},
title = {{FALCON:} Rapid statistical fault coverage estimation for complex
designs},
booktitle = {2012 {IEEE} International Test Conference, {ITC} 2012, Anaheim, CA,
USA, November 5-8, 2012},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/TEST.2012.6401584},
doi = {10.1109/TEST.2012.6401584},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MirkhaniAVJE12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ParkUA12,
author = {Junyoung Park and
H. Mert Ustun and
Jacob A. Abraham},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Run-time Prediction of the Optimal Performance Point in DVS-based
Dynamic Thermal Management},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {155--160},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.63},
doi = {10.1109/VLSID.2012.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ParkUA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KimA12,
author = {Hyunjin Kim and
Jacob A. Abraham},
title = {A Built-In Self-Test scheme for {DDR} memory output timing test and
measurement},
booktitle = {30th {IEEE} {VLSI} Test Symposium, {VTS} 2012, Maui, Hawaii, USA,
23-26 April 2012},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VTS.2012.6231072},
doi = {10.1109/VTS.2012.6231072},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/KimA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JangGNA12,
author = {Eun Jung Jang and
Anne Gattiker and
Sani R. Nassif and
Jacob A. Abraham},
title = {An oscillation-based test structure for timing information extraction},
booktitle = {30th {IEEE} {VLSI} Test Symposium, {VTS} 2012, Maui, Hawaii, USA,
23-26 April 2012},
pages = {74--79},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VTS.2012.6231083},
doi = {10.1109/VTS.2012.6231083},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/JangGNA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChunLOLA12,
author = {Ji Hwan (Paul) Chun and
Siew Mooi Lim and
Shao Chee Ong and
Jae Wook Lee and
Jacob A. Abraham},
title = {Test of phase interpolators in high speed I/Os using a sliding window
search},
booktitle = {30th {IEEE} {VLSI} Test Symposium, {VTS} 2012, Maui, Hawaii, USA,
23-26 April 2012},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VTS.2012.6231092},
doi = {10.1109/VTS.2012.6231092},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChunLOLA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ParkA12,
author = {Junyoung Park and
Jacob A. Abraham},
title = {An aging-aware flip-flop design based on accurate, run-time failure
prediction},
booktitle = {30th {IEEE} {VLSI} Test Symposium, {VTS} 2012, Maui, Hawaii, USA,
23-26 April 2012},
pages = {294--299},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VTS.2012.6231069},
doi = {10.1109/VTS.2012.6231069},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ParkA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ParkSA11,
author = {Joonsung Park and
Hongjoong Shin and
Jacob A. Abraham},
title = {Pseudorandom Test of Nonlinear Analog and Mixed-Signal Circuits Based
on a Volterra Series Model},
journal = {J. Electron. Test.},
volume = {27},
number = {3},
pages = {321--334},
year = {2011},
url = {https://doi.org/10.1007/s10836-011-5227-6},
doi = {10.1007/S10836-011-5227-6},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ParkSA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/HanPLCBWOA11,
author = {Kihyuk Han and
Joonsung Park and
Jae Wook Lee and
Jaeyong Chung and
Eonjo Byun and
Cheol{-}Jong Woo and
Sejang Oh and
Jacob A. Abraham},
title = {Off-Chip Skew Measurement and Compensation Module {(SMCM)} Design
for Built-Off Test Chip},
journal = {J. Electron. Test.},
volume = {27},
number = {4},
pages = {429--439},
year = {2011},
url = {https://doi.org/10.1007/s10836-011-5213-z},
doi = {10.1007/S10836-011-5213-Z},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/HanPLCBWOA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/VemuA11,
author = {Ramtilak Vemu and
Jacob A. Abraham},
title = {{CEDA:} Control-Flow Error Detection Using Assertions},
journal = {{IEEE} Trans. Computers},
volume = {60},
number = {9},
pages = {1233--1245},
year = {2011},
url = {https://doi.org/10.1109/TC.2011.101},
doi = {10.1109/TC.2011.101},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/VemuA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/KimA11,
author = {Byoungho Kim and
Jacob A. Abraham},
title = {Efficient Loopback Test for Aperture Jitter in Embedded Mixed-Signal
Circuits},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {58-I},
number = {8},
pages = {1773--1784},
year = {2011},
url = {https://doi.org/10.1109/TCSI.2011.2106030},
doi = {10.1109/TCSI.2011.2106030},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/KimA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/KimA11,
author = {Byoungho Kim and
Jacob A. Abraham},
title = {Transformer-Coupled Loopback Test for Differential Mixed-Signal Dynamic
Specifications},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {60},
number = {6},
pages = {2014--2024},
year = {2011},
url = {https://doi.org/10.1109/TIM.2011.2113128},
doi = {10.1109/TIM.2011.2113128},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/KimA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KimLA11,
author = {Joonsoo Kim and
Joonsoo Lee and
Jacob A. Abraham},
title = {System accuracy estimation of SRAM-based device authentication},
booktitle = {Proceedings of the 16th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2011, Yokohama, Japan, January 25-27, 2011},
pages = {37--42},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASPDAC.2011.5722216},
doi = {10.1109/ASPDAC.2011.5722216},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KimLA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChungXZA11,
author = {Jaeyong Chung and
Jinjun Xiong and
Vladimir Zolotov and
Jacob A. Abraham},
title = {Path criticality computation in parameterized statistical timing analysis},
booktitle = {Proceedings of the 16th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2011, Yokohama, Japan, January 25-27, 2011},
pages = {249--254},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASPDAC.2011.5722192},
doi = {10.1109/ASPDAC.2011.5722192},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ChungXZA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WuHA11,
author = {Tung{-}Yeh Wu and
Shih{-}Hsin Hu and
Jacob A. Abraham},
title = {Robust power gating reactivation by dynamic wakeup sequence throttling},
booktitle = {Proceedings of the 16th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2011, Yokohama, Japan, January 25-27, 2011},
pages = {615--620},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASPDAC.2011.5722263},
doi = {10.1109/ASPDAC.2011.5722263},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WuHA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/KimA11,
author = {Hyunjin Kim and
Jacob A. Abraham},
title = {On-Chip Programmable Dual-Capture for Double Data Rate Interface Timing
Test},
booktitle = {Proceedings of the 20th {IEEE} Asian Test Symposium, {ATS} 2011, New
Delhi, India, November 20-23, 2011},
pages = {15--20},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ATS.2011.31},
doi = {10.1109/ATS.2011.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/KimA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/JangCGNA11,
author = {Eun Jung Jang and
Jaeyong Chung and
Anne E. Gattiker and
Sani R. Nassif and
Jacob A. Abraham},
title = {Post-Silicon Timing Validation Method Using Path Delay Measurements},
booktitle = {Proceedings of the 20th {IEEE} Asian Test Symposium, {ATS} 2011, New
Delhi, India, November 20-23, 2011},
pages = {232--237},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ATS.2011.32},
doi = {10.1109/ATS.2011.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/JangCGNA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChungXZA11,
author = {Jaeyong Chung and
Jinjun Xiong and
Vladimir Zolotov and
Jacob A. Abraham},
editor = {Leon Stok and
Nikil D. Dutt and
Soha Hassoun},
title = {Testability driven statistical path selection},
booktitle = {Proceedings of the 48th Design Automation Conference, {DAC} 2011,
San Diego, California, USA, June 5-10, 2011},
pages = {417--422},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2024724.2024822},
doi = {10.1145/2024724.2024822},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChungXZA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ParkA11,
author = {Junyoung Park and
Jacob A. Abraham},
editor = {Naehyuck Chang and
Hiroshi Nakamura and
Koji Inoue and
Kenichi Osada and
Massimo Poncino},
title = {A fast, accurate and simple critical path monitor for improving energy-delay
product in {DVS} systems},
booktitle = {Proceedings of the 2011 International Symposium on Low Power Electronics
and Design, 2011, Fukuoka, Japan, August 1-3, 2011},
pages = {391--396},
publisher = {{IEEE/ACM}},
year = {2011},
url = {http://portal.acm.org/citation.cfm?id=2016894\&\#38;CFID=34981777\&\#38;CFTOKEN=25607807},
timestamp = {Mon, 13 Aug 2012 09:40:34 +0200},
biburl = {https://dblp.org/rec/conf/islped/ParkA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/Abraham11,
author = {Jacob A. Abraham},
title = {Tutorial: "Manufacturing test of systems-on-a-chip (SoCs)"},
booktitle = {{IEEE} 24th International SoC Conference, {SOCC} 2011, Taipei, Taiwan,
September 26-28, 2011},
pages = {272},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/SOCC.2011.6085148},
doi = {10.1109/SOCC.2011.6085148},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/Abraham11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JangGNA11,
author = {Eun Jung Jang and
Anne E. Gattiker and
Sani R. Nassif and
Jacob A. Abraham},
title = {Efficient and product-representative timing model validation},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {90--95},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783761},
doi = {10.1109/VTS.2011.5783761},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/JangGNA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ShinPA10,
author = {Hongjoong Shin and
Joonsung Park and
Jacob A. Abraham},
title = {Spectral Prediction for Specification-Based Loopback Test of Embedded
Mixed-Signal Circuits},
journal = {J. Electron. Test.},
volume = {26},
number = {1},
pages = {73--86},
year = {2010},
url = {https://doi.org/10.1007/s10836-009-5136-0},
doi = {10.1007/S10836-009-5136-0},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ShinPA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/DattaSRCNA10,
author = {Ramyanshu Datta and
Antony Sebastine and
Ashwin Raghunathan and
Gary D. Carpenter and
Kevin J. Nowka and
Jacob A. Abraham},
title = {On-Chip Delay Measurement Based Response Analysis for Timing Characterization},
journal = {J. Electron. Test.},
volume = {26},
number = {6},
pages = {599--619},
year = {2010},
url = {https://doi.org/10.1007/s10836-010-5188-1},
doi = {10.1007/S10836-010-5188-1},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/DattaSRCNA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChunLA10,
author = {Ji Hwan (Paul) Chun and
Jae Wook Lee and
Jacob A. Abraham},
title = {A novel characterization technique for high speed {I/O} mixed signal
circuit components using random jitter injection},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {312--317},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419875},
doi = {10.1109/ASPDAC.2010.5419875},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ChunLA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/KimA10,
author = {Hyunjin Kim and
Jacob A. Abraham},
title = {A Low Cost Built-In Self-Test Circuit for High-Speed Source Synchronous
Memory Interfaces},
booktitle = {Proceedings of the 19th {IEEE} Asian Test Symposium, {ATS} 2010, 1-4
December 2010, Shanghai, China},
pages = {123--128},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ATS.2010.30},
doi = {10.1109/ATS.2010.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/KimA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ParkLCHABWO10,
author = {Joonsung Park and
Jae Wook Lee and
Jaeyong Chung and
Kihyuk Han and
Jacob A. Abraham and
Eonjo Byun and
Cheol{-}Jong Woo and
Sejang Oh},
title = {At-speed Test of High-Speed {DUT} Using Built-Off Test Interface},
booktitle = {Proceedings of the 19th {IEEE} Asian Test Symposium, {ATS} 2010, 1-4
December 2010, Shanghai, China},
pages = {269--274},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ATS.2010.54},
doi = {10.1109/ATS.2010.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ParkLCHABWO10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/DasnurkarA10,
author = {Sachin Dileep Dasnurkar and
Jacob A. Abraham},
title = {Calibration-enabled scalable built-in current sensor compatible with
very low cost {ATE}},
booktitle = {15th European Test Symposium, {ETS} 2010, Prague, Czech Republic,
May 24-28, 2010},
pages = {119--124},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ETSYM.2010.5512770},
doi = {10.1109/ETSYM.2010.5512770},
timestamp = {Tue, 28 Apr 2020 11:43:44 +0200},
biburl = {https://dblp.org/rec/conf/ets/DasnurkarA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/KimCABW10,
author = {Hyunjin Kim and
Jaeyong Chung and
Jacob A. Abraham and
Eonjo Byun and
Cheol{-}Jong Woo},
title = {A Built-In Self-Test scheme for high speed {I/O} using cycle-by-cycle
edge control},
booktitle = {15th European Test Symposium, {ETS} 2010, Prague, Czech Republic,
May 24-28, 2010},
pages = {145--150},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ETSYM.2010.5512766},
doi = {10.1109/ETSYM.2010.5512766},
timestamp = {Tue, 28 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/KimCABW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LeeCA10,
author = {Jae Wook Lee and
Ji Hwan (Paul) Chun and
Jacob A. Abraham},
editor = {R. Iris Bahar and
Fabrizio Lombardi and
David Atienza and
Erik Brunvand},
title = {A delay measurement method using a shrinking clock signal},
booktitle = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
Providence, Rhode Island, USA, May 16-18 2010},
pages = {139--142},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1785481.1785515},
doi = {10.1145/1785481.1785515},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LeeCA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KimLA10,
author = {Joonsoo Kim and
Joonsoo Lee and
Jacob A. Abraham},
title = {Toward reliable SRAM-based device identification},
booktitle = {28th International Conference on Computer Design, {ICCD} 2010, 3-6
October 2010, Amsterdam, The Netherlands, Proceedings},
pages = {313--320},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ICCD.2010.5647724},
doi = {10.1109/ICCD.2010.5647724},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KimLA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/PatraAMC10,
author = {Jagdish Chandra Patra and
Jacob A. Abraham and
Pramod Kumar Meher and
Goutam Chakraborty},
title = {An improved SOM-based visualization technique for {DNA} microarray
data analysis},
booktitle = {International Joint Conference on Neural Networks, {IJCNN} 2010, Barcelona,
Spain, 18-23 July, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IJCNN.2010.5596807},
doi = {10.1109/IJCNN.2010.5596807},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/ijcnn/PatraAMC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DasnurkarA10,
author = {Sachin Dileep Dasnurkar and
Jacob A. Abraham},
title = {Real-time dynamic hybrid BiST solution for Very-Low-Cost {ATE} production
testing of {A/D} converters with controlled {DPPM}},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {562--569},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450520},
doi = {10.1109/ISQED.2010.5450520},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/DasnurkarA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/AbdullaNSA10,
author = {Shakeel S. Abdulla and
Haewoon Nam and
Earl E. Swartzlander Jr. and
Jacob A. Abraham},
editor = {Thomas B{\"{u}}chner and
Ramalingam Sridhar and
Andrew Marshall and
Norbert Schuhmann},
title = {High speed recursion-free {CORDIC} architecture},
booktitle = {Annual {IEEE} International SoC Conference, SoCC 2010, September 27-29,
2010, Las Vegas, NV, USA, Proceedings},
pages = {65--70},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/SOCC.2010.5784666},
doi = {10.1109/SOCC.2010.5784666},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/AbdullaNSA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/WuSA10,
author = {Tung{-}Yeh Wu and
Sriram Sambamurthy and
Jacob A. Abraham},
editor = {Thomas B{\"{u}}chner and
Ramalingam Sridhar and
Andrew Marshall and
Norbert Schuhmann},
title = {Estimation of maximum application-level power supply noise},
booktitle = {Annual {IEEE} International SoC Conference, SoCC 2010, September 27-29,
2010, Las Vegas, NV, USA, Proceedings},
pages = {213--218},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/SOCC.2010.5784738},
doi = {10.1109/SOCC.2010.5784738},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/socc/WuSA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChungPABW10,
author = {Jaeyong Chung and
Joonsung Park and
Jacob A. Abraham and
Eonjo Byun and
Cheol{-}Jong Woo},
title = {Reducing test time and area overhead of an embedded memory array built-in
repair analyzer with optimal repair rate},
booktitle = {28th {IEEE} {VLSI} Test Symposium, {VTS} 2010, April 19-22, 2010,
Santa Cruz, California, {USA}},
pages = {33--38},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/VTS.2010.5469625},
doi = {10.1109/VTS.2010.5469625},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChungPABW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZeidanBGA10,
author = {Mohamad A. Zeidan and
Aritra Banerjee and
Ranjit Gharpurey and
Jacob A. Abraham},
title = {Multitone digital signal based test for {RF} receivers},
booktitle = {28th {IEEE} {VLSI} Test Symposium, {VTS} 2010, April 19-22, 2010,
Santa Cruz, California, {USA}},
pages = {343--348},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/VTS.2010.5469537},
doi = {10.1109/VTS.2010.5469537},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ZeidanBGA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/TayadeA09,
author = {Rajeshwary Tayade and
Jacob A. Abraham},
title = {Critical Path Selection for Delay Testing Considering Coupling Noise},
journal = {J. Electron. Test.},
volume = {25},
number = {4-5},
pages = {213--223},
year = {2009},
url = {https://doi.org/10.1007/s10836-009-5105-7},
doi = {10.1007/S10836-009-5105-7},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/TayadeA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/ViswanathVA09,
author = {Vinod Viswanath and
Shobha Vasudevan and
Jacob A. Abraham},
title = {Dedicated Rewriting: Automatic Verification of Low Power Transformations
in Register Transfer Level},
journal = {J. Low Power Electron.},
volume = {5},
number = {3},
pages = {339--353},
year = {2009},
url = {https://doi.org/10.1166/jolpe.2009.1034},
doi = {10.1166/JOLPE.2009.1034},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/ViswanathVA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LeeCA09,
author = {Jae Wook Lee and
Ji Hwan (Paul) Chun and
Jacob A. Abraham},
title = {A Random Jitter {RMS} Estimation Technique for {BIST} Applications},
booktitle = {Proceedings of the Eighteentgh Asian Test Symposium, {ATS} 2009, 23-26
November 2009, Taichung, Taiwan},
pages = {9--14},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ATS.2009.38},
doi = {10.1109/ATS.2009.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LeeCA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ParkCA09,
author = {Joonsung Park and
Jaeyong Chung and
Jacob A. Abraham},
title = {LFSR-Based Performance Characterization of Nonlinear Analog and Mixed-Signal
Circuits},
booktitle = {Proceedings of the Eighteentgh Asian Test Symposium, {ATS} 2009, 23-26
November 2009, Taichung, Taiwan},
pages = {373--378},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ATS.2009.66},
doi = {10.1109/ATS.2009.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ParkCA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/HuWA09,
author = {Shih{-}Hsin Hu and
Tung{-}Yeh Wu and
Jacob A. Abraham},
editor = {Dimitris Gizopoulos and
Susumu Horiguchi and
Spyros Tragoudas and
Mohammad Tehranipoor},
title = {SNR-Aware Error Detection for Low-Power Discrete Wavelet Lifting Transform
in {JPEG} 2000},
booktitle = {24th {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} Systems, {DFT} 2009, Chicago, Illinois, USA, October 7-9,
2009},
pages = {136--144},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DFT.2009.17},
doi = {10.1109/DFT.2009.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/HuWA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/HanPLABWO09,
author = {Kihyuk Han and
Joonsung Park and
Jae Wook Lee and
Jacob A. Abraham and
Eonjo Byun and
Cheol{-}Jong Woo and
Sejang Oh},
title = {Low-Complexity Off-Chip Skew Measurement and Compensation Module {(SMCM)}
Design for Built-Off Test Chip},
booktitle = {14th {IEEE} European Test Symposium, {ETS} 2009, Sevilla, Spain, May
25-29, 2009},
pages = {129--134},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ETS.2009.20},
doi = {10.1109/ETS.2009.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/HanPLABWO09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/TayadeA09,
author = {Rajeshwary Tayade and
Jacob A. Abraham},
title = {Critical Path Selection for Delay Test Considering Coupling Noise},
booktitle = {14th {IEEE} European Test Symposium, {ETS} 2009, Sevilla, Spain, May
25-29, 2009},
pages = {163--168},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ETS.2009.37},
doi = {10.1109/ETS.2009.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/TayadeA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChungA09,
author = {Jaeyong Chung and
Jacob A. Abraham},
editor = {Jaijeet S. Roychowdhury},
title = {A hierarchy of subgraphs underlying a timing graph and its use in
capturing topological correlation in {SSTA}},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {321--327},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687461},
doi = {10.1145/1687399.1687461},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/ChungA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AbdullaNMA09,
author = {Shakeel S. Abdulla and
Haewoon Nam and
Mark McDermot and
Jacob A. Abraham},
title = {A high throughput {FFT} processor with no multipliers},
booktitle = {27th International Conference on Computer Design, {ICCD} 2009, Lake
Tahoe, CA, USA, October 4-7, 2009},
pages = {485--490},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ICCD.2009.5413113},
doi = {10.1109/ICCD.2009.5413113},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AbdullaNMA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ChatterjeeASMKP09,
author = {Abhijit Chatterjee and
Jacob A. Abraham and
Adit D. Singh and
Elie Maricau and
Rakesh Kumar and
Christos A. Papachristou},
title = {Panel: Realistic low power design: Let errors occur and correct them
later or mitigate errors via design guardbanding and process control?},
booktitle = {15th {IEEE} International On-Line Testing Symposium {(IOLTS} 2009),
24-26 June 2009, Sesimbra-Lisbon, Portugal},
pages = {129},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IOLTS.2009.5195994},
doi = {10.1109/IOLTS.2009.5195994},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/ChatterjeeASMKP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/HuA09,
author = {Shih{-}Hsin Hu and
Jacob A. Abraham},
title = {Error detection in 2-D Discrete Wavelet lifting transforms},
booktitle = {15th {IEEE} International On-Line Testing Symposium {(IOLTS} 2009),
24-26 June 2009, Sesimbra-Lisbon, Portugal},
pages = {170--175},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IOLTS.2009.5196003},
doi = {10.1109/IOLTS.2009.5196003},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/HuA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DasnurkarA09,
author = {Sachin Dileep Dasnurkar and
Jacob A. Abraham},
title = {Hybrid BiST Solution for Analog to Digital Converters with Low-cost
Automatic Test Equipment Compatibility},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {9--12},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5117672},
doi = {10.1109/ISCAS.2009.5117672},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DasnurkarA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuGA09,
author = {Tung{-}Yeh Wu and
Samaneh Gharahi and
Jacob A. Abraham},
title = {An Area Efficient On-chip Static {IR} Drop Detector/Evaluator},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {2009--2012},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5118186},
doi = {10.1109/ISCAS.2009.5118186},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WuGA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SundareswaranPAZM09,
author = {Savithri Sundareswaran and
Rajendran Panda and
Jacob A. Abraham and
Yun Zhang and
Amit Mittal},
title = {Characterization of sequential cells for constraint sensitivities},
booktitle = {10th International Symposium on Quality of Electronic Design {(ISQED}
2009), 16-18 March 2009, San Jose, CA, {USA}},
pages = {74--79},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISQED.2009.4810272},
doi = {10.1109/ISQED.2009.4810272},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SundareswaranPAZM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SambamurthyGVA09,
author = {Sriram Sambamurthy and
Sankar Gurumurthy and
Ramtilak Vemu and
Jacob A. Abraham},
title = {Functionally valid gate-level peak power estimation for processors},
booktitle = {10th International Symposium on Quality of Electronic Design {(ISQED}
2009), 16-18 March 2009, San Jose, CA, {USA}},
pages = {753--758},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISQED.2009.4810387},
doi = {10.1109/ISQED.2009.4810387},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SambamurthyGVA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ViswanathVA09,
author = {Vinod Viswanath and
Shobha Vasudevan and
Jacob A. Abraham},
title = {Dedicated Rewriting: Automatic Verification of Low Power Transformations
in {RTL}},
booktitle = {{VLSI} Design 2009: Improving Productivity through Higher Abstraction,
The 22nd International Conference on {VLSI} Design, New Delhi, India,
5-9 January 2009},
pages = {77--82},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VLSI.Design.2009.85},
doi = {10.1109/VLSI.DESIGN.2009.85},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ViswanathVA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChungA09,
author = {Jaeyong Chung and
Jacob A. Abraham},
title = {Recursive Path Selection for Delay Fault Testing},
booktitle = {27th {IEEE} {VLSI} Test Symposium, {VTS} 2009, May 3-7, 2009, Santa
Cruz, California, {USA}},
pages = {65--70},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VTS.2009.50},
doi = {10.1109/VTS.2009.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChungA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZhangGA09,
author = {Chaoming Zhang and
Ranjit Gharpurey and
Jacob A. Abraham},
title = {On-Line Calibration and Power Optimization of {RF} Systems Using a
Built-In Detector},
booktitle = {27th {IEEE} {VLSI} Test Symposium, {VTS} 2009, May 3-7, 2009, Santa
Cruz, California, {USA}},
pages = {285--290},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VTS.2009.23},
doi = {10.1109/VTS.2009.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ZhangGA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dafes/VasudevanVAT08,
author = {Shobha Vasudevan and
Vinod Viswanath and
Jacob A. Abraham and
Jiajin Tu},
title = {Sequential equivalence checking between system level and {RTL} descriptions},
journal = {Des. Autom. Embed. Syst.},
volume = {12},
number = {4},
pages = {377--396},
year = {2008},
url = {https://doi.org/10.1007/s10617-008-9033-z},
doi = {10.1007/S10617-008-9033-Z},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dafes/VasudevanVAT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/DattaADCN08,
author = {Ramyanshu Datta and
Jacob A. Abraham and
Abdulkadir Utku Diril and
Abhijit Chatterjee and
Kevin J. Nowka},
title = {Performance-Optimized Design for Parametric Reliability},
journal = {J. Electron. Test.},
volume = {24},
number = {1-3},
pages = {129--141},
year = {2008},
url = {https://doi.org/10.1007/s10836-007-5001-y},
doi = {10.1007/S10836-007-5001-Y},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/DattaADCN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/DattaGSAd08,
author = {Ramyanshu Datta and
Ravi Gupta and
Antony Sebastine and
Jacob A. Abraham and
Manuel A. d'Abreu},
title = {Controllability of Static {CMOS} Circuits for Timing Characterization},
journal = {J. Electron. Test.},
volume = {24},
number = {5},
pages = {481--496},
year = {2008},
url = {https://doi.org/10.1007/s10836-007-5059-6},
doi = {10.1007/S10836-007-5059-6},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/DattaGSAd08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/TayadeA08,
author = {Rajeshwary Tayade and
Jacob A. Abraham},
title = {Small-delay defect detection in the presence of process variations},
journal = {Microelectron. J.},
volume = {39},
number = {8},
pages = {1093--1100},
year = {2008},
url = {https://doi.org/10.1016/j.mejo.2008.01.003},
doi = {10.1016/J.MEJO.2008.01.003},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/TayadeA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TayadeNA08,
author = {Rajeshwary Tayade and
Sani R. Nassif and
Jacob A. Abraham},
editor = {Chong{-}Min Kyung and
Kiyoung Choi and
Soonhoi Ha},
title = {Analytical model for the impact of multiple input switching noise
on timing},
booktitle = {Proceedings of the 13th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008},
pages = {514--517},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ASPDAC.2008.4484005},
doi = {10.1109/ASPDAC.2008.4484005},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TayadeNA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VemuJAPG08,
author = {Ramtilak Vemu and
Abhijit Jas and
Jacob A. Abraham and
Srinivas Patil and
Rajesh Galivanche},
editor = {Donatella Sciuto},
title = {A low-cost concurrent error detection technique for processor control
logic},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {897--902},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484788},
doi = {10.1109/DATE.2008.4484788},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/VemuJAPG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Abraham08,
author = {Jacob A. Abraham},
editor = {Donatella Sciuto},
title = {Implications of Technology Trends on System Dependability},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {940},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484800},
doi = {10.1109/DATE.2008.4484800},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/Abraham08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SuriFAPMM08,
author = {Neeraj Suri and
Christof Fetzer and
Jacob A. Abraham and
Stefan Poledna and
Avi Mendelson and
Subhasish Mitra},
editor = {Donatella Sciuto},
title = {Dependable Embedded Systems Special Day Panel: Issues and Challenges
in Dependable Embedded Systems},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {1394--1395},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484868},
doi = {10.1109/DATE.2008.4484868},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SuriFAPMM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/TayadeA08,
author = {Rajeshwary Tayade and
Jacob A. Abraham},
title = {Critical Path Selection for Delay Test Considering Coupling Noise},
booktitle = {13th European Test Symposium, {ETS} 2008, Verbania, Italy, May 25-29,
2008},
pages = {119--124},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ETS.2008.28},
doi = {10.1109/ETS.2008.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/TayadeA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/DouA08,
author = {Qingqi Dou and
Jacob A. Abraham},
title = {Jitter Decomposition in High-Speed Communication Systems},
booktitle = {13th European Test Symposium, {ETS} 2008, Verbania, Italy, May 25-29,
2008},
pages = {157--162},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ETS.2008.35},
doi = {10.1109/ETS.2008.35},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/DouA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GurumurthyVAN08,
author = {Sankar Gurumurthy and
Ramtilak Vemu and
Jacob A. Abraham and
Suriyaprakash Natarajan},
editor = {Vijaykrishnan Narayanan and
Zhiyuan Yan and
Enrico Macii and
Sanjukta Bhanja},
title = {On efficient generation of instruction sequences to test for delay
defects in a processor},
booktitle = {Proceedings of the 18th {ACM} Great Lakes Symposium on {VLSI} 2008,
Orlando, Florida, USA, May 4-6, 2008},
pages = {279--284},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1366110.1366178},
doi = {10.1145/1366110.1366178},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GurumurthyVAN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MohammadBAA08,
author = {Baker Mohammad and
Stephen Bijansky and
Adnan Aziz and
Jacob A. Abraham},
title = {Adaptive {SRAM} memory for low power and high yield},
booktitle = {26th International Conference on Computer Design, {ICCD} 2008, 12-15
October 2008, Lake Tahoe, CA, USA, Proceedings},
pages = {176--181},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICCD.2008.4751858},
doi = {10.1109/ICCD.2008.4751858},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MohammadBAA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/VemuA08,
author = {Ramtilak Vemu and
Jacob A. Abraham},
title = {Budget-Dependent Control-Flow Error Detection},
booktitle = {14th {IEEE} International On-Line Testing Symposium {(IOLTS} 2008),
7-9 July 2008, Rhodes, Greece},
pages = {73--78},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/IOLTS.2008.52},
doi = {10.1109/IOLTS.2008.52},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/VemuA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/MohammadSBA08,
author = {Baker Mohammad and
Martin Saint{-}Laurent and
Paul Bassett and
Jacob A. Abraham},
title = {Cache Design for Low Power and High Yield},
booktitle = {9th International Symposium on Quality of Electronic Design {(ISQED}
2008), 17-19 March 2008, San Jose, CA, {USA}},
pages = {103--107},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISQED.2008.4479707},
doi = {10.1109/ISQED.2008.4479707},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/MohammadSBA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SundareswaranAAP08,
author = {Savithri Sundareswaran and
Jacob A. Abraham and
Alexandre Ardelea and
Rajendran Panda},
title = {Characterization of Standard Cells for Intra-Cell Mismatch Variations},
booktitle = {9th International Symposium on Quality of Electronic Design {(ISQED}
2008), 17-19 March 2008, San Jose, CA, {USA}},
pages = {213--219},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISQED.2008.4479728},
doi = {10.1109/ISQED.2008.4479728},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SundareswaranAAP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/PuTA08,
author = {Xiao Pu and
Axel Thomsen and
Jacob A. Abraham},
title = {Improving Bandwidth while Managing Phase Noise and Spurs in Fractional-N
{PLL}},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {168--172},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.47},
doi = {10.1109/ISVLSI.2008.47},
timestamp = {Wed, 29 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/PuTA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/TayadeA08,
author = {Rajeshwary Tayade and
Jacob A. Abraham},
editor = {Douglas Young and
Nur A. Touba},
title = {On-chip Programmable Capture for Accurate Path Delay Test and Characterization},
booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
California, USA, October 26-31, 2008},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/TEST.2008.4700564},
doi = {10.1109/TEST.2008.4700564},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/TayadeA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/SundareswaranNPGSA08,
author = {Savithri Sundareswaran and
Lucie Nechanicka and
Rajendran Panda and
Sergey Gavrilov and
Roman A. Solovyev and
Jacob A. Abraham},
title = {A timing methodology considering within-die clock skew variations},
booktitle = {21st Annual {IEEE} International SoC Conference, SoCC 2008, September
17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings},
pages = {351--356},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SOCC.2008.4641543},
doi = {10.1109/SOCC.2008.4641543},
timestamp = {Mon, 28 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/socc/SundareswaranNPGSA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SambamurthyAT08,
author = {Sriram Sambamurthy and
Jacob A. Abraham and
Raghuram S. Tupuri},
title = {A Robust Top-Down Dynamic Power Estimation Methodology for Delay Constrained
Register Transfer Level Sequential Circuits},
booktitle = {21st International Conference on {VLSI} Design {(VLSI} Design 2008),
4-8 January 2008, Hyderabad, India},
pages = {521--526},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VLSI.2008.56},
doi = {10.1109/VLSI.2008.56},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SambamurthyAT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DouA08,
author = {Qingqi Dou and
Jacob A. Abraham},
title = {Low-cost Test of Timing Mismatch Among Time-Interleaved {A/D} Converters
in High-speed Communication Systems},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {3--8},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.57},
doi = {10.1109/VTS.2008.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DouA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZhangGA08,
author = {Chaoming Zhang and
Ranjit Gharpurey and
Jacob A. Abraham},
title = {Low Cost {RF} Receiver Parameter Measurement with On-Chip Amplitude
Detectors},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {203--208},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.56},
doi = {10.1109/VTS.2008.56},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ZhangGA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KimKA08,
author = {Byoungho Kim and
Nash Khouzam and
Jacob A. Abraham},
title = {Efficient Loopback Test for Aperture Jitter in Embedded Mixed-Signal
Circuits},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {293--298},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.52},
doi = {10.1109/VTS.2008.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KimKA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ParkSA08,
author = {Joonsung Park and
Hongjoong Shin and
Jacob A. Abraham},
title = {Parallel Loopback Test of Mixed-Signal Circuits},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {309--316},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.53},
doi = {10.1109/VTS.2008.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ParkSA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/KimSCA07,
author = {Byoungho Kim and
Hongjoong Shin and
Ji Hwan (Paul) Chun and
Jacob A. Abraham},
title = {Predicting mixed-signal dynamic performance using optimised signature-based
alternate test},
journal = {{IET} Comput. Digit. Tech.},
volume = {1},
number = {3},
pages = {159--169},
year = {2007},
url = {https://doi.org/10.1049/iet-cdt:20060154},
doi = {10.1049/IET-CDT:20060154},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/KimSCA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sttt/VasudevanEA07,
author = {Shobha Vasudevan and
E. Allen Emerson and
Jacob A. Abraham},
title = {Improved verification of hardware designs through antecedent conditioned
slicing},
journal = {Int. J. Softw. Tools Technol. Transf.},
volume = {9},
number = {1},
pages = {89--101},
year = {2007},
url = {https://doi.org/10.1007/s10009-006-0022-x},
doi = {10.1007/S10009-006-0022-X},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sttt/VasudevanEA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/VasudevanVSA07,
author = {Shobha Vasudevan and
Vinod Viswanath and
Robert W. Sumners and
Jacob A. Abraham},
title = {Automatic Verification of Arithmetic Circuits in {RTL} Using Stepwise
Refinement of Term Rewriting Systems},
journal = {{IEEE} Trans. Computers},
volume = {56},
number = {10},
pages = {1401--1414},
year = {2007},
url = {https://doi.org/10.1109/TC.2007.1073},
doi = {10.1109/TC.2007.1073},
timestamp = {Mon, 13 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/VasudevanVSA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/GurumurthyVAS07,
author = {Sankar Gurumurthy and
Ramtilak Vemu and
Jacob A. Abraham and
Daniel G. Saab},
title = {Automatic Generation of Instructions to Robustly Test Delay Defects
in Processors},
booktitle = {12th European Test Symposium, {ETS} 2007, Freiburg, Germany, May 20,
2007},
pages = {173--178},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ETS.2007.13},
doi = {10.1109/ETS.2007.13},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/GurumurthyVAS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TayadeKNOA07,
author = {Rajeshwary Tayade and
Vijay Kiran Kalyanam and
Sani R. Nassif and
Michael Orshansky and
Jacob A. Abraham},
editor = {Hai Zhou and
Enrico Macii and
Zhiyuan Yan and
Yehia Massoud},
title = {Estimating path delay distribution considering coupling noise},
booktitle = {Proceedings of the 17th {ACM} Great Lakes Symposium on {VLSI} 2007,
Stresa, Lago Maggiore, Italy, March 11-13, 2007},
pages = {61--66},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1228784.1228804},
doi = {10.1145/1228784.1228804},
timestamp = {Wed, 16 Aug 2023 21:16:32 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TayadeKNOA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OuSQA07,
author = {Jen{-}Chieh Ou and
Daniel G. Saab and
Qiang Qiang and
Jacob A. Abraham},
editor = {Hai Zhou and
Enrico Macii and
Zhiyuan Yan and
Yehia Massoud},
title = {Reducing verification overhead with {RTL} slicing},
booktitle = {Proceedings of the 17th {ACM} Great Lakes Symposium on {VLSI} 2007,
Stresa, Lago Maggiore, Italy, March 11-13, 2007},
pages = {399--404},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1228784.1228879},
doi = {10.1145/1228784.1228879},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/OuSQA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ZhangGA07,
author = {Chaoming Zhang and
Ranjit Gharpurey and
Jacob A. Abraham},
title = {Built-In Test of {RF} Mixers Using {RF} Amplitude Detectors},
booktitle = {8th International Symposium on Quality of Electronic Design {(ISQED}
2007), 26-28 March 2007, San Jose, CA, {USA}},
pages = {404--409},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISQED.2007.44},
doi = {10.1109/ISQED.2007.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ZhangGA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ParkSA07,
author = {Joonsung Park and
Hongjoong Shin and
Jacob A. Abraham},
title = {Pseudorandom Test for Nonlinear Circuits Based on a Simplified Volterra
Series Model},
booktitle = {8th International Symposium on Quality of Electronic Design {(ISQED}
2007), 26-28 March 2007, San Jose, CA, {USA}},
pages = {495--500},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISQED.2007.130},
doi = {10.1109/ISQED.2007.130},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ParkSA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TayadeSA07,
author = {Rajeshwary Tayade and
Savithri Sundareswaran and
Jacob A. Abraham},
title = {Small-Delay Defect Detection in the Presence of Process Variations},
booktitle = {8th International Symposium on Quality of Electronic Design {(ISQED}
2007), 26-28 March 2007, San Jose, CA, {USA}},
pages = {711--716},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISQED.2007.145},
doi = {10.1109/ISQED.2007.145},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TayadeSA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/VemuGA07,
author = {Ramtilak Vemu and
Sankar Gurumurthy and
Jacob A. Abraham},
editor = {Jill Sibert and
Janusz Rajski},
title = {{ACCE:} Automatic correction of control-flow errors},
booktitle = {2007 {IEEE} International Test Conference, {ITC} 2007, Santa Clara,
California, USA, October 21-26, 2007},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/TEST.2007.4437639},
doi = {10.1109/TEST.2007.4437639},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/VemuGA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AbrahamS07,
author = {Jacob A. Abraham and
Daniel G. Saab},
title = {Tutorial {T4A:} Formal Verification Techniques and Tools for Complex
Designs},
booktitle = {20th International Conference on {VLSI} Design {(VLSI} Design 2007),
Sixth International Conference on Embedded Systems {(ICES} 2007),
6-10 January 2007, Bangalore, India},
pages = {6},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VLSID.2007.168},
doi = {10.1109/VLSID.2007.168},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AbrahamS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VasudevanVA07,
author = {Shobha Vasudevan and
Vinod Viswanath and
Jacob A. Abraham},
title = {Efficient Microprocessor Verification using Antecedent Conditioned
Slicing},
booktitle = {20th International Conference on {VLSI} Design {(VLSI} Design 2007),
Sixth International Conference on Embedded Systems {(ICES} 2007),
6-10 January 2007, Bangalore, India},
pages = {43--49},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VLSID.2007.70},
doi = {10.1109/VLSID.2007.70},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VasudevanVA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KimFA07,
author = {Byoungho Kim and
Zhenhai Fu and
Jacob A. Abraham},
title = {Transformer-Coupled Loopback Test for Differential Mixed-Signal Specifications},
booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
California, {USA}},
pages = {291--296},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VTS.2007.82},
doi = {10.1109/VTS.2007.82},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KimFA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DouA06,
author = {Qingqi Dou and
Jacob A. Abraham},
editor = {Fumiyasu Hirose},
title = {Jitter decomposition in ring oscillators},
booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation:
{ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006},
pages = {285--290},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ASPDAC.2006.1594696},
doi = {10.1109/ASPDAC.2006.1594696},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DouA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ShinPA06,
author = {Hongjoong Shin and
Jiseon Park and
Jacob A. Abraham},
title = {A Statistical Digital Equalizer for Loopback-based Linearity Test
of Data Converters},
booktitle = {15th Asian Test Symposium, {ATS} 2006, Fukuoka, Japan, November 20-23,
2006},
pages = {245--250},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ATS.2006.261027},
doi = {10.1109/ATS.2006.261027},
timestamp = {Mon, 07 Nov 2022 17:39:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ShinPA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ViswanathAJ06,
author = {Vinod Viswanath and
Jacob A. Abraham and
Warren A. Hunt Jr.},
editor = {Georges G. E. Gielen},
title = {Automatic insertion of low power annotations in {RTL} for pipelined
microprocessors},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {496--501},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.243858},
doi = {10.1109/DATE.2006.243858},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ViswanathAJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/DattaADCN06,
author = {Ramyanshu Datta and
Jacob A. Abraham and
Abdulkadir Utku Diril and
Abhijit Chatterjee and
Kevin J. Nowka},
title = {Adaptive Design for Performance-Optimized Robustness},
booktitle = {21th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2006), 4-6 October 2006, Arlington, Virginia,
{USA}},
pages = {3--11},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DFT.2006.12},
doi = {10.1109/DFT.2006.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/DattaADCN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/KimSCA06,
author = {Byoungho Kim and
Hongjoong Shin and
Ji Hwan (Paul) Chun and
Jacob A. Abraham},
title = {Optimized Signature-Based Statistical Alternate Test for Mixed-Signal
Performance Parameters},
booktitle = {11th European Test Symposium, {ETS} 2006, Southhampton, UK, May 21-24,
2006},
pages = {199--204},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ETS.2006.37},
doi = {10.1109/ETS.2006.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/KimSCA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/AndersenA06,
author = {Vivekananda M. Ve. Andersen and
Jacob A. Abraham},
title = {Taming the Complexity of STE-based Design Verification Using Program
Slicing},
booktitle = {Eleventh Annual {IEEE} International High-Level Design Validation
and Test Workshop 2006, Monterey, CA, USA, Nov 9-10, 2006},
pages = {137--142},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HLDVT.2006.319976},
doi = {10.1109/HLDVT.2006.319976},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/AndersenA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/VemuA06,
author = {Ramtilak Vemu and
Jacob A. Abraham},
title = {{CEDA:} Control-flow Error Detection through Assertions},
booktitle = {12th {IEEE} International On-Line Testing Symposium {(IOLTS} 2006),
10-12 July 2006, Como, Italy},
pages = {151--158},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/IOLTS.2006.14},
doi = {10.1109/IOLTS.2006.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/VemuA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DouA06,
author = {Qingqi Dou and
Jacob A. Abraham},
title = {Jitter Decomposition by Time Lag Correlation},
booktitle = {7th International Symposium on Quality of Electronic Design {(ISQED}
2006), 27-29 March 2006, San Jose, CA, {USA}},
pages = {525--530},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISQED.2006.78},
doi = {10.1109/ISQED.2006.78},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/DouA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GurumurthyVA06,
author = {Sankar Gurumurthy and
Shobha Vasudevan and
Jacob A. Abraham},
editor = {Scott Davidson and
Anne Gattiker},
title = {Automatic generation of instruction sequences targeting hard-to-detect
structural faults in a processor},
booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara,
CA, USA, October 22-27, 2006},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/TEST.2006.297676},
doi = {10.1109/TEST.2006.297676},
timestamp = {Tue, 12 Dec 2023 09:46:27 +0100},
biburl = {https://dblp.org/rec/conf/itc/GurumurthyVA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/OuSA06,
author = {Jen{-}Chieh Ou and
Daniel G. Saab and
Jacob A. Abraham},
editor = {Scott Davidson and
Anne Gattiker},
title = {{HDL} Program Slicing to Reduce Bounded Model Checking Search Overhead},
booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara,
CA, USA, October 22-27, 2006},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/TEST.2006.297665},
doi = {10.1109/TEST.2006.297665},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/OuSA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ShinPA06,
author = {Hongjoong Shin and
Joonsung Park and
Jacob A. Abraham},
editor = {Scott Davidson and
Anne Gattiker},
title = {Built-in Fault Diagnosis for Tunable Analog Systems Using an Ensemble
Method},
booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara,
CA, USA, October 22-27, 2006},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/TEST.2006.297678},
doi = {10.1109/TEST.2006.297678},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/ShinPA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/VasudevanAVT06,
author = {Shobha Vasudevan and
Jacob A. Abraham and
Vinod Viswanath and
Jiajin Tu},
title = {Automatic decomposition for sequential equivalence checking of system
level and {RTL} descriptions},
booktitle = {4th {ACM} {\&} {IEEE} International Conference on Formal Methods
and Models for Co-Design {(MEMOCODE} 2006), 27-29 July 2006, Embassy
Suites, Napa, California, {USA}},
pages = {71--80},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/MEMCOD.2006.1695903},
doi = {10.1109/MEMCOD.2006.1695903},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memocode/VasudevanAVT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/SambamurthyAT06,
author = {Sriram Sambamurthy and
Jacob A. Abraham and
Raghuram S. Tupuri},
editor = {Johan Vounckx and
Nadine Az{\'{e}}mard and
Philippe Maurine},
title = {Delay Constrained Register Transfer Level Dynamic Power Estimation},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 16th International Workshop, {PATMOS} 2006, Montpellier,
France, September 13-15, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4148},
pages = {36--46},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11847083\_4},
doi = {10.1007/11847083\_4},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/SambamurthyAT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/MohammadBAA06,
author = {Baker Mohammad and
Paul Bassett and
Jacob A. Abraham and
Adnan Aziz},
title = {Cache Organization for Embeded Processors: CAM-vs-SRAM},
booktitle = {2006 {IEEE} International {SOC} Conference, Austin, Texas, USA, September
24-27, 2006},
pages = {299--302},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/SOCC.2006.283902},
doi = {10.1109/SOCC.2006.283902},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/MohammadBAA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/QiangSA06,
author = {Qiang Qiang and
Daniel G. Saab and
Jacob A. Abraham},
title = {Checking Nested Properties Using Bounded Model Checking and Sequential
{ATPG}},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {225--230},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.58},
doi = {10.1109/VLSID.2006.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/QiangSA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DattaCNA06,
author = {Ramyanshu Datta and
Gary D. Carpenter and
Kevin J. Nowka and
Jacob A. Abraham},
title = {A Scheme for On-Chip Timing Characterization},
booktitle = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
Berkeley, California, {USA}},
pages = {24--29},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VTS.2006.11},
doi = {10.1109/VTS.2006.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DattaCNA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ShinKA06,
author = {Hongjoong Shin and
Byoungho Kim and
Jacob A. Abraham},
title = {Spectral Prediction for Specification-Based Loopback Test of Embedded
Mixed-Signal Circuits},
booktitle = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
Berkeley, California, {USA}},
pages = {412--419},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VTS.2006.83},
doi = {10.1109/VTS.2006.83},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ShinKA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/BhadraMA05,
author = {Jayanta Bhadra and
Andrew K. Martin and
Jacob A. Abraham},
title = {A Formal Framework for Verification of Embedded Custom Memories of
the Motorola {MPC7450} Microprocessor},
journal = {Formal Methods Syst. Des.},
volume = {27},
number = {1-2},
pages = {67--112},
year = {2005},
url = {https://doi.org/10.1007/s10703-005-2250-1},
doi = {10.1007/S10703-005-2250-1},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/BhadraMA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/QiangSA05,
author = {Qiang Qiang and
Daniel G. Saab and
Jacob A. Abraham},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {An Emulation Model for Sequential ATPG-Based Bounded Model Checking},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {469--474},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515766},
doi = {10.1109/FPL.2005.1515766},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/QiangSA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/QiangCSA05,
author = {Qiang Qiang and
Chia{-}Lun Chang and
Daniel G. Saab and
Jacob A. Abraham},
title = {Case Study of ATPG-based Bounded Model Checking: Verifying {USB2.0}
{IP} Core},
booktitle = {23rd International Conference on Computer Design {(ICCD} 2005), 2-5
October 2005, San Jose, CA, {USA}},
pages = {461--463},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICCD.2005.36},
doi = {10.1109/ICCD.2005.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/QiangCSA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DattaNMA05,
author = {Ramyanshu Datta and
Sani R. Nassif and
Robert K. Montoye and
Jacob A. Abraham},
title = {Testing and debugging delay faults in dynamic circuits},
booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005,
Austin, TX, USA, November 8-10, 2005},
pages = {10},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/TEST.2005.1583966},
doi = {10.1109/TEST.2005.1583966},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/DattaNMA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GuramurthyVA05,
author = {S. Guramurthy and
Shobha Vasudevan and
Jacob A. Abraham},
title = {Automated mapping of pre-computed module-level test sequences to processor
instructions},
booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005,
Austin, TX, USA, November 8-10, 2005},
pages = {10},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/TEST.2005.1583987},
doi = {10.1109/TEST.2005.1583987},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/GuramurthyVA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/RohA04,
author = {Jeongjin Roh and
Jacob A. Abraham},
title = {Subband filtering for time and frequency analysis of mixed-signal
circuit testing},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {53},
number = {2},
pages = {602--611},
year = {2004},
url = {https://doi.org/10.1109/TIM.2003.820494},
doi = {10.1109/TIM.2003.820494},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/RohA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/GanYA04,
author = {Jianhua Gan and
Shouli Yan and
Jacob A. Abraham},
editor = {Masaharu Imai},
title = {Effects of noise and nonlinearity on the calibration of a non-binary
capacitor array in a successive approximation analog-to-digital converter},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
Electronic Design and Solution Fair 2004, Yokohama, Japan, January
27-30, 2004},
pages = {292--297},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.86},
doi = {10.1109/ASPDAC.2004.86},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/GanYA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/DattaSA04,
author = {Ramyanshu Datta and
Antony Sebastine and
Jacob A. Abraham},
title = {Delay fault testing and silicon debug using scan chains},
booktitle = {9th European Test Symposium, {ETS} 2004, Ajaccio, France, May 23-26,
2004},
pages = {46--51},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ETSYM.2004.1347600},
doi = {10.1109/ETSYM.2004.1347600},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/DattaSA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DattaSRA04,
author = {Ramyanshu Datta and
Antony Sebastine and
Ashwin Raghunathan and
Jacob A. Abraham},
editor = {David Garrett and
John C. Lach and
Charles A. Zukowski},
title = {On-chip delay measurement for silicon debug},
booktitle = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004,
Boston, MA, USA, April 26-28, 2004},
pages = {145--148},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/988952.988988},
doi = {10.1145/988952.988988},
timestamp = {Fri, 20 Aug 2021 16:30:37 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DattaSRA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShinYA04,
author = {Hongjoong Shin and
Hak{-}soo Yu and
Jacob A. Abraham},
editor = {David Garrett and
John C. Lach and
Charles A. Zukowski},
title = {LFSR-based {BIST} for analog circuits using slope detection},
booktitle = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004,
Boston, MA, USA, April 26-28, 2004},
pages = {316--321},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/988952.989029},
doi = {10.1145/988952.989029},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ShinYA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChunYA04,
author = {Ji Hwan (Paul) Chun and
Hak{-}soo Yu and
Jacob A. Abraham},
editor = {David Garrett and
John C. Lach and
Charles A. Zukowski},
title = {An efficient linearity test for on-chip high speed {ADC} and {DAC}
using loop-back},
booktitle = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004,
Boston, MA, USA, April 26-28, 2004},
pages = {328--331},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/988952.989031},
doi = {10.1145/988952.989031},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChunYA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip/VasudevanA04,
author = {Shobha Vasudevan and
Jacob A. Abraham},
editor = {Ren{\'{e}} Jacquart},
title = {Static program transformations for efficient software model checking},
booktitle = {Building the Information Society, {IFIP} 18th World Computer Congress,
Topical Sessions, 22-27 August 2004, Toulouse, France},
series = {{IFIP}},
volume = {156},
pages = {257--281},
publisher = {Kluwer/Springer},
year = {2004},
url = {https://doi.org/10.1007/978-1-4020-8157-6\_23},
doi = {10.1007/978-1-4020-8157-6\_23},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip/VasudevanA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DattaAMBNMKN04,
author = {Ramyanshu Datta and
Jacob A. Abraham and
Robert K. Montoye and
Wendy Belluomini and
Hung C. Ngo and
Chandler McDowell and
Jente B. Kuang and
Kevin J. Nowka},
title = {A low latency and low power dynamic Carry Save Adder},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {477--480},
publisher = {{IEEE}},
year = {2004},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DattaAMBNMKN04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ZengAKVWA04,
author = {Jing Zeng and
Magdy S. Abadir and
A. Kolhatkar and
G. Vandling and
Li{-}C. Wang and
Jacob A. Abraham},
title = {On Correlating Structural Tests with Functional Tests for Speed Binning
of High Performance Design},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {31--37},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1386934},
doi = {10.1109/TEST.2004.1386934},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ZengAKVWA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RaghunathanCAC04,
author = {Ashwin Raghunathan and
Ji Hwan (Paul) Chun and
Jacob A. Abraham and
Abhijit Chatterjee},
title = {Quasi-Oscillation Based Test for Improved Prediction of Analog Performance
Parameters},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {252--261},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1386959},
doi = {10.1109/TEST.2004.1386959},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RaghunathanCAC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SenGAB04,
author = {Alper Sen and
Vijay K. Garg and
Jacob A. Abraham and
Jayanta Bhadra},
title = {Formal Verification of a System-on-Chip Using Computation Slicing},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {810--819},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387344},
doi = {10.1109/TEST.2004.1387344},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SenGAB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DattaGSAd04,
author = {Ramyanshu Datta and
Ravi Gupta and
Antony Sebastine and
Jacob A. Abraham and
Manuel A. d'Abreu},
title = {Tri-Scan: {A} Novel {DFT} Technique for {CMOS} Path Delay Fault Testing},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {1118--1127},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387386},
doi = {10.1109/TEST.2004.1387386},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/DattaGSAd04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YuSCA04,
author = {Hak{-}soo Yu and
Hongjoong Shin and
Ji Hwan (Paul) Chun and
Jacob A. Abraham},
title = {Performance Characterization of Mixed-Signal Circuits Using a Ternary
Signal Representation},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {1389--1397},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387414},
doi = {10.1109/TEST.2004.1387414},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/YuSCA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtv/ZengAVWKA04,
author = {Jing Zeng and
Magdy S. Abadir and
G. Vandling and
Li{-}C. Wang and
S. Karako and
Jacob A. Abraham},
title = {On Correlating Structural Tests with Functional Tests for Speed Binning
of High Performance Design},
booktitle = {Fifth International Workshop on Microprocessor Test and Verification
{(MTV} 2004), Common Challenges and Solutions, 08-10 September 2004,
Austin, Texas, {USA}},
pages = {103--109},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/MTV.2004.17},
doi = {10.1109/MTV.2004.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtv/ZengAVWKA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KrishnamurthyBAA04,
author = {Narayanan Krishnamurthy and
Jayanta Bhadra and
Magdy S. Abadir and
Jacob A. Abraham},
title = {Towards The Complete Elimination of Gate/Switch Level Simulations},
booktitle = {17th International Conference on {VLSI} Design {(VLSI} Design 2004),
with the 3rd International Conference on Embedded Systems Design,
5-9 January 2004, Mumbai, India},
pages = {115},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ICVD.2004.1260913},
doi = {10.1109/ICVD.2004.1260913},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KrishnamurthyBAA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VedulaTA04,
author = {Vivekananda M. Vedula and
Whitney J. Townsend and
Jacob A. Abraham},
title = {Program Slicing for ATPG-Based Property Checking},
booktitle = {17th International Conference on {VLSI} Design {(VLSI} Design 2004),
with the 3rd International Conference on Embedded Systems Design,
5-9 January 2004, Mumbai, India},
pages = {591--596},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ICVD.2004.1260983},
doi = {10.1109/ICVD.2004.1260983},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VedulaTA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RaghunathanSAC04,
author = {Ashwin Raghunathan and
Hongjoong Shin and
Jacob A. Abraham and
Abhijit Chatterjee},
title = {Prediction of Analog Performance Parameters Using Oscillation Based
Test},
booktitle = {22nd {IEEE} {VLSI} Test Symposium {(VTS} 2004), 25-29 April 2004,
Napa Valley, CA, {USA}},
pages = {377--382},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/VTEST.2004.1299267},
doi = {10.1109/VTEST.2004.1299267},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/RaghunathanSAC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/entcs/VasudevanEA05,
author = {Shobha Vasudevan and
E. Allen Emerson and
Jacob A. Abraham},
editor = {Michael Huth},
title = {Efficient Model Checking of Hardware Using Conditioned Slicing},
booktitle = {Proceedings of the Fouth International Workshop on Automated Verification
of Critical Systems, AVoCS 2004, London, UK, September 4, 2004},
series = {Electronic Notes in Theoretical Computer Science},
volume = {128},
number = {6},
pages = {279--294},
publisher = {Elsevier},
year = {2004},
url = {https://doi.org/10.1016/j.entcs.2005.04.017},
doi = {10.1016/J.ENTCS.2005.04.017},
timestamp = {Mon, 11 Sep 2023 15:43:49 +0200},
biburl = {https://dblp.org/rec/journals/entcs/VasudevanEA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/VedulaABT03,
author = {Vivekananda M. Vedula and
Jacob A. Abraham and
Jayanta Bhadra and
Raghuram S. Tupuri},
title = {A Hierarchical Test Generation Approach Using Program Slicing Techniques
on Hardware Description Languages},
journal = {J. Electron. Test.},
volume = {19},
number = {2},
pages = {149--160},
year = {2003},
url = {https://doi.org/10.1023/A:1022885523034},
doi = {10.1023/A:1022885523034},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/VedulaABT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RohA03,
author = {Jeongjin Roh and
Jacob A. Abraham},
title = {A comprehensive signature analysis scheme for oscillation-test},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {22},
number = {10},
pages = {1409--1423},
year = {2003},
url = {https://doi.org/10.1109/TCAD.2003.818133},
doi = {10.1109/TCAD.2003.818133},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RohA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HwangA03,
author = {Sungbae Hwang and
Jacob A. Abraham},
title = {Test data compression and test time reduction using an embedded microprocessor},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {11},
number = {5},
pages = {853--862},
year = {2003},
url = {https://doi.org/10.1109/TVLSI.2003.817140},
doi = {10.1109/TVLSI.2003.817140},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/HwangA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YuAHR03,
author = {Hak{-}soo Yu and
Jacob A. Abraham and
Sungbae Hwang and
Jeongjin Roh},
editor = {Hiroto Yasuura},
title = {Efficient loop-back testing of on-chip ADCs and DACs},
booktitle = {Proceedings of the 2003 Asia and South Pacific Design Automation Conference,
{ASP-DAC} '03, Kitakyushu, Japan, January 21-24, 2003},
pages = {651--656},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/1119772.1119919},
doi = {10.1145/1119772.1119919},
timestamp = {Thu, 11 Mar 2021 17:04:51 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/YuAHR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/TownsendAS03,
author = {Whitney J. Townsend and
Jacob A. Abraham and
Earl E. Swartzlander Jr.},
title = {Quadruple Time Redundancy Adders},
booktitle = {18th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2003), 3-5 November 2003, Boston, MA, USA,
Proceedings},
pages = {250--256},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DFTVS.2003.1250119},
doi = {10.1109/DFTVS.2003.1250119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/TownsendAS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GanYA03,
author = {Jianhua Gan and
Shouli Yan and
Jacob A. Abraham},
editor = {Mircea R. Stan and
David Garrett and
Kazuo Nakajima},
title = {Design and modeling of a 16-bit 1.5MSPS successive approximation {ADC}
with non-binary capacitor array},
booktitle = {Proceedings of the 13th {ACM} Great Lakes Symposium on {VLSI} 2003,
Washington, DC, USA, April 28-29, 2003},
pages = {161--164},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/764808.764850},
doi = {10.1145/764808.764850},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GanYA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/TownsendAL03,
author = {Whitney J. Townsend and
Jacob A. Abraham and
Parag K. Lala},
title = {On-Line Error Detecting Constant Delay Adder},
booktitle = {9th {IEEE} International On-Line Testing Symposium {(IOLTS} 2003),
7-9 July 2003, Kos Island, Greece},
pages = {17},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/OLT.2003.1214361},
doi = {10.1109/OLT.2003.1214361},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/TownsendAL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KrishnamacharyA03,
author = {Arun Krishnamachary and
Jacob A. Abraham},
title = {Effects of Multi-cycle Sensitization on Delay Tests},
booktitle = {16th International Conference on {VLSI} Design {(VLSI} Design 2003),
4-8 January 2003, New Delhi, India},
pages = {137--142},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ICVD.2003.1183127},
doi = {10.1109/ICVD.2003.1183127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KrishnamacharyA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SaabAV03,
author = {Daniel G. Saab and
Jacob A. Abraham and
Vivekananda M. Vedula},
title = {Formal Verification Using Bounded Model Checking: {SAT} versus Sequential
{ATPG} Engines},
booktitle = {16th International Conference on {VLSI} Design {(VLSI} Design 2003),
4-8 January 2003, New Delhi, India},
pages = {243--248},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ICVD.2003.1183144},
doi = {10.1109/ICVD.2003.1183144},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SaabAV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YuHA03,
author = {Hak{-}soo Yu and
Sungbae Hwang and
Jacob A. Abraham},
title = {DSP-Based Statistical Self Test of On-Chip Converters},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {83--88},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197637},
doi = {10.1109/VTEST.2003.1197637},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YuHA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wisa/KimAB03,
author = {Kyoil Kim and
Jacob A. Abraham and
Jayanta Bhadra},
editor = {Kijoon Chae and
Moti Yung},
title = {Model Checking of Security Protocols with Pre-configuration},
booktitle = {Information Security Applications, 4th International Workshop, {WISA}
2003, Jeju Island, Korea, August 25-27, 2003, Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {2908},
pages = {1--15},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-24591-9\_1},
doi = {10.1007/978-3-540-24591-9\_1},
timestamp = {Tue, 14 May 2019 10:00:35 +0200},
biburl = {https://dblp.org/rec/conf/wisa/KimAB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/MukherjeeJTAFF02,
author = {Rajarshi Mukherjee and
Jawahar Jain and
Koichiro Takayama and
Jacob A. Abraham and
Donald S. Fussell and
Masahiro Fujita},
title = {Efficient Combinational Verification Using Overlapping Local BDDs
and a Hash Table},
journal = {Formal Methods Syst. Des.},
volume = {21},
number = {1},
pages = {95--101},
year = {2002},
url = {https://doi.org/10.1023/A:1016096020556},
doi = {10.1023/A:1016096020556},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/MukherjeeJTAFF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/BaumgartnerKA02,
author = {Jason Baumgartner and
Andreas Kuehlmann and
Jacob A. Abraham},
editor = {Ed Brinksma and
Kim Guldstrand Larsen},
title = {Property Checking via Structural Analysis},
booktitle = {Computer Aided Verification, 14th International Conference, {CAV}
2002,Copenhagen, Denmark, July 27-31, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2404},
pages = {151--165},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-45657-0\_12},
doi = {10.1007/3-540-45657-0\_12},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/cav/BaumgartnerKA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ZengAA02,
author = {Jing Zeng and
Magdy S. Abadir and
Jacob A. Abraham},
title = {False timing path identification using {ATPG} techniques and delay-based
information},
booktitle = {Proceedings of the 39th Design Automation Conference, {DAC} 2002,
New Orleans, LA, USA, June 10-14, 2002},
pages = {562--565},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/513918.514060},
doi = {10.1145/513918.514060},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ZengAA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VedulaA02,
author = {Vivekananda M. Vedula and
Jacob A. Abraham},
title = {{FACTOR:} {A} Hierarchical Methodology for Functional Test Generation
and Testability Analysis},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {730--734},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998380},
doi = {10.1109/DATE.2002.998380},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/VedulaA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/delta/AbrahamKT02,
author = {Jacob A. Abraham and
Arun Krishnamachary and
Raghuram S. Tupuri},
title = {A Comprehensive Fault Model for Deep Submicron Digital Circuits},
booktitle = {1st {IEEE} International Workshop on Electronic Design, Test and Applications
{(DELTA} 2002), 29-31 January 2002, Christchurch, New Zealand},
pages = {360--364},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DELTA.2002.994650},
doi = {10.1109/DELTA.2002.994650},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/delta/AbrahamKT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SaabKA02,
author = {Daniel G. Saab and
Fatih Kocan and
Jacob A. Abraham},
editor = {Manfred Glesner and
Peter Zipf and
Michel Renovell},
title = {Massively Parallel/Reconfigurable Emulation Model for the D-algorithm},
booktitle = {Field-Programmable Logic and Applications, Reconfigurable Computing
Is Going Mainstream, 12th International Conference, {FPL} 2002, Montpellier,
France, September 2-4, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2438},
pages = {1172--1176},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-46117-5\_134},
doi = {10.1007/3-540-46117-5\_134},
timestamp = {Sat, 30 Sep 2023 09:41:27 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SaabKA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KrishnamacharyA02,
author = {Arun Krishnamachary and
Jacob A. Abraham},
editor = {Kanad Ghose and
Patrick H. Madden and
Vivek De and
Peter M. Kogge},
title = {Test generation for resistive opens in {CMOS}},
booktitle = {Proceedings of the 12th {ACM} Great Lakes Symposium on {VLSI} 2002,
New York, NY, USA, April 18-19, 2002},
pages = {65--70},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/505306.505321},
doi = {10.1145/505306.505321},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KrishnamacharyA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HwangA02,
author = {Sungbae Hwang and
Jacob A. Abraham},
editor = {Kanad Ghose and
Patrick H. Madden and
Vivek De and
Peter M. Kogge},
title = {Selective-run built-in self-test using an embedded processor},
booktitle = {Proceedings of the 12th {ACM} Great Lakes Symposium on {VLSI} 2002,
New York, NY, USA, April 18-19, 2002},
pages = {124--129},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/505306.505333},
doi = {10.1145/505306.505333},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HwangA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/JayaramanVA02,
author = {Kamalnayan Jayaraman and
Vivekananda M. Vedula and
Jacob A. Abraham},
title = {Native Mode Functional Self-Test Generation for Systems-on-Chip},
booktitle = {3rd International Symposium on Quality of Electronic Design, {ISQED}
2002, San Jose, CA, USA, March 18-21, 2002},
pages = {280--285},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ISQED.2002.996752},
doi = {10.1109/ISQED.2002.996752},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/JayaramanVA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/AbrahamVS02,
author = {Jacob A. Abraham and
Vivekananda M. Vedula and
Daniel G. Saab},
title = {Verifying Properties Using Sequential {ATPG}},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {194--202},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041761},
doi = {10.1109/TEST.2002.1041761},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/AbrahamVS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HwangA02,
author = {Sungbae Hwang and
Jacob A. Abraham},
title = {Optimal {BIST} Using an Embedded Microprocessor},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {736--745},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041826},
doi = {10.1109/TEST.2002.1041826},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HwangA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/YuA02,
author = {Hak{-}soo Yu and
Jacob A. Abraham},
title = {An Efficient 3-Bit -Scan Multiplier without Overlapping Bits, and
Its 64x64 Bit Implementation},
booktitle = {Proceedings of the 7th Asia and South Pacific Design Automation Conference
{(ASP-DAC} 2002), and the 15th International Conference on {VLSI}
Design {(VLSI} Design 2002), Bangalore, India, January 7-11, 2002},
pages = {441--446},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASPDAC.2002.994960},
doi = {10.1109/ASPDAC.2002.994960},
timestamp = {Mon, 14 Nov 2022 15:28:09 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/YuA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VedulaAB02,
author = {Vivekananda M. Vedula and
Jacob A. Abraham and
Jayanta Bhadra},
title = {Program Slicing for Hierarchical Test Generation},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {237--246},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011144},
doi = {10.1109/VTS.2002.1011144},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VedulaAB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KrishnamurthyBAA02,
author = {Narayanan Krishnamurthy and
Jayanta Bhadra and
Magdy S. Abadir and
Jacob A. Abraham},
title = {Is State Mapping Essential for Equivalence Checking Custom Memories
in Scan-Based Designs?},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {275--280},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011152},
doi = {10.1109/VTS.2002.1011152},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KrishnamurthyBAA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/KrishnamurthyAMA01,
author = {Narayanan Krishnamurthy and
Magdy S. Abadir and
Andrew K. Martin and
Jacob A. Abraham},
title = {Design and Development Paradigm for Industrial Formal Verification
{CAD} Tools},
journal = {{IEEE} Des. Test Comput.},
volume = {18},
number = {4},
pages = {26--35},
year = {2001},
url = {https://doi.org/10.1109/54.936246},
doi = {10.1109/54.936246},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/KrishnamurthyAMA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SeshadriA01,
author = {Suresh Seshadri and
Jacob A. Abraham},
title = {Frequency Response Verification of Analog Circuits Using Global Optimization
Techniques},
journal = {J. Electron. Test.},
volume = {17},
number = {5},
pages = {395--408},
year = {2001},
url = {https://doi.org/10.1023/A:1012751118746},
doi = {10.1023/A:1012751118746},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/SeshadriA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/BhadraMAA01,
author = {Jayanta Bhadra and
Andrew K. Martin and
Jacob A. Abraham and
Magdy S. Abadir},
editor = {Tiziana Margaria and
Thomas F. Melham},
title = {Using Abstract Specifications to Verify PowerPC\({}^{\mbox{TM}}\)
Custom Memories by Symbolic Trajectory Evaluation},
booktitle = {Correct Hardware Design and Verification Methods, 11th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2001, Livingston,
Scotland, UK, September 4-7, 2001, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2144},
pages = {386--402},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-44798-9\_30},
doi = {10.1007/3-540-44798-9\_30},
timestamp = {Sun, 02 Jun 2019 21:23:48 +0200},
biburl = {https://dblp.org/rec/conf/charme/BhadraMAA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZengABA01,
author = {Jing Zeng and
Magdy S. Abadir and
Jayanta Bhadra and
Jacob A. Abraham},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {Full chip false timing path identification: applications to the PowerPCTM
microprocessors},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {514--519},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915072},
doi = {10.1109/DATE.2001.915072},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ZengABA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/BhadraMAA01,
author = {Jayanta Bhadra and
Andrew K. Martin and
Jacob A. Abraham and
Magdy S. Abadir},
title = {A language formalism for verification of PowerPC\({}^{\mbox{TM}}\)
custom memories using compositions of abstract specifications},
booktitle = {Proceedings of the Sixth {IEEE} International High-Level Design Validation
and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001},
pages = {134--141},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/HLDVT.2001.972820},
doi = {10.1109/HLDVT.2001.972820},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/BhadraMAA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KrishnamacharyAT01,
author = {Arun Krishnamachary and
Jacob A. Abraham and
Raghuram S. Tupuri},
title = {Timing Verification and Delay Test Generation for Hierarchical Designs},
booktitle = {14th International Conference on {VLSI} Design {(VLSI} Design 2001),
3-7 January 2001, Bangalore, India},
pages = {157--162},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICVD.2001.902655},
doi = {10.1109/ICVD.2001.902655},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KrishnamacharyAT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChangDRSSA01,
author = {Henry Chang and
Steve Dollens and
Gordon W. Roberts and
Charles E. Stroud and
Mani Soma and
Jacob A. Abraham},
title = {Analog and Mixed Signal Benchmark Circuit Development: Who Needs Them?},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {415--416},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.2001.10001},
doi = {10.1109/VTS.2001.10001},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChangDRSSA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wecwis/KimA01,
author = {Kyoil Kim and
Jacob A. Abraham},
title = {Communication Space Reduction for Formal Verification of Secure Authentication
Protocols},
booktitle = {Third International Workshop on Advanced Issues of E-Commerce and
Web-Based Information Systems {(WECWIS} '01), San Jose, California,
USA, June 21-22, 2001},
pages = {225--227},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/WECWIS.2001.933928},
doi = {10.1109/WECWIS.2001.933928},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/wecwis/KimA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/KrishnamurthyMAA00,
author = {Narayanan Krishnamurthy and
Andrew K. Martin and
Magdy S. Abadir and
Jacob A. Abraham},
title = {Validating PowerPC Microprocessor Custom Memories},
journal = {{IEEE} Des. Test Comput.},
volume = {17},
number = {4},
pages = {61--76},
year = {2000},
url = {https://doi.org/10.1109/54.895007},
doi = {10.1109/54.895007},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/KrishnamurthyMAA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ShenA00,
author = {Jian Shen and
Jacob A. Abraham},
title = {An {RTL} Abstraction Technique for Processor Microarchitecture Validation
and Test Generation},
journal = {J. Electron. Test.},
volume = {16},
number = {1-2},
pages = {67--81},
year = {2000},
url = {https://doi.org/10.1023/A:1008388623771},
doi = {10.1023/A:1008388623771},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ShenA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SaxenaAS00,
author = {Nina Saxena and
Jacob A. Abraham and
Avijit Saha},
title = {Causality based generation of directed test cases},
booktitle = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
Conference 2000, Yokohama, Japan},
pages = {503--508},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/368434.368771},
doi = {10.1145/368434.368771},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SaxenaAS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/BhadraAA00,
author = {Jayanta Bhadra and
Magdy S. Abadir and
Jacob A. Abraham},
title = {A quick and inexpensive method to identify false critical paths using
{ATPG} techniques: an experiment with a PowerPC\({}^{\mbox{TM}}\)
microprocessor},
booktitle = {Proceedings of the {IEEE} 2000 Custom Integrated Circuits Conference,
{CICC} 2000, Orlando, FL, USA, May 21-24, 2000},
pages = {71--74},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/CICC.2000.852620},
doi = {10.1109/CICC.2000.852620},
timestamp = {Mon, 10 Oct 2022 09:13:21 +0200},
biburl = {https://dblp.org/rec/conf/cicc/BhadraAA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/PagaraniKSA00,
author = {Tarachand Pagarani and
Fatih Kocan and
Daniel G. Saab and
Jacob A. Abraham},
title = {Parallel and scalable architecture for solving SATisfiability on reconfigurable
{FPGA}},
booktitle = {Proceedings of the {IEEE} 2000 Custom Integrated Circuits Conference,
{CICC} 2000, Orlando, FL, USA, May 21-24, 2000},
pages = {147--150},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/CICC.2000.852637},
doi = {10.1109/CICC.2000.852637},
timestamp = {Mon, 10 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/PagaraniKSA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/VedulaA00,
author = {Vivekananda M. Vedula and
Jacob A. Abraham},
title = {A novel methodology for hierarchical test generation using functional
constraint composition},
booktitle = {Proceedings of the {IEEE} International High-Level Design Validation
and Test Workshop 2000, Berkeley, California, USA, November 8-10,
2000},
pages = {9--14},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/HLDVT.2000.889552},
doi = {10.1109/HLDVT.2000.889552},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/VedulaA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RohSA00,
author = {Jeongjin Roh and
Suresh Seshadri and
Jacob A. Abraham},
editor = {Ellen Sentovich},
title = {Verification of Delta-Sigma Converters Using Adaptive Regression Modeling},
booktitle = {Proceedings of the 2000 {IEEE/ACM} International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {182--187},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCAD.2000.896471},
doi = {10.1109/ICCAD.2000.896471},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RohSA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/YuLA00,
author = {Hak{-}soo Yu and
Songjun Lee and
Jacob A. Abraham},
title = {An Adder Using Charge Sharing and its Application in DRAMs},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design:
{VLSI} In Computers {\&} Processors, {ICCD} '00, Austin, Texas,
USA, September 17-20, 2000},
pages = {311--317},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCD.2000.878301},
doi = {10.1109/ICCD.2000.878301},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/YuLA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/BatraAA00,
author = {Jayanta Batra and
Magdy S. Abadir and
Jacob A. Abraham},
title = {A Quick and Inexpensive Method to Identify False Critical Paths Using
{ATPG} Techniques: an Experiment with a PowerPC Microprocessor},
booktitle = {1st Latin American Test Workshop, {LATW} 2000, Rio de Janeiro, RJ,
Brazil, March 13-15, 2000},
pages = {72--76},
publisher = {{IEEE}},
year = {2000},
timestamp = {Tue, 25 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/BatraAA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BoseA00,
author = {Pradip Bose and
Jacob A. Abraham},
title = {Performance and Functional Verification of Microprocessors},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {58--63},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812585},
doi = {10.1109/ICVD.2000.812585},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BoseA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TupuriAS00,
author = {Raghuram S. Tupuri and
Jacob A. Abraham and
Daniel G. Saab},
title = {Hierarchical Test Generation for Systems On a Chip},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {198},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812609},
doi = {10.1109/ICVD.2000.812609},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TupuriAS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SumnersBA00,
author = {Robert W. Sumners and
Jayanta Bhadra and
Jacob A. Abraham},
title = {Automatic Validation Test Generation Using Extracted Control Models},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {312},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812627},
doi = {10.1109/ICVD.2000.812627},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SumnersBA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RohA00,
author = {Jeongjin Roh and
Jacob A. Abraham},
title = {A Mixed-Signal {BIST} Scheme with Time-Division Multiplexing {(TDM)}
Comparator and Counters},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {572},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812669},
doi = {10.1109/ICVD.2000.812669},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RohA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KrishnamurthyMAA00,
author = {Narayanan Krishnamurthy and
Andrew K. Martin and
Magdy S. Abadir and
Jacob A. Abraham},
title = {Validation of PowerPC(tm) Custom Memories using Symbolic Simulation},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {9--14},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843820},
doi = {10.1109/VTEST.2000.843820},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KrishnamurthyMAA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RohA00,
author = {Jeongjin Roh and
Jacob A. Abraham},
title = {A Comprehensive {TDM} Comparator Scheme for Effective Analysis of
Oscillation-Based Test},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {143--148},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843838},
doi = {10.1109/VTEST.2000.843838},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/RohA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/MoundanosA99,
author = {Dinos Moundanos and
Jacob A. Abraham},
title = {On Design Validation Using Verification Technology},
journal = {J. Electron. Test.},
volume = {15},
number = {1-2},
pages = {173--189},
year = {1999},
url = {https://doi.org/10.1023/A:1008300821561},
doi = {10.1023/A:1008300821561},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/MoundanosA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MukherjeeJTFAF99,
author = {Rajarshi Mukherjee and
Jawahar Jain and
Koichiro Takayama and
Masahiro Fujita and
Jacob A. Abraham and
Donald S. Fussell},
title = {An efficient filter-based approach for combinational verification},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {18},
number = {11},
pages = {1542--1557},
year = {1999},
url = {https://doi.org/10.1109/43.806801},
doi = {10.1109/43.806801},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MukherjeeJTFAF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/AlkhalifaNKA99,
author = {Zeyad Alkhalifa and
V. S. S. Nair and
Narayanan Krishnamurthy and
Jacob A. Abraham},
title = {Design and Evaluation of System-Level Checks for On-Line Control Flow
Error Detection},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {10},
number = {6},
pages = {627--641},
year = {1999},
url = {https://doi.org/10.1109/71.774911},
doi = {10.1109/71.774911},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/AlkhalifaNKA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ShenABHKGCH99,
author = {Jian Shen and
Jacob A. Abraham and
Dave Baker and
Tony Hurson and
Martin Kinkade and
Gregorio Gervasio and
Chen{-}chau Chu and
Guanghui Hu},
editor = {Mary Jane Irwin},
title = {Functional Verification of the Equator {MAP1000} Microprocessor},
booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
LA, USA, June 21-25, 1999},
pages = {169--174},
publisher = {{ACM} Press},
year = {1999},
url = {https://doi.org/10.1145/309847.309908},
doi = {10.1145/309847.309908},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ShenABHKGCH99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/TupuriKA99,
author = {Raghuram S. Tupuri and
Arun Krishnamachary and
Jacob A. Abraham},
editor = {Mary Jane Irwin},
title = {Test Generation for Gigahertz Processors Using an Automatic Functional
Constraint Extractor},
booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
LA, USA, June 21-25, 1999},
pages = {647--652},
publisher = {{ACM} Press},
year = {1999},
url = {https://doi.org/10.1145/309847.310018},
doi = {10.1145/309847.310018},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/TupuriKA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/RaimiA99,
author = {Richard Raimi and
Jacob A. Abraham},
editor = {Mary Jane Irwin},
title = {Detecting False Timing Paths: Experiments on PowerPC Microprocessors},
booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
LA, USA, June 21-25, 1999},
pages = {737--741},
publisher = {{ACM} Press},
year = {1999},
url = {https://doi.org/10.1145/309847.310047},
doi = {10.1145/309847.310047},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/RaimiA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MukherjeeJTFAF99,
author = {Rajarshi Mukherjee and
Jawahar Jain and
Koichiro Takayama and
Masahiro Fujita and
Jacob A. Abraham and
Donald S. Fussell},
title = {An Efficient Filter-Based Approach for Combinational Verification},
booktitle = {1999 Design, Automation and Test in Europe {(DATE} '99), 9-12 March
1999, Munich, Germany},
pages = {132--137},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1999},
url = {https://doi.org/10.1109/DATE.1999.761108},
doi = {10.1109/DATE.1999.761108},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MukherjeeJTFAF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuA99,
author = {Chia{-}Pin R. Liu and
Jacob A. Abraham},
title = {Transistor Level Synthesis for Static {CMOS} Combinational Circuits},
booktitle = {9th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '99), 4-6 March 1999,
Ann Arbor, MI, {USA}},
pages = {172--175},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/GLSV.1999.757403},
doi = {10.1109/GLSV.1999.757403},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MoundanosA99,
author = {Dinos Moundanos and
Jacob A. Abraham},
title = {Formal Checking of Properties in Complex Systems Using Abstractions},
booktitle = {9th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '99), 4-6 March 1999,
Ann Arbor, MI, {USA}},
pages = {280--283},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/GLSV.1999.757433},
doi = {10.1109/GLSV.1999.757433},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MoundanosA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SumnersBA99,
author = {Robert W. Sumners and
Jayanta Bhadra and
Jacob A. Abraham},
title = {Improving Witness Search Using Orders on States},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design,
{VLSI} in Computers and Processors, {ICCD} '99, Austin, Texas, USA,
October 10-13, 1999},
pages = {452--457},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICCD.1999.808580},
doi = {10.1109/ICCD.1999.808580},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SumnersBA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RohA99,
author = {Jeongjin Roh and
Jacob A. Abraham},
title = {Subband filtering scheme for analog and mixed-signal circuit testing},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {221--229},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805634},
doi = {10.1109/TEST.1999.805634},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RohA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LeeA99,
author = {Kyung Tek Lee and
Jacob A. Abraham},
title = {Critical path identification and delay tests of dynamic circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {421--430},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805764},
doi = {10.1109/TEST.1999.805764},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/LeeA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Abraham99,
author = {Jacob A. Abraham},
title = {Position Statement: Increasing Test Coverage in a {VLSI} Design Course},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {1132},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805864},
doi = {10.1109/TEST.1999.805864},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Abraham99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JayabharathiDA99,
author = {Rathish Jayabharathi and
Manuel A. d'Abreu and
Jacob A. Abraham},
title = {FzCRITIC - {A} Functional Timing Verifier Using a Novel Fuzzy Delay
Model},
booktitle = {12th International Conference on {VLSI} Design {(VLSI} Design 1999),
10-13 January 1999, Goa, India},
pages = {232--235},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICVD.1999.745153},
doi = {10.1109/ICVD.1999.745153},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JayabharathiDA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ShenA99,
author = {Jian Shen and
Jacob A. Abraham},
title = {Verification of Processor Microarchitectures},
booktitle = {17th {IEEE} {VLSI} Test Symposium {(VTS} '99), 25-30 April 1999, San
Diego, CA, {USA}},
pages = {189--194},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/VTEST.1999.766664},
doi = {10.1109/VTEST.1999.766664},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ShenA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ShenA98,
author = {Jian Shen and
Jacob A. Abraham},
title = {Synthesis of Native Mode Self-Test Programs},
journal = {J. Electron. Test.},
volume = {13},
number = {2},
pages = {137--148},
year = {1998},
url = {https://doi.org/10.1023/A:1008305820979},
doi = {10.1023/A:1008305820979},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ShenA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/ChaseAA98,
author = {Craig M. Chase and
Prakash Arunachalam and
Jacob A. Abraham},
title = {Memory Distribution: Techniques and Practice for {CAD} Applications},
journal = {Parallel Comput.},
volume = {24},
number = {11},
pages = {1597--1615},
year = {1998},
url = {https://doi.org/10.1016/S0167-8191(98)00052-0},
doi = {10.1016/S0167-8191(98)00052-0},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pc/ChaseAA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MoundanosAH98,
author = {Dinos Moundanos and
Jacob A. Abraham and
Yatin Vasant Hoskote},
title = {Abstraction Techniques for Validation Coverage Analysis and Test Generation},
journal = {{IEEE} Trans. Computers},
volume = {47},
number = {1},
pages = {2--14},
year = {1998},
url = {https://doi.org/10.1109/12.656068},
doi = {10.1109/12.656068},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MoundanosAH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NagiCYA98,
author = {Naveena Nagi and
Abhijit Chatterjee and
Heebyung Yoon and
Jacob A. Abraham},
title = {Signature analysis for analog and mixed-signal circuit test response
compaction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {17},
number = {6},
pages = {540--546},
year = {1998},
url = {https://doi.org/10.1109/43.703834},
doi = {10.1109/43.703834},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NagiCYA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/GrosspietschAMKR98,
author = {Karl{-}Erwin Gro{\ss}pietsch and
Jacob A. Abraham and
Johannes Maier and
Hans{-}Dieter Kochs and
Michel Renovell},
title = {From Dependable Computing Systems to Computing for Integrated Dependable
Systems? (Panel)},
booktitle = {Digest of Papers: FTCS-28, The Twenty-Eigth Annual International Symposium
on Fault-Tolerant Computing, Munich, Germany, June 23-25, 1998},
pages = {296--301},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/FTCS.1998.689480},
doi = {10.1109/FTCS.1998.689480},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/GrosspietschAMKR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DeyAZ98,
author = {Sujit Dey and
Jacob A. Abraham and
Yervant Zorian},
editor = {Hiroto Yasuura},
title = {High-level design validation and test},
booktitle = {Proceedings of the 1998 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {3},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1145/288548.288550},
doi = {10.1145/288548.288550},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/DeyAZ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SaxenaBSA98,
author = {Nina Saxena and
Jason Baumgartner and
Avijit Saha and
Jacob A. Abraham},
title = {To model check or not to model check},
booktitle = {International Conference on Computer Design: {VLSI} in Computers and
Processors, {ICCD} 1998, Proceedings, 5-7 October, 1998, Austin, TX,
{USA}},
pages = {314--320},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ICCD.1998.727067},
doi = {10.1109/ICCD.1998.727067},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SaxenaBSA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issre/SumnersCA98,
author = {Robert W. Sumners and
Parminder Chhabra and
Jacob A. Abraham},
title = {Lightweight guided random simulation},
booktitle = {Ninth International Symposium on Software Reliability Engineering,
{ISSRE} 1998, Paderborn, Germany, November 4-7, 1998},
pages = {185--191},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ISSRE.1998.730881},
doi = {10.1109/ISSRE.1998.730881},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/issre/SumnersCA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ShenA98,
author = {Jian Shen and
Jacob A. Abraham},
title = {Native mode functional test generation for processors with applications
to self test and design validation},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {990--999},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743296},
doi = {10.1109/TEST.1998.743296},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ShenA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LeeNA98,
author = {Kyung Tek Lee and
Clay Nordquist and
Jacob A. Abraham},
title = {Automatic Test Pattern Generation for Crosstalk Glitches in Digital
Circuits},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {34--41},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670846},
doi = {10.1109/VTEST.1998.670846},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LeeNA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MoundanosA98,
author = {Dinos Moundanos and
Jacob A. Abraham},
title = {Using Verification Technology for Validation Coverage Analysis and
Test Generation},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {254--259},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670877},
doi = {10.1109/VTEST.1998.670877},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MoundanosA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ChangA97,
author = {Hoon Chang and
Jacob A. Abraham},
title = {An Efficient Critical Path Tracing Algorithm for Designing High Performance
Vlsi Systems},
journal = {J. Electron. Test.},
volume = {11},
number = {2},
pages = {119--129},
year = {1997},
url = {https://doi.org/10.1023/A:1008214321624},
doi = {10.1023/A:1008214321624},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ChangA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/JainBAAF97,
author = {Jawahar Jain and
James R. Bitner and
Magdy S. Abadir and
Jacob A. Abraham and
Donald S. Fussell},
title = {Indexed BDDs: Algorithmic Advances in Techniques to Represent and
Verify Boolean Functions},
journal = {{IEEE} Trans. Computers},
volume = {46},
number = {11},
pages = {1230--1245},
year = {1997},
url = {https://doi.org/10.1109/12.644298},
doi = {10.1109/12.644298},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/JainBAAF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HoskoteAFM97,
author = {Yatin Vasant Hoskote and
Jacob A. Abraham and
Donald S. Fussell and
John Moondanos},
title = {Automatic verification of implementations of large circuits against
{HDL} specifications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {16},
number = {3},
pages = {217--228},
year = {1997},
url = {https://doi.org/10.1109/43.594828},
doi = {10.1109/43.594828},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HoskoteAFM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/YuanSAA97,
author = {Jun Yuan and
Jian Shen and
Jacob A. Abraham and
Adnan Aziz},
editor = {Orna Grumberg},
title = {On Combining Formal and Informal Verification},
booktitle = {Computer Aided Verification, 9th International Conference, {CAV} '97,
Haifa, Israel, June 22-25, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1254},
pages = {376--387},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-63166-6\_37},
doi = {10.1007/3-540-63166-6\_37},
timestamp = {Fri, 30 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cav/YuanSAA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hase/SumnersA97,
author = {Robert W. Sumners and
Jacob A. Abraham},
title = {Hierarchical Specification of System Behavior},
booktitle = {2nd High-Assurance Systems Engineering Workshop {(HASE} '97), August
11-12, 1997, Washington, DC, USA, Proceedings},
pages = {134--140},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/HASE.1997.648052},
doi = {10.1109/HASE.1997.648052},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hase/SumnersA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/TupuriA97,
author = {Raghuram S. Tupuri and
Jacob A. Abraham},
title = {A Novel Functional Test Generation Method for Processors Using Commercial
{ATPG}},
booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington,
DC, USA, November 3-5, 1997},
pages = {743--752},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/TEST.1997.639687},
doi = {10.1109/TEST.1997.639687},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/TupuriA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RainaAP97,
author = {R. Raina and
Jacob A. Abraham and
A. K. Pujari},
title = {{T4:} Verification},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.1997.10010},
doi = {10.1109/VLSID.1997.10010},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RainaAP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TupuriA97,
author = {Raghuram S. Tupuri and
Jacob A. Abraham},
title = {A Novel Hierarchical Test Generation Method for Processors},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {540--541},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568203},
doi = {10.1109/ICVD.1997.568203},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TupuriA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JayabharathiLA97,
author = {Rathish Jayabharathi and
Kyung Tek Lee and
Jacob A. Abraham},
title = {A Novel Solution for Chip-Level Functional Timing Verification},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {137--142},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599465},
doi = {10.1109/VTEST.1997.599465},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JayabharathiLA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AbadirAHHNW97,
author = {Magdy S. Abadir and
Jacob A. Abraham and
Hong Hao and
C. Hunter and
Wayne M. Needham and
Ron G. Walther},
title = {Microprocessor Test and Validation: Any New Avenues?},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {458--464},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.1997.10015},
doi = {10.1109/VTS.1997.10015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AbadirAHHNW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/BalivadaCA96,
author = {Ashok Balivada and
Jin Chen and
Jacob A. Abraham},
title = {Analog Testing with Time Response Parameters},
journal = {{IEEE} Des. Test Comput.},
volume = {13},
number = {2},
pages = {18--25},
year = {1996},
url = {https://doi.org/10.1109/54.500197},
doi = {10.1109/54.500197},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/BalivadaCA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/BalivadaZNCA96,
author = {Ashok Balivada and
Hong Zheng and
Naveena Nagi and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {A unified approach for fault simulation of linear mixed-signal circuits},
journal = {J. Electron. Test.},
volume = {9},
number = {1-2},
pages = {29--41},
year = {1996},
url = {https://doi.org/10.1007/BF00137563},
doi = {10.1007/BF00137563},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/BalivadaZNCA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/NairAB96,
author = {V. S. S. Nair and
Jacob A. Abraham and
Prithviraj Banerjee},
title = {Efficient Techniques for the Analysis of Algorithm-Based Fault Tolerance
{(ABFT)} Schemes},
journal = {{IEEE} Trans. Computers},
volume = {45},
number = {4},
pages = {499--503},
year = {1996},
url = {https://doi.org/10.1109/12.494110},
doi = {10.1109/12.494110},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/NairAB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SaabSA96,
author = {Daniel G. Saab and
Youssef Saab and
Jacob A. Abraham},
title = {Automatic test vector cultivation for sequential {VLSI} circuits using
genetic algorithms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {15},
number = {10},
pages = {1278--1285},
year = {1996},
url = {https://doi.org/10.1109/43.541447},
doi = {10.1109/43.541447},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SaabSA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ArunachalamAd96,
author = {Prakash Arunachalam and
Jacob A. Abraham and
Manuel A. d'Abreu},
title = {A Hierarchal Approach for Power Reduction in {VLSI} Chips},
booktitle = {6th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '96), March 22-23,
1996, Ames, IA, {USA}},
pages = {182},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/GLSV.1996.497617},
doi = {10.1109/GLSV.1996.497617},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ArunachalamAd96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KarthikAMPSVdA96,
author = {Sankaran Karthik and
Mark Aitken and
Glidden Martin and
Srinivasu Pappula and
Bob Stettler and
Praveen Vishakantaiah and
Manuel A. d'Abreu and
Jacob A. Abraham},
title = {Distributed Mixed Level Logic and Fault Simulation on the Pentium{\textregistered}
Pro Microprocessor},
booktitle = {Proceedings {IEEE} International Test Conference 1996, Test and Design
Validity, Washington, DC, USA, October 20-25, 1996},
pages = {160--166},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/TEST.1996.556958},
doi = {10.1109/TEST.1996.556958},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/KarthikAMPSVdA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MoundanosAH96,
author = {Dinos Moundanos and
Jacob A. Abraham and
Yatin Vasant Hoskote},
title = {A Unified Framework for Design Validation and Manufacturing Test},
booktitle = {Proceedings {IEEE} International Test Conference 1996, Test and Design
Validity, Washington, DC, USA, October 20-25, 1996},
pages = {875--884},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/TEST.1996.557149},
doi = {10.1109/TEST.1996.557149},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MoundanosAH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AbrahamG96,
author = {Jacob A. Abraham and
Gopi Ganapathy},
title = {Practical Test and {DFT} for Next Generation {VLSI}},
booktitle = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
3-6 January 1996, Bangalore, India},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.ieeecomputersociety.org/10.1109/VLSID.1996.10011},
doi = {10.1109/VLSID.1996.10011},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AbrahamG96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MukherjeeJFAF96,
author = {Rajarshi Mukherjee and
Jawahar Jain and
Masahiro Fujita and
Jacob A. Abraham and
Donald S. Fussell},
title = {On More Efficient Combinational {ATPG} Using Functional Learning},
booktitle = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
3-6 January 1996, Bangalore, India},
pages = {107--110},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ICVD.1996.489467},
doi = {10.1109/ICVD.1996.489467},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MukherjeeJFAF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChatterjeeJPA96,
author = {Abhijit Chatterjee and
Rathish Jayabharathi and
Pankaj Pant and
Jacob A. Abraham},
title = {Non-robust tests for stuck-fault detection using signal waveform analysis:
feasibility and advantages},
booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996,
Princeton, NJ, {USA}},
pages = {354--361},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/VTEST.1996.510879},
doi = {10.1109/VTEST.1996.510879},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChatterjeeJPA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZhengBA96,
author = {Hong Helena Zheng and
Ashok Balivada and
Jacob A. Abraham},
title = {A novel test generation approach for parametric faults in linear analog
circuits},
booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996,
Princeton, NJ, {USA}},
pages = {470--475},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/VTEST.1996.510895},
doi = {10.1109/VTEST.1996.510895},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ZhengBA96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/KanawatiKA95,
author = {Ghani A. Kanawati and
Nasser A. Kanawati and
Jacob A. Abraham},
title = {{FERRARI:} {A} Flexible Software-Based Fault and Error Injection System},
journal = {{IEEE} Trans. Computers},
volume = {44},
number = {2},
pages = {248--260},
year = {1995},
url = {https://doi.org/10.1109/12.364536},
doi = {10.1109/12.364536},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/KanawatiKA95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HoskoteAF95,
author = {Yatin Vasant Hoskote and
Jacob A. Abraham and
Donald S. Fussell},
title = {Automated verification of temporal properties specified as state machines
in {VHDL}},
booktitle = {5th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '95), March 16-18,
1995, The State University of New York at Buffalo, {USA}},
pages = {100--105},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/GLSV.1995.516033},
doi = {10.1109/GLSV.1995.516033},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HoskoteAF95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HoskoteMA95,
author = {Yatin Vasant Hoskote and
Dinos Moundanos and
Jacob A. Abraham},
title = {Automatic extraction of the control flow machine and application to
evaluating coverage of verification vectors},
booktitle = {1995 International Conference on Computer Design {(ICCD} '95), {VLSI}
in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings},
pages = {532--537},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICCD.1995.528919},
doi = {10.1109/ICCD.1995.528919},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HoskoteMA95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/ArunachalamCA95,
author = {Prakash Arunachalam and
Craig M. Chase and
Jacob A. Abraham},
title = {A memory distribution mechanism for object oriented applications},
booktitle = {Proceedings of the Seventh {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1995, San Antonio, Texas , USA, October 25-28,
1995},
pages = {354--357},
publisher = {{IEEE}},
year = {1995},
url = {https://doi.org/10.1109/SPDP.1995.530705},
doi = {10.1109/SPDP.1995.530705},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/ArunachalamCA95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainMBAFR95,
author = {Jawahar Jain and
Dinos Moundanos and
James R. Bitner and
Jacob A. Abraham and
Donald S. Fussell and
Don E. Ross},
title = {Efficient variable ordering and partial representation algorithm},
booktitle = {8th International Conference on {VLSI} Design {(VLSI} Design 1995),
4-7 January 1995, New Delhi, India},
pages = {81--86},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICVD.1995.512082},
doi = {10.1109/ICVD.1995.512082},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainMBAFR95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/NagiCBA95,
author = {Naveena Nagi and
Abhijit Chatterjee and
Ashok Balivada and
Jacob A. Abraham},
title = {Efficient multisine testing of analog circuits},
booktitle = {8th International Conference on {VLSI} Design {(VLSI} Design 1995),
4-7 January 1995, New Delhi, India},
pages = {234--238},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICVD.1995.512115},
doi = {10.1109/ICVD.1995.512115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/NagiCBA95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BalivadaHA95,
author = {Ashok Balivada and
Yatin Vasant Hoskote and
Jacob A. Abraham},
title = {Verification of transient response of linear analog circuits},
booktitle = {13th {IEEE} {VLSI} Test Symposium (VTS'95), April 30 - May 3, 1995,
Princeton, New Jersey, {USA}},
pages = {42--47},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/VTEST.1995.512615},
doi = {10.1109/VTEST.1995.512615},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BalivadaHA95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ChangA94,
author = {Hoon Chang and
Jacob A. Abraham},
title = {An efficient critical path tracing algorithm for sequential circuits},
journal = {Microprocess. Microprogramming},
volume = {40},
number = {10-12},
pages = {913--916},
year = {1994},
url = {https://doi.org/10.1016/0165-6074(94)90068-X},
doi = {10.1016/0165-6074(94)90068-X},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/ChangA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LevittRA94,
author = {Marc E. Levitt and
Kaushik Roy and
Jacob A. Abraham},
title = {BiCMOS logic testing},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {2},
number = {2},
pages = {241--248},
year = {1994},
url = {https://doi.org/10.1109/92.285749},
doi = {10.1109/92.285749},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LevittRA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AbrahamKPdDLSW94,
author = {Jacob A. Abraham and
Sandip Kundu and
Janak H. Patel and
Manuel A. d'Abreu and
Bulent I. Dervisoglu and
Marc E. Levitt and
Hector R. Sucar and
Ron G. Walther},
editor = {Michael J. Lorenzetti},
title = {Microprocessor Testing: Which Technique is Best? (Panel)},
booktitle = {Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994},
pages = {294},
publisher = {{ACM} Press},
year = {1994},
url = {https://doi.org/10.1145/196244.196383},
doi = {10.1145/196244.196383},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AbrahamKPdDLSW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/BitnerJAAF94,
author = {James R. Bitner and
Jawahar Jain and
Magdy S. Abadir and
Jacob A. Abraham and
Donald S. Fussell},
title = {Efficient Algorithmic Circuit Verification Using Indexed BDDs},
booktitle = {Digest of Papers: FTCS/24, The Twenty-Fourth Annual International
Symposium on Fault-Tolerant Computing, Austin, Texas, USA, June 15-17,
1994},
pages = {266--275},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/FTCS.1994.315633},
doi = {10.1109/FTCS.1994.315633},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/BitnerJAAF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HoskoteMAF94,
author = {Yatin Vasant Hoskote and
John Moondanos and
Jacob A. Abraham and
Donald S. Fussell},
title = {Abstraction of data path registers for multilevel verification of
large circuits},
booktitle = {Fourth Great Lakes Symposium on Design Automation of High Performance
{VLSI} Systems, {GLSV} '94, Notre Dame, IN, USA, March 4-5, 1994},
pages = {11--14},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/GLSV.1994.290004},
doi = {10.1109/GLSV.1994.290004},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HoskoteMAF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JainBMAF94,
author = {Jawahar Jain and
James R. Bitner and
Dinos Moundanos and
Jacob A. Abraham and
Donald S. Fussell},
title = {A new scheme to compute variable orders for binary decision diagrams},
booktitle = {Fourth Great Lakes Symposium on Design Automation of High Performance
{VLSI} Systems, {GLSV} '94, Notre Dame, IN, USA, March 4-5, 1994},
pages = {105--108},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/GLSV.1994.289986},
doi = {10.1109/GLSV.1994.289986},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JainBMAF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SaabSA94,
author = {Daniel G. Saab and
Youssef Saab and
Jacob A. Abraham},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {Iterative [simulation-based genetics + deterministic techniques]=
complete {ATPG0}},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {40--43},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629741},
doi = {10.1109/ICCAD.1994.629741},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/SaabSA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChatterjeeA94,
author = {Abhijit Chatterjee and
Jacob A. Abraham},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {{RAFT191486:} a novel program for rapid-fire test and diagnosis of
digital logic for marginal delays and delay faults},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {340--343},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629814},
doi = {10.1109/ICCAD.1994.629814},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChatterjeeA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/NagiCA94,
author = {Naveena Nagi and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {A Signature Analyzer for Analog and Mixed-signal Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {284--287},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331906},
doi = {10.1109/ICCD.1994.331906},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/NagiCA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AngelSA94,
author = {Edwin de Angel and
Earl E. Swartzlander Jr. and
Jacob A. Abraham},
title = {A New Asynchronous Multiplier Using Enable/Disable {CMOS} Differential
Logic},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {302--305},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331911},
doi = {10.1109/ICCD.1994.331911},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AngelSA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SuryaBA94,
author = {S. Surya and
Pradip Bose and
Jacob A. Abraham},
title = {Architectural Performance Verification: PowerPC\({}^{\mbox{TM}}\)
Processors},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {344--347},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331922},
doi = {10.1109/ICCD.1994.331922},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SuryaBA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HoskoteMAF94,
author = {Yatin Vasant Hoskote and
John Moondanos and
Jacob A. Abraham and
Donald S. Fussell},
title = {Verification of Circuits Described in {VHDL} through Extraction of
Design Intent},
booktitle = {Proceedings of the Seventh International Conference on {VLSI} Design,
{VLSI} Design 1994, Calcutta, India, January 5-8, 1994},
pages = {417--420},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICVD.1994.282730},
doi = {10.1109/ICVD.1994.282730},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HoskoteMAF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ThomasVA94,
author = {Thomas Thomas and
Praveen Vishakantaiah and
Jacob A. Abraham},
title = {Impact of behavioral modifications for testability},
booktitle = {12th {IEEE} {VLSI} Test Symposium (VTS'94), April 25-28, 1994, Cherry
Hill, New Jersey, {USA}},
pages = {427--432},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/VTEST.1994.292278},
doi = {10.1109/VTEST.1994.292278},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ThomasVA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/NagiCA93,
author = {Naveena Nagi and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {Fault simulation of linear analog circuits},
journal = {J. Electron. Test.},
volume = {4},
number = {4},
pages = {345--360},
year = {1993},
url = {https://doi.org/10.1007/BF00972159},
doi = {10.1007/BF00972159},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/NagiCA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/simulation/Mueller-ThunsRA93,
author = {Robert B. Mueller{-}Thuns and
Joseph T. Rahmeh and
Jacob A. Abraham and
Jalal A. Wehbeh and
Daniel G. Saab},
title = {Concurrent Hierarchical and Multilevel Simulation of {VLSI} Circuits},
journal = {Simul.},
volume = {60},
number = {2},
pages = {79--91},
year = {1993},
url = {https://doi.org/10.1177/003754979306000202},
doi = {10.1177/003754979306000202},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/simulation/Mueller-ThunsRA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/simulation/KarthikA93,
author = {Sankaran Karthik and
Jacob A. Abraham},
title = {A Framework for Distributed {VLSI} Simulation on a Network of Workstations},
journal = {Simul.},
volume = {60},
number = {2},
pages = {95--104},
year = {1993},
url = {https://doi.org/10.1177/003754979306000203},
doi = {10.1177/003754979306000203},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/simulation/KarthikA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Mueller-ThunsSDA93,
author = {Robert B. Mueller{-}Thuns and
Daniel G. Saab and
Robert F. Damiano and
Jacob A. Abraham},
title = {{VLSI} logic and fault simulation on general-purpose parallel computers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {12},
number = {3},
pages = {446--460},
year = {1993},
url = {https://doi.org/10.1109/43.215006},
doi = {10.1109/43.215006},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Mueller-ThunsSDA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/Mueller-ThunsSDA93,
author = {Robert B. Mueller{-}Thuns and
Daniel G. Saab and
Robert F. Damiano and
Jacob A. Abraham},
title = {Benchmarking Parallel Processing Platforms: An Applications Perspective},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {4},
number = {8},
pages = {947--954},
year = {1993},
url = {https://doi.org/10.1109/71.238628},
doi = {10.1109/71.238628},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/Mueller-ThunsSDA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChangA93,
author = {Hoon Chang and
Jacob A. Abraham},
editor = {Alfred E. Dunlop},
title = {{VIPER:} An Efficient Vigorously Sensitizable Path Extractor},
booktitle = {Proceedings of the 30th Design Automation Conference. Dallas, Texas,
USA, June 14-18, 1993},
pages = {112--117},
publisher = {{ACM} Press},
year = {1993},
url = {https://doi.org/10.1145/157485.158845},
doi = {10.1145/157485.158845},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChangA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/NagiCA93,
author = {Naveena Nagi and
Abhijit Chatterjee and
Jacob A. Abraham},
editor = {Alfred E. Dunlop},
title = {{DRAFTS:} Discretized Analog Circuit Fault Simulator},
booktitle = {Proceedings of the 30th Design Automation Conference. Dallas, Texas,
USA, June 14-18, 1993},
pages = {509--514},
publisher = {{ACM} Press},
year = {1993},
url = {https://doi.org/10.1145/157485.165008},
doi = {10.1145/157485.165008},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/NagiCA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GanapathyA93,
author = {Gopi Ganapathy and
Jacob A. Abraham},
editor = {Alfred E. Dunlop},
title = {Selective Pseudo Scan: Combinational {ATPG} with Reduced Scan in a
Full Custom {RISC} Microprocessor},
booktitle = {Proceedings of the 30th Design Automation Conference. Dallas, Texas,
USA, June 14-18, 1993},
pages = {550--555},
publisher = {{ACM} Press},
year = {1993},
url = {https://doi.org/10.1145/157485.165030},
doi = {10.1145/157485.165030},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/GanapathyA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/VishakantaiahA93,
author = {Praveen Vishakantaiah and
Jacob A. Abraham},
title = {Impact of Behavioral Learning on the Compilation of Sequential Circuit
Tests},
booktitle = {Digest of Papers: FTCS-23, The Twenty-Third Annual International Symposium
on Fault-Tolerant Computing, Toulouse, France, June 22-24, 1993},
pages = {370--379},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/FTCS.1993.627340},
doi = {10.1109/FTCS.1993.627340},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/VishakantaiahA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/NagiCBA93,
author = {Naveena Nagi and
Abhijit Chatterjee and
Ashok Balivada and
Jacob A. Abraham},
editor = {Michael R. Lightner and
Jochen A. G. Jess},
title = {Fault-based automatic test generator for linear analog circuits},
booktitle = {Proceedings of the 1993 {IEEE/ACM} International Conference on Computer-Aided
Design, 1993, Santa Clara, California, USA, November 7-11, 1993},
pages = {88--91},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1993},
url = {https://doi.org/10.1109/ICCAD.1993.580036},
doi = {10.1109/ICCAD.1993.580036},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/NagiCBA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/VishakantaiahTAA93,
author = {Praveen Vishakantaiah and
Thomas Thomas and
Jacob A. Abraham and
Magdy S. Abadir},
title = {{AMBIANT:} Automatic Generation of Behavioral Modifications for Testability},
booktitle = {Proceedings 1993 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '93, Cambridge, MA, USA,
October 3-6, 1993},
pages = {63--66},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICCD.1993.393404},
doi = {10.1109/ICCD.1993.393404},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/VishakantaiahTAA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/NagiCA93,
author = {Naveena Nagi and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {{MIXER:} Mixed-Signal Fault Simulator},
booktitle = {Proceedings 1993 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '93, Cambridge, MA, USA,
October 3-6, 1993},
pages = {568--571},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICCD.1993.393313},
doi = {10.1109/ICCD.1993.393313},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/NagiCA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issre/KanawatiKA93,
author = {Nasser A. Kanawati and
Ghani A. Kanawati and
Jacob A. Abraham},
title = {Adding capability checks enhances error detection and isolation in
object-based systems},
booktitle = {Fourth International Symposium on Software Reliability Engineering,
{ISSRE} 1993, Denver, CO, USA, November 3-6, 1993},
pages = {182--191},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ISSRE.1993.624287},
doi = {10.1109/ISSRE.1993.624287},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/issre/KanawatiKA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/VishakantaiahAS93,
author = {Praveen Vishakantaiah and
Jacob A. Abraham and
Daniel G. Saab},
title = {{CHEETA:} Composition of Hierarchical Sequential Tests Using {ATKET}},
booktitle = {Proceedings {IEEE} International Test Conference 1993, Designing,
Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October
17-21, 1993},
pages = {606--615},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/TEST.1993.470643},
doi = {10.1109/TEST.1993.470643},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/VishakantaiahAS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KarthikAV93,
author = {Sankaran Karthik and
Jacob A. Abraham and
Raymond P. Voith},
title = {Optimizations for Behavioral/RTL Simulation},
booktitle = {Proceedings of the Sixth International Conference on {VLSI} Design,
{VLSI} Design 1993, Bombay, India, January 3-6, 1993},
pages = {311--316},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICVD.1993.669702},
doi = {10.1109/ICVD.1993.669702},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KarthikAV93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/VarmaVA93,
author = {Kamal K. Varma and
Praveen Vishakantaiah and
Jacob A. Abraham},
title = {Generation of testable designs from behavioral descriptions using
high level synthesis tools},
booktitle = {11th {IEEE} {VLSI} Test Symposium (VTS'93), 6 Apr 1993-8 Apr 1993,
Atlantic City, NJ, {USA}},
pages = {124--130},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/VTEST.1993.313337},
doi = {10.1109/VTEST.1993.313337},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/VarmaVA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ChenA92,
author = {Chun{-}Hung Chen and
Jacob A. Abraham},
title = {Generation and evaluation of current and logic tests for switch-level
sequential circuits},
journal = {J. Electron. Test.},
volume = {3},
number = {4},
pages = {359--366},
year = {1992},
url = {https://doi.org/10.1007/BF00135339},
doi = {10.1007/BF00135339},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ChenA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/JainABF92,
author = {Jawahar Jain and
Jacob A. Abraham and
James R. Bitner and
Donald S. Fussell},
title = {Probabilistic Verification of Boolean Functions},
journal = {Formal Methods Syst. Des.},
volume = {1},
number = {1},
pages = {61--115},
year = {1992},
url = {https://doi.org/10.1007/BF00464357},
doi = {10.1007/BF00464357},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/JainABF92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/NairHA92,
author = {V. S. S. Nair and
Yatin Vasant Hoskote and
Jacob A. Abraham},
title = {Probabilistic Evaluation of On-Line Checks in Fault-Tolerant Multiprocessor
Systems},
journal = {{IEEE} Trans. Computers},
volume = {41},
number = {5},
pages = {532--541},
year = {1992},
url = {https://doi.org/10.1109/12.142679},
doi = {10.1109/12.142679},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/NairHA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NiermannRPA92,
author = {Thomas M. Niermann and
Rabindra K. Roy and
Janak H. Patel and
Jacob A. Abraham},
title = {Test compaction for sequential circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {11},
number = {2},
pages = {260--267},
year = {1992},
url = {https://doi.org/10.1109/43.124404},
doi = {10.1109/43.124404},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NiermannRPA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/VishakantaiahAA92,
author = {Praveen Vishakantaiah and
Jacob A. Abraham and
Magdy S. Abadir},
editor = {Daniel G. Schweikert},
title = {Automatic Test Knowledge Extraction from {VHDL} {(ATKET)}},
booktitle = {Proceedings of the 29th Design Automation Conference, Anaheim, California,
USA, June 8-12, 1992},
pages = {273--278},
publisher = {{IEEE} Computer Society Press},
year = {1992},
url = {http://portal.acm.org/citation.cfm?id=113938.149442},
timestamp = {Thu, 16 Mar 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/VishakantaiahAA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/LongFA92,
author = {Junsheng Long and
W. Kent Fuchs and
Jacob A. Abraham},
title = {Compiler-Assisted Static Checkpoint Insertion},
booktitle = {Digest of Papers: FTCS-22, The Twenty-Second Annual International
Symposium on Fault-Tolerant Computing, Boston, Massachusetts, USA,
July 8-10, 1992},
pages = {58--65},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/FTCS.1992.243615},
doi = {10.1109/FTCS.1992.243615},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/LongFA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/KanawatiKA92,
author = {Ghani A. Kanawati and
Nasser A. Kanawati and
Jacob A. Abraham},
title = {{FERRARI:} {A} Tool for The Validation of System Dependability Properties},
booktitle = {Digest of Papers: FTCS-22, The Twenty-Second Annual International
Symposium on Fault-Tolerant Computing, Boston, Massachusetts, USA,
July 8-10, 1992},
pages = {336--344},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/FTCS.1992.243567},
doi = {10.1109/FTCS.1992.243567},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/KanawatiKA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SaabSA92,
author = {Daniel G. Saab and
Youssef Saab and
Jacob A. Abraham},
editor = {Louise Trevillyan and
Michael R. Lightner},
title = {{CRIS:} a test cultivation program for sequential {VLSI} circuits},
booktitle = {1992 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of
Technical Papers},
pages = {216--219},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1992},
url = {https://doi.org/10.1109/ICCAD.1992.279372},
doi = {10.1109/ICCAD.1992.279372},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/SaabSA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RoyCPAd92,
author = {Rabindra K. Roy and
Abhijit Chatterjee and
Janak H. Patel and
Jacob A. Abraham and
Manuel A. d'Abreu},
editor = {Louise Trevillyan and
Michael R. Lightner},
title = {Automatic test generation for linear digital systems with bi-level
search using matrix transform methods},
booktitle = {1992 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of
Technical Papers},
pages = {224--228},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1992},
url = {https://doi.org/10.1109/ICCAD.1992.279370},
doi = {10.1109/ICCAD.1992.279370},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RoyCPAd92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KarthikA92,
author = {Sankaran Karthik and
Jacob A. Abraham},
title = {Distributed {VLSI} Simulation on a Network of Workstations},
booktitle = {Proceedings 1992 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '92, Cambridge, MA,
USA, October 11-14, 1992},
pages = {508--511},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/ICCD.1992.276328},
doi = {10.1109/ICCD.1992.276328},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KarthikA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MoondanosA92,
author = {John Moondanos and
Jacob A. Abraham},
title = {Sequential Redundancy Identification Using Verification Techniques},
booktitle = {Proceedings {IEEE} International Test Conference 1992, Discover the
New World of Test and Design, Baltimore, Maryland, USA, September
20-24, 1992},
pages = {197--205},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/TEST.1992.527820},
doi = {10.1109/TEST.1992.527820},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MoondanosA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NagiA92,
author = {Naveena Nagi and
Jacob A. Abraham},
title = {Hierarchical fault modeling for analog and mixed-signal circuits},
booktitle = {10th {IEEE} {VLSI} Test Symposium (VTS'92), 7-9 Apr 1992, Atlantic
City, NJ, {USA}},
pages = {96--101},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/VTEST.1992.232731},
doi = {10.1109/VTEST.1992.232731},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/NagiA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dsp/ChatterjeeRAP91,
author = {Abhijit Chatterjee and
Rabindra K. Roy and
Jacob A. Abraham and
Janak H. Patel},
title = {Efficient testing strategies for bit- and digit-serial arrays used
in digital signal processors},
journal = {Digit. Signal Process.},
volume = {1},
number = {4},
pages = {231--244},
year = {1991},
url = {https://doi.org/10.1016/1051-2004(91)90115-2},
doi = {10.1016/1051-2004(91)90115-2},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dsp/ChatterjeeRAP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ChatterjeeA91,
author = {Abhijit Chatterjee and
Jacob A. Abraham},
title = {Test generation, design-for-testability and built-in self-test for
arithmetic units based on graph labeling},
journal = {J. Electron. Test.},
volume = {2},
number = {4},
pages = {351--372},
year = {1991},
url = {https://doi.org/10.1007/BF00135230},
doi = {10.1007/BF00135230},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ChatterjeeA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChatterjeeA91,
author = {Abhijit Chatterjee and
Jacob A. Abraham},
title = {Test Generation for Iterative Logic Arrays Based on an N-Cube of Cell
States Model},
journal = {{IEEE} Trans. Computers},
volume = {40},
number = {10},
pages = {1133--1148},
year = {1991},
url = {https://doi.org/10.1109/12.93746},
doi = {10.1109/12.93746},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChatterjeeA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/Mueller-ThunsSA91,
author = {Robert B. Mueller{-}Thuns and
Daniel G. Saab and
Jacob A. Abraham},
editor = {Tony Ambler and
Jochen A. G. Jess and
Hugo De Man},
title = {Parallel switch-level simulation for {VLSI}},
booktitle = {Proceedings of the conference on European design automation, EURO-DAC'91,
Amsterdam, The Netherlands, 1991},
pages = {324--328},
publisher = {{EEE} Computer Society},
year = {1991},
url = {http://dl.acm.org/citation.cfm?id=951583},
timestamp = {Tue, 17 Nov 2015 16:02:17 +0100},
biburl = {https://dblp.org/rec/conf/eurodac/Mueller-ThunsSA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/BlaauwSBA91,
author = {David T. Blaauw and
Daniel G. Saab and
Prithviraj Banerjee and
Jacob A. Abraham},
editor = {Tony Ambler and
Jochen A. G. Jess and
Hugo De Man},
title = {Functional abstraction of logic gates for switch-level simulation},
booktitle = {Proceedings of the conference on European design automation, EURO-DAC'91,
Amsterdam, The Netherlands, 1991},
pages = {329--333},
publisher = {{EEE} Computer Society},
year = {1991},
url = {http://dl.acm.org/citation.cfm?id=951584},
timestamp = {Tue, 17 Nov 2015 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/eurodac/BlaauwSBA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Abraham91,
author = {Jacob A. Abraham},
title = {Design and evaluation of fault tolerance techniques for highly parallel
architectures},
booktitle = {First Great Lakes Symposium on VLSI, 1991, Kalamazoo, MI, USA, March
1-2, 1991},
publisher = {{IEEE}},
year = {1991},
url = {https://doi.org/10.1109/GLSV.1991.143934},
doi = {10.1109/GLSV.1991.143934},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Abraham91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/JainBFA91,
author = {Jawahar Jain and
James R. Bitner and
Donald S. Fussell and
Jacob A. Abraham},
title = {Probabilistic Design Verification},
booktitle = {1991 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1993, Santa Clara, CA, USA, November 11-14, 1991. Digest of
Technical Papers},
pages = {468--471},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICCAD.1991.185306},
doi = {10.1109/ICCAD.1991.185306},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/JainBFA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KarthikSRA91,
author = {Sankaran Karthik and
Indira de Souza and
Joseph T. Rahmeh and
Jacob A. Abraham},
title = {Interlock Schemes for Micropiplines: Application to a Self-Timed Rebound
Sorter},
booktitle = {Proceedings 1991 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '91, Cambridge, MA,
USA, October 14-16, 1991},
pages = {393--396},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICCD.1991.139927},
doi = {10.1109/ICCD.1991.139927},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KarthikSRA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChenA91,
author = {Chun{-}Hung Chen and
Jacob A. Abraham},
title = {High Quality Tests for Switch-Level Circuits Using Current and Logic
Test Generation Algorithms},
booktitle = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
pages = {615--622},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/TEST.1991.519725},
doi = {10.1109/TEST.1991.519725},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/itc/ChenA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GanapathyA91,
author = {Gopi Ganapathy and
Jacob A. Abraham},
title = {Hardware Acceleration Alone Will Not Make Fault Grading {ULSI} a Reality},
booktitle = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
pages = {848--857},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/TEST.1991.519750},
doi = {10.1109/TEST.1991.519750},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/GanapathyA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SaabMBRA90,
author = {Daniel G. Saab and
Robert B. Mueller{-}Thuns and
David T. Blaauw and
Joseph T. Rahmeh and
Jacob A. Abraham},
title = {Hierarchical multi-level fault simulation of large systems},
journal = {J. Electron. Test.},
volume = {1},
number = {2},
pages = {139--149},
year = {1990},
url = {https://doi.org/10.1007/BF00137390},
doi = {10.1007/BF00137390},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/SaabMBRA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/NairA90,
author = {V. S. S. Nair and
Jacob A. Abraham},
title = {Real-Number Codes for Bault-Tolerant Matrix Operations On Processor
Arrays},
journal = {{IEEE} Trans. Computers},
volume = {39},
number = {4},
pages = {426--435},
year = {1990},
url = {https://doi.org/10.1109/12.54836},
doi = {10.1109/12.54836},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/NairA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BanerjeeRSNRBA90,
author = {Prithviraj Banerjee and
Joseph T. Rahmeh and
Craig B. Stunkel and
V. S. S. Nair and
Kaushik Roy and
Vijay Balasubramanian and
Jacob A. Abraham},
title = {Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor},
journal = {{IEEE} Trans. Computers},
volume = {39},
number = {9},
pages = {1132--1145},
year = {1990},
url = {https://doi.org/10.1109/12.57055},
doi = {10.1109/12.57055},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BanerjeeRSNRBA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChatterjeeA90,
author = {Abhijit Chatterjee and
Jacob A. Abraham},
title = {The Testability of Generalized Counters Under Multiple Faulty Cells},
journal = {{IEEE} Trans. Computers},
volume = {39},
number = {11},
pages = {1378--1385},
year = {1990},
url = {https://doi.org/10.1109/12.61053},
doi = {10.1109/12.61053},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChatterjeeA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KundaARN90,
author = {Ramachandra P. Kunda and
Jacob A. Abraham and
Bharat Deep Rathi and
Prakash Narain},
editor = {Richard C. Smith},
title = {Speed Up of Test Generation Using High-Level Primitives},
booktitle = {Proceedings of the 27th {ACM/IEEE} Design Automation Conference. Orlando,
Florida, USA, June 24-28, 1990},
pages = {594--599},
publisher = {{IEEE} Computer Society Press},
year = {1990},
url = {https://doi.org/10.1145/123186.123413},
doi = {10.1145/123186.123413},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KundaARN90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/BlaauwSLA90,
author = {David T. Blaauw and
Daniel G. Saab and
Junsheng Long and
Jacob A. Abraham},
editor = {Gordon Adshead and
Jochen A. G. Jess},
title = {Derivation of signal flow for switch-level simulation},
booktitle = {European Design Automation Conference, {EURO-DAC} 1990, Glasgow, Scotland,
UK, March 12-15, 1990},
pages = {301--305},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/EDAC.1990.136663},
doi = {10.1109/EDAC.1990.136663},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/BlaauwSLA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/RoyA90,
author = {Kaushik Roy and
Jacob A. Abraham},
editor = {Gordon Adshead and
Jochen A. G. Jess},
title = {High level test generation using data flow descriptions},
booktitle = {European Design Automation Conference, {EURO-DAC} 1990, Glasgow, Scotland,
UK, March 12-15, 1990},
pages = {480--484},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/EDAC.1990.136695},
doi = {10.1109/EDAC.1990.136695},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/RoyA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/NairA90,
author = {Suku Nair and
Jacob A. Abraham},
title = {Hierarchical design and analysis of fault-tolerant multiprocessor
systems using concurrent error detection},
booktitle = {Proceedings of the 20th International Symposium on Fault-Tolerant
Computing, {FTCS} 1990, Newcastle Upon Tyne, UK, 26-28 June, 1990},
pages = {130--137},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/FTCS.1990.89348},
doi = {10.1109/FTCS.1990.89348},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/NairA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BlaauwMSBA90,
author = {David T. Blaauw and
Robert B. Mueller{-}Thuns and
Daniel G. Saab and
Prithviraj Banerjee and
Jacob A. Abraham},
title = {{SNEL:} {A} Switch-Level Simulator Using Multiple Levels of Functional
Abstraction},
booktitle = {{IEEE/ACM} International Conference on Computer-Aided Design, {ICCAD}
1990, Santa Clara, CA, USA, November 11-15, 1990. Digest of Technical
Papers},
pages = {66--69},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/ICCAD.1990.129842},
doi = {10.1109/ICCAD.1990.129842},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BlaauwMSBA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChenA90,
author = {Chun{-}Hung Chen and
Jacob A. Abraham},
title = {Mixed-Level Sequential Test Generation Using a Nine-Valued Relaxation
Algorithm},
booktitle = {{IEEE/ACM} International Conference on Computer-Aided Design, {ICCAD}
1990, Santa Clara, CA, USA, November 11-15, 1990. Digest of Technical
Papers},
pages = {230--233},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/ICCAD.1990.129888},
doi = {10.1109/ICCAD.1990.129888},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChenA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BlaauwBA90,
author = {David T. Blaauw and
Prithviraj Banerjee and
Jacob A. Abraham},
title = {Automatic classification of node types in switch-level descriptions},
booktitle = {Proceedings of the 1990 {IEEE} International Conference on Computer
Design: {VLSI} in Computers and Processors, {ICCD} 1990, Cambridge,
MA, USA, 17-19 September, 1990},
pages = {175--178},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/ICCD.1990.130194},
doi = {10.1109/ICCD.1990.130194},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BlaauwBA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SaabMBRA90,
author = {Daniel G. Saab and
Robert B. Mueller{-}Thuns and
David T. Blaauw and
Joseph T. Rahmeh and
Jacob A. Abraham},
title = {Fault grading of large digital systems},
booktitle = {Proceedings of the 1990 {IEEE} International Conference on Computer
Design: {VLSI} in Computers and Processors, {ICCD} 1990, Cambridge,
MA, USA, 17-19 September, 1990},
pages = {290--293},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/ICCD.1990.130230},
doi = {10.1109/ICCD.1990.130230},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SaabMBRA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LevittRA90,
author = {Marc E. Levitt and
Kaushik Roy and
Jacob A. Abraham},
title = {BiCMOS fault models: is stuck-at adequate?},
booktitle = {Proceedings of the 1990 {IEEE} International Conference on Computer
Design: {VLSI} in Computers and Processors, {ICCD} 1990, Cambridge,
MA, USA, 17-19 September, 1990},
pages = {294--297},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/ICCD.1990.130231},
doi = {10.1109/ICCD.1990.130231},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LevittRA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/LongFA90,
author = {Junsheng Long and
W. Kent Fuchs and
Jacob A. Abraham},
editor = {Benjamin W. Wah},
title = {Forward Recovery Using Checkpointing in Parallel Systems},
booktitle = {Proceedings of the 1990 International Conference on Parallel Processing,
Urbana-Champaign, IL, USA, August 1990. Volume 1: Architecture},
pages = {272--275},
publisher = {Pennsylvania State University Press},
year = {1990},
timestamp = {Mon, 28 Jul 2014 17:06:01 +0200},
biburl = {https://dblp.org/rec/conf/icpp/LongFA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChanA90,
author = {John C. Chan and
Jacob A. Abraham},
title = {A study of faulty signatures using a matrix formulation},
booktitle = {Proceedings {IEEE} International Test Conference 1990, Washington,
D.C., USA, September 10-14, 1990},
pages = {553--561},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/TEST.1990.114067},
doi = {10.1109/TEST.1990.114067},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChanA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/Mueller-ThunsSA90,
author = {Robert B. Mueller{-}Thuns and
Daniel G. Saab and
Jacob A. Abraham},
editor = {Joanne L. Martin and
Daniel V. Pryor and
Gary R. Montry},
title = {Design of a scalable parallel switch-level simulator for {VLSI}},
booktitle = {Proceedings Supercomputing '90, New York, NY, USA, November 12-16,
1990},
pages = {615--624},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/SUPERC.1990.130077},
doi = {10.1109/SUPERC.1990.130077},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/Mueller-ThunsSA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BlaauwSMAR89,
author = {David T. Blaauw and
Daniel G. Saab and
Robert B. Mueller{-}Thuns and
Jacob A. Abraham and
Joseph T. Rahmeh},
editor = {Donald E. Thomas},
title = {Automatic Generation of Behavioral Models from Switch-Level Descriptions},
booktitle = {Proceedings of the 26th {ACM/IEEE} Design Automation Conference, Las
Vegas, Nevada, USA, June 25-29, 1989},
pages = {179--184},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/74382.74413},
doi = {10.1145/74382.74413},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BlaauwSMAR89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GuraA89,
author = {Carol V. Gura and
Jacob A. Abraham},
editor = {Donald E. Thomas},
title = {Average Interconnection Length and Interconnection Distribution Based
on Rent's Rule},
booktitle = {Proceedings of the 26th {ACM/IEEE} Design Automation Conference, Las
Vegas, Nevada, USA, June 25-29, 1989},
pages = {574--577},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/74382.74478},
doi = {10.1145/74382.74478},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/GuraA89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/RoyA89,
author = {Kaushik Roy and
Jacob A. Abraham},
editor = {Donald E. Thomas},
title = {A Novel Approach to Accurate Timing Verification Using {RTL} Descriptions},
booktitle = {Proceedings of the 26th {ACM/IEEE} Design Automation Conference, Las
Vegas, Nevada, USA, June 25-29, 1989},
pages = {638--641},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/74382.74494},
doi = {10.1145/74382.74494},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/RoyA89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RoyADL89,
author = {Kaushik Roy and
Jacob A. Abraham and
Kaushik De and
Stephen L. Lusky},
title = {Synthesis of delay fault testable combinational logic},
booktitle = {1989 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical
Papers},
pages = {418--421},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/ICCAD.1989.76982},
doi = {10.1109/ICCAD.1989.76982},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RoyADL89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/Mueller-ThunsSD89,
author = {Robert B. Mueller{-}Thuns and
Daniel G. Saab and
Robert F. Damiano and
Jacob A. Abraham},
title = {Portable parallel logic and fault simulation},
booktitle = {1989 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical
Papers},
pages = {506--509},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/ICCAD.1989.77001},
doi = {10.1109/ICCAD.1989.77001},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/Mueller-ThunsSD89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip/Abraham89,
author = {Jacob A. Abraham},
editor = {Gerhard X. Ritter},
title = {Advances in VLSI-Testing},
booktitle = {Information Processing 89, Proceedings of the {IFIP} 11th World Computer
Congress, San Francisco, USA, August 28 - September 1, 1989},
pages = {1013--1018},
publisher = {North-Holland/IFIP},
year = {1989},
timestamp = {Wed, 02 Feb 2022 21:17:54 +0100},
biburl = {https://dblp.org/rec/conf/ifip/Abraham89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ThearlingA89,
author = {Kurt H. Thearling and
Jacob A. Abraham},
title = {An Easily Computed Functional Level Testability Measure},
booktitle = {Proceedings International Test Conference 1989, Washington, D.C.,
USA, August 1989},
pages = {381--390},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/TEST.1989.82322},
doi = {10.1109/TEST.1989.82322},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ThearlingA89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LevittA89,
author = {Marc E. Levitt and
Jacob A. Abraham},
title = {The Economics of Scan Design},
booktitle = {Proceedings International Test Conference 1989, Washington, D.C.,
USA, August 1989},
pages = {869--874},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/TEST.1989.82377},
doi = {10.1109/TEST.1989.82377},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/LevittA89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/JouA88,
author = {Jing{-}Yang Jou and
Jacob A. Abraham},
title = {Fault-Tolerant {FFT} Networks},
journal = {{IEEE} Trans. Computers},
volume = {37},
number = {5},
pages = {548--561},
year = {1988},
url = {https://doi.org/10.1109/12.4606},
doi = {10.1109/12.4606},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/JouA88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GuraA88,
author = {Carol V. Gura and
Jacob A. Abraham},
editor = {Dennis W. Shaklee and
A. Richard Newton},
title = {Improved Methods of Simulating {RLC} Couple and Uncoupled Transmission
Lines Based on the Method of Characteristics},
booktitle = {Proceedings of the 25th {ACM/IEEE} Conference on Design Automation,
{DAC} '88, Anaheim, CA, USA, June 12-15, 1988},
pages = {300--305},
publisher = {{ACM}},
year = {1988},
url = {http://portal.acm.org/citation.cfm?id=285730.285779},
timestamp = {Fri, 12 Mar 2021 15:27:48 +0100},
biburl = {https://dblp.org/rec/conf/dac/GuraA88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DubaRAR88,
author = {Patrick A. Duba and
Rabindra K. Roy and
Jacob A. Abraham and
William A. Rogers},
editor = {Dennis W. Shaklee and
A. Richard Newton},
title = {Fault Simulation in a Distributed Environment},
booktitle = {Proceedings of the 25th {ACM/IEEE} Conference on Design Automation,
{DAC} '88, Anaheim, CA, USA, June 12-15, 1988},
pages = {686--691},
publisher = {{ACM}},
year = {1988},
url = {http://portal.acm.org/citation.cfm?id=285730.285848},
timestamp = {Thu, 16 Mar 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DubaRAR88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/NairA88,
author = {Suku Nair and
Jacob A. Abraham},
title = {General linear codes for fault-tolerant matrix operations on processor
arrays},
booktitle = {Proceedings of the Eighteenth International Symposium on Fault-Tolerant
Computing, {FTCS} 1988, Tokyo, Japan, 27-30 June, 1988},
pages = {180--185},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/FTCS.1988.5317},
doi = {10.1109/FTCS.1988.5317},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/NairA88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/BanerjeeRSNRA88,
author = {Prithviraj Banerjee and
Joseph T. Rahmeh and
Craig B. Stunkel and
V. S. S. Nair and
Kaushik Roy and
Jacob A. Abraham},
title = {An evaluation of system-level fault tolerance on the Intel hypercube
multiprocessor},
booktitle = {Proceedings of the Eighteenth International Symposium on Fault-Tolerant
Computing, {FTCS} 1988, Tokyo, Japan, 27-30 June, 1988},
pages = {362--367},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/FTCS.1988.5344},
doi = {10.1109/FTCS.1988.5344},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/BanerjeeRSNRA88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SaabMBAR88,
author = {Daniel G. Saab and
Robert B. Mueller{-}Thuns and
David T. Blaauw and
Jacob A. Abraham and
Joseph T. Rahmeh},
title = {{CHAMP:} concurrent hierarchical and multilevel program for simulation
of {VLSI} circuits},
booktitle = {1988 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1988, Santa Clara, CA, USA, November 7-10, 1988. Digest of Technical
Papers},
pages = {246--249},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/ICCAD.1988.122503},
doi = {10.1109/ICCAD.1988.122503},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/SaabMBAR88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RoyNPAS88,
author = {Rabindra K. Roy and
Thomas M. Niermann and
Janak H. Patel and
Jacob A. Abraham and
Resve A. Saleh},
title = {Compaction of ATPG-generated test sequences for sequential circuits},
booktitle = {1988 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1988, Santa Clara, CA, USA, November 7-10, 1988. Digest of Technical
Papers},
pages = {382--385},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/ICCAD.1988.122533},
doi = {10.1109/ICCAD.1988.122533},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RoyNPAS88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChatterjeeA88,
author = {Abhijit Chatterjee and
Jacob A. Abraham},
title = {{NCUBE:} an automatic test generation program for iterative logic
arrays},
booktitle = {1988 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1988, Santa Clara, CA, USA, November 7-10, 1988. Digest of Technical
Papers},
pages = {428--431},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/ICCAD.1988.122542},
doi = {10.1109/ICCAD.1988.122542},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChatterjeeA88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/JouA88,
author = {Jing{-}Yang Jou and
Jacob A. Abraham},
title = {Fault-Tolerant Algorithms and Architectures for Real Time Signal Processing},
booktitle = {Proceedings of the International Conference on Parallel Processing,
{ICPP} '88, The Pennsylvania State University, University Park, PA,
USA, August 1988. Volume 1: Architecture},
pages = {359--362},
publisher = {Pennsylvania State University Press},
year = {1988},
timestamp = {Mon, 28 Jul 2014 17:06:01 +0200},
biburl = {https://dblp.org/rec/conf/icpp/JouA88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarlettA88,
author = {M. J. Marlett and
Jacob A. Abraham},
title = {DC{\_}IATP : An Iterative Analog Circuit Test Generation Program for
Generating {DC} Single Pattern Tests},
booktitle = {Proceedings International Test Conference 1988, Washington, D.C.,
USA, September 1988},
pages = {839--844},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/TEST.1988.207871},
doi = {10.1109/TEST.1988.207871},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/itc/MarlettA88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/AbrahamBCFKR87,
author = {Jacob A. Abraham and
Prithviraj Banerjee and
Chien{-}Yi Chen and
W. Kent Fuchs and
Sy{-}Yen Kuo and
A. L. Narasimha Reddy},
title = {Fault Tolerance Techniques for Systolic Arrays},
journal = {Computer},
volume = {20},
number = {7},
pages = {65--75},
year = {1987},
url = {https://doi.org/10.1109/MC.1987.1663621},
doi = {10.1109/MC.1987.1663621},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/AbrahamBCFKR87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChatterjeeA87,
author = {Abhijit Chatterjee and
Jacob A. Abraham},
title = {On the C-Testability of Generalized Counters},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {6},
number = {5},
pages = {713--726},
year = {1987},
url = {https://doi.org/10.1109/TCAD.1987.1270317},
doi = {10.1109/TCAD.1987.1270317},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChatterjeeA87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RogersGA87,
author = {William A. Rogers and
John F. Guzolek and
Jacob A. Abraham},
title = {Concurrent Hierarchical Fault Simulation: {A} Performance Model and
Two Optimizations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {6},
number = {5},
pages = {848--862},
year = {1987},
url = {https://doi.org/10.1109/TCAD.1987.1270328},
doi = {10.1109/TCAD.1987.1270328},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RogersGA87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tse/FuchsWA87,
author = {W. Kent Fuchs and
Kun{-}Lung Wu and
Jacob A. Abraham},
title = {Comparison and Diagnosis of Large Replicated Files},
journal = {{IEEE} Trans. Software Eng.},
volume = {13},
number = {1},
pages = {15--22},
year = {1987},
url = {https://doi.org/10.1109/TSE.1987.232561},
doi = {10.1109/TSE.1987.232561},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tse/FuchsWA87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/AbrahamF86,
author = {Jacob A. Abraham and
W. Kent Fuchs},
title = {Fault and error models for {VLSI}},
journal = {Proc. {IEEE}},
volume = {74},
number = {5},
pages = {639--654},
year = {1986},
url = {https://doi.org/10.1109/PROC.1986.13528},
doi = {10.1109/PROC.1986.13528},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pieee/AbrahamF86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/JouA86,
author = {Jing{-}Yang Jou and
Jacob A. Abraham},
title = {Fault-tolerant matrix arithmetic and signal processing on highly concurrent
computing structures},
journal = {Proc. {IEEE}},
volume = {74},
number = {5},
pages = {732--741},
year = {1986},
url = {https://doi.org/10.1109/PROC.1986.13535},
doi = {10.1109/PROC.1986.13535},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pieee/JouA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BanerjeeA86,
author = {Prithviraj Banerjee and
Jacob A. Abraham},
title = {Bounds on Algorithm-Based Fault Tolerance in Multiple Processor Systems},
journal = {{IEEE} Trans. Computers},
volume = {35},
number = {4},
pages = {296--306},
year = {1986},
url = {https://doi.org/10.1109/TC.1986.1676762},
doi = {10.1109/TC.1986.1676762},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BanerjeeA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChouA86,
author = {Timothy C. K. Chou and
Jacob A. Abraham},
title = {Distributed Control of Computer Systems},
journal = {{IEEE} Trans. Computers},
volume = {35},
number = {6},
pages = {564--567},
year = {1986},
url = {https://doi.org/10.1109/TC.1986.5009433},
doi = {10.1109/TC.1986.5009433},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChouA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShihRA86,
author = {Hsi{-}Ching Shih and
Joseph T. Rahmeh and
Jacob A. Abraham},
title = {{FAUST:} An {MOS} Fault Simulator with Timing Information},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {557--563},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270226},
doi = {10.1109/TCAD.1986.1270226},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShihRA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ShihA86,
author = {Hsi{-}Ching Shih and
Jacob A. Abraham},
editor = {Don Thomas},
title = {Transistor-level test generation for physical failures in {CMOS} circuits},
booktitle = {Proceedings of the 23rd {ACM/IEEE} Design Automation Conference. Las
Vegas, NV, USA, June, 1986},
pages = {243--249},
publisher = {{IEEE} Computer Society Press},
year = {1986},
url = {https://doi.org/10.1145/318013.318052},
doi = {10.1145/318013.318052},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ShihA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fjcc/ChenA86,
author = {Chien{-}Yi Chen and
Jacob A. Abraham},
title = {On the Design of Fault-Tolerant Systolic Arrays with Linear Cells},
booktitle = {Proceedings of the Fall Joint Computer Conference, November 2-6, 1986,
Dallas, Texas, {USA}},
pages = {400--409},
publisher = {{IEEE} Computer Society},
year = {1986},
timestamp = {Fri, 29 Sep 2017 14:35:52 +0200},
biburl = {https://dblp.org/rec/conf/fjcc/ChenA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fjcc/HuaA86,
author = {Kien A. Hua and
Jacob A. Abraham},
title = {Design of Systems with Concurrent Error Detection Using Software Redundancy},
booktitle = {Proceedings of the Fall Joint Computer Conference, November 2-6, 1986,
Dallas, Texas, {USA}},
pages = {826--835},
publisher = {{IEEE} Computer Society},
year = {1986},
timestamp = {Thu, 04 May 2006 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fjcc/HuaA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fjcc/Abraham86,
author = {Jacob A. Abraham},
title = {Research in Reliable {VLSI} Architectures at the University of Illinois},
booktitle = {Proceedings of the Fall Joint Computer Conference, November 2-6, 1986,
Dallas, Texas, {USA}},
pages = {890--893},
publisher = {{IEEE} Computer Society},
year = {1986},
timestamp = {Thu, 04 May 2006 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fjcc/Abraham86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChangRA86,
author = {Hongtao P. Chang and
William A. Rogers and
Jacob A. Abraham},
title = {Structured Functional Level Test Generation Using Binary Decision
Diagrams},
booktitle = {Proceedings International Test Conference 1986, Washington, D.C.,
USA, September 1986},
pages = {97--104},
publisher = {{IEEE} Computer Society},
year = {1986},
timestamp = {Tue, 22 Oct 2002 12:22:37 +0200},
biburl = {https://dblp.org/rec/conf/itc/ChangRA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/FujiiA86,
author = {Robert H. Fujii and
Jacob A. Abraham},
title = {Approaches to Circuit Level Design for Testability},
booktitle = {Proceedings International Test Conference 1986, Washington, D.C.,
USA, September 1986},
pages = {480--483},
publisher = {{IEEE} Computer Society},
year = {1986},
timestamp = {Tue, 22 Oct 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/FujiiA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/BanerjeeA86,
author = {Prithviraj Banerjee and
Jacob A. Abraham},
title = {A Probabilistic Model of Algorithm-Based Fault Tolerance in Array
Processors for Real-Time Systems},
booktitle = {Proceedings of the 7th {IEEE} Real-Time Systems Symposium {(RTSS}
'86), December 2-4, 1986, New Orleans, Louisiana, {USA}},
pages = {72--78},
publisher = {{IEEE} Computer Society},
year = {1986},
timestamp = {Wed, 23 Jan 2013 07:55:26 +0100},
biburl = {https://dblp.org/rec/conf/rtss/BanerjeeA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/srds/FuchsWA86,
author = {W. Kent Fuchs and
Kun{-}Lung Wu and
Jacob A. Abraham},
title = {Low-Cost Comparison and Diagnosis of Large Remotely Located Files},
booktitle = {Fifth Symposium on Reliability in Distributed Software and Database
Systems, {SRDS} 1986, Los Angeles, California, USA, January 13-15,
1986, Proceedings},
pages = {67--73},
publisher = {{IEEE} Computer Society},
year = {1986},
timestamp = {Fri, 09 Jan 2015 14:54:29 +0100},
biburl = {https://dblp.org/rec/conf/srds/FuchsWA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JhaA85,
author = {Niraj K. Jha and
Jacob A. Abraham},
title = {Design of Testable {CMOS} Logic Circuits Under Arbitrary Delays},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {4},
number = {3},
pages = {264--269},
year = {1985},
url = {https://doi.org/10.1109/TCAD.1985.1270122},
doi = {10.1109/TCAD.1985.1270122},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JhaA85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BanerjeeA85,
author = {Prithviraj Banerjee and
Jacob A. Abraham},
title = {A Multivalued Algebra For Modeling Physical Failures in {MOS} {VLSI}
Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {4},
number = {3},
pages = {312--321},
year = {1985},
url = {https://doi.org/10.1109/TCAD.1985.1270127},
doi = {10.1109/TCAD.1985.1270127},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BanerjeeA85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acm/RogersA85,
author = {William A. Rogers and
Jacob A. Abraham},
editor = {Terry M. Walker and
Wayne D. Dominick},
title = {High level hierarchical fault simulation techniques},
booktitle = {Proceedings of the 13th {ACM} Annual Conference on Computer Science,
New Orleans, Louisiana, USA, 1985},
pages = {89--97},
publisher = {{ACM}},
year = {1985},
url = {https://doi.org/10.1145/320599.320634},
doi = {10.1145/320599.320634},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acm/RogersA85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HsuRDA85,
author = {Peter Y.{-}T. Hsu and
Joseph T. Rahmeh and
Edward S. Davidson and
Jacob A. Abraham},
editor = {Thomas F. Gannon and
Tilak Agerwala and
Charles V. Freiman},
title = {{TIDBITS:} Speedup Via Time-Delay Bit-Slicing in {ALU} Design for
{VLSI} Technology},
booktitle = {Proceedings of the 12th Annual Symposium on Computer Architecture,
Boston, MA, USA, June 1985},
pages = {28--35},
publisher = {{IEEE} Computer Society},
year = {1985},
url = {https://doi.org/10.1145/327070.327121},
doi = {10.1145/327070.327121},
timestamp = {Tue, 31 Aug 2021 17:59:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/HsuRDA85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/FujiiA85,
author = {Robert H. Fujii and
Jacob A. Abraham},
title = {Self-Test for Microprocessors},
booktitle = {Proceedings International Test Conference 1985, Philadelphia, PA,
USA, November 1985},
pages = {356--361},
publisher = {{IEEE} Computer Society},
year = {1985},
timestamp = {Mon, 11 Nov 2002 15:59:32 +0100},
biburl = {https://dblp.org/rec/conf/itc/FujiiA85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RogersA85,
author = {William A. Rogers and
Jacob A. Abraham},
title = {{CHIEFS} : {A} Concurrent, Hierarchical and Extensible Fault Simulator},
booktitle = {Proceedings International Test Conference 1985, Philadelphia, PA,
USA, November 1985},
pages = {710--716},
publisher = {{IEEE} Computer Society},
year = {1985},
timestamp = {Mon, 11 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RogersA85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/BanerjeeA84,
author = {Prithviraj Banerjee and
Jacob A. Abraham},
title = {Characterization and Testing of Physical Failures in {MOS} Logic Circuits},
journal = {{IEEE} Des. Test},
volume = {1},
number = {3},
pages = {76--86},
year = {1984},
url = {https://doi.org/10.1109/MDT.1984.5005655},
doi = {10.1109/MDT.1984.5005655},
timestamp = {Wed, 11 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/BanerjeeA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BrahmeA84,
author = {Dhananjay Brahme and
Jacob A. Abraham},
title = {Functional Testing of Microprocessors},
journal = {{IEEE} Trans. Computers},
volume = {33},
number = {6},
pages = {475--485},
year = {1984},
url = {https://doi.org/10.1109/TC.1984.1676471},
doi = {10.1109/TC.1984.1676471},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BrahmeA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HuangA84,
author = {Kuang{-}Hua Huang and
Jacob A. Abraham},
title = {Algorithm-Based Fault Tolerance for Matrix Operations},
journal = {{IEEE} Trans. Computers},
volume = {33},
number = {6},
pages = {518--528},
year = {1984},
url = {https://doi.org/10.1109/TC.1984.1676475},
doi = {10.1109/TC.1984.1676475},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HuangA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BanerjeeA84,
author = {Prithviraj Banerjee and
Jacob A. Abraham},
editor = {Dharma P. Agrawal},
title = {Fault-Secure Algorithms for Multiple-Processor Systems},
booktitle = {Proceedings of the 11th Annual Symposium on Computer Architecture,
Ann Arbor, USA, June 1984},
pages = {279--287},
publisher = {{ACM}},
year = {1984},
url = {https://doi.org/10.1145/800015.808196},
doi = {10.1145/800015.808196},
timestamp = {Tue, 13 Jul 2021 10:01:21 +0200},
biburl = {https://dblp.org/rec/conf/isca/BanerjeeA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DandapaniPA84,
author = {Ramaswami Dandapani and
Janak H. Patel and
Jacob A. Abraham},
title = {Design of Test Pattern Generators for Built-In Test},
booktitle = {Proceedings International Test Conference 1984, Philadelphia, PA,
USA, October 1984},
pages = {315--319},
publisher = {{IEEE} Computer Society},
year = {1984},
timestamp = {Fri, 22 Nov 2002 13:40:15 +0100},
biburl = {https://dblp.org/rec/conf/itc/DandapaniPA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChouA83,
author = {Timothy C. K. Chou and
Jacob A. Abraham},
title = {Load Redistribution Under Failure in Distributed Systems},
journal = {{IEEE} Trans. Computers},
volume = {32},
number = {9},
pages = {799--808},
year = {1983},
url = {https://doi.org/10.1109/TC.1983.1676329},
doi = {10.1109/TC.1983.1676329},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChouA83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/NortonA83,
author = {Richard L. Norton and
Jacob A. Abraham},
editor = {Harold W. Lawson Jr. and
Tilak Agerwala and
Hans H. Heilborn and
Hideo Aiso and
Lars{-}Erik Thorelli and
Jean{-}Loup Baer and
Mario Tokoro},
title = {Adaptive Interpretation as a Means of Exploiting Complex Instruction
Sets},
booktitle = {Proceedings of the 10th Annual Symposium on Computer Architecture,
1983},
pages = {277--282},
publisher = {{ACM}},
year = {1983},
url = {https://doi.org/10.1145/800046.801665},
doi = {10.1145/800046.801665},
timestamp = {Tue, 13 Jul 2021 10:01:21 +0200},
biburl = {https://dblp.org/rec/conf/isca/NortonA83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FuchsAH83,
author = {W. Kent Fuchs and
Jacob A. Abraham and
Kuang{-}Hua Huang},
editor = {Harold W. Lawson Jr. and
Tilak Agerwala and
Hans H. Heilborn and
Hideo Aiso and
Lars{-}Erik Thorelli and
Jean{-}Loup Baer and
Mario Tokoro},
title = {Concurrent Error Detection in {VLSI} Interconnection Networks},
booktitle = {Proceedings of the 10th Annual Symposium on Computer Architecture,
1983},
pages = {309--315},
publisher = {{ACM}},
year = {1983},
url = {https://doi.org/10.1145/800046.801668},
doi = {10.1145/800046.801668},
timestamp = {Tue, 13 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/FuchsAH83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Abraham83,
author = {Jacob A. Abraham},
title = {Incorporating Test Technology into an Undergraduate Curriculum},
booktitle = {Proceedings International Test Conference 1983, Philadelphia, PA,
USA, October 1983},
pages = {162},
publisher = {{IEEE} Computer Society},
year = {1983},
timestamp = {Tue, 05 Nov 2002 15:16:27 +0100},
biburl = {https://dblp.org/rec/conf/itc/Abraham83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BanerjeeA83,
author = {Prithviraj Banerjee and
Jacob A. Abraham},
title = {Generating Tests for Physical Failures in {MOS} Logic Circuits},
booktitle = {Proceedings International Test Conference 1983, Philadelphia, PA,
USA, October 1983},
pages = {554--559},
publisher = {{IEEE} Computer Society},
year = {1983},
timestamp = {Tue, 05 Nov 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/BanerjeeA83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tse/ChouA82,
author = {Timothy C. K. Chou and
Jacob A. Abraham},
title = {Load Balancing in Distributed Systems},
journal = {{IEEE} Trans. Software Eng.},
volume = {8},
number = {4},
pages = {401--412},
year = {1982},
url = {https://doi.org/10.1109/TSE.1982.235574},
doi = {10.1109/TSE.1982.235574},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tse/ChouA82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BoseA82,
author = {Pradip Bose and
Jacob A. Abraham},
editor = {James S. Crabbe and
Charles E. Radke and
Hillel Ofek},
title = {Test generation for programmable logic arrays},
booktitle = {Proceedings of the 19th Design Automation Conference, {DAC} '82, Las
Vegas, Nevada, USA, June 14-16, 1982},
pages = {574--580},
publisher = {{ACM/IEEE}},
year = {1982},
url = {https://doi.org/10.1145/800263.809261},
doi = {10.1145/800263.809261},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BoseA82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/HuangA82,
author = {Kuang{-}Hua Huang and
Jacob A. Abraham},
title = {Efficient parallel algorithms for processor arrays},
booktitle = {International Conference on Parallel Processing, ICPP'82, August 24-27,
1982, Bellaire, Michigan, {USA}},
pages = {268--279},
publisher = {{IEEE} Computer Society},
year = {1982},
timestamp = {Sat, 06 Sep 2008 15:25:30 +0200},
biburl = {https://dblp.org/rec/conf/icpp/HuangA82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/NortonA82,
author = {Richard L. Norton and
Jacob A. Abraham},
title = {Using write back cache to improve performance of multi-user multiprocessors},
booktitle = {International Conference on Parallel Processing, ICPP'82, August 24-27,
1982, Bellaire, Michigan, {USA}},
pages = {326--331},
publisher = {{IEEE} Computer Society},
year = {1982},
timestamp = {Mon, 08 Sep 2008 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icpp/NortonA82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AbrahamG81,
author = {Jacob A. Abraham and
Daniel Gajski},
title = {Design of Testable Structures Defined by Simple Loops},
journal = {{IEEE} Trans. Computers},
volume = {30},
number = {11},
pages = {875--884},
year = {1981},
url = {https://doi.org/10.1109/TC.1981.1675718},
doi = {10.1109/TC.1981.1675718},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AbrahamG81.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Abraham81,
author = {Jacob A. Abraham},
title = {Functional Level Test Generation for Complex Digital Systems},
booktitle = {Proceedings International Test Conference 1981, Philadelphia, PA,
USA, October 1981},
pages = {461--462},
publisher = {{IEEE} Computer Society},
year = {1981},
timestamp = {Tue, 22 Oct 2002 12:22:34 +0200},
biburl = {https://dblp.org/rec/conf/itc/Abraham81.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ThatteA80,
author = {Satish M. Thatte and
Jacob A. Abraham},
title = {Test Generation for Microprocessors},
journal = {{IEEE} Trans. Computers},
volume = {29},
number = {6},
pages = {429--441},
year = {1980},
url = {https://doi.org/10.1109/TC.1980.1675602},
doi = {10.1109/TC.1980.1675602},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ThatteA80.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/NairTA78,
author = {Ravindra Nair and
Satish M. Thatte and
Jacob A. Abraham},
title = {Efficient Algorithms for Testing Semiconductor Random-Access Memories},
journal = {{IEEE} Trans. Computers},
volume = {27},
number = {6},
pages = {572--576},
year = {1978},
url = {https://doi.org/10.1109/TC.1978.1675150},
doi = {10.1109/TC.1978.1675150},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/NairTA78.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Abraham75,
author = {Jacob A. Abraham},
title = {A Combinatorial Solution to the Reliability of Interwoven Redundant
Logic Networks},
journal = {{IEEE} Trans. Computers},
volume = {24},
number = {5},
pages = {578--584},
year = {1975},
url = {https://doi.org/10.1109/T-C.1975.224265},
doi = {10.1109/T-C.1975.224265},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Abraham75.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/AbrahamS74,
author = {Jacob A. Abraham and
Daniel P. Siewiorek},
title = {An Algorithm for the Accurate Reliability Evaluation of Triple Modular
Redundancy Networks},
journal = {{IEEE} Trans. Computers},
volume = {23},
number = {7},
pages = {682--692},
year = {1974},
url = {https://doi.org/10.1109/T-C.1974.224016},
doi = {10.1109/T-C.1974.224016},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AbrahamS74.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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