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ORCIDJournal of Circuits, Systems, and Computers, Volume 20
Volume 20, Number 1, February 2011
- Chenchang Zhan, Wing-Hung Ki
:
A Low dropout regulator with Low Quiescent Current and High Power Supply Rejection over Wide Range of Frequency for SoC. 1-13 - Xian Tang, Kong-Pang Pun:
A Novel Switched-Current Successive Approximation ADC. 15-27 - Krzysztof Wawryn, Robert Suszynski, Bogdan Strzeszewski:
A Low Power Digitally Error corrected 2.5 Bit per Stage Pipelined a/d converter Using Current-Mode Signals. 29-43 - Zhiming Chen, Yuanjin Zheng, Xiaojun Yuan:
Cmos Low-Power Analogue Baseband Circuits for a Non-Coherent Low Data Rate IR-UWB Receiver. 45-55 - Hongliang Zhao, Yiqiang Zhao, Peng Li, Junwei Jiang, Zhisheng Zhang:
A Low-Power 12-Bit 250 KS/S Cyclic ADC for Long Line Array Infrared Sensors readout Circuit. 57-70 - David Fitrio, Suhardi Tjoa, Anand Mohan, Ronny Veljanovski, Andrew Berry, Goran Panjkovic:
A CMOS Analog Integrated Circuit for Pixel X-Ray Detector. 71-87 - Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung:
A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits. 89-105 - Qingqing Chen, György Csaba, Paolo Lugli, Ulf Schlichtmann, Martin Stutzmann, Ulrich Rührmair:
Circuit-Based Approaches to Simpl Systems. 107-123 - Hailong Jiao, Volkan Kursun:
Noise-Aware Data Preserving Sequential MTCMOS Circuits with Dynamic Forward Body Bias. 125-145 - Weiqiang Zhang, Li Su, Yu Zhang, Linfeng Li, Jianping Hu:
Low-Leakage Flip-Flops Based on Dual-Threshold and Multiple Leakage Reduction Techniques. 147-162
Volume 20, Number 2, April 2011
- Harris E. Michail, Dimitrios M. Schinianakis, Costas E. Goutis, Athanasios P. Kakarountas, Georgios N. Selimis:
Cipher Block Based Authentication Module: a Hardware Design Perspective. 163-184 - Worapong Tangsrirat, Tattaya Pukkalanun, Wanlop Surakampontorn:
Synthesis of Current Differencing transconductance amplifier-Based Current Limiters and its Applications. 185-206 - Behnam Ghavami, Hossein Pedram, Arezoo Salarpour:
Leakage Power Reduction of Asynchronous Pipelines. 207-222 - Abhirup Lahiri, Ankush Chowdhury:
Four Quadrant Analog Multiplier Using Dual-Current-Controlled Current Differencing Buffered amplifier. 223-231 - Anca Manuela Manolescu, Cosmin Popa:
A 2.5 GHz CMOS mixer with Improved Linearity. 233-242 - Ahmed M. Soliman:
On the Transformation of Grounded inductors to Floating inductors Using ofa and Fccii. 243-262 - Davide Anguita, Luca Carlino, Alessandro Ghio, Sandro Ridella:
A FPGA Core Generator for Embedded Classification Systems. 263-282 - Mahshid Tayari, Mohammad Eshghi:
Design of 3-Input Reversible Programmable Logic Array. 283-297 - Mohamad Reza Banaei, E. Salary:
Analysis of a Generalized Symmetrical Multilevel inverter. 299-311 - Dalenda Ben Issa, Abdennaceur Kachouri, Mounir Samet:
New Concept of 3.2-4.8 GHz Impulse Generator for UWB Transmitter. 313-327 - Sudhanshu Maheshwari, Jitendra Mohan, Durg Singh Chauhan:
Cascadable All-Pass and notch Filter Configurations Employing Two Plus-Type DDCCs. 329-347
Volume 20, Number 3, May 2011
- Nadia Nedjah, Abdelhamid Bouchachia, Luiza de Macedo Mourelle:
Editorial: Dedicated Hardware for Neural and Fuzzy Systems. - Nadia Nedjah, Rodrigo Martins da Silva, Luiza de Macedo Mourelle:
Analog Hardware Implementations of Artificial Neural Networks. 349-373 - Inés del Campo, Javier Echanobe, Koldo Basterretxea, Guillermo Bosque:
Scalable Architecture for High-Speed Multidimensional Fuzzy Inference Systems. 375-400 - Kuo-Kun Tseng, Yeong-Lin Lai, Chih-Cheng Chen, Chih-Yu Hsu:
A Fuzzy-updated Cache of Automata Matching for Embedded Network Processor. 401-415 - Rodrigo Martins da Silva, Nadia Nedjah, Luiza de Macedo Mourelle:
Hardware Implementations of MLP Artificial Neural Networks with Configurable Topology. 417-437 - Mahdiar Hosein Ghadiry, Abu Khari A'Ain, Mahdieh Nadi Senjani:
Design and Analysis of a Novel Low PDP Full Adder Cell. 439-445 - Erkan Yüce, Shahram Minaei, Halil Alpaslan:
Novel CMOS Technology-Based Linear Grounded voltage Controlled resistor. 447-455 - Kashif Zafar, Abdul Rauf Baig, Nabeel Bukhari, Zahid Halim:
Route Planning and Optimization of Route Using Simulated Ant Agent System. 457-478 - Rihem Farkh, Kaouther Laabidi, Mekki Ksouri:
Robust Control for Uncertain Delay System. 479-499 - Lei Xu, Dazhuan Xu, Xiaofei Zhang, Shufang Xu, Junbo Wang, Yaping Li:
Dynamic Resource Allocation with Finite Rate Feedback for Multiuser MIMO-OFDM Systems. 501-513 - Constantinos I. Votis, Panos Kostarakis, Leonidas P. Ivrissimtzis:
Design and Measurements of a Multiple-Output Transmitter for MIMO Applications. 515-529 - Kooroush Manochehri, Babak Sadeghiyan, Saadat Pourmozafari:
High Performance Montgomery Modular Multiplier with a New Recoding Method. 531-548 - Abdhesh K. Singh, Raj Senani, Data Ram Bhaskar, Ravindra K. Sharma:
A New Electronically-Tunable Active-only Universal biquad. 549-555 - Halil Alpaslan, Erkan Yüce:
Bandwidth Expansion Methods of inductance Simulator Circuits and voltage-Mode biquads. 557-572
Volume 20, Number 4, June 2011
- George E. Antoniou, Panagiota A. Katsalis:
On the 1D and 2D Rogers-Ramanujan Continued Fractions. 573-585 - Shanti Swarup Gupta, Data Ram Bhaskar, Raj Senani, Abdhesh K. Singh:
Synthesis of Linear VCOs: the State-Variable Approach. 587-606 - Chen-Nong Lee:
Fully cascadable Mixed-Mode Universal Filter biquad Using DDCCs and Grounded Passive Components. 607-620 - Ahmed M. Soliman:
Generation of Cfoa, CCII and Dvcc Based oscillators from Passive RLC Filter. 621-639 - Reza Faghih Mirzaee, Mohammad Hossein Moaiyeri, Hamid Khorsand, Keivan Navi:
A New Robust and High-Performance Hybrid Full Adder Cell. 641-655 - Choon Ki Ahn:
Design of State Estimator for Switched Hopfield Neural Networks with Time-Delay. 657-666 - Amir Moosavie Nia, R. Mirzajani, M. Esfalani:
Subtractive Composite Simpson Method for Low Cost Inertial Navigation Systems. 667-680 - Hua-Pin Chen:
Versatile voltage-Mode DDCC-Based Universal Filter. 681-696 - Cheng-Chi Lee, Chun-Ta Li, Kuo-You Huang, Shiow-Yuan Huang:
An Improvement of Remote Authentication and Key Agreement Schemes. 697-707 - M. T. S. Ab-Aziz, Arjuna Marzuki, Z. A. A. Aziz:
12-Bit Pseudo-Differential Current-Source resistor-String Hybrid DAC. 709-725 - Yunho Jung, Seongjoo Lee, Jaeseok Kim:
Design and Implementation of Symbol Detector for MIMO Spatial Multiplexing Systems. 727-739 - Young San Shin, Jae-Kyung Wee, Jong-Chan Ha, Ji-Hoon Lim, Yong-Ju Kim, Young-Sang Son:
A Seamless-Controlled Digital PLL Using Dual Loops for High Speed SoCs. 741-756 - Abdelhafid Bouhraoua, Muhammad E. S. Elrabaa:
Improved Modified Fat-Tree Topology Network-on-Chip. 757-780 - Sergio Saponara, Tommaso Baldetti, Luca Fanucci, Emilio Volpi, Francesco D'Ascoli:
Design of an Integrated Scanning Micromirror Driver in BCD Technology. 781-799
Volume 20, Number 5, August 2011
- Alimohammad Latif, Ahmad Reza Naghsh-Nilchi:
An Adaptive Digital Image Watermarking Using Fuzzy Gradient on DCT Domain. 801-819 - Yong Zhang, Hua Bai, Yongqing Cai, Tiejun Ma, Hongxia Xie:
Simulation and Design of a Constant-Current-Controlled Spot Welding inverter with the Fuzzy Neural Network. 821-834 - Mohammad Rashtian, Omid Hashemipour, Keivan Navi, Ali Jalali:
A New Switched opamp Approach for Improving the Operation of Auto-Reset Switched-capacitor Filters. 835-848 - Edson Pedro Ferlin, Heitor Silvério Lopes, Carlos Raimundo Erig Lima, Mauricio Perretto:
A FPGA-Based Reconfigurable Parallel Architecture for High-Performance Numerical Computation. 849-865 - Marko A. Dimitrijevic, Vanco B. Litovski:
Power Factor and Distortion Measuring for Small Loads Using USB Acquisition Module. 867-880 - Shannon M. Kurtas, Baris Taskin:
Statistical Timing Analysis of the Clock Period Improvement through Clock Skew Scheduling. 881-898 - Abhishek Pillai, Wei Zhang:
Exploiting Instruction Reuse to Improve the Performance of Dual Instruction Execution. 899-913 - Feng Wu, Ning Xu:
A New Dynamic Functional Unit Allocation Strategy in High-Level Synthesis to Achieve Power-Area Trade-Offs. 915-925 - Chien-Min Ou:
Efficient Music Retrieval Systems Design Based on Reconfigurable Hardware. 927-942 - Elie Elaaraj, Iyad Ouaiss:
A Novel Register-Binding Approach to Reduce Spurious Switching Activity in High-Level Synthesis. 943-973
Volume 20, Number 6, October 2011
- Stavros P. Dokouzyannis, Argiris P. Mokios:
A New Platform for the Implementation of Regular Iterative Algorithms into FPGAs. 975-999 - Smail Bachir, Nicusor Calinoiu, Claude Duvanaud:
Linearization of RF Power amplifiers Using Adaptive Kalman Filtering Algorithm. 1001-1018 - Sambhu Nath Pradhan, M. Tilak Kumar, Santanu Chattopadhyay:
And-or-XOR Network Synthesis with Area-Power Trade-Off. 1019-1035 - Yawgeng A. Chau, Chen-Feng Chen:
On the Design of Adaptive-Bandwidth All-Digital Phase-Locked Loops. 1037-1049 - Linfeng Liu:
A Deployment Algorithm for Underwater Sensor Networks in Ocean Environment. 1051-1066 - Vipan Kakkar:
Performance Analysis of CMOS for High Speed Mixed Signal Circuits. 1067-1074 - Kei Eguchi:
Design of a Dual-Input Serial DC-DC converter Realizing Individual Switching Modes. 1075-1094 - Jun Huang, Zhengzhi Han, Leipo Liu, Xiushan Cai:
Stabilization for Time-Delay, Discontinuous and uncertain Systems. 1095-1106 - Rigui Zhou, Yang Shi, Manqun Zhang, Hui'an Wang:
A Novel Reversible ZS gate and its Application for Optimization of Quantum Adder Circuits. 1107-1129 - Maria Abi Saad, Iyad Ouaiss:
Priority-Driven Area Optimization in High-Level Synthesis. 1131-1163 - Ahmed M. Soliman:
Generation of the Minimum Component oscillators from Sallen Key Filters. 1165-1183 - Xiaofei Zhang, Zhongwei Sun, Gaopeng Feng, Dazhuan Xu:
Joint Time Delay and Frequency Estimation Method with Shift Invariance Property. 1185-1195 - Yu Ni, Jianping Xu:
Study of Discrete Global-sliding Mode Control for Switching DC-DC converter. 1197-1209
Volume 20, Number 7, November 2011
- Hyun Sang Cho, Takekazu Kato, Tatsuya Yamazaki, Minsoo Hahn:
A Power Consumption Activity Based Heterogeneous SOA Framework for Context-Aware Home Services. 1211-1230 - Javier del Pino, Sunil Lalchand Khemchandani, Roberto Díaz-Ortega, Rubén Pulido, Hugo García-Vázquez:
On-Chip inductors Optimization for Ultra Wide Band Low noise Amplifiers. 1231-1242 - Samir Tagzout, Adel Belouchrani:
Arctangent Architecture for High Speed and High Precision Data. 1243-1259 - Cosmin Popa:
Multifunctional CMOS Structure with Improved linearity. 1261-1275 - Merih Yildiz, Shahram Minaei, Emre Arslan:
High-slew Rate Low-Quiescent Current rail-to-rail CMOS Buffer amplifier for Flat Panel Displays. 1277-1286 - Xiaofeng Ding, Chris Mi:
Modeling of Eddy Current Loss and temperature of the magnets in Permanent magnet Machines. 1287-1301 - Labros Bisdounis:
Analytical Modeling of Overshooting Effect in Sub-100 nm CMOS inverters. 1303-1321 - Kasturi Ghosh, Arabinda Roy, Sekhar Mondal, Baidyanath Ray:
Parametric deviation Based Analog Test and Diagnosis System. 1323-1340 - Mohammadreza Noorimehr, Mehdi Hosseinzadeh, Reza Farshidi:
An Efficient Reverse Converter for the New Four-Moduli Set {22n, 2n+1 - 1, 2n/2 + 1, 2n/2 - 1}. 1341-1355 - Zwe-Lee Gaing, Gai-Neng Lin:
Unit Commitment with Security Assessment Using Chaotic PSO Algorithm. 1357-1376 - Chih-Wen Lu, Ching-Min Hsiao:
A rail-to-rail Buffer amplifier for LCD Driver. 1377-1387 - Ze-Wang Chen, Jian-Hua Su, You-Ren Wang:
An Effective Test Algorithm and Diagnostic Implementation for Embedded Static Random Access Memories. 1389-1402 - Za'er Salim Abo-Hammour, Othman M.-K. Alsmadi, Adnan M. Al-Smadi:
Multi-Time-Scale Systems Model Order Reduction via Genetic Algorithms with Eigenvalue Preservation. 1403-1418 - Steven Gillan, Panajotis Agathoklis:
A Method for Face Recognition Using Image Registration. 1419-1439
Volume 20, Number 8, December 2011
- Giuseppe Ferri, Vincenzo Stornelli, Alessia di Simone:
A CCII-Based High Impedance Input Stage for Biomedical Applications. 1441-1447 - Mitra Mirhassani, Majid Ahmadi, Graham A. Jullien:
Error Recovery in Continuous Valued Number System. 1449-1476 - Wenjing Guo, Wei Zhang:
Routing between Nodes and Multiple Gateways in Wireless Mesh Sensor Network. 1477-1503 - Zoran Stamenkovic:
Soc Design for Wireless Communications. 1505-1527 - Minghua Tang, Xiaola Lin:
Rqrt: Reduce Querying Routing Table for Mesh-Based Network-on-Chip. 1529-1545 - Lee-eun Yu, Changsik Shin, Seungwhun Paik, Jing-Jia Liou, Youngsoo Shin:
Sampling Correlation Sources for Timing Yield Analysis of Sequential Circuits with Clock Networks. 1547-1569 - Kuan-Hsuan Tseng, Jason Sheng-Hong Tsai, Chien-Yu Lu:
A Delay-Dependent Approach to Robust Takagi-Sugeno Fuzzy Control of uncertain Recurrent Neural Networks with Mixed Interval Time-Varying delays. 1571-1589 - K. Gopakumar, B. Premlet, K. G. Gopchandran:
Chua's oscillator in Integrated Circuit Form with Inbuilt Control Option. 1591-1604 - Assim Sagahyroon, Fadi A. Aloul, Alexander Sudnitson:
Using SAT-Based Techniques in Low Power State Assignment. 1605-1618 - Hyun-Lark Do:
Isolated High Step-up Zero-voltage-Switching DC-DC converter with a Continuous Input Current. 1619-1635 - Chia-Chun Tsai, Sheng-Bin Dai, Trong-Yen Lee:
The RF Circuit Design of Power and Data Contactless Transmission for ISO/IEC 14443-2 Type B. 1637-1658 - Ashwani K. Rana, Narottam Chand, Vinod Kapoor:
Modeling gate Current for nano Scale MOSFET with Different gate spacer. 1659-1675 - Soliman A. Mahmoud, Eman A. Soliman:
Low voltage Current Conveyor-Based Field Programmable Analog Array. 1677-1701
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