6. SIES 2011:
Vasteras,
Sweden
Industrial Embedded Systems (SIES), 2011 6th IEEE International Symposium on, Vasteras, Sweden, 15-17 June, 2011.
IEEE 2011, ISBN 978-1-61284-818-1
Design Methodologies #1
- Jaume Joven, Per Strict, David Castells-Rufas, Akash Bagdia, Giovanni De Micheli, Jordi Carrabina:
HW-SW implementation of a decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs.
1-8
- Scott Cotton, Oded Maler, Julien Legriel, Selma Saidi:
Multi-criteria optimization for mapping programs to multi-processors.
9-17
- Moritz Neukirchner, Steffen Stein, Harald Schrom, Johannes Schlatow, Rolf Ernst:
Contract-based dynamic task management for mixed-criticality systems.
18-27
Robustness #1
Work-in-Progress (WIP) Session
Real-Time Systems
Testing and Verification
System Design
- Tanin Afacan:
State Design Pattern Implementation of a DSP processor: A case study of TMS5416C.
67-70
- Paolo Ferrari, Alessandra Flammini, Stefano Rinaldi, Gunnar Prytz, Per Christian Juel:
Architecture of an embedded time gateway between PTP and SNTP.
71-74
- Tizar Rizano, Roberto Passerone, David Macii, Luigi Palopoli:
Model-based design of embedded control software for hybrid vehicles.
75-78
- Xiaozhou Meng, Benny Thörnberg, Najeem Lawal:
Portability analysis of an M-JPEG decoder IP from OpenCores.
79-82
- Jan Kasper Martinsen, Håkan Grahn:
Thread-level speculation as an optimization technique in Web Applications - Initial results.
83-86
- Mehrdad Saadatmand, Antonio Cicchetti, Mikael Sjödin:
A methodology for designing energy-aware secure embedded systems.
87-90
Multicore Systems
- Mike Gerdes, Julian Wolf, Irakli Guliashvili, Theo Ungerer, Michael Houston, Guillem Bernat, Stefan Schnitzler, Hans Regler:
Large drilling machine control code - Parallelisation and WCET speedup.
91-94
- Yi-Li Lin, Wei-Tso Chen, Alvin W. Y. Su, Da-Wei Chang, Chung-Ho Chen:
A low cost, low power, high scalability and dependability processor-cluster platform.
95-98
- Moris Behnam, Farhang Nemati, Thomas Nolte, Håkan Grahn:
Towards an efficient approach for resource sharing in real-time multiprocessor systems.
99-102
- Navid Khoshavi, Hamid R. Zarandi, Mohammad Maghsoudloo:
Control-flow error detection using combining basic and program-level checking in commodity multi-core architectures.
103-106
Communications
Networks,
Design and Control
Automotive
- Haibo Zeng, Marco Di Natale:
Mechanisms for guaranteeing data consistency and flow preservation in AUTOSAR software on multi-core platforms.
140-149
- Andreas Kern, Hongyan Zhang, Thilo Streichert, Jürgen Teich:
Testing switched Ethernet networks in automotive embedded systems.
150-155
- Matthias Büker, Werner Damm, Günter Ehmen, Alexander Metzner, Ingo Stierand, Eike Thaden:
Automating the design flow for distributed embedded automotive applications: Keeping your time promises, and optimizing costs, too.
156-165
- Daniel Sundmark, Kai Petersen, Stig Larsson:
An exploratory case study of testing in an automotive electrical system release process.
166-175
Robustness #2
Timing Analysis #1
Design Methodologies #2
Scheduling
- Yi Zhang, Nan Guan, Yanbin Xiao, Wang Yi:
Implementation and empirical comparison of partitioning-based multi-core scheduling.
248-255
- Paulo G. Sousa, Björn Andersson, Eduardo Tovar:
Implementing slot-based task-splitting multiprocessor scheduling.
256-265
- Alejandro Masrur, Dip Goswami, Reinhard Schneider, Harald Voit, Anuradha Annaswamy, Samarjit Chakraborty:
Schedulability analysis of distributed cyber-physical applications on mixed time-/event-triggered bus architectures with retransmissions.
266-273
- Ugur Keskin, Martijn M. H. P. van den Heuvel, Reinder J. Bril, Johan J. Lukkien, Moris Behnam, Thomas Nolte:
An engineering approach to synchronization based on overrun for compositional real-time systems.
274-283
Timing Analysis #2
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