Proceedings of the 1st Annual Symposium on Computer Architecture,
December 1973
- Dileep Bhandarkar, Samuel H. Fuller:
Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems.
1-6
- George A. Anderson:
Interconnecting A Distibuted Processor System for Avionics.
11-16
- L. Rodney Goke, G. Jack Lipovski:
Banyan Networks for Partitioning Multiprocessor Systems.
21-28
- Harry F. Jordan, Burton J. Smith:
Structure of Digital System Description Languages.
31-34
- John A. N. Lee:
VDL - A Definitional System for All Levels.
41-48
- Charles H. Radoy, George P. Copeland, G. Jack Lipovski:
A Methodology for Parallel Processing Design Tradeoffs.
51-56
- S. F. Reddaway:
DAP - A Distributed Array Processor.
61-65
- Peter M. Kogge:
Maximal Rate Pipelined Solutions to Recurrance Problems.
71-76
- Michael J. Flynn, Tilak Agerwala:
Comments on Capabilities, Limitations and Correctness of Petri Nets.
81-86
- Wayne E. Omohundro, James H. Tracey:
Flowware - A Flow Charting Procedure to Describe Digital Networks.
91-97
- Mario Barbacci, Daniel P. Siewiorek:
Automated Exploration of the Design Space for Register Transfer (RT) Systems.
101-106
- T. A. Laliotis:
Implementation Aspects of the Symbol Hardware Compiler.
111-115
- George P. Copeland, G. Jack Lipovski, Stanley Y. W. Su:
The Architecture of CASSM: A Cellular System for Non-numeric Processing.
121-128
- John M. Hemphill, Stephen A. Szygenda:
Deriving Design Guidelines for Diagnosable Computer Systems.
131-135
- Behrooz Parhami, Algirdas Avizienis:
Design of Fault-Tolerant Associative Processors.
141-145
- Martin A. Fischler, Oscar Firschein:
A Fault Tolerant Multiprocessor Architecture for Real Time Control Applications.
151-157
- G. Jack Lipovski:
A Varistructured Fail-Soft Cellular Computer.
161-165
- Jean G. Vaucher, Christian Rey:
A Hardware Laboratory for Computer Architecture Research.
171-175
- Peter J. Knoke:
Simulation Exercises for Computer Architecture Education.
181-185
- M. E. Sloan:
Computer Architecture Courses in Electrical Engineering Departments.
191-195
- Reiner W. Hartenstein:
Increasing Hardware Complexity - A Challenge to Computer Architecture Education.
201-206
- George Rossmann:
Review of the Workshop on Computer Architecture Education.
211-214
- Richard Cooper:
Micromodules: Microprogrammable Building Blocks for Hardware Development.
221-226
- Samuel H. Fuller, Daniel P. Siewiorek, R. J. Swan:
Computer Modules: An Architecture for Large Digital Modules.
231-237
- Rodnay Zaks:
Microprogrammed Architecture for Front End Processing.
241-246
- Zvonko G. Vranesic, V. Carl Hamacher, Y. Y. Leung:
Design of a Fully Variable - Length Structured Minicomputer.
251-255
- Orin E. Marvel:
HAPPE Honeywell Associative Parallel Processing Ensemble.
261-267
- Mario R. Schaffner:
A Computer Architecture and its Programming Language.
271-277
Last update Tue Feb 14 04:05:07 2012
CET by the DBLP Team — 
Data released under the ODC-BY 1.0 license — See also our legal information page
