ICS 1993: Tokyo, Japan

• Nashat Mansour, Ravi Ponnusamy, Alok N. Choudhary, Geoffrey Fox:
  Graph Contraction for Physical Optimization Methods: A Quality-Cost Tradeoff for Mapping Data on Parallel Computers. 1-10
  
• Elana D. Granston, Harry A. G. Wijshoff:
  Managing Pages in Shared Virtual Memory Systems: Getting the Compiler into the Game. 11-20
  
• Lubomir Bic, Mayez A. Al-Mouhamed:
  The EM-4 Under Implicit Parallelism. 21-26
  
• Rudolf Eigenmann:
  Toward a Methodology of Optimizing Programs for High-Performance Computers. 27-36
  
• Sholin Kyo, Satoshi Sekiguchi, Mitsuhisa Sato:
  Data Stream Control Optimization in Dataflow Architectures. 37-46
  
• Peter L. Bird, Alasdair Rawsthorne, Nigel P. Topham:
  The Effectiveness of Decoupling. 47-56
  
• Yvon Jégou, Olivier Temam:
  Speculative Prefetching. 57-66
  
• Tse-Yu Yeh, Deborah T. Marr, Yale N. Patt:
  Increasing the Instruction Fetch Rate via Multiple Branch Prediction and a Branch Address Cache. 67-76
  
• Kevin B. Theobald, Guang R. Gao, Laurie J. Hendren:
  Speculative Execution and Branch Prediction on Parallel Machines. 77-86
  
• Manish Gupta, Prithviraj Banerjee:
  PARADIGM: A Compiler for Automatic Data Distribution on Multicomputers. 87-96
  
• Srinivas Aluru, John L. Gustafson:
  A Massively Parallel Optimizer for Expression Evaluation. 97-106
  
• Paul Petersen, David A. Padua:
  Static and Dynamic Evaluation of Data Dependence Analysis. 107-116
  
• Rod Fatoohi:
  Performance Analysis of Four SIMD Machines. 117-126
  
• P. J. Narayanan:
  Processor Autonomy on SIMD Architectures. 127-136
  
• Peiyi Tang:
  Exact Side Effects for Interprocedural Dependence Analysis. 137-146
  
• Gary Sabot, Skef Wholey:
  CMAX: A Fortran Translator for the Connection Machine System. 147-156
  
• Tadayuki Sakakibara, Katsuyoshi Kitai, Tadaaki Isobe, Shigeko Yazawa, Teruo Tanaka, Yasuhiro Inagami, Yoshiko Tamaki:
  Scalable Parallel Memory Architecture with a Skew Scheme. 157-166
  
• Yuetsu Kodama, Yasuhito Koumura, Mitsuhisa Sato, Hirohumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi:
  EMC-Y: Parallel Processing Element Optimizing Communication and Computation. 167-174
  
• Paul Feautrier:
  Toward Automatic Partitioning of Arrays on Distributed Memory Computers. 175-184
  
• Jeffrey K. Hollingsworth, Barton P. Miller:
  Dynamic Control of Performance Monitoring on Large Scale Parallel Systems. 185-194
  
• John Kubiatowicz, Anant Agarwal:
  Anatomy of a Message in the Alewife Multiprocessor. 195-206
  
• Thomas Fahringer, Hans P. Zima:
  A Static Parameter Based Performance Prediction Tool for Parallel Programs. 207-219
  
• Kei Hiraki, Toshio Shimada, Satoshi Sekiguchi:
  Empirical Study of Latency Hiding on a Fine-Grain Parallel Processor. 220-229
  
• Steve Ward, Karim Abdalla, Rajeev Dujari, Michael Fetterman, Frank Honoré, Ricardo Jenez, Philippe Laffont, Kenneth Mackenzie, Chris Metcalf, Milan Minsky, John Nguyen, John Pezaris, Gill A. Pratt, Russell Tessier:
  The NuMesh: A Modular, Scalable Communications Substrate. 230-239
  
• Eric L. Boyd, John-David Wellman, Santosh G. Abraham, Edward S. Davidson:
  Evaluating the Communication Performance of MPPs Using Synthetic Sparse Matrix Multiplication Workloads. 240-250
  
• Shuichi Sakai, Kazuaki Okamoto, Hiroshi Matsuoka, Hideo Hirono, Yuetsu Kodama, Mitsuhisa Sato:
  Super-Threading: Architectural and Software Mechanisms for Optimizing Parallel Computation. 251-260
  
• Hai-Xiang Lin, Henk J. Sips:
  Parallel Direct Solution of Large Sparse Systems in Finite Element Computations. 261-270
  
• Xiaodong Zhang:
  Parallel Triangular Decompositions of an Oil Refining Simulation. 271-280
  
• Giorgio Pini, Giuseppe Gambolati:
  Parallel Eigenanalysis for Nested Grids. 281-287
  
• Katsuyoshi Kitai, Tadaaki Isobe, Yoshikazu Tanaka, Yoshiko Tamaki, Masakazu Fukagawa, Teruo Tanaka, Yasuhiro Inagami:
  Parallel Processing Architecture for the Hitachi S-3800 Shared-Memory Vector Multiprocessor. 288-297
  
• Hiroshi Nakamura, Taisuke Boku, Hideo Wada, Hiromitsu Imori, Ikuo Nakata, Yasuhiro Inagami, Kisaburo Nakazawa, Yoshiyuki Yamashita:
  A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers. 298-307
  
• Takashi Hashimoto, Kazuaki Murakami, Tetsuo Hironaka, Hiroto Yasuura:
  A Micro-Vectorprocessor Architecture: Performance Modeling and Benchmarking. 308-317
  
• Arjan J. C. van Gemund:
  Performance Prediction of Parallel Processing Systems: The PAMELA Methodology. 318-327
  
• Takashi Matsumoto, Kei Hiraki:
  Dynamic Switching of Coherent Cache Protocols and its Effects on Doacross Loops. 328-337
  
• Koray Öner, Michel Dubois:
  Effects of Memory Latencies on Non-Blocking Processor/Cache Architectures. 338-347
  
• James B. Cole, Rudolph A. Krutar, Dennis B. Creamer, Susan K. Numrich:
  A Cellular Automation Methodology for Solving the Wave Equation. 348-356
  
• Guoliang Xue:
  Parallel Two-Level Simulated Annealing. 357-366
  
• Rajesh Bordawekar, Alok N. Choudhary, Juan Miguel del Rosario:
  An Experimental Performance Evaluation of Touchstone Delta Concurrent File System. 367-376
  
• Clement H. C. Leung, H. T. Ghogomu:
  A High-Performance Parallel Database Architecture. 377-386
  
• David W. Jensen, Daniel A. Reed:
  File Archive Activity in a Supercomputing Environment. 387-396
  
• Hikaru Samukawa:
  A Proposal of Level 3 Interface for Band and Skyline Matrix Factorization Subroutine. 397-406
  
• Eduard Ayguadé, Jordi Torres:
  Partitioning the Statement per Iteration Space Using Non-Singular Matrices. 407-415
  
• Aart J. C. Bik, Harry A. G. Wijshoff:
  Compilation Techniques for Sparse Matrix Computations. 416-424
  

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