ECCTD 2011:
Linkoping,
Sweden
20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, Aug. 29-31, 2011.
IEEE 2011, ISBN 978-1-4577-0617-2
- Borivoje Nikolic:
Managing variability for ultimate energy efficiency.
1-4
- Fred Harris, Elettra Venosa, Xiaofei Chen, Bhaskar Rao:
Variable bandwidth M-path filter with fixed coefficients formed by M-path polyphase filter engines.
5-8
- Markku Renfors, Fred Harris:
Highly adjustable multirate digital filters based on fast convolution.
9-12
- Miroslav D. Lutovac, Jelena Certic, Ljiljana D. Milic:
A class of digital filters with variable cut-off based on EMQF filter sections and sharpening method.
13-16
- Chien-Cheng Tseng, Su-Ling Lee:
Design of variable fractional order differentiator using infinite product expansion.
17-20
- Amir Eghbali, Håkan Johansson:
Complexity reduction in low-delay farrow-structure-based variable fractional delay FIR filters utilizing linear-phase subfilters.
21-24
- Leonardo Nicolosi, Ronald Tetzlaff, Andreas Blug, Heinrich Höfler, Daniel Carl, Felix Abt, A. Heider:
A monitoring system for laser beam welding based on an algorithm for spatter detection.
25-28
- Iulian B. Ciocoiu:
Foveated Compressed Sensing.
29-32
- Keisuke Takizawa, Seiya Takenouchi, Hisashi Aomori, Tsuyoshi Otake, Mamoru Tanaka, Ichiro Matsuda, Susumu Itoh:
Lossless image coding by cellular neural networks with minimum coding rate learning.
33-36
- Sergi Consul-Pacareu, Jordi Albo-Canals, Xavier Vilasís-Cardona, Jordi Riera-Babures:
High performance DT-CNN camera device design on ACTEL IGLOO low power FPGA.
37-40
- Tomoya Shima, Chihiro Ikuta, Yoko Uwate, Yoshifumi Nishio:
Investigation of recall image by Partitioned Hopfield Neural Network.
41-44
- Shuji Tsukiyama, Masahiro Fukui:
A new statistical maximum operation for Gaussian mixture models and its evaluations.
45-48
- Damian Grzechca:
Simulated annealing with artificial neural network fitness function for ECG amplifier testing.
49-52
- José A. Soares Augusto:
Efficient time domain analogue fault simulation targeting nonlinear circuits.
53-56
- Chun-Yu Lin, Li-Wei Chu, Shiang-Yu Tsai, Ming-Dou Ker, Tse-Hua Lu, Tsun-Lai Hsu, Ping-Fang Hung, Ming-Hsiang Song, Jeng-Chou Tseng, Tzu-Heng Chang, Ming-Hsien Tsai:
Modified LC-tank ESD protection design for 60-GHz RF applications.
57-60
- Bo Zhang, Weiwei Pan, Yongjun Zheng, Zheng Shi, Xiaolang Yan:
A fully automated large-scale addressable test chip design with high reliability.
61-64
- Siwen Liang, William Redman-White:
A linear tuning ring VCO for spectrum monitor receiver in cognitive radio applications.
65-68
- Joshua H. Kim, Michael M. Green:
Fast startup of LC VCOs using circuit asymmetries.
69-72
- Mihaela Izabela Ionita, David Cordeau, Jean-Marie Paillot, Mihai Iordache:
Analysis and design of an array of two differential oscillators coupled through a resistive network.
73-76
- Andreas Axholt, Henrik Sjöland:
A 2.25mW inductor-less 24 GHz CML frequency divider in 90nm CMOS.
77-80
- Bjorn Thorsten Thiel, Renato Negra:
Digitally controlled pulse-width-pulse-position modulator in an 1.2V 65 nm CMOS technology.
81-84
- Ahmed G. Radwan, Ahmed S. Elwakil:
The generalized exponential function and fractional trigonometric identities.
85-89
- Pier Paolo Civalleri, Marco Gilli, Michele Bonnin:
A cascaded two-port model for quantum particles propagation in crystals.
90-93
- Torsten Schmidt, Ute Feldmann, Willi Neudeck, Ronald Tetzlaff:
Analytical approach to single memristor circuits.
94-97
- Lucian Mandache, Dumitru Topan, Mihai Iordache, Lucia Dumitriu, Ioana Gabriela Sirbu:
On the time-domain analysis of analog circuits containing nonlinear inductors.
98-101
- Tetsuo Nishi, Hiroshi Tanimoto, Shin'ichi Oishi:
Cascade synthesis of RC polyphase one-ports.
102-105
- Ali Baradaranrezaeii, Roozbeh Abdollahi, Khayrollah Hadidi, Abdollah Khoei:
A 1GS/s low-power low-kickback noise comparator in CMOS process.
106-109
- Enrico F. Calandra, Marco Caruso, Daniele Lupo:
Influence of active device nonlinearities on the determination of Adler's injection-locking Q-factor.
110-113
- Antonio J. López-Martín, Fermin Esparza-Alfaro, Jaime Ramírez-Angulo, Ramón González Carvajal:
Accurate micropower class AB CMOS voltage-to-current converter.
114-117
- Ülkühan Güler, Günhan Dündar:
Maximizing randomness in ring oscillators for security applications.
118-121
- Juan M. Carrillo, Miguel Angel Domínguez, J. Francisco Duque-Carrillo, Guido Torelli:
Low-voltage wide-swing fully differential CMOS voltage buffer.
122-125
- Takashi Morie, Daisuke Atuti, Kazuki Ifuku, Yoshihiko Horio, Kazuyuki Aihara:
A CMOS nonlinear-map circuit array for threshold-coupled chaotic maps using pulse-modulation approach.
126-129
- Carlis Sanchez-Azqueta, Santiago Celma:
A phase detection scheme for clock and data recovery applications.
130-133
- D. Moro-Frías, María Teresa Sanz-Pascual, Carlos Aristoteles De la Cruz Blas:
A novel current-mode Winner-Take-All topology.
134-137
- A. Lesellier, O. Jamin, Jean-François Bercher, Olivier Venard:
Design, optimization and realization of an HFB-based ADC.
138-141
- Shafqat Ali, Steve Tanner, Pierre-André Farine:
A robust, low power, high speed voltage level shifter with built-in short circuit current reduction.
142-145
- Trinidad Sanchez-Rodriguez, Ramón González Carvajal, Salvatore Pennisi, J. A. Galan:
0.13-µm CMOS tunable transconductor based on the body-driven gain boosting technique with application in Gm-C filters.
146-149
- Ion Vornicu, Liviu Goras:
On the design of a class of CNN's for ECG classification.
150-153
- C. Gimeno, Concepción Aldea, Santiago Celma, Francisco Aznar, Carlis Sanchez-Azqueta:
A CMOS continuous-time equalizer for short-reach optical communications.
154-157
- Jun Cao, Sui Huang, Michael M. Green:
Non-idealities in linear CDR phase detectors.
158-161
- Grzegorz Budzyn, Tomasz Podzorny, Janusz Rzepka:
Two-dimensional sinusoidal signal quality improvement by combined software and hardware means.
162-165
- Maria Trzaska, Zdzislaw Trzaska:
Chaotic oscillations in fractional-order nonlinear circuit models of bipolar pulsed electroplatings.
166-169
- Carlos Aristoteles De La Cruz Blas, Michael M. Green:
CMOS latch based on a class-AB transconductor.
170-173
- Merih Yildiz, Izzet Cem Göknar, Shahram Minaei, Engin Deniz:
DU-TCC 1209: A CMOS IC classifier and its application to IRIS data.
174-177
- Juan M. Carrillo, Miguel Angel Domínguez, J. Francisco Duque-Carrillo, Guido Torelli:
1.2-V fully differential OTA-C lowpass filter based on bulk-driven MOS transistors.
178-181
- Cristina Azcona, Belén Calvo, Santiago Celma, Nicolás J. Medrano-Marqués:
Low-voltage low-power CMOS rail-to-rail V-I converters.
182-185
- Pedram Payandehnia, Behjat Forouzandeh, Aliazam Abbasfar, Samad Sheikhaei, Kambiz Nanbakhsh:
A 12.5Gb/s active-inductor based transmitter for I/O applications.
186-189
- Manuel Suarez, Victor M. Brea, Diego Cabello, F. Pozas-Flores, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez:
Switched-capacitor networks for scale-space generation.
190-193
- A. Hernandez-Morales, M. T. Sanz-Pascual, Luis Hernández-Martínez, S. Celma:
Novel low-frequency signal conditioning circuit.
194-197
- Marko Noack, Christian Mayr, Johannes Partzsch, René Schüffny:
Synapse dynamics in CMOS derived from a model of neurotransmitter release.
198-201
- Sumit Adhikari, Yaseen Zaidi, Christoph Grimm:
Architectural mitigation for high performance energy measurement.
202-205
- Hatem Osman, Ahmed Emira, Ahmed Nader Mohieldin, Mohamed Abouzied, Ahmed Soliman:
On-chip high-Q bandpass filtering using N-phase current driven passive mixers.
206-209
- Daniel Andrzej Pietak, Jacek Wojciechowski, Pawel Jan Napiorkowski:
A Front Line algorithm for error estimation in data sets with nonuniform sampling distribution.
210-213
- Mireia Vinyoles-Serra, Stanislaw Jankowski, Zbigniew Szymanski:
Cellular Neural Network learning using Multilayer Perceptron.
214-217
- Xavier Vilasís-Cardona:
Cellular techniques for Ring Imaging Cherenkov detector image processing.
218-221
- Mireia Vinyoles-Serra, Xavier Vilasís-Cardona:
Response of the two neuron cellular neural network to time dependent inputs.
222-225
- Angela Slavova, Victoria Rashkova:
A novel CNN based image denoising model.
226-229
- Jorge Fernandez-Berni, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez:
Image filtering by reduced kernels exploiting kernel structure and focal-plane averaging.
230-233
- Ion Vornicu, Liviu Goras:
On the possibilities of using a class of CNN's for texture classification.
234-237
- Fernando Corinto, Alon Ascoli, Marco Gilli:
Heteroclinic bifurcation in memristor oscillators.
238-241
- Antonio Buonomo, Alessandro Lo Schiavo:
A nonlinear analysis of differential LC injection-locked frequency dividers.
242-245
- Mark Bradley, Orla Feely, Alexey Teplinsky:
Limit cycles in a digitally controlled buck converter.
246-249
- Paolo Maffezzoni, Dario D'Amore, Mauro Santomauro:
Extracting oscillators phase-sensitivity to noise perturbations.
250-253
- Takahiro Aoki, Tadashi Tsubone:
Control of inter-spike-interval density of piecewise-constant chaotic spiking oscillator with dead-time.
254-257
- Akiko Takahashi, Kunichika Tsumoto, Kazuyuki Aihara, Takuji Kousaka:
Numerical method for bifurcation analysis in an impact oscillator with fixed border.
258-261
- Marko Neitola, Timo Rahkonen:
Compact tone-behavior model for Delta-Sigma modulators.
262-265
- Christoph Zorn, Christian Widemann, Timon Brückner, Maurits Ortmanns, Wolfgang Mathis:
STF optimization of 1-bit CT ΣΔ modulators based on scaled loop filter coefficients.
266-269
- Ye Tian, Ying Song, Mats Erixon, Ola Tylstedt:
A high-ELD tolerant Continuous-Time Sigma-Delta Modulator for Bluetooth with DWA calibration.
270-273
- Nadeem Afzal, M. Reza Sadeghifar, J. Jacob Wikner:
A study on power consumption of modified noise-shaper architectures for ΣΔ DACs.
274-277
- Stephan Bannwarth, Axel Wenzler, Wolfgang Mathis:
Offset elimination in ΣΔ analog to digital converters by ƒs/2 modulation.
278-281
- Keith Finnerty, John Dooley, Ronan Farrell:
Digital quadrature mixing of lowpass sigma-delta modulators for switch-mode power amplifiers.
282-285
- Evdokia Pilavaki, Costas Psychalinos:
Analog cochlear implant using Sinh-Domain filters.
286-289
- Loucas Constantinou, Andreas Demosthenous, Peter J. Langlois, Richard H. Bayford, Iasonas F. Triantis:
An improved CMOS current driver for electrical impedance tomography.
290-293
- J. Ramos, José L. Ausín, J. Francisco Duque-Carrillo, Guido Torelli:
Design considerations on CMOS limiting amplifiers for wearable biomedical systems.
294-297
- Mart Min, Toivo Paavle, Jaan Ojarand:
Time-frequency analysis of biological matter using short-time chirp excitation.
298-301
- Piotr Kmon, Pawel Grybos, Robert Szczygiel, Miroslaw Zoladz:
Tuning the low cut-off frequency in multichannel neural recording amplifiers by the on-chip correction DACs.
302-305
- Marco Crescentini, Marco Bennati, M. Serafini, Marco Tartagni:
Noise folding reduction in discrete-time current sensing.
306-309
- Zaka Ullah Sheikh, Amir Eghbali, Håkan Johansson:
Linear-phase FIR digital differentiator order estimation.
310-313
- Saima Athar, Oscar Gustafsson:
Optimization of AIQ representations for low complexity wavelet transforms.
314-317
- Keisuke Ishizawa, Toma Miyata, Naoyuki Aikawa:
Designing two-channel nonuniform-division FIR filter banks with variable notches.
318-321
- Manju Manuel, Elizabeth Elias:
Design of multiplier-less FRM FIR filter using Artificial Bee Colony Algorithm.
322-325
- Radu Matei, Liviu Goras:
Two-dimensional filter design based on frequency mapping of analog prototype filters.
326-329
- Marek Blok:
On practical aspects of optimal FSD filter design using extracted window method.
330-333
- Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernandez:
A template router.
334-337
- Andreas Krinke, Jens Lienig:
An ontology for constraints in custom IC design.
338-340
- Stephanie Youssef, Farakh Javid, Damien Dupuis, Ramy Iskander, Marie-Minerve Louërat:
A seamless representation for coupling transistor sizing with nanometric CMOS layout generation.
341-344
- A. Toro-Frias, R. Castro-López, Elisenda Roca, Francisco V. Fernández:
Layout-aware Pareto fronts of electronic circuits.
345-348
- Mark Po-Hung Lin:
Recent research in analog placement considering thermal gradient.
349-352
- Tao Xu, Xingyu Zhou, Linyong Shen, Marissa Condon:
A design methodology to enable sampling PLLs to synthesise fractional-N frequencies.
353-356
- Paolo Maffezzoni, Salvatore Levantino, Carlo Samori, Andrea L. Lacaita, Dario D'Amore, Mauro Santomauro:
Behavioral phase-noise analysis of charge-pump phase-locked loops.
357-360
- Muhammad Touqir Pasha, Mark Vesterbacka:
Frequency control schemes for single-ended ring oscillators.
361-364
- Popong Effendrik, Wenlong Jiang, Marcel van de Gevel, Frank Verwaal, Robert Bogdan Staszewski:
Time-to-digital converter (TDC) for WiMAX ADPLL in 40-nm CMOS.
365-368
- Naohiko Inaba, Tetsuro Endo, Tetsuya Yoshinaga, Ken'ichi Fujimoto:
Collapse of mixed-mode oscillations and chaos in the extended Bonhoeffer-van Der pol oscillator under weak periodic perturbation.
369-372
- Drazen Jurisic, George S. Moschytz:
Ladder-Biquad filter partitioning for on-chip tuning.
373-376
- Hiroki Sato, Zhishan Xu, Retdian A. Nicodimus, Shigetaka Takagi:
Low-power leapfrog bandpass filter with transmission zeros using integrators and resistor-based addition circuits.
377-380
- Firat Kaçar, Hakan Kuntman:
New realization of FDNR and sixth order band pass filter application.
381-384
- Pietro Monsurrò, Salvatore Pennisi, Giuseppe Scotti, Alessandro Trifiletti:
Design strategy for biquad-based continuous-time low-pass filters.
385-388
- Lacrimioara Grama, Corneliu Rusu:
Hilbert transform by divide-and-conquer piecewise linear approximation.
389-392
- Magdalena Kaniewska:
Online pitch estimation using instantaneous complex frequency.
393-396
- Sevket Cetinsel, Richard C. S. Morling, Izzet Kale:
An FPGA based decimation filter processor design for real-time continuous-time Σ-Δ modulator performance measurement and evaluation.
397-400
- Frederico Cadete, David Guilherme, Jorge Guilherme, Nuno Horta:
Overcurrent detection circuit for integrated class-D amplifiers.
401-404
- Jan Wellmann, Wolfgang Mathis, Martin Kahmann:
An AC Power-Standard using ZePoC-Coding and feed-forward HF-compensation.
405-408
- Piotr Maj, Pawel Grybos, Robert Szczygiel:
Development of a fast readout chip in deep submicron technology for pixel hybrid detectors.
409-412
- O. Ecin, R. Viga, Bedrich J. Hosticka, Anton Grabmaier:
Signal characterization of a pulsed-wire and heat flow system at a flow sensor.
413-416
- F. Matheis, Werner Brockherde, Anton Grabmaier, Bedrich J. Hosticka:
Modeling and calibration of 3D-Time-of-Flight pulse-modulated image sensors.
417-420
- Emanuel M. Popovici, D. Boyle, Sean O'Connell, Stephen Faul, Philip Angove, John Buckley, Brendan O'Flynn, John Barton, S. Cian O'Mathuna:
The s-Mote: A versatile heterogeneous multi-radio platform for wireless sensor networks applications.
421-424
- J. Aguirre, Nicolás J. Medrano-Marqués, Belén Calvo, Santiago Celma, Cristina Azcona:
An analog lock-in amplifier for embedded sensor electronic interfaces.
425-428
- Robert Bogdan Staszewski:
Digital RF architectures for wireless transceivers (invited).
429-436
- Stanislaw Osowski:
Signal flow graphs for determination of higher order sensitivities of circuit functions.
437-440
- Josef Bajer, Jiri Vavra, Dalibor Biolek, Karel Hajek:
Low-distortion current-mode quadrature oscillator for low-voltage low-power applications with non-linear non-inertial automatic gain control.
441-444
- Seiichiro Moro, Tatsuyuki Shoji:
Error evaluation of circuit analysis method using Haar wavelet transform.
445-448
- Sarang Kazeminia, Khayrollah Hadidi, Abdollah Khoei, Mohammad-Naghi Azarmanesh:
Effect of bandgap energy temperature dependence on thermal coefficient of bandgap reference voltage.
449-452
- Cristian E. Onete, Maria Cristina C. Onete:
Finding spanning trees and Hamiltonian circuits in an un-oriented graph an algebraic approach.
453-456
- Chuang Bi, Paul F. Curran, Orla Feely:
Linearized discrete-time model of higher order Charge-Pump PLLs.
457-460
- Tina Thiessen, Martin Gutschke, Philipp Blanke, Wolfgang Mathis, Franz-Erich Wolter:
A numerical approach for nonlinear dynamical circuits with jumps.
461-464
- Federico Bizzarri, Angelo Brambilla, Stefano Perticaroli, Giancarlo Storti Gajani:
Noise in a phase-quadrature pulsed energy restore oscillator.
465-468
- Ahmed S. Elwakil, Brent Maundy:
Experimental technique for estimating the dispersion coefficient of a constant phase element.
469-471
- Tamas Zsedrovits, Ákos Zarándy, Balint Vanek, Tamas Peni, Jozsef Bokor, Tamás Roska:
Visual Detection and Implementation Aspects of a UAV See and Avoid System.
472-475
- Ritwik Layek, Aniruddha Datta, Shankar P. Bhattacharyya:
Linear circuits: A measurement based approach.
476-479
- Michael Peter Kennedy, Xi Dong, Hongjia Mo:
Phenomenological study of an injection-locked CMOS LC frequency divider with direct injection.
480-483
- Michael Peter Kennedy, Hongjia Mo, Xi Dong:
Experimental characterization of Arnold tongues in injection-locked CMOS LC frequency dividers with tail and direct injection.
484-487
- Dalibor Biolek, Josef Bajer, Viera Biolkova, Zdenek Kolka:
Mutators for transforming nonlinear resistor into memristor.
488-491
- Hans Herman Hansen, Trond Ytterdal:
Figure-of-merit optimization of a low noise amplifier in 180 nm CMOS.
492-495
- Tadeusz Kaczorek:
Computation of positive stable realizations for linear continuous-time systems.
496-499
- Gabor Varga, Andreas Suss, Bedrich J. Hosticka:
A sequential method for noise estimation in switched-capacitor systems using a switching time-frequency domain.
500-503
- Hao Meng, Ari Paasio, Jia Sun:
A capacitor mismatch insensitive technique for RSD cyclic ADC.
504-507
- Jaroslav Koton, Norbert Herencsar, Kamil Vrba:
Current-mode precision full-wave rectifier using single DXCCII and two diodes.
508-511
- Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo:
Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model.
512-515
- Agnieszka Wardzinska, Wojciech Bandurski:
VLSI low loss interconnects scattering parameters.
516-519
- Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo:
An ultra-compact MOS model in nanometer technologies.
520-523
- Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov:
Injection locking/pulling analysis of oscillators under fractional excitation frequency.
524-527
- Dhurv Chhetri, Venkata Narasimha Manyam, J. Jacob Wikner:
An event-driven 8-bit ADC with a segmented resistor-string DAC.
528-531
- Xiaoyan Gui, Michael M. Green:
Nonlinearities in frequency dividers.
532-535
- Massimo Alioto:
Impact of NMOS/PMOS imbalance in Ultra-Low Voltage CMOS standard cells.
536-539
- Snorre Aunet:
On the reliability of ultra low voltage circuits built from minority-3 gates.
540-543
- Armin Tajalli, Yusuf Leblebici:
Design trade-offs in ultra-low-power CMOS and STSCL digital systems.
544-547
- Georgios Karakonstantis, Kaushik Roy:
Voltage over-scaling: A cross-layer design perspective for energy efficient systems.
548-551
- Pascal Andreas Meinerzhagen, Oskar Andersson, S. M. Yasser Sherazi, Andreas Peter Burg, Joachim Neves Rodrigues:
Synthesis strategies for sub-VT systems.
552-555
- Dai Zhang, Christer Svensson, Atila Alvandpour:
Power consumption bounds for SAR ADCs.
556-559
- Bengt E. Jonsson:
Area efficiency of ADC architectures.
560-563
- R. L. Grimaldi, S. Rodriguez, A. Rusu:
A 10-bit 5kHz level-crossing ADC.
564-567
- Francesco Centurelli, Pietro Monsurrò, Alessandro Trifiletti:
An MDAC architecture with low sensitivity to finite opamp gain.
568-571
- Yao Liu, Edoardo Bonizzoni, Franco Maloberti:
Digital assisted high-order multi-bit analog to digital ramp converters.
572-575
- Niko Bako, Adrijan Baric:
A low-power fully differential 9-bit C-2C cyclic ADC.
576-579
- Peter Nilsson, Erik Hertz:
Ultra low power hardware for computing Squared Euclidean Distances.
580-583
- Benjamin Parent, Jonathan Müller, Andreas Kaiser, Andreia Cathelin:
Design of 10 GHz sampling rate digital FIR filters with powers-of-two coefficients.
584-587
- Levent Aksoy, Eduardo Costa, Paulo F. Flores, José C. Monteiro:
Optimization of gate-level area in high throughput Multiple Constant Multiplications.
588-591
- Fabio Frustaci, Pasquale Corsonello, Massimo Alioto:
Optimization and evaluation of tapered-VTH approach for energy-efficient CMOS buffers.
592-595
- João S. Altermann, Eduardo Costa, Sérgio J. M. de Almeida:
High performance Haar Wavelet transform architecture.
596-599
- Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan:
A dynamically error correctable bit parallel Montgomery multiplier over binary extension fields.
600-603
- Tuba Ayhan, Mustak Erhan Yalcin:
Randomly reconfigurable Cellular Neural Network.
604-607
- Fernando Corinto, Valentina Lanza, Alon Ascoli, Marco Gilli:
Synchronization in networks of FitzHugh-Nagumo neurons with memristor synapses.
608-611
- Eri Ioka, Yasuyuki Matusya, Hiroyuki Kitajima:
Bifurcation in mutually coupled three neurons with inhibitory synapses.
612-615
- Murat Simsek:
Developing 3-step modeling strategy exploiting knowledge based techniques.
616-619
- Enis Günay, Recai Kiliç, Nimet Dahasert:
External and internal control applications for SC-CNN-based chaotic circuit.
620-623
- Recai Kiliç, Enis Günay, Fatma Yildirim Dalkiran, Umut Mutlu:
Experimental verification of CNN (Cellular Neural Network)-based nonautonomous MLC chaos generator.
624-627
- Kiyotaka Yamamura, Takahiro Ueda:
Finding all solutions of piecewise-linear resistive circuits using integer programming.
628-631
- Fernando Corinto, Alon Ascoli, Marco Gilli:
Symmetric charge-flux nonlinearity with combined inherently-asymmetric memristors.
632-635
- Zbigniew Galias, Xinghuo Yu:
Periodic behaviors in discretized second-order terminal sliding mode control systems.
636-639
- Yusuke Tsubaki, Yoshihiko Horio, Kazuyuki Aihara:
Forced chaos generator with switched CMOS active inductance.
640-643
- M. C. Martinez-Rodriguez, Iluminada Baturone, P. Brox:
Circuit implementation of piecewise-affine functions based on lattice representation.
644-647
- Akio Tsuneda, Takashi Yoshida:
Performance evaluation of asynchronous DS/CDMA communications using unipolar codes.
648-651
- Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir:
Implicit test of high-speed analog circuits using non-intrusive sensors.
652
- Sébastien Darfeuille, Christophe Kelma:
Production test of an RF receiver chain based on ATM combining RF BIST and machine learning algorithm.
653-656
- Osman Kubilay Ekekon, Samed Maltabas, Martin Margala:
A multi-GHz PLL Built-In jitter extraction circuit for deep submicron technologies.
657-660
- Shakeel Ahmad, Jerzy Dabrowski:
On-chip spectral test for high-speed ADCs by ΣΔ technique.
661-664
- Michael Soudan, Christian Vogel:
Low complexity least-squares filter design for the correction of linear time-varying systems.
665-668
- Alberto Oliveri, G. J. L. Naus, Marco Storace, W. P. M. H. Heemels:
Low-complexity approximations of PWA functions: A case study on Adaptive Cruise Control.
669-672
- Carl Ingemarsson, Oscar Gustafsson:
Finite wordlength properties of matrix inversion algorithms in fixed-point and logarithmic number systems.
673-676
- Fahad Qureshi, Oscar Gustafsson:
Generation of all radix-2 fast Fourier transform algorithms using binary trees.
677-680
- Sebastian Sichelschmidt, Olaf Hahn, Dieter Brückmann:
Fast power back-off adjustment by efficient cubic metric determination.
681-684
- Paula López, Beatriz Blanco-Filgueira, Johann Hauer:
Modeling and experimental results of short channel annular MOS transistors.
685-688
- Josef Dobes, David Cerny, Dalibor Biolek:
Efficient procedure for solving circuit algebraic-differential equations with modified sparse LU factorization improving fill-in suppression.
689-692
- Federico Butti, Paolo Bruschi, Massimo Piotto:
An automated area optimization routine for the design of very low frequency Gm-C integrators.
693-696
- Shohei Asakawa, Shuji Tsukiyama, Isao Shirakawa, Shuji Nishi, Tadashi Takeda, Tomoyuki Nagai, Yasushi Kubota:
An automatic layout method for timing pulse generator of small LCD driver.
697-700
- Janne Aikio, Timo Rahkonen:
Utilization of distortion contribution analysis.
701-704
- Peter Nilsson, Syed Nadeemuddin:
Power reductions in unrolled CORDIC architectures.
705-708
- Peyman Pouyan, Erik Hertz, Peter Nilsson:
A VLSI implementation of logarithmic and exponential functions using a novel parabolic synthesis methodology compared to the CORDIC algorithm.
709-712
- Mathias Faust, Chip-Hong Chang:
Low error bit width reduction for structural adders of FIR filters.
713-716
- Csaba Nemes, Zoltán Nagy, Péter Szolgay:
Efficient mapping of mathematical expressions to FPGAs: Exploring different design methodologies.
717-720
- Adam Milik, Andrzej Pulka:
Automatic implementation of arithmetic operation in reconfigurable logic controllers.
721-724
- Jean-Michel Akre, Jérôme Juillard, Mohammad Javidan, Eldar Zianbetov, Dimitri Galayko, Anton Korniienko, Éric Colinet:
A design approach for networks of Self-Sampled All-Digital Phase-Locked Loops.
725-728
- Federico Bizzarri, Xueyong Wei:
Phase noise analysis of a mechanical autonomous impact oscillator with a MEMS resonator.
729-732
- Hiroshige Kataoka, Yoko Uwate, Yoshihiro Yamagami, Yoshifumi Nishio:
Spice-oriented algorithm for analysis of coupled oscillators.
733-736
- Takahiro Nagai, Yoko Uwate, Yoshifumi Nishio:
Rotation of phase difference in four coupled oscillators as a regular tetrahedron form.
737-740
- Yoko Uwate, Yoshifumi Nishio:
Synchronization and frustration in coupled large-scale polygonal oscillatory networks.
741-744
- Waldemar Jendernalik, Jacek Jakusz, Grzegorz Blakiewicz, Robert Piotrowski, Stanislaw Szczepanski:
Analog CMOS processor for early vision processing with highly reduced power consumption.
745-748
- Gaetano Palumbo, Melita Pennisi, Ramón González Carvajal:
Figures of merit for class AB input stages.
749-752
- Jirí Hospodka, Pavel Sovka, Bohumil Psenicka:
Design and realization of a filter bank by switched capacitor technique.
753-756
- Francesco Centurelli, Pietro Monsurrò, Alessandro Trifiletti:
A class-AB flipped voltage follower output stage.
757-760
- Ali Fazli Yeknami, Mostafa Savadi Osgooei, Atila Alvandpour:
A programmable-bandwidth amplifier for ultra-low-power switched-capacitor application.
761-764
- Francesco Centurelli, Pietro Monsurrò, Alessandro Trifiletti:
A class-AB very low voltage amplifier and sample & hold circuit.
765-768
- Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti:
A very low-voltage differential amplifier for opamp design.
769-772
- Emil Nilsson, Christer Svensson:
Envelope detector sensitivity and blocking characteristics.
773-776
- Anton Blad, Oscar Gustafsson:
FPGA implementation of rate-compatible QC-LDPC code decoder.
777-780
- Sener Dikmese, Markku Renfors, Hasan Dinçer:
FFT and filter bank based spectrum sensing for WLAN signals.
781-784
- Alban Gruget, Morgan Roger, Van Tam Nguyen, Caroline Lelandais-Perrault, Philippe Bénabès, Patrick Loumeau:
Optimization of bandpass charge sampling filters in hybrid filter banks converters for cognitive radio applications.
785-788
- Valeriu Beiu, Walid Ibrahim, Azam Beg, Liren Zhang, Mihai Tache:
On axon-inspired communications.
789-792
- Takashi Yasuno, Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa:
A bandpass sigma-delta domain single-flux quantum wave filter.
793-796
- Tamás Krébesz, Géza Kolumbán, Csaba Mate Jozsa:
Ultra-wideband impulse radio based on pulse compression technique.
797-800
- Tamás Krébesz, Csaba Mate Jozsa, Géza Kolumbán:
New carrier generation techniques and their influence on bit energy in UWB radio.
801-804
- Jawad Saleem, Abdul Majid, Radhika Ambatipudi, Hari Babu Kotte, Kent Bertilsson:
High frequency full bridge converter using multilayer coreless printed circuit board step up power transformer.
805-808
- Masahiro Fukui, Haruo Miki, Masaya Yoshikawa, Shuji Tsukiyama:
A power grid optimization algorithm considering via reliability.
809-812
- Rares Bodnar, William Redman-White:
A 250W/30A fast charger for ultracapacitors with direct mains connection.
813-816
- Yan Chiew Wong, Wei Zhou, Ahmed O. El-Rayis, Nakul Haridas, Ahmet T. Erdogan, Tughrul Arslan:
Practical design strategy for two-phase step up DC-DC Fibonacci Switched-Capacitor converter.
817-820
- Mustafa Sayginer, Metin Yazgi, Ali Toker, Hakan Kuntman, Bal S. Virdee:
Decade bandwidth single and cascaded travelling wave medium power amplifiers using sige hbts.
821-824
- Quoc-Tai Duong, Jerzy Dabrowski:
Low noise transconductance amplifier design for continuous-time ΣΔ wideband frontend.
825-828
- Rafaella Fiorelli, Alberto Villegas, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda:
2.4-GHz single-ended input low-power low-voltage active front-end for ZigBee applications in 90 nm CMOS.
829-832
- Timo Rahkonen, Simo Hietakangas, Janne Aikio:
AM-PM distortion caused by transistor's signal-dependent input impedance.
833-836
- Tang Tang, Ronald Tetzlaff:
Feasibility study of codebook generation applying complex systems.
837-840
- Zora Solymar, Attila Stubendek, Mihaly Radvanyi, Kristof Karacs:
Banknote recognition for visually impaired.
841-844
- Yoshihiro Kato, Yasuhiro Ueda, Yoko Uwate, Yoshifumi Nishio:
Four-layer cellular neural networks in consideration of color and luminosity.
845-848
- Adam Dabrowski, Damian Cetnarowicz, Pawel Pawlowski, Mateusz Stankiewicz:
People recognition and tracking methods for control of viewpoint in CCTV systems.
849-852
- Deyu Tu, Robert Forchheimer, Lars Herlogsson, Xavier Crispin, Magnus Berggren:
Parameter extraction for electrolyte-gated organic field effect transistor modeling.
853-856
- Ahmet Unutulmaz, Günhan Dündar, Francisco V. Fernandez:
LDS - A description script for layout templates.
857-860
- Takashi Kambe:
C-based system LSI design of a particle tracking technology.
861-864
- Marc Joliveau, Michel Gendreau, François Gagnon, Claude Thibeault:
Low complexity low power non-recursive digital filters with unconstrained topology.
865-868
- Ding-Lan Shen, Yi-Ming Tsai:
A 6-bit bias-less pipelined ADC with open-loop amplifiers.
869-872
- Harish Balasubramaniam, Klaus Hofmann:
Design of digitally assisted 1.5b/stage pipeline ADCs using fully differential current conveyors.
873-876
- Tero Nieminen, Kari Halonen:
Single and two-stage OTAs for high-speed CMOS pipelined ADCs.
877-880
- Lukas Chruszczyk, Damian Grzechca:
Tolerance maximisation in fault diagnosis of analogue electronic circuits.
881-884
- Yuan Jun, Tachibana Masayoshi:
A BIST scheme for operational amplifier by checking the stable output of transient response.
885-888
- M. H. Amin, M. B. Abdelhalim, H. H. Amer:
Testing of first and second order delta-sigma converters for catastrophic faults.
889-892
- Ali Naderi Saatlo, Serdar Özoguz:
A new CMOS exponential circuit with extended linear output range.
893-896
Last update Thu May 24 04:16:38 2012
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