6. IEEE Symposium on Computer Arithmetic 1983: Aarhus, Denmark
T. R. N. Rao, Peter Kornerup (Eds.): 6th IEEE Symposium on Computer Arithmetic, ARITH 1983, Aarhus, Denmark, June 20-22, 1983. IEEE 1983 ISBN 0-8186-0034-9
VLSI
- Dharma P. Agrawal, Girish C. Pathak, Nikunja K. Swain, Bhuwan K. Agrawal: On design and performance of VLSI based parallel multiplier. 17-21
Number Systems & Residue Arithmetic
- Saroj Kaushik: Sign detection in Non-Redundant Residue Number System with reduced information. 24-28
- Dilip K. Banerji, Saroj Kaushik: Representation and processing of fractions in a residue system. 29-36
- Aviezri S. Fraenkel: Systems of numeration. 37-42
Multiplication
- Luigi Dadda: Some schemes for fast serial input multipliers. 52-59
- James E. Robertson: Conditions for the distributivity of multiplication with respect to set addition and their effect on the design of array multipliers. 67-71
Numerical Error Control
- Ronald Morrison, A. J. Cole, Peter J. Bailey, M. A. Wolfe, J. M. Shearer: Experience with a high level language that supports interval arithmetic. 74-78
- Peter J. L. Wallis: ADA floating-point arithmetic as a basis for portable numerical software. 79-81
- Svetoslav Markov: On the numerical algorithms formulated in computer arithmetic. 82-85
Algorithms & Implementation
- Milos D. Ercegovac: A higher-radix division with simple selection of quotient digits. 94-98
- Stanislaw Majerski: Square-root algorithms for high-speed digital circuits. 99-102
- J. B. Gosling: Some tricks of the (floating point) trade. 103
Case Studies
- George S. Taylor: Arithmetic on the ELXSI System 6400. 110-115
- Kari Johnsen: An IEEE floating point arithmetic implementation. 130-135
Online and Pipeline Arithmetic
- Robert Michael Owens, Mary Jane Irwin: Numerical limitations on the design of digit online networks. 156-161
Special Topics
- Hideaki Kobayashi, Ronald D. Bonnell: Arithmetic for a high-speed adaptive learning network element. 164-168
- Algirdas Avizienis, C. S. Raghavendra: Applications for arithmetic error codes in large, high-performance computers. 169-173
- Magdy A. Bayoumi, Graham A. Jullien, William C. Miller: Models for VLSI implementation of residue number system arithmetic modules. 174-182
Rational Arithmetic
- Robert B. Seidensticker: Continued fractions for high-speed and high-accuracy computer arithmetic. 184-193
- Kaoru Yoshida: Floating-point recurring rational arithmetic system. 194-200
- David W. Matula, Peter Kornerup: An order preserving finite binary encoding of the rationals. 201-209
- Alfonso Miola: A unified view of approximate rational arithmetic and rational interpolation. 210-220
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