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Publication search results
found 79 matches
- 2010
- Kaveh Aasaraai, Andreas Moshovos:
An Efficient Non-blocking Data Cache for Soft Processors. ReConFig 2010: 19-24 - Cristinel Ababei:
Efficient Congestion-Oriented Custom Network-on-Chip Topology Synthesis. ReConFig 2010: 352-357 - Shady O. Agwa, Hany H. Ahmad, Awad I. Saleh:
Hardware Pessimistic Run-Time Profiling for a Self-Reconfigurable Embedded Processor Architecture. ReConFig 2010: 162-167 - Ali Reza Akoushideh, Asadollah Shahbahrami:
Accelerating Texture Features Extraction Algorithms Using FPGA Architecture. ReConFig 2010: 232-237 - Gabriel Marchesan Almeida, Sameer Varyani, Rémi Busseuil, Nicolas Hebert, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
Providing Better Multi-processor Systems-on-Chip Resources Utilization by Means of Using a Control-Loop Feedback Mechanism. ReConFig 2010: 382-387 - Josef Angermeier, Stefan Wildermann, Eugen Sibirko, Jürgen Teich:
Placing Streaming Applications with Similarities on Dynamically Partially Reconfigurable Architectures. ReConFig 2010: 91-96 - David Pedrosa Branco, Iouliia Skliarova, José Vieira:
Reconfigurable Digital Audio Mixer for Electroacoustic Music. ReConFig 2010: 132-137 - Eduardo Cabal-Yepez, Ricardo Saucedo-Gallaga, Armando G. Garcia-Ramirez, Arturo A. Fernandez-Jaramillo, Marcos Pena-Anaya, Martin Valtierra-Rodriguez:
FPGA-Based Online Detection of Multiple-Combined Faults through Information Entropy and Neural Networks. ReConFig 2010: 244-249 - Luis Vitório Cargnini, Yoann Guillemenet, Lionel Torres, Gilles Sassatelli:
Improving the Reliability of a FPGA Using Fault-Tolerance Mechanism Based on Magnetic Memory (MRAM). ReConFig 2010: 150-155 - Zouha Cherif, Florent Flament, Jean-Luc Danger, Shivam Bhasin, Sylvain Guilley, Hervé Chabanne:
Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA. ReConFig 2010: 310-315 - Crina Costea, Florent Bernard, Viktor Fischer, Robert Fouquet:
Analysis and Enhancement of Ring Oscillators Based Physical Unclonable Functions in FPGAs. ReConFig 2010: 262-267 - Stephen D. Craven, Daniel Long, Jason Smith:
Open Source Precision Timed Soft Processor for Cyber Physical System Applications. ReConFig 2010: 448-451 - Rui A. L. de Cristo, Ricardo P. Jasinski, Volnei A. Pedroni:
Analysis and Preliminary Measurements of Radiated Emissions in an Asynchronous Circuit versus its Synchronous Counterpart. ReConFig 2010: 127-131 - Ouiza Dahmoune, Robert de B. Johnston:
Applying Model-Checking to Post-Silicon-Verification: Bridging the Specification-Realisation Gap. ReConFig 2010: 73-78 - Tom Davidson, Karel Bruneel, Dirk Stroobandt:
Run-Time Reconfiguration for Automatic Hardware/Software Partitioning. ReConFig 2010: 424-429 - Sasmita Deo:
Power Consumption Calculation of AP-DCD Algorithm Using FPGA Platform. ReConFig 2010: 388-393 - Ludovic Devaux, Sébastien Pillement, Daniel Chillet, Didier Demigny:
R2NoC: Dynamically Reconfigurable Routers for Flexible Networks on Chip. ReConFig 2010: 376-381 - Mohamed El-Hadedy, Martin Margala, Danilo Gligoroski, Svein J. Knapskog:
Implementing the Blue Midnight Wish Hash Function on Xilinx Virtex-5 FPGA Platform. ReConFig 2010: 394-399 - Fadi El-Hassan, Dan Ionescu:
A Hardware Architecture of an XML/XPath Broker for Content-Based Publish/Subscribe Systems. ReConFig 2010: 138-143 - Azad Fakhari, Mahmood Fathy:
A Two Level Architecture for High Throughput DCT-Processor and Implementing on FPGA. ReConFig 2010: 115-120 - Holger Flatt, Holger Blume, Peter Pirsch:
Mapping of a Real-Time Object Detection Application onto a Configurable RISC/Coprocessor Architecture at Full HD Resolution. ReConFig 2010: 452-457 - Julien Francq, Céline Thuillet:
Unfolding Method for Shabal on Virtex-5 FPGAs: Concrete Results. ReConFig 2010: 304-309 - Lubos Gaspar, Viktor Fischer, Florent Bernard, Lilian Bossuet, Pascal Cotret:
HCrypt: A Novel Concept of Crypto-processor with Secured Key Management. ReConFig 2010: 280-285 - A. D. Santana Gil, José Ignacio Benavides Benítez, Manuel Hernandez Calviño, Ezequiel Herruzo Gomez:
Reconfigurable Cache Implemented on an FPGA. ReConFig 2010: 250-255 - Mariusz Grad, Christian Plessl:
Pruning the Design Space for Just-in-Time Processor Customization. ReConFig 2010: 67-72 - Sébastien Guillet, Florent de Lamotte, Éric Rutten, Guy Gogniat, Jean-Philippe Diguet:
Modeling and Formal Control of Partial Dynamic Reconfiguration. ReConFig 2010: 31-36 - Nicolas Hebert, Gabriel Marchesan Almeida, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
A Cost-Effective Solution to Increase System Reliability and Maintain Global Performance under Unreliable Silicon in MPSoC. ReConFig 2010: 346-351 - Marco Antonio Soto Hernandez, Oscar Alvarado Nava, Francisco Javier Zaragoza Martínez:
Huffman Coding-Based Compression Unit for Embedded Systems. ReConFig 2010: 238-243 - Yohei Hori, Takahiro Yoshida, Toshihiro Katashita, Akashi Satoh:
Quantitative and Statistical Performance Evaluation of Arbiter Physical Unclonable Functions on FPGAs. ReConFig 2010: 298-303 - Miaoqing Huang, David Andrews, Jason Agron:
Operating System Structures for Multiprocessor Systems on Programmable Chip. ReConFig 2010: 358-363
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