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Publication search results
found 24 matches
- 1997
- Monica Alderighi, E. L. Gummati, Vincenzo Piuri, Giacomo R. Sechi:
A FPGA-Based Implementation of a Fault-Tolerant Neural Architecture for Photon Identification. FPGA 1997: 166-172 - Ray Bittner, Peter M. Athanas:
Wormhole Run-Time Reconfiguration. FPGA 1997: 79-85 - Douglas Chang, Malgorzata Marek-Sadowska:
Buffer Minimization and Time-Multiplexed I/O on Dynamically Reconfigurable FPGAs. FPGA 1997: 142-148 - Glenn H. Chapman, Benoit Dufort:
Laser Correcting Defects to Create Transparent Routing for Large Area FPGA's. FPGA 1997: 17-23 - Amit Chowdhary, John P. Hayes:
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs. FPGA 1997: 43-49 - Jason Cong, Yean-Yow Hwang:
Partially-Dependent Functional Decomposition with Applications in FPGA Synthesis and Mapping. FPGA 1997: 35-42 - Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen:
Module Generation of Complex Macros for Logic-Emulation Applications. FPGA 1997: 69-75 - Brian Von Herzen:
Signal Processing at 250 MHz Using High-Performance FPGA's. FPGA 1997: 62-68 - Michael D. Hutton, Jonathan Rose, Derek G. Corneil:
Generation of Synthetic Sequential Benchmark Circuits. FPGA 1997: 149-155 - Kurt Keutzer:
Challenges in CAD for the One Million Gate FPGA. FPGA 1997: 133-134 - Helena Krupnova, Christian Rabedaoro, Gabriele Saucier:
Synthesis and Floorplanning for Large Hierarchical FPGAs. FPGA 1997: 105-111 - David M. Lewis, David R. Galloway, Marcus van Ierssel, Jonathan Rose, Paul Chow:
The Transmogrifier-2: A 1 Million Gate Rapid Prototyping System. FPGA 1997: 53-61 - C. A. Looby, Colin Lyden:
A CMOS Continuous-Time Field Programmable Analog Array. FPGA 1997: 137-141 - Jonathan Rose, Dwight D. Hill:
Architectural and Physical Design Challenges for One-Million Gate FPGAs and Beyond. FPGA 1997: 129-132 - Herman Schmit:
Is Reconfigurable Computing Commercially Viable (panel)? FPGA 1997: 101 - Jianzhong Shi, Dinesh Bhatia:
Performance Driven Floorplanning for FPGA Based Designs. FPGA 1997: 112-118 - Alexandre F. Tenca, Milos D. Ercegovac:
Synchronous Up/Down Binary Counter for LUT FPGAs with Counting Frequency Independent of Counter Size. FPGA 1997: 159-165 - Steven Trimberger, Khue Duong, Bob Conn:
Architecture Issues and Solutions for a High-Capacity FPGA. FPGA 1997: 3-9 - Akihiro Tsutsui, Toshiaki Miyazaki:
YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing. FPGA 1997: 93-100 - Frank Vahid:
I/O and Performance Tradeoffs with the FunctionBus During Multi-FPGA Partitioning. FPGA 1997: 27-34 - Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic:
Memory-to-Memory Connection Structures in FPGAs with Embedded Memory Arrays. FPGA 1997: 10-16 - Michael J. Wirthlin, Brad L. Hutchings:
Improving Functional Density Through Run-Time Constant Propagation. FPGA 1997: 86-92 - R. Glenn Wood, Rob A. Rutenbar:
FPGA Routing and Routability Estimation via Boolean Satisfiability. FPGA 1997: 119-125 - Carl Ebeling:
Proceedings of the 1997 ACM/SIGDA Fifth International Symposium on Field Programmable Gate Arrays, FPGA 1997, Monterey, CA, USA, February 9-11, 1997. ACM 1997, ISBN 0-89791-801-0 [contents]
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