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Publication search results
found 123 matches
- 1995
- Aharon Aharon, Dave Goodman, Moshe Levinger, Yossi Lichtenstein, Yossi Malka, Charlotte Metzger, Moshe Molcho, Gil Shurek:
Test Program Generation for Functional Verification of PowerPC Processors in IBM. DAC 1995: 279-285 - Thomas W. Albrecht:
Concurrent Design Methodology and Configuration Management of the SIEMENS EWSD - CCS7E Processor System Simulation. DAC 1995: 222-227 - Michael J. Alexander, Gabriel Robins:
New Performance-Driven FPGA Routing Algorithms. DAC 1995: 562-567 - Charles J. Alpert, So-Zen Yao:
Spectral Partitioning: The More Eigenvectors, The Better. DAC 1995: 195-200 - Joachim Altmeyer, Bernd Schürmann, Martin Schütze:
Generating ECAD Framework Code from Abstract Models. DAC 1995: 88-93 - Reinaldo A. Bergamaschi:
Productivity Issues in High-Level Design: Are Tools Solving the Real Problems? DAC 1995: 674-677 - Jochen Bern, Christoph Meinel, Anna Slobodová:
Efficient OBDD-Based Boolean Manipulation in CAD beyond Current Limits. DAC 1995: 408-413 - Ulrich Bieker, Peter Marwedel:
Retargetable Self-Test Program Generation Using Constraint Logic Programming. DAC 1995: 605-611 - Massimo Bombana, Patrizia Cavalloro, Salvatore Conigliaro, Roger B. Hughes, Gerry Musgrave, Giuseppe Zaza:
Design-Flow and Synthesis for ASICs: A Case Study. DAC 1995: 292-297 - Jörg Bormann, Jörg Lohse, Michael Payer, Gerd Venzl:
Model Checking in Industrial Hardware Design. DAC 1995: 298-303 - Ansgar Bredenfeld, Raul Camposano:
Tool Integration and Construction Using Generated Graph-Based Design Representations. DAC 1995: 94-99 - Randal E. Bryant, Yirng-An Chen:
Verification of Arithmetic Circuits with Binary Moment Diagrams. DAC 1995: 535-541 - A. Cao, A. Adalal, J. Bauman, P. Delisle, P. Dedood, P. Donehue, M. Dell'OcaKhouja, T. Doan, Manjunath Doreswamy, Philip A. Ferolito, O. Geva, D. Greenhill, S. Gopaladhine, J. Irwin, L. Lev, J. MacDonald, M. Ma, Samir Mitra, P. Patel, A. Prabhu, R. Puranik, S. Rozanski, N. Ross, P. Saggurti, Slobodan Simovich, R. Sunder, B. Sur, W. Vercruysse, Michelle Wong, P. Yip, Robert K. Yu, J. Zhou, Gregory B. Zyner:
CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc. DAC 1995: 19-22 - Roger D. Chamberlain:
Parallel Logic Simulation of VLSI Systems. DAC 1995: 139-143 - Ajay Chandna, C. David Kibler, Richard B. Brown, Mark Roberts, Karem A. Sakallah:
The Aurora RAM Compiler. DAC 1995: 261-266 - Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng:
An Efficient Algorithm for Local Don't Care Sets Calculation. DAC 1995: 663-667 - Jui-Ming Chang, Massoud Pedram:
Register Allocation and Binding for Low Power. DAC 1995: 29-35 - Wei-Kai Cheng, Youn-Long Lin:
A Transformation-Based Approach for Storage Optimization. DAC 1995: 158-163 - Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Harry Hsieh, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich:
Synthesis of Software Programs for Embedded Control Applications. DAC 1995: 587-592 - Pai H. Chou, Gaetano Borriello:
Interval Scheduling: Fine-Grained Code Scheduling for Embedded Systems. DAC 1995: 462-467 - Mike Chou, Tom Korsmeyer, Jacob White:
Transient Simulations of Three-Dimensional Integrated Circuit Interconnect Using a Mixed Surface-Volume Approach. DAC 1995: 485-490 - Edmund M. Clarke, Orna Grumberg, Kenneth L. McMillan, Xudong Zhao:
Efficient Generation of Counterexamples and Witnesses in Symbolic Model Checking. DAC 1995: 427-432 - Olivier Coudert, Jean Christophe Madre:
New Ideas for Solving Covering Problems. DAC 1995: 641-646 - Y. G. DeCastelo-Vide-e-Souza, Miodrag Potkonjak, Alice C. Parker:
Optimal ILP-Based Approach for Throughput Optimization Using Simultaneous Algorithm/Architecture Matching and Retiming. DAC 1995: 113-118 - Rahul B. Deokar, Sachin S. Sapatnekar:
A Fresh Look at Retiming Via Clock Skew Optimization. DAC 1995: 310-315 - Srinivas Devadas, Sharad Malik:
A Survey of Optimization Techniques Targeting Low Power VLSI Circuits. DAC 1995: 242-247 - Aiman H. El-Maleh, Thomas E. Marchok, Janusz Rajski, Wojciech Maly:
On Test Set Preservation of Retimed Circuits. DAC 1995: 176-182 - Alessandro Dal Fabbro, Bruno Franzini, Luigi Croce, Carlo Guardiani:
An Assigned Probability Technique to Derive Realistic Worst-Case Timing Models of Digital Standard Cells. DAC 1995: 702-706 - Amir H. Farrahi, Gustavo E. Téllez, Majid Sarrafzadeh:
Memory Segmentation to Exploit Sleep Mode Operation. DAC 1995: 36-41 - Peter Feldmann, Roland W. Freund:
Reduced-Order Modeling of Large Linear Subcircuits via a Block Lanczos Algorithm. DAC 1995: 474-479
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