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Publication search results
found 25 matches
- 2004
- F. Aeschlimann, Emmanuel Allier, Laurent Fesquet, Marc Renaudin:
Asynchronous FIR Filters: Towards a New Digital Processing Chain. ASYNC 2004: 198-206 - Ivan Blunno, Jordi Cortadella
, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou:
Handshake Protocols for De-Synchronization. ASYNC 2004: 149-158 - Rostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou:
Data Synchronization Issues in GALS SoCs. ASYNC 2004: 170-180 - Jo C. Ebergen, Daniel F. Finchelstein, Russell Kao, Jon K. Lexau, David Hopkins:
A Fast and Energy-Efficient Stack. ASYNC 2004: 7-16 - Jo C. Ebergen, Jonathan Gainsley, Paul Cunningham:
Transistor Sizing: How to Control the Speed and Energy Consumption of a Circuit. ASYNC 2004: 51-61 - Aristides Efthymiou, W. Suntiamorntut, Jim D. Garside, L. E. M. Brackenbury:
An Asynchronous, Iterative Implementation of the Original Booth Multiplication Algorithm. ASYNC 2004: 207-215 - Scott Fairbanks, Simon W. Moore:
Analog Micropipeline Rings for High Precision Timing. ASYNC 2004: 41-50 - David Fang, Rajit Manohar:
Non-Uniform Access Asynchronous Register Files. ASYNC 2004: 75-85 - Marcos Ferretti, Recep O. Ozdag, Peter A. Beerel:
High Performance Asynchronous ASIC Back-End Design Flow Using Single-Track Full-Buffer Standard Cells. ASYNC 2004: 95-105 - Ron Ho, Jonathan Gainsley, Robert J. Drost:
Long Wires and Asynchronous Control. ASYNC 2004: 240-249 - Masashi Imai, Metehan Özcan, Takashi Nanya:
Evaluation of Delay Variation in Asynchronous Circuits Based on the Scalable-Delay-Insensitive Model. ASYNC 2004: 62-71 - Martin Jenkner:
Contacting Biological Cells with Electronic Circuits. ASYNC 2004: 109 - Alireza Kaviani:
Phase Alignment Using Asynchronous State Machines. ASYNC 2004: 86-94 - Xiaohua Kong, Radu Negulescu:
Bolstering Faith in GasP Circuits through Formal Verification. ASYNC 2004: 113-124 - Radu Negulescu:
General Testers for Asynchronous Circuits. ASYNC 2004: 28-38 - Mika Nyström, Elaine Ou, Alain J. Martin:
An Eight-Bit Divider Implemented in Asynchronous Pulse Logic. ASYNC 2004: 229-239 - Recep O. Ozdag, Peter A. Beerel
:
A Channel Based Asynchronous Low Power High Performance Standard-Cell Based Sequential Decoder Implemented with QDI Templates. ASYNC 2004: 187-197 - Ad M. G. Peeters:
Bringing Handshake Technology to the Open Market. ASYNC 2004: 183 - Nisrine Saadallah, Xiaohua Kong, Radu Negulescu:
High-Speed Reduced Stack Dual Lock Circuits. ASYNC 2004: 219-228 - Mathew A. Sacker, Andrew D. Brown, Peter R. Wilson, Andrew J. Rushton:
A General Purpose Behavioural Asynchronous Synthesis System. ASYNC 2004: 125-134 - Greg Semeraro, David H. Albonesi, Grigorios Magklis, Michael L. Scott
, Steven G. Dropsho, Sandhya Dwarkadas:
Hiding Synchronization Delays in a GALS Processor Microarchitecture. ASYNC 2004: 159-169 - Christer Svensson:
Synchronous Latency Insensitive Design. ASYNC 2004: 3 - John Teifel, Rajit Manohar:
Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis. ASYNC 2004: 17-27 - Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers:
Synthesis of Speed Independent Circuits Based on Decomposition. ASYNC 2004: 135-145 - 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 19-23 April 2004, Crete, Greece. IEEE Computer Society 2004, ISBN 0-7695-2133-9 [contents]
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retrieved on 2025-07-07 10:31 CEST from data curated by the dblp team
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