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Publication search results
found 69 matches
- 1990
- Anna Antola, Nello Scarabottolo:
Reconfiguration of FFT arrays: a flow-driven approach. ASAP 1990: 401-413 - Brent Baxter, George W. Cox, Thomas R. Gross, H. T. Kung, David R. O'Hallaron, Craig Peterson, Jon A. Webb, Paul Wiley:
Building blocks for a new generation of application specific computing systems. ASAP 1990: 190-201 - Richard H. Bayford:
The bit-serial systolic back-projection engine (BSSBPE). ASAP 1990: 43-54 - Abdelhamid Benaini, Yves Robert:
Spacetime-minimal systolic architectures for Gaussian elimination and the algebraic path problem. ASAP 1990: 746-757 - Jichun Bu, Ed F. Deprettere, Patrick M. Dewilde:
A design methodology for fixed-size systolic arrays. ASAP 1990: 591-602 - Jichun Bu, Ed F. Deprettere, Lothar Thiele:
Systolic array implementation of nested loop programs. ASAP 1990: 31-42 - Keping Chen, Per-Erik Danielsson, Anders Åström:
PASIC. A sensor/processor array for computer vision. ASAP 1990: 352-366 - C. C. Chiang, H. C. Fu:
An improved multilayer neural model and array processor implementation. ASAP 1990: 389-400 - Yaohan Chu:
Application-specific coprocessor computer architecture. ASAP 1990: 653-664 - Soon Myoung Chung:
A database machine based on surrogate files. ASAP 1990: 55-66 - Philippe Clauss, Catherine Mongenet, Guy-René Perrin:
Calculus of space-optimal mappings of systolic algorithms on processor arrays. ASAP 1990: 4-18 - Luigi Dadda:
Byte-serial convolvers. ASAP 1990: 530-541 - Jean-Marc Delosme:
Bit-level systolic algorithm for the symmetric eigenvalue problem. ASAP 1990: 770-781 - Rory Doyle, Patrick Fitzpatrick, John Nelson:
An improved systolic extended Euclidean algorithm for Reed-Solomon decoding: design and implementation. ASAP 1990: 448-456 - Khaled M. Elleithy, Magdy A. Bayoumi:
A formal design methodology for parallel architectures. ASAP 1990: 603-614 - Pascal Fernandez, Pascal Adam, Didier Juvin, Jean-Luc Basille:
Programming environment for a line processor-SYMPATI-2. ASAP 1990: 567-578 - Jens Franzen:
Design of run-time fault-tolerant arrays of self-checking processing elements. ASAP 1990: 168-179 - Patrice Frison, Eric Gautrin, Dominique Lavenier, J. L. Scharbarg:
Designing specific systolic arrays with the API15C chip. ASAP 1990: 505-517 - Maya B. Gokhale, Andrew Kopser, Sara P. Lucas, Ronald G. Minnich:
The Logic Description Generator. ASAP 1990: 111-120 - C. Thomas Gray, Wentai Liu, Thomas A. Hughes, Ralph K. Cavin III:
The design of a high-performance scalable architecture for image processing applications. ASAP 1990: 722-733 - Zicheng Guo, Rami G. Melhem:
Embedding pyramids in array processors with pipelined busses. ASAP 1990: 665-676 - Simon Haykin, Peter Weber, Bob Cho, Terry Greenlay, Jim Orlando, Cong Deng, Richard Mann:
Systolic-based computing machinery for radar signal processing studies. ASAP 1990: 689-699 - Atsunobu Hiraiwa, Masahiro Fujita, Shigeru Kurosu, Shigeru Arisawa, Makoto Inoue:
Implementation of ANN on RISC processor array. ASAP 1990: 677-688 - Y. Hu, John V. McCanny, M. Yan:
Systolic VLSI compiler (SVC) for high performance vector quantisation chips. ASAP 1990: 145-155 - Jenq-Neng Hwang, Jing-Ming Jong:
Systolic architecture for 2-D rank order filtering. ASAP 1990: 90-99 - Jack S. N. Jean:
Fault-tolerant array processors using N-and-half-track switches. ASAP 1990: 426-437 - C. S. Jeong, M. H. Kim:
Parallel algorithm for traveling salesman problem on SIMD machines using simulated annealing. ASAP 1990: 712-721 - Josef G. Krammer, Hendrikus Arif:
A fault-tolerant two-dimensional sorting network. ASAP 1990: 317-328 - V. K. Prasanna Kumar, K. Wojtek Przytula:
Algorithmic mapping of neural network models onto parallel SIMD machines. ASAP 1990: 259-271 - Didier Lattard, Bernard Faure, Guy Mazaré:
Massively parallel architecture: application to neural net emulation and image reconstruction. ASAP 1990: 214-225
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