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Publication search results
found 36 matches
- 1987
- Poras T. Balsara, Robert Michael Owens:
Systolic & semi-systolic digit serial multipliers. IEEE Symposium on Computer Arithmetic 1987: 169-173 - Geoff Barrett:
A formal approach to rounding. IEEE Symposium on Computer Arithmetic 1987: 247-254 - Bidyut Kumar Bose, Li-fan Pei, George S. Taylor, David A. Patterson:
Fast multiply and divide for a VLSI floating-point unit. IEEE Symposium on Computer Arithmetic 1987: 87-94 - Tony M. Carter:
Structured arithmetic tiling of integrated circuits. IEEE Symposium on Computer Arithmetic 1987: 41-48 - Joseph R. Cavallaro, Franklin T. Luk:
CORDIC arithmetic for an SVD processor. IEEE Symposium on Computer Arithmetic 1987: 113-120 - Luigi Ciminiera:
Parallel multipliers based on horizontal compressors. IEEE Symposium on Computer Arithmetic 1987: 63-69 - Attilio Colagrossi, Alfonso Miola:
A normalization algorithm for truncated p-adic arithmetic. IEEE Symposium on Computer Arithmetic 1987: 212-216 - Michel Cosnard, Alain Guyot, Bertrand Hochet, Jean-Michel Muller, Hassan Ouaouicha, P. Paul, Eytan Zysman:
The FELIN arithmetic coprocessor chip. IEEE Symposium on Computer Arithmetic 1987: 107-112 - J. Du Croz, M. Pont:
The development of a floating-point validation package. IEEE Symposium on Computer Arithmetic 1987: 255 - James Demmel:
On error analysis in arithmetic with varying relative precision. IEEE Symposium on Computer Arithmetic 1987: 148-152 - Milos D. Ercegovac, Tomás Lang:
On-line scheme for computing rotation factors. IEEE Symposium on Computer Arithmetic 1987: 196-203 - Jan Fandrianto:
Algorithm for high speed shared radix 4 division and radix 4 square-root. IEEE Symposium on Computer Arithmetic 1987: 73-79 - Hozumi Hamada:
A new real number representation and its operation. IEEE Symposium on Computer Arithmetic 1987: 153-157 - Tack-Don Han, David A. Carlson:
Fast area-efficient VLSI adders. IEEE Symposium on Computer Arithmetic 1987: 49-56 - Bertrand Hochet, Patrice Quinton, Yves Robert:
Systolic solution of linear systems over GF(p) with partial pivoting. IEEE Symposium on Computer Arithmetic 1987: 161-168 - Thomas E. Hull, Marty S. Cohen:
Toward an ideal computer arithmetic. IEEE Symposium on Computer Arithmetic 1987: 131-138 - Kai Hwang, H. C. Wang, Z. Xu:
Evaluating elementary functions with Chebyshev polynomials on pipeline nets. IEEE Symposium on Computer Arithmetic 1987: 121-128 - Rom-Shen Kao, Fred J. Taylor:
Implementation of the single modulus complex ALU. IEEE Symposium on Computer Arithmetic 1987: 21-27 - Reinhard Kirchner, Ulrich W. Kulisch:
Arithmetic for vector processors. IEEE Symposium on Computer Arithmetic 1987: 256-269 - Peter Kornerup, David W. Matula:
A bit-serial arithmetic unit for rational arithmetic. IEEE Symposium on Computer Arithmetic 1987: 204-211 - Shigeo Kuninobu, Tamotsu Nishiyama, Hisakazu Edamatsu, Takashi Taniguchi, Naofumi Takagi:
Design of high speed MOS multiplier and divider using redundant binary representation. IEEE Symposium on Computer Arithmetic 1987: 80-86 - Hai-Xiang Lin, Henk J. Sips:
A novel floating-point online division algorithm. IEEE Symposium on Computer Arithmetic 1987: 188-195 - Frank W. J. Olver:
A closed computer arithmetic. IEEE Symposium on Computer Arithmetic 1987: 139-143 - Frank W. J. Olver, Peter R. Turner:
Implementation of level-index arithmetic using partial table look-up. IEEE Symposium on Computer Arithmetic 1987: 144-147 - Behrooz Parhami:
Systolic up/down counters with zero and sign detection. IEEE Symposium on Computer Arithmetic 1987: 174-178 - Victor Peng, Sridhar Samudrala, Moshe Gavrielov:
On the implementation of shifters, multipliers, and dividers in VLSI floating point units. IEEE Symposium on Computer Arithmetic 1987: 95-102 - Vincenzo Piuri:
Fault-tolerant systolic arrays: An approach based upon residue arithmetic. IEEE Symposium on Computer Arithmetic 1987: 230-238 - G. Robert Redinbo:
Protecting convolution-type aritmetic array calculations with generalized cyclic codes. IEEE Symposium on Computer Arithmetic 1987: 219-225 - James E. Robertson:
Error detection and correction for addition and subtraction, through use of higher radix extensions of hamming codes. IEEE Symposium on Computer Arithmetic 1987: 226-229 - Isaac D. Scherson, Yiming Ma:
Vector computations on an orthogonal memory access multiprocessing system. IEEE Symposium on Computer Arithmetic 1987: 28-37
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