• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 1,051 matches

• 2021
• 
  Hung-Ju Lin, Chung-An Shen:
  The Architectural Optimizations of a Low-Complexity and Low-Latency FFT Processor for MIMO-OFDM Communication Systems. J. Signal Process. Syst. 93(1): 67-78 (2021)
• 2020
• 
  Gianluca Leone, Luigi Raffo, Paolo Meloni:
  ZyON: Enabling Spike Sorting on APSoC-Based Signal Processors for High-Density Microelectrode Arrays. IEEE Access 8: 218145-218160 (2020)
• 
  Qirui Zhang, Qingsong Xie, Kefeng Duan, Bo Liang, Min Wang, Guoxing Wang:
  A digital signal processor (DSP)-based system for embedded continuous-time cuffless blood pressure monitoring using single-channel PPG signal. Sci. China Inf. Sci. 63(4) (2020)
• 
  Wei-Jhe Chen, Yu-An Lai, Chung-An Shen:
  The VLSI Architecture and Implementation of a Low Complexity and Highly Efficient Configurable SVD Processor for MIMO Communication Systems. Circuits Syst. Signal Process. 39(12): 6231-6246 (2020)
• 
  M. S. Kavitha, P. Rangarajan:
  An Efficient FPGA Architecture for Reconfigurable FFT Processor Incorporating an Integration of an Improved CORDIC and Radix-2 r Algorithm. Circuits Syst. Signal Process. 39(11): 5801-5829 (2020)
• 
  Yutaka Yamada, Masato Uchiyama, Masashi Jobashi, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Yoshinari Ojima, Ryusuke Murakami, Takashi Yoshikawa, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda:
  A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications. IEEE J. Solid State Circuits 55(1): 120-132 (2020)
• 
  Reiya Kawamoto, Masakazu Taichi, Masaya Kabuto, Daisuke Watanabe, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Go Matsukawa, Toshio Goto, Motoshi Kojima:
  A 1.15-TOPS 6.57-TOPS/W Neural Network Processor for Multi-Scale Object Detection With Reduced Convolutional Operations. IEEE J. Sel. Top. Signal Process. 14(4): 634-645 (2020)
• 
  S. M. Swamynathan, Velusamy Bhanumathi:
  Efficient hardware trojan diagnosis in SRAM based on FPGA processors using inject detect masking algorithm for multimedia signal Processors. Microprocess. Microsystems 77: 103168 (2020)
• 
  Juan Manuel López, Jesús Alonso, César Asensio, Ignacio Pavón, Luis Gascó, Guillermo de Arcas:
  A Digital Signal Processor Based Acoustic Sensor for Outdoor Noise Monitoring in Smart Cities. Sensors 20(3): 605 (2020)
• 
  Vaibhav Chavali, Kathleen E. Wage:
  Cross Term Decay in Multiplicative Processors. IEEE Signal Process. Lett. 27: 56-60 (2020)
• 
  Donghoon Shin, Hyeon-Deok Cho, Insik Yang:
  Power-Law Processor Over Segmentation for Variable Length Transients Detection. IEEE Signal Process. Lett. 27: 1065-1069 (2020)
• 
  Yung-Jen Lin, Yu-Chi Lee, Hao-Min Liu, Herming Chiueh, Tai-Shih Chi, Chia-Hsiang Yang:
  A 1.5 mW Programmable Acoustic Signal Processor for Hearing Assistive Devices With Speech Intelligibility Enhancement. IEEE Trans. Circuits Syst. 67-I(12): 4984-4993 (2020)
• 
  Shuenn-Yuh Lee, Chieh Tsou, Peng-Wei Huang:
  Ultra-High-Frequency Radio-Frequency-Identification Baseband Processor Design for Bio-Signal Acquisition and Wireless Transmission in Healthcare System. IEEE Trans. Consumer Electron. 66(1): 77-86 (2020)
• 
  Durgesh Nandan:
  An Efficient Antilogarithmic Converter by Using Correction Scheme for DSP Processor. Traitement du Signal 37(1): 77-83 (2020)
• 
  Corey J. Cochrane, Kenneth B. Cooper, Stephen L. Durden, Raquel Rodriguez Monje, Robert J. Dengler:
  An FPGA-Based Signal Processor for FMCW Doppler Radar and Spectroscopy. IEEE Trans. Geosci. Remote. Sens. 58(8): 5552-5563 (2020)
• 
  Bertrand Le Gal, Christophe Jégo:
  High-Throughput FFT-SPA Decoder Implementation for Non-Binary LDPC Codes on x86 Multicore Processors. J. Signal Process. Syst. 92(1): 37-53 (2020)
• 
  Editor's Note: Special Issue on Application-specific Systems, Architectures and Processors. J. Signal Process. Syst. 92(9): 885 (2020)
• 
  Hamid Nejatollahi, Sina Shahhosseini, Rosario Cammarota, Nikil D. Dutt:
  Exploring Energy Efficient Quantum-resistant Signal Processing Using Array Processors. ICASSP 2020: 1539-1543
• 
  Dipankar Chatterjee, Suvarun Dalapati:
  Algorithm for Determining Instant and Magnitude of Peak of a Signal using 8-bit fixed Point Processor. ISDCS 2020: 1-6
• 
  Omar A. Yeste Ojeda, Nolan Denman, Jacob Wegman, Stephen Wunduke:
  The SCREAM Concept for the Next-Generation Very Large Array Central Signal Processor. ISNCC 2020: 1-4
• 
  Erfan Ghaderi, Chase Puglisi, Shrestha Bansal, Subhanshu Gupta:
  10.8 A 4-Element 500MHz-Modulated-BW 40mW 6b 1GS/s Analog-Time-to-Digital-Converter-Enabled Spatial Signal Processor in 65nm CMOS. ISSCC 2020: 186-188
• 
  Tzu-Fan Wu, Mike Shuo-Wei Chen:
  16.7 A 40MHz-BW 76.2dB/78.0dB SNDR/DR Noise-Shaping Nonuniform Sampling ADC with Single Phase-Domain Level Crossing and Embedded Nonuniform Digital Signal Processor in 28nm CMOS. ISSCC 2020: 262-264
• 
  John A. Stratton, Jyothi Krishna Viswakaran Sreelatha, Rajiv Ravindran, Sachin Sudhakar Dake, Jeevitha Palanisamy:
  Optimizing Halide for Digital Signal Processors. SiPS 2020: 1-6
• 
  Hyochan An, Siddharth Venkatesan, Sam Schiferl, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Hengfei Zhong, Luyao Gong, David T. Blaauw, Ronald G. Dreslinski, Dennis Sylvester, Hun-Seok Kim:
  A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge. VLSI Circuits 2020: 1-2
• 2019
• 
  Hanning Su, Qinglong Bao, Zengping Chen:
  Parameter Estimation Processor for Chirp Signals Based on a Complex-Valued Deep Neural Network. IEEE Access 7: 176278-176290 (2019)
• 
  A. Udhayakumar, S. Padma:
  Low Power Magnetic Non-volatile Flip-Flops with Self-Time Logical Writing for High-End Processors. Circuits Syst. Signal Process. 38(11): 4921-4932 (2019)
• 
  Jan Lewandowsky, Gerhard Bauch, Matthias Tschauner, Peter Oppermann:
  Design and Evaluation of Information Bottleneck LDPC Decoders for Digital Signal Processors. IEICE Trans. Commun. 102-B(8): 1363-1370 (2019)
• 
  Goudarz Saadati Moghadam, Aliasghar Beheshti Shirazi:
  Novel method for digital beamforming in co-prime sensor arrays using product and min processors. IET Signal Process. 13(6): 614-623 (2019)
• 
  Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann:
  An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS. IEEE J. Solid State Circuits 54(1): 158-172 (2019)
• 
  Yu-Zhe Wang, Yao-Pin Wang, Yi-Chung Wu, Chia-Hsiang Yang:
  A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals. IEEE J. Solid State Circuits 54(10): 2907-2916 (2019)

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