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- IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP)
- International Workshop on Accelerating Data Management Systems Using Modern Processor and Storage Architectures (ADMS)
- International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems (IWIA)
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Publication search results
found 1,836 matches
- 2024
- Eunjin Choi, Jina Park, Kyeongwon Lee, Jae-Jin Lee, Kyuseung Han, Woojoo Lee:
Day-Night architecture: Development of an ultra-low power RISC-V processor for wearable anomaly detection. J. Syst. Archit. 152: 103161 (2024) - Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo:
C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture. IEEE J. Solid State Circuits 59(1): 157-172 (2024) - Shengzhe Yan, Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu:
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. IEEE J. Solid State Circuits 59(8): 2630-2643 (2024) - Arun S. Nair, Geeta Patil, Archit Agarwal, Aboli Vijayan Pai, Biju K. Raveendran, Sasikumar Punnekkat:
CAMP: a hierarchical cache architecture for multi-core mixed criticality processors. Int. J. Parallel Emergent Distributed Syst. 39(3): 317-352 (2024) - Mustafa Dogan, Kasim Öztoprak, Mehmet Resit Tolun:
Teaching computer architecture by designing and simulating processors from their bits and bytes. PeerJ Comput. Sci. 10: e1818 (2024) - Tian Yang, Weilong Wang, Bo Zhao, Lixin Wang, Xiaodong Ding, Chen Liang, Zheng Shan:
A processor architecture design method for improving reusability of special-purpose superconducting quantum processor. Quantum Inf. Process. 23(6): 200 (2024) - Zekun Zhang, Yujie Cai, Tianjiao Liao, Chengyu Xu, Xin Jiao:
TENG: A General-Purpose and Efficient Processor Architecture for Accelerating DNN. AICAS 2024: 149-153 - Kevin Kauth, Christian Lanius, Tobias Gemmeke:
nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models. ARCS 2024: 3-17 - Zehao Li, Yuncheng Lu, Anh Tuan Do, Tony Tae-Hyoung Kim:
A 4.2pJ/Pixel 480 fps Stereo Vision Processor with Pixel Level Pipelined Architecture and Two-Path Aggregation Semi-Global Matching. CICC 2024: 1-2 - Stepan Nassyr, Dirk Pleiter:
Exploring Processor Micro-architectures Optimised for BLAS3 Micro-kernels. Euro-Par (2) 2024: 47-61 - Md Hafizul Islam Chowdhuryy, Hao Zheng, Fan Yao:
MetaLeak: Uncovering Side Channels in Secure Processor Architectures Exploiting Metadata. ISCA 2024: 693-707 - Nikitha Karman, Kevin Wei, Dylan Scott, Natheesan Ratnasegar, Oguzhan Canpolat, Hieu Mai, Michael Ferdman:
Infrastructure for Exploring SIMT Architecture in General-Purpose Processors. ISPASS 2024: 316-318 - 35th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2024, Hong Kong, July 24-26, 2024. IEEE 2024, ISBN 979-8-3503-4963-4 [contents]
- Sourav Roy, Subhadeep Paul, Tapas Kumar Maiti:
VLSI Architectures of Forward Kinematic Processor for Robotics Applications. CoRR abs/2403.04537 (2024) - 2023
- Manuel Eggimann:
Near-Memory Computing Architectures and Circuits for Ultra-Low Power Near-Sensor Processors. ETH Zurich, Zürich, Switzerland, 2023 - Pablo M. Aviles, Jose A. Belloch, Luis Entrena, Almudena Lindoso:
Supervised Triple Macrosynchronized Lockstep (STMLS) Architecture for Multicore Processors. IEEE Access 11: 128706-128723 (2023) - Xiaohong Wen, Guojin Liu, Dejian Li, Yantao Yu, Haisen Zhao, Tiancong Huang:
Federated Scheduling Optimization Scheme for Typed Tasks With Power Constraints in Heterogeneous Multicore Processor Architectures. IEEE Access 11: 85728-85746 (2023) - Dejian Li, Xi Feng, Chongfei Shen, Qi Chen, Lixin Yang, Sihai Qiu, Xin Jin, Meng Liu:
Vector-Based Dedicated Processor Architecture for Efficient Tracking in VSLAM Systems. IEEE Embed. Syst. Lett. 15(4): 182-185 (2023) - Prashant S. Titare, D. G. Khairnar:
MPSoC design and implementation using microblaze soft core processor architecture for faster execution of arithmetic application. Int. J. High Perform. Syst. Archit. 11(3): 156-168 (2023) - Shih-Chang Hsia, Szu-Hong Wang, Ting-Tseng Kuo:
VLSI architecture and implementation of HDR camera signal processor. J. Real Time Image Process. 20(1): 6 (2023) - Sriram Aananthakrishnan, Shamsul Abedin, Vincent Cavé, Fabio Checconi, Kristof Du Bois, Stijn Eyerman, Joshua B. Fryman, Wim Heirman, Jason Howard, Ibrahim Hur, Samkit Jain, Marek M. Landowski, Kevin Ma, Jarrod A. Nelson, Robert Pawlowski, Fabrizio Petrini, Sebastian Szkoda, Sanjaya Tayal, Jesmin Jahan Tithi, Yves Vandriessche:
The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor. IEEE Micro 43(5): 78-87 (2023) - Ionel Zagan, Vasile Gheorghita Gaitan:
Soft-core processor integration based on different instruction set architectures and field programmable gate array custom datapath implementation. PeerJ Comput. Sci. 9: e1300 (2023) - Jihye Lee, Whijin Kim, Ji-Hoon Kim:
A Programmable Crypto-Processor for National Institute of Standards and Technology Post-Quantum Cryptography Standardization Based on the RISC-V Architecture. Sensors 23(23): 9408 (2023) - Xuyang Duan, Yufan Chen, Menghan Li, Yitong Rong, Ruiqi Xie, Jun Han:
UArch: A Super-Resolution Processor With Heterogeneous Triple-Core Architecture for Workloads of U-Net Networks. IEEE Trans. Biomed. Circuits Syst. 17(3): 633-647 (2023) - Hoichang Jeong, Seungbin Kim, Keonhee Park, Jueun Jung, Kyuho Jason Lee:
A Ternary Neural Network Computing-in-Memory Processor With 16T1C Bitcell Architecture. IEEE Trans. Circuits Syst. II Express Briefs 70(5): 1739-1743 (2023) - Ye Liu, Fei Wu, Neng Zhao, Qirong Zhang, Wenqiang Wang, Yutong Yang, Xiangting Li, Sixu Li, Zili Huang, Shuang Hao, Guangbin Ou, Liang Zhou, Liang Chang, Shuisheng Lin, Ningyi Xu, Jun Zhou:
NVP: A Flexible and Efficient Processor Architecture for Accelerating Diverse Computer Vision Tasks including DNN. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 271-275 (2023) - Ramesh Sambangi, Arun Sammit Pandey, Kanchan Manna, Sudipta Mahapatra, Santanu Chattopadhyay:
Application Mapping Onto Manycore Processor Architectures Using Active Search Framework. IEEE Trans. Very Large Scale Integr. Syst. 31(6): 789-801 (2023) - Medien Zeghid, Hassan Yousif Ahmed, Abdellah Chehri, Anissa Sghaier:
Speed/Area-Efficient ECC Processor Implementation Over GF(2m) on FPGA via Novel Algorithm-Architecture Co-Design. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1192-1203 (2023) - Jiwon Choi, Sangyeob Kim, Wonhoon Park, Wooyoung Jo, Hoi-Jun Yoo:
A Resource-Efficient Super-Resolution FPGA Processor with Heterogeneous CNN and SNN Core Architecture. A-SSCC 2023: 1-3 - Masayuki Ito:
Architecture Challenges for Heterogeneous Processors in Embedded SoCs. A-SSCC 2023: 1-2
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