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Publication search results
found 256 matches
- 2021
- Majid Ghasemi-Gol
, Jay Pujara, Pedro A. Szekely:
Learning cell embeddings for understanding table layouts. Knowl. Inf. Syst. 63(1): 39-64 (2021) - Suwan Kim, Kyeongrok Jo, Taewhan Kim:
Boosting Pin Accessibility Through Cell Layout Topology Diversification. ASP-DAC 2021: 183-188 - 2020
- Hanane Khamlichi, Kenza Oufaska, Tarik Zouadi, Rachid Dkiouak:
A Hybrid GRASP Algorithm for an Integrated Production Planning and a Group Layout Design in a Dynamic Cellular Manufacturing System. IEEE Access 8: 162809-162818 (2020) - Kuldeep Lamba
, Ravi Kumar, Shraddha Mishra, Shubhangini Rajput:
Sustainable dynamic cellular facility layout: a solution approach using simulated annealing-based meta-heuristic. Ann. Oper. Res. 290(1): 5-26 (2020) - Kamran Forghani, S. M. T. Fatemi Ghomi
:
Joint cell formation, cell scheduling, and group layout problem in virtual and classical cellular manufacturing systems. Appl. Soft Comput. 97(Part B): 106719 (2020) - Vahid Rahimi, Jamal Arkat
, Hiwa Farughi
:
A vibration damping optimization algorithm for the integrated problem of cell formation, cellular scheduling, and intercellular layout. Comput. Ind. Eng. 143: 106439 (2020) - M. Shunmugasundaram, V. Anbumalar:
Cellular layout formation by using weighted similarity-based modified flow matrix with process sequence data. Int. J. Manuf. Technol. Manag. 34(1): 61-77 (2020) - Kamran Forghani
, S. M. T. Fatemi Ghomi
, Reza Kia:
Solving an integrated cell formation and group layout problem using a simulated annealing enhanced by linear programming. Soft Comput. 24(15): 11621-11639 (2020) - Pascal Van Cleeff
, Stefan Hougardy
, Jannik Silvanus, Tobias Werner:
BonnCell: Automatic Cell Layout in the 7-nm Era. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2872-2885 (2020) - Tzu-Wei Wang, Po-Chang Wu, Mark Po-Hung Lin:
Late Breaking Results: Automatic Adaptive MOM Capacitor Cell Generation for Analog and Mixed-Signal Layout Design. DAC 2020: 1-2 - Yih-Lang Li, Shih-Ting Lin, Shinichi Nishizawa, Hidetoshi Onodera:
MCell: Multi-Row Cell Layout Synthesis with Resource Constrained MAX-SAT Based Detailed Routing. ICCAD 2020: 157:1-157:8 - Tianchen Zhao, Xuefei Ning, Songyi Yang, Shuang Liang, Peng Lei, Jianfei Chen, Huazhong Yang, Yu Wang:
BARS: Joint Search of Cell Topology and Layout for Accurate and Efficient Binary ARchitectures. CoRR abs/2011.10804 (2020) - 2019
- Leila Aissaoui Ferhi, Kaouthar Sethom, Fethi Choubani, Ridha Bouallegue:
Multi-carrier, multi-band, and multi-layer cellular layouts using 3D beamforming for 5G ultradense networks. Ann. des Télécommunications 74(11-12): 663-679 (2019) - Farhad Ghassemi Tari, Khatereh Ahadi:
Cellular layout design using Tabu search, a case study. RAIRO Oper. Res. 53(5): 1475-1488 (2019) - Héctor Gómez
, Ckristian Duran
, Elkim Roa:
Defeating Silicon Reverse Engineering Using a Layout-Level Standard Cell Camouflage. IEEE Trans. Consumer Electron. 65(1): 109-118 (2019) - Naixing Wang, Irith Pomeranz, Sudhakar M. Reddy, Arani Sinha, Srikanth Venkataraman:
Layout Resynthesis by Applying Design-for-manufacturability Guidelines to Avoid Low-coverage Areas of a Cell-based Design. ACM Trans. Design Autom. Electr. Syst. 24(4): 42:1-42:19 (2019) - Aibin Yan
, Zhen Wu, Jing Guo
, Jie Song, Xiaoqing Wen
:
Novel Double-Node-Upset-Tolerant Memory Cell Designs Through Radiation-Hardening-by-Design and Layout. IEEE Trans. Reliab. 68(1): 354-363 (2019) - Kyeongrok Jo
, Seyong Ahn, Jungho Do, Taejoong Song
, Taewhan Kim
, Kyu-Myung Choi:
Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1933-1946 (2019) - Youngsoo Song, Jinwook Jung, Youngsoo Shin:
Standard Cell Layout Design and Placement Optimization for TFET-Based Circuits. ISCAS 2019: 1-5 - Cheng-Wei Tai, Rung-Bin Lin:
Morphed Standard Cell Layouts for Pin Length Reduction. ISVLSI 2019: 94-99 - Tse-Wei Wu, Dong-Zhen Lee, Yu-Hao Huang, Mango C.-T. Chao, Kai-Chiang Wu, Shu-Yi Kao, Ying-Yen Chen, Po-Lin Chen, Mason Chern, Jih-Nung Lee:
Layout-Based Dual-Cell-Aware Tests. VTS 2019: 1-6 - 2018
- Hanxin Feng, Lifeng Xi, Tangbin Xia
, Ershun Pan:
Concurrent cell formation and layout design based on hybrid approaches. Appl. Soft Comput. 66: 346-359 (2018) - Yi-Shan Liu, Li-Na Tang
, Yi-Zhong Ma, Taho Yang
:
TFT-LCD module cell layout design using simulation and fuzzy multiple attribute group decision-making approach. Appl. Soft Comput. 68: 873-888 (2018) - Pablo Ilha Vaz
, Thiago Hanna Both, Fábio Fedrizzi Vidor, Raphael Martins Brum, Gilson I. Wirth
:
Design Flow Methodology for Radiation Hardened by Design CMOS Enclosed-Layout-Transistor-Based Standard-Cell Library. J. Electron. Test. 34(6): 735-747 (2018) - Yann Barsamian
, Sever A. Hirstoaga, Eric Violard:
Efficient data layouts for a three-dimensional electrostatic Particle-in-Cell code. J. Comput. Sci. 27: 345-356 (2018) - Ygor Q. Aguiar
, Frederic Wrobel, J.-L. Autran, P. Leroux, Frédéric Saigné, Antoine D. Touboul, Vincent Pouget:
Analysis of the charge sharing effect in the SET sensitivity of bulk 45 nm standard cell layouts under heavy ions. Microelectron. Reliab. 88-90: 920-924 (2018) - Kyeongrok Jo, Seyong Ahn, Taewhan Kim, Kyu-Myung Choi:
Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion. ASP-DAC 2018: 500-506 - Camilo Mejía-Moncayo
, Alix E. Rojas
, Ivan Mura
:
A Discrete Bacterial Chemotaxis Approach to the Design of Cellular Manufacturing Layouts. ICCSA (1) 2018: 423-437 - Miguel F. Anjos, Philipp Hungerländer, Kerstin Maier
:
An Integer Linear Programming Approach for the Combined Cell Layout Problem. IEEM 2018: 705-709 - Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Yasumasa Tsukamoto, Koji Shibutani, Koji Nii:
Study of impact of BTI's local layout effect including recovery effect on various standard-cells in 10nm FinFET. IRPS 2018: 1
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