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Publication search results
found 102 matches
- 2024
- K. G. Shreeharsha, Siddharth R. K., M. H. Vasantha, Kumar Y. B. Nithin:
An Error Bound Particle Swarm Optimization for Analog Circuit Sizing. IEEE Access 12: 50126-50136 (2024) - 2023
- K. G. Shreeharsha, Siddharth R. K., M. H. Vasantha, Y. B. Nithin Kumar:
Partition Bound Random Number-Based Particle Swarm Optimization for Analog Circuit Sizing. IEEE Access 11: 123577-123588 (2023) - Pratyusa Mukherjee, Chittaranjan Pradhan, Rabindra Kumar Barik, Harishchandra Dubey:
Emerging DNA cryptography-based encryption schemes: a review. Int. J. Inf. Comput. Secur. 20(1/2): 27-47 (2023) - R. D. Balaji, Siddharth R. K., Sanmitra Bharat Naik, Y. B. Nithin Kumar, M. H. Vasantha, Edoardo Bonizzoni:
A 11-ns, 3.85-fJ, Deep Sub-threshold, Energy Efficient Level Shifter in 65-nm CMOS. ISCAS 2023: 1-5 - Darshan Halliyavar, Siddharth R. K., Vasantha M. H., Nithin Kumar Y. B., Sithara Raveendran:
Approximate Three-Operand Binary Adder for Error-Resilient Applications. iSES 2023: 287-291 - Rupesh D. Kadhao, Siddharth R. K., Nithin Kumar Y. B., Vasantha M. H., Devesh Dwivedi:
A 2.5 GHz, 1-Kb SRAM with Auxiliary Circuit Assisted Sense Amplifier in 65-nm CMOS Process. VLSID 2023: 1-6 - 2022
- Mahmoud Al Ahmad, Suchismita Rout, Sudhansu Shekhar Patra, Bibhudatta Sahoo, Harishchandra Dubey, Rabindra Kumar Barik:
AttentiveSDN: EndHost Awareness-Based Power-Optimized Software-Defined Networks. J. Inf. Technol. Res. 15(1): 1-22 (2022) - Sithara Raveendran, Pranose J. Edavoor, Y. B. Nithin Kumar, M. H. Vasantha:
On The Design Of Rationalised Bi-orthogonal Wavelet Using Reversible Logic. ISCAS 2022: 3428-3432 - 2021
- Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Yernad Balachandra, M. H. Vasantha:
Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic. IEEE Access 9: 108119-108130 (2021) - P. S. Veerendranath, Vivek Sharma, M. H. Vasantha, Y. B. Nithin Kumar:
$\pm \, 0.5$ V, 254 $\upmu $W Second-Order Tunable Biquad Low-Pass Filter with 7.3 fJ FOM Using a Novel Low-Voltage Fully Balanced Current-Mode Circuit. Circuits Syst. Signal Process. 40(5): 2114-2134 (2021) - Rojalina Priyadarshini, Rabindra Kumar Barik, Harishchandra Dubey, Brojo Kishore Mishra:
A Survey of Fog Computing-Based Healthcare Big Data Analytics and Its Security. Int. J. Ambient Comput. Intell. 12(2): 53-72 (2021) - Karri Manikantta Reddy, M. H. Vasantha, Nithin Y. B. Kumar, Ch. Keshava Gopal, Devesh Dwivedi:
Quantization aware approximate multiplier and hardware accelerator for edge computing of deep learning applications. Integr. 81: 268-279 (2021) - P. S. Veerendranath, Vivek Sharma, M. H. Vasantha, Y. B. Nithin Kumar:
A Novel Complex Filter Design With Dual Feedback for High Frequency Wireless Receiver Applications. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1748-1752 (2021) - Peta Guruprakashkumar, Siddharth R. K., Nithin Kumar Y. B., Vasantha M. H., Edoardo Bonizzoni:
A 1-V, 5-Bit, 180-µW, Differential Pulse Position Modulation ADC in 65-nm CMOS Process. ISCAS 2021: 1-5 - K. G. Shreeharsha, Charudatta Korde, M. H. Vasantha, Y. B. Nithin Kumar:
Training of Generative Adversarial Networks using Particle Swarm Optimization Algorithm. iSES 2021: 127-130 - Shiv Chandra Kumar, Siddharth R. K., Nithin Kumar Y. B., M. H. Vasantha:
A 1-V, 10-bit, 250 MS/s, Current-Steering Segmented DAC for Video Applications. ISVLSI 2021: 19-24 - Sanmitra Bharat Naik, Siddharth R. K., Anirban Chatterjee, Kumar Y. B. Nithin, M. H. Vasantha, Ramnath Kini:
A 1 V Double-Balanced Mixer for 2.4-2.5 GHz ISM Band Applications. VLSID 2021: 252-257 - 2020
- Sithara Raveendran, Pranose J. Edavoor, Nithin Y. B. Kumar, M. H. Vasantha:
An Approximate Low-Power Lifting Scheme Using Reversible Logic. IEEE Access 8: 183367-183377 (2020) - Siddharth Rajkumar Kala, Sushma Chandaka, Nithin Kumar Yernad Balachandra, Vasantha Moodabettu Harishchandra, Edoardo Bonizzoni:
6.25 GHz, 1 mV input resolution auxiliary circuit assisted comparator in 65 nm CMOS process. IET Circuits Devices Syst. 14(3): 340-346 (2020) - Vivek Sharma, Nithin Kumar Y. B., Vasantha M. H.:
IET Circuits, Devices & Systems. IET Circuits Devices Syst. 14(6): 881-891 (2020) - Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Yernad Balachandra, Vasantha Moodabettu Harishchandra:
Design and implementation of image kernels using reversible logic gates. IET Image Process. 14(16): 4110-4121 (2020) - Rojalina Priyadarshini, Rabindra Kumar Barik, Harishchandra Dubey:
Fog-SDN: A light mitigation scheme for DDoS attack in fog computing framework. Int. J. Commun. Syst. 33(9) (2020) - Sujit Bebortta, Saneev Kumar Das, Meenakshi Kandpal, Rabindra Kumar Barik, Harishchandra Dubey:
Geospatial Serverless Computing: Architectures, Tools and Future Directions. ISPRS Int. J. Geo Inf. 9(5): 311 (2020) - Mahendra Pratap Yadav, Gaurav Raj, Harishchandra A. Akarte, Dharmendra Kumar Yadav:
Horizontal Scaling for Containerized Application Using Hybrid Approach. Ingénierie des Systèmes d Inf. 25(6): 709-718 (2020) - Roopa B. Hegde, Keerthana Prasad, Harishchandra Hebbar, Brij Mohan Kumar Singh, Ilanthodi Sandhya:
Automated Decision Support System for Detection of Leukemia from Peripheral Blood Smear Images. J. Digit. Imaging 33(2): 361-374 (2020) - Bipul Boro, Karri Manikantta Reddy, Nithin Y. B. Kumar, M. H. Vasantha:
Approximate radix-8 Booth multiplier for low power and high speed applications. Microelectron. J. 101: 104816 (2020) - Siddharth R. K., Nithin Y. B. Kumar, M. H. Vasantha:
Power Saving Scheme for Process Corner Calibrated Standard Cell Based Flash ADC in Wireless Surveillance Applications. SN Comput. Sci. 1(6): 310 (2020) - Siddharth R. K., Y. Jaya Satyanarayana, Nithin Y. B. Kumar, M. H. Vasantha, Edoardo Bonizzoni:
A 1-V, 3-GHz Strong-Arm Latch Voltage Comparator for High Speed Applications. IEEE Trans. Circuits Syst. 67-II(12): 2918-2922 (2020) - Karri Manikantta Reddy, M. H. Vasantha, Nithin Y. B. Kumar, Devesh Dwivedi:
Design of Approximate Booth Squarer for Error-Tolerant Computing. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1230-1241 (2020) - Sudhansu R. Lenka, Meenakshi Pant, Rabindra K. Barik, Sudhansu Shekhar Patra, Harishchandra Dubey:
Investigation into the Efficacy of Various Machine Learning Techniques for Mitigation in Credit Card Fraud Detection. FICTA (1) 2020: 255-264
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