- Jan-Willem Roorda, Koen Claessen:
A New SAT-Based Algorithm for Symbolic Trajectory Evaluation. CHARME 2005: 238-253 - Mona Safar, M. Watheq El-Kharashi, Ashraf Salem
:
FPGA Based Accelerator for 3-SAT Conflict Analysis in SAT Solvers. CHARME 2005: 384-387 - Debashis Sahoo, Jawahar Jain, Subramanian K. Iyer, David L. Dill, E. Allen Emerson:
Predictive Reachability Using a Sample-Based Approach. CHARME 2005: 388-392 - ShengYu Shen, Ying Qin, Sikun Li:
Minimizing Counterexample of ACTL Property. CHARME 2005: 393-397 - Stefan Staber, Barbara Jobstmann, Roderick Bloem:
Finding and Fixing Faults. CHARME 2005: 35-49 - Alex Tsow, Steven D. Johnson:
Data Refinement for Synchronous System Specification and Construction. CHARME 2005: 398-401 - Miroslav N. Velev:
Automatic Formal Verification of Liveness for Pipelined Processors with Multicycle Functional Units. CHARME 2005: 97-113 - David Ward, Fabio Somenzi:
Automatic Generation of Hints for Symbolic Traversal. CHARME 2005: 207-221 - Ou Wei, Arie Gurfinkel, Marsha Chechik:
Identification and Counter Abstraction for Full Virtual Symmetry. CHARME 2005: 285-300 - William D. Young:
Introducing Abstractions via Rewriting. CHARME 2005: 402-405 - Emmanuel Zarpas:
A Case Study: Formal Verification of Processor Critical Properties. CHARME 2005: 406-409 - Liang Zhang, Mukul R. Prasad, Michael S. Hsiao:
Interleaved Invariant Checking with Dynamic Abstraction. CHARME 2005: 81-96 - Dominique Borrione, Wolfgang J. Paul:
Correct Hardware Design and Verification Methods, 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings. Lecture Notes in Computer Science 3725, Springer 2005, ISBN 3-540-29105-9 [contents]
