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@inproceedings{DBLP:conf/vlsit/0005M23,
  author       = {Yi Luo and
                  Shahriar Mirabbasi},
  title        = {A 60fps9.9nJ/frame{\(\cdot\)}pixel {CMOS} Image Sensor with On-Chip
                  Pixel-wise Conversion Gain Modulation for Per-frame Adaptive {DCG-HDR}
                  Imaging},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185405},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185405},
  timestamp    = {Fri, 28 Jul 2023 10:40:41 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/0005M23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AaditMC23,
  author       = {Navid Anjum Aadit and
                  Masoud Mohseni and
                  Kerem Yunus Camsari},
  title        = {Accelerating Adaptive Parallel Tempering with FPGA-based p-bits},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185207},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185207},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/AaditMC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AgrawalKKRJMHZH23,
  author       = {Ankur Agrawal and
                  Monodeep Kar and
                  Kyu{-}Hyoun Kim and
                  Sergey V. Rylov and
                  Jinwook Jung and
                  Seiji Munetoh and
                  Kohji Hosokawa and
                  Xin Zhang and
                  Bahman Hekmatshoartabari and
                  Fabio Carta and
                  Martin Cochet and
                  Robert Casatuta and
                  Mingu Kang and
                  Sunil Shukla and
                  Kailash Gopalakrishnan and
                  Leland Chang},
  title        = {A Switched-Capacitor Integer Compute Unit with Decoupled Storage and
                  Arithmetic for Cloud {AI} Inference in 5nm {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185275},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185275},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/AgrawalKKRJMHZH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AhnLEJL23,
  author       = {Jisan Ahn and
                  Hyun{-}Su Lee and
                  Kyeongho Eom and
                  Woojoong Jung and
                  Hyung{-}Min Lee},
  title        = {A 93.5{\%}-Efficiency 13.56-MHz-Bandwidth Optimal On/Off Tracking
                  Active Rectifier with Fully Digital Feedback-Based Delay Control for
                  Adaptive Efficiency Compensation},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185395},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185395},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/AhnLEJL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AibaHTTKFMMS23,
  author       = {Yuta Aiba and
                  Yusuke Higashi and
                  Hitomi Tanaka and
                  Hiroki Tanaka and
                  Fumie Kikushima and
                  Toshio Fujisawa and
                  Hideko Mukaida and
                  Masayuki Miura and
                  Tomoya Sanuki},
  title        = {Demonstration of Recovery Annealing on 7-Bits per Cell 3D Flash Memory
                  at Cryogenic Operation for Bit Cost Scalability and Sustainability},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185349},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185349},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/AibaHTTKFMMS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AleaSGATLG23,
  author       = {Mark Daniel Alea and
                  Ali Safa and
                  Flavio Giacomozzi and
                  Andrea Adami and
                  Inci R{\"{u}}ya Temel and
                  Leandro Lorenzelli and
                  Georges G. E. Gielen},
  title        = {A Fingertip-Mimicking 12{\texttimes}16 200{\(\mu\)}m-Resolution e-skin
                  Taxel Readout Chip with per-Taxel Spiking Readout and Embedded Receptive
                  Field Processing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185346},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185346},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/AleaSGATLG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AoyagiYTIONNWHC23,
  author       = {Yumito Aoyagi and
                  Makoto Yabuuchi and
                  Tomotaka Tanaka and
                  Yuichiro Ishii and
                  Yoshiaki Osada and
                  Takaaki Nakazato and
                  Koji Nii and
                  Isabel Wang and
                  Yu{-}Hao Hsu and
                  Hong{-}Chen Cheng and
                  Hung{-}Jen Liao and
                  Tsung{-}Yung Jonathan Chang},
  title        = {A 3-nm 27.6-Mbit/mm2 Self-timed {SRAM} Enabling 0.48 - 1.2 {V} Wide
                  Operating Range with Far-end Pre-charge and Weak-Bit Tracking},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185429},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185429},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/AoyagiYTIONNWHC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ArimuraBFOVCCKS23,
  author       = {Hiroaki Arimura and
                  S. Brus and
                  Jacopo Franco and
                  Y. Oniki and
                  A. Vandooren and
                  T. Conard and
                  B. T. Chan and
                  B. Kannan and
                  M. Samiee and
                  W. Li and
                  P. Deminskyi and
                  E. Shero and
                  J. Bakke and
                  N. Jourdan and
                  G. Alessio Verni and
                  J. W. Maes and
                  M. Givens and
                  Lars{-}{\AA}ke Ragnarsson and
                  J{\'{e}}r{\^{o}}me Mitard and
                  E. Dentoni Litta and
                  N. Horiguchi},
  title        = {Molybdenum Nitride as a Scalable and Thermally Stable pWFM for {CFET}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185430},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185430},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ArimuraBFOVCCKS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AtzeniLRAJ23,
  author       = {Gabriele Atzeni and
                  Can Livanelioglu and
                  Lavinia Recchioni and
                  Sina Arjmandpour and
                  Taekwang Jang},
  title        = {An Energy-Efficient Impedance-Boosted Discrete-Time Amplifier Achieving
                  0.34 Noise Efficiency Factor and 389 M{\(\Omega\)} Input Impedance},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185212},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185212},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/AtzeniLRAJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AugustineMLVBMT23,
  author       = {Charles Augustine and
                  Pascal Meinerzhagen and
                  Wootaek Lim and
                  A. Veerabathini and
                  M. Bright and
                  K. Mojjada and
                  Jim Tschanz and
                  Muhammad M. Khellah and
                  Vivek De},
  title        = {A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop
                  Monitor Using Coupled Ring Oscillators in Intel 4 {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185254},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185254},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/AugustineMLVBMT23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BanLKH23,
  author       = {Sanghyun Ban and
                  Jangseop Lee and
                  Taehoon Kim and
                  Hyunsang Hwang},
  title        = {Simple Binary In-Te {OTS} with Sub-nm HfO{\unicode{8339}} Buffer Layer
                  for 3D Vertical X-point Memory Applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185213},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185213},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/BanLKH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BangKCKPLLJKJHK23,
  author       = {Jun{-}Suk Bang and
                  Dongsu Kim and
                  Young{-}Hwan Choo and
                  Ik{-}Hwan Kim and
                  Seungchan Park and
                  Jeongkwang Lee and
                  Sang{-}Han Lee and
                  Young{-}Ho Jung and
                  Jae{-}Young Ko and
                  Sung{-}Youb Jung and
                  Jae{-}Yeol Han and
                  Woosik Kim and
                  Ji{-}Seon Paek and
                  Jongwoo Lee},
  title        = {5G {NR} {RF} {PA} Supply Modulator Supporting 179ns 0.5-to-5.5V Symbol
                  Power Tracking and Envelope Tracking},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185384},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185384},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/BangKCKPLLJKJHK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BasuFAA23,
  author       = {Joydeep Basu and
                  Luigi Fassio and
                  Karim Ali and
                  Massimo Alioto},
  title        = {Super-Cutoff Analog Building Blocks for pW/Stage Operation and Demonstration
                  of 78-pW Battery-Less Light-Harvested Wake-Up Receiver down to Moonlight},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185438},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185438},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/BasuFAA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BasuTRWA23,
  author       = {Joydeep Basu and
                  Sachin Taneja and
                  Viveka Konandur Rajanna and
                  Tianqi Wang and
                  Massimo Alioto},
  title        = {ECC-Less Multi-Level {SRAM} Physically Unclonable Function and 127{\%}
                  PUF-to-Memory Capacity Ratio with No Bitcell Modification in 28nm},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185261},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185261},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/BasuTRWA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BelmonteKSCRDPS23,
  author       = {Attilio Belmonte and
                  S. Kundu and
                  S. Subhechha and
                  Adrian Vaisman Chasin and
                  Nouredine Rassoul and
                  Harold Dekkers and
                  H. Puliyalil and
                  F. Seidel and
                  P. Carolan and
                  Romain Delhougne and
                  Gouri Sankar Kar},
  title        = {Lowest {IOFF} {\textless} 3{\texttimes}10\({}^{\mbox{-21}}\) A/{\(\mu\)}m
                  in capacitorless {DRAM} achieved by Reactive Ion Etch of {IGZO-TFT}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185398},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185398},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/BelmonteKSCRDPS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BersanoACGPOSBP23,
  author       = {Fabio Bersano and
                  Michele Aldeghi and
                  Eloi Collette and
                  Michele Ghini and
                  Franco De Palma and
                  Fabian Oppliger and
                  Pasquale Scarlino and
                  Floris Braakman and
                  Martino Poggio and
                  Heike Riel and
                  Gian Salis and
                  Rolf Allenspach and
                  Adrian M. Ionescu},
  title        = {Quantum Dots Array on Ultra-Thin {SOI} Nanowires with Ferromagnetic
                  Cobalt Barrier Gates for Enhanced Spin Qubit Control},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185278},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185278},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/BersanoACGPOSBP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BeyneJB23,
  author       = {Eric Beyne and
                  Anne Jourdain and
                  Gerald Beyer},
  title        = {Nano-Through Silicon Vias (nTSV) for Backside Power Delivery Networks
                  {(BSPDN)}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185227},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185227},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/BeyneJB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BhattacharyaR23,
  author       = {Surya Bhattacharya and
                  Vempati Srinivasa Rao},
  title        = {Multi-Chiplet Heterogeneous Integration Packaging for Semiconductor
                  System Scaling},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185396},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185396},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/BhattacharyaR23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BreilLAJVNBPLGG23,
  author       = {N. Breil and
                  B.{-}C. Lee and
                  J. Avila Avendano and
                  J. Jewell and
                  M. Vellaikal and
                  E. Newman and
                  E. M. Bazizi and
                  A. Pal and
                  L. Liu and
                  Oleg Gluschenkov and
                  A. Greene and
                  S. Mochizuki and
                  Nicolas Loubet and
                  B. Colombeau and
                  B. Haran},
  title        = {Contact Cavity Shaping and Selective SiGe: {B} Low-Temperature Epitaxy
                  Process Solution for sub 10\({}^{\mbox{-9}}\) {\(\Omega\)}.cm\({}^{\mbox{2}}\)
                  Contact Resistivity in Nonplanar FETs},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185379},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185379},
  timestamp    = {Fri, 08 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/BreilLAJVNBPLGG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BurrNAOTHMNYDBC23,
  author       = {Geoffrey W. Burr and
                  Pritish Narayanan and
                  Stefano Ambrogio and
                  Atsuya Okazaki and
                  Hsinyu Tsai and
                  Kohji Hosokawa and
                  Charles Mackin and
                  Akiyo Nomura and
                  Takeo Yasuda and
                  J. Demarest and
                  Kevin Brew and
                  Victor Chan and
                  Samuel Choi and
                  T. Gordon and
                  T. M. Levin and
                  Alexander M. Friz and
                  Masatoshi Ishii and
                  Yasuteru Kohda and
                  An Chen and
                  Andrea Fasoli and
                  Jose Luquin and
                  Nicole Saulnier and
                  S. Teehan and
                  Ishtiaq Ahsan and
                  Vijay Narayanan},
  title        = {Phase Change Memory-based Hardware Accelerators for Deep Neural Networks
                  (invited)},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185411},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185411},
  timestamp    = {Fri, 01 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/BurrNAOTHMNYDBC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/CaiTTT23,
  author       = {Zuocheng Cai and
                  Kasidit Toprasertpong and
                  Mitsuru Takenaka and
                  Shinichi Takagi},
  title        = {{HZO} Scaling and Fatigue Recovery in FeFET with Low Voltage Operation:
                  Evidence of Transition from Interface Degradation to Ferroelectric
                  Fatigue},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185295},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185295},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/CaiTTT23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChangCCLWLCLWLN23,
  author       = {Jonathan Chang and
                  Yen{-}Huei Chen and
                  Gary Chan and
                  Kuo{-}Cheng Lin and
                  Po{-}Sheng Wang and
                  Yangsyu Lin and
                  Sevic Chen and
                  Peijiun Lin and
                  Ching{-}Wei Wu and
                  Chih{-}Yu Lin and
                  Yi{-}Hsin Nien and
                  Hidehiro Fujiwara and
                  Atul Katoch and
                  Robin Lee and
                  Hung{-}Jen Liao and
                  Jhon{-}Jhy Liaw and
                  Shien{-}Yang Michael Wu and
                  Quincy Li},
  title        = {A 3nm 256Mb {SRAM} in FinFET Technology with New Array Banking Architecture
                  and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185287},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185287},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChangCCLWLCLWLN23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChangSYFZOKKYAS23,
  author       = {Po{-}Hsuan Chang and
                  Anirban Samanta and
                  Peng Yan and
                  Mingye Fu and
                  Yu Zhang and
                  Mehmet Berkay On and
                  Ankur Kumar and
                  Hyungryul Kang and
                  Il{-}Min Yi and
                  Dedeepya Annabattuni and
                  David Scott and
                  Robert Patti and
                  Yang{-}Hang Fan and
                  Yuanming Zhu and
                  S. J. Ben Yoo and
                  Samuel Palermo},
  title        = {A Sub-500fJ/bit 3D Direct Bond Silicon Photonic Transceiver in 12nm
                  FinFET},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185246},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185246},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChangSYFZOKKYAS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChangXDJLCLLKJG23,
  author       = {En{-}Jui Chang and
                  Cheng{-}Xin Xue and
                  Chetan Deshpande and
                  Gajanan Jedhe and
                  Jenwei Liang and
                  Chih{-}Chung Cheng and
                  Hung{-}Wei Lin and
                  Chia{-}Da Lee and
                  Sushil Kumar and
                  Kim Soon Jway and
                  Zijie Guo and
                  Ritesh Garg and
                  Allen{-}Cl Lu and
                  Chien{-}Hung Lin and
                  Meng{-}Han Hsieh and
                  Tsung{-}Yao Lin and
                  Chih{-}Cheng Chen},
  title        = {A 12-nm 0.62-1.61 mW Ultra-Low Power Digital CIM-based Deep-Learning
                  System for End-to-End Always-on Vision},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185296},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185296},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChangXDJLCLLKJG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenCVSHG23,
  author       = {Wen{-}Chieh Chen and
                  S.{-}H. Chen and
                  Anabela Veloso and
                  Kateryna Serbulova and
                  Geert Hellings and
                  Guido Groeseneken},
  title        = {Upcoming Challenges of {ESD} Reliability in {DTCO} with {BS-PDN} Routing
                  via BPRs},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185389},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185389},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChenCVSHG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenFSZMDG23,
  author       = {Xi Chen and
                  Jiaxiang Feng and
                  Aly Shoukry and
                  Xin Zhang and
                  Raveesh Magod and
                  Nachiket V. Desai and
                  Jie Gu},
  title        = {Proactive Power Regulation with Real-time Prediction and Fast Response
                  Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital
                  SoCs},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185397},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185397},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChenFSZMDG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenLBCCGHTMTNA23,
  author       = {Song Chen and
                  Chiao Liu and
                  Lyle Bainbridge and
                  Qing Chao and
                  Ramakrishna Chilukuri and
                  Wei Gao and
                  Andrew P. Hammond and
                  Tsung{-}Hsun Tsai and
                  Ken Miyauchi and
                  Isao Takayanagi and
                  Masato Nagamatsu and
                  Hirofumi Abe and
                  Kazuya Mori and
                  Masayuki Uno and
                  Toshiyuki Isozaki and
                  Rimon Ikeno and
                  Hsin{-}Li Chen and
                  Chih{-}Hao Lin and
                  Wen{-}Chien Fu and
                  Shou{-}Gwo Wuu},
  title        = {A 3.96{\(\mu\)}m, 124dB Dynamic Range, 6.2mW Stacked Digital Pixel
                  Sensor with Monochrome and Near-Infrared Dual-Channel Global Shutter
                  Capture},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185291},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185291},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChenLBCCGHTMTNA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenLF23,
  author       = {Hsiang{-}Wen Chen and
                  Seungjong Lee and
                  Michael P. Flynn},
  title        = {A 0.024mm{\({^2}\)} 84.2dB-SNDR 1MHz-BW 3\({}^{\mbox{rd}}\)-Order
                  VCO-Based {CTDSM} with {NS-SAR} Quantizer {(NSQ} {VCO} {CTDSM)}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185345},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185345},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChenLF23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenLZHLTHWCXCC23,
  author       = {Yu{-}Rui Chen and
                  Yi{-}Chun Liu and
                  Zefu Zhao and
                  Wan{-}Hsuan Hsieh and
                  Jia{-}Yang Lee and
                  Chien{-}Te Tu and
                  Bo{-}Wei Huang and
                  Jer{-}Fu Wang and
                  Shee{-}Jier Chueh and
                  Yifan Xing and
                  Guan{-}Hua Chen and
                  Hung{-}Chun Chou and
                  Dong Soo Woo and
                  Min{-}Hung Lee and
                  Chee Wee Liu},
  title        = {First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record
                  Low Write Voltage of 2V and Endurance {\textgreater}1E11 Cycles},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185284},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185284},
  timestamp    = {Sat, 20 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChenLZHLTHWCXCC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChiangHWHWHHCLC23,
  author       = {H.{-}L. Chiang and
                  R. A. Hadi and
                  J.{-}F. Wang and
                  H.{-}C. Han and
                  J.{-}J. Wu and
                  H.{-}H. Hsieh and
                  J.{-}J. Horng and
                  W.{-}S. Chou and
                  B.{-}S. Lien and
                  C.{-}H. Chang and
                  Y.{-}C. Chen and
                  Yeong{-}Her Wang and
                  T.{-}C. Chen and
                  J.{-}C. Liu and
                  Y.{-}C. Liu and
                  Meng{-}Hsueh Chiang and
                  K.{-}H. Kao and
                  B. Pulicherla and
                  J. Cai and
                  C.{-}S. Chang and
                  K.{-}W. Su and
                  K.{-}L. Cheng and
                  T.{-}J. Yeh and
                  Y.{-}C. Peng and
                  C. Enz and
                  Mau{-}Chung Frank Chang and
                  M.{-}F. Chang and
                  H.{-}S. Philip Wong and
                  Iuliana P. Radu},
  title        = {How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185325},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185325},
  timestamp    = {Wed, 29 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChiangHWHWHHCLC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChiuSLCFL23,
  author       = {Jih{-}Chao Chiu and
                  Eknath Sarkar and
                  Yuan{-}Ming Liu and
                  Yu{-}Ciao Chen and
                  Yu{-}Cheng Fan and
                  C. W. Liu},
  title        = {First Demonstration of a-IGZO {GAA} Nanosheet FETs Featuring Achievable
                  SS=61mV/dec, Ioff{\textless}10\({}^{\mbox{-7}}\) {\(\mu\)}A/{\(\mu\)}m,
                  {DIBL} =44mV/V, Positive VT, and Process Temp. of 300 {\textdegree}C},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185385},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185385},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChiuSLCFL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChoLPYC23,
  author       = {Yoonseo Cho and
                  Jeonghyun Lee and
                  Suneui Park and
                  Seyeon Yoo and
                  Jaehyouk Choi},
  title        = {A 122fsrms-Jitter and -60dBc-Reference-Spur 12.24GHz {MDLL} with a
                  102 - Multiplication Factor Using a Power-Gating Technique},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185338},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185338},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChoLPYC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChoeL23,
  author       = {Jeongwon Choe and
                  Youngjoo Lee},
  title        = {A 2.35 Gb/s/mm\({}^{\mbox{2}}\) (7440, 6696) {NB-LDPC} Decoder over
                  {GF(32)} using Memory-Reduced Column-Wise Trellis Min-Max Algorithm
                  in 28nm {CMOS} Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185244},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185244},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChoeL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChoiCKWSLLIDAAC23,
  author       = {Woojun Choi and
                  Yiyang Chen and
                  Donghwan Kim and
                  Sean Weaver and
                  Tilman Schlotter and
                  Can Livanelioglu and
                  Jiawei Liao and
                  Rosario M. Incandela and
                  Parham Davami and
                  Gabriele Atzeni and
                  Sina Arjmandpour and
                  SeongHwan Cho and
                  Taekwang Jang},
  title        = {A 1, 024-Channel, 64-Interconnect, Capacitive Neural Interface Using
                  a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division
                  Multiplexing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185425},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185425},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChoiCKWSLLIDAAC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChoiCS23,
  author       = {Kyu{-}Jin Choi and
                  Seungnam Choi and
                  Jae{-}Yoon Sim},
  title        = {A 110dB-TCMRR TDM-based 8-Channel Noncontact {ECG} Recording {IC}
                  with Suppression of Motion-Induced Coupling in {PP}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185276},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185276},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChoiCS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChujoSSRNO23,
  author       = {Norio Chujo and
                  Koji Sakui and
                  Shinji Sugatani and
                  Hiroyuki Ryoson and
                  Tomoji Nakamura and
                  Takayuki Ohba},
  title        = {Bumpless Build Cube (BBCube) 3D: Heterogeneous 3D Integration Using
                  WoW and CoW to Provide TB/s Bandwidth with Lowest Bit Access Energy},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185277},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185277},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ChujoSSRNO23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DaeleT23,
  author       = {Tuur Van Daele and
                  Filip Tavernier},
  title        = {A Fully Integrated 230 VRMS-to-12 {VDC} {AC-DC} Converter Achieving
                  9 mW/mm\({}^{\mbox{2}}\)},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185434},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185434},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/DaeleT23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DingYLGWJLCWWGX23,
  author       = {Yaxin Ding and
                  Jianguo Yang and
                  Yu Liu and
                  Jianfeng Gao and
                  Yuan Wang and
                  Pengfei Jiang and
                  Shuxian Lv and
                  Yuting Chen and
                  Boping Wang and
                  Wei Wei and
                  Tiancheng Gong and
                  Kanhao Xue and
                  Qing Luo and
                  Xiangshui Miao and
                  Ming Liu},
  title        = {16-layer 3D Vertical {RRAM} with Low Read Latency (18ns), High Nonlinearity
                  ({\textgreater}5000) and Ultra-low Leakage Current ({\textasciitilde}pA)
                  Self-Selective Cells},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185341},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185341},
  timestamp    = {Fri, 12 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/DingYLGWJLCWWGX23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DongSYLXLCWWZWR23,
  author       = {Zuoyuan Dong and
                  Zixuan Sun and
                  Xin Yang and
                  Xiaomei Li and
                  Yongkang Xue and
                  Chen Luo and
                  Puyang Cai and
                  Zirui Wang and
                  Shuying Wang and
                  Yewei Zhang and
                  Chaolun Wang and
                  Pengpeng Ren and
                  Zhigang Ji and
                  Xing Wu and
                  Runsheng Wang and
                  Ru Huang},
  title        = {Catching the Missing {EM} Consequence in Soft Breakdown Reliability
                  in Advanced FinFETs: Impacts of Self-heating, On-State TDDB, and Layout
                  Dependence},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185380},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185380},
  timestamp    = {Fri, 22 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/DongSYLXLCWWZWR23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DoshoMMI23,
  author       = {Shiro Dosho and
                  Ludovico Minati and
                  Kazuki Maari and
                  Hiroyuki Ito},
  title        = {A Compact 0.9uW Direct-Conversion Frequency Analyzer for Speech Recognition
                  with Wide-Range Q-Controlable Bandpass Rectifier},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185164},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185164},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/DoshoMMI23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DuTLX0QW23,
  author       = {Yiwei Du and
                  Jianshi Tang and
                  Yijun Li and
                  Yue Xi and
                  Bin Gao and
                  He Qian and
                  Huaqiang Wu},
  title        = {Monolithic 3D Integration of FeFET, Hybrid {CMOS} Logic and Analog
                  {RRAM} Array for Energy-Efficient Reconfigurable Computing-In-Memory
                  Architecture},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185221},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185221},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/DuTLX0QW23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/EdlerRLG23,
  author       = {Julius Edler and
                  Marcel Runge and
                  Sebastian Linnhoff and
                  Friedel Gerfers},
  title        = {A 4.4 GS/s 220 MHz {\(\Sigma\)}{\(\Delta\)} {ADC} with a Linearized
                  Back-Gate Controlled GmC Filter},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185281},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185281},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/EdlerRLG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ElsayedGSSKMCJH23,
  author       = {A. Elsayed and
                  Clement Godfrin and
                  Nard I. Dumoulin Stuyck and
                  M. M. K. Shehata and
                  Stefan Kubicek and
                  S. Massar and
                  Yann Canvel and
                  Julien Jussot and
                  Andriy Hikavyy and
                  Roger Loo and
                  George Simion and
                  Massimo Mongillo and
                  D. Wan and
                  Bogdan Govoreanu and
                  R. Li and
                  Iuliana P. Radu and
                  P. Van Dorpe and
                  Kristiaan De Greve},
  title        = {Comprehensive 300 mm process for Silicon spin qubits with modular
                  integration},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185272},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185272},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ElsayedGSSKMCJH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FangLZWA23,
  author       = {Qiang Fang and
                  Longyang Lin and
                  Hui Zhang and
                  Tianqi Wang and
                  Massimo Alioto},
  title        = {Voltage Scaling-Agnostic Counteraction of Side-Channel Neural Net
                  Reverse Engineering via Machine Learning Compensation and Multi-Level
                  Shuffling},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185228},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185228},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/FangLZWA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FassioAA23,
  author       = {Luigi Fassio and
                  Orazio Aiello and
                  Massimo Alioto},
  title        = {38.4-pW, 0.14-mm\({}^{\mbox{2}}\) Body-Driven Temperature-to-Digital
                  Converter and Voltage Reference with 0.6-1.6-V Unregulated Supply
                  for Battery-Less Systems},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185359},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185359},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/FassioAA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ForghaniZKR23,
  author       = {Mahdi Forghani and
                  Yu Zhao and
                  Pawan K. Khanna and
                  Behzad Razavi},
  title        = {A 112-Gb/s 58-mW {PAM4} Transmitter in 28-nm {CMOS} Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185362},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185362},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ForghaniZKR23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FrancoAMBRLCKH23,
  author       = {Jacopo Franco and
                  Hiroaki Arimura and
                  J.{-}F. de Marneffe and
                  S. Brus and
                  Romain Ritzenthaler and
                  E. Dentoni Litta and
                  Kris Croes and
                  Ben Kaczer and
                  N. Horiguchi},
  title        = {Novel Low Thermal Budget {CMOS} {RMG:} Performance and Reliability
                  Benchmark Against Conventional High Thermal Budget Gate Stack Solutions},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185317},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185317},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/FrancoAMBRLCKH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FujisakiTSKNOEI23,
  author       = {Yutaro Fujisaki and
                  Hidenobu Tsugawa and
                  K. Sakai and
                  H. Kumagai and
                  R. Nakamura and
                  Tomoharu Ogita and
                  S. Endo and
                  T. Iwase and
                  H. Takase and
                  K. Yokochi and
                  S. Yoshida and
                  S. Shimada and
                  Y. Otake and
                  T. Wakano and
                  H. Hiyama and
                  K. Hagiwara and
                  M. Arakawal and
                  S. Matsumotol and
                  H. Maeda and
                  K. Sugihara and
                  K. Takabayashi and
                  M. Ono and
                  K. Ishibashi and
                  K. Yamamoto},
  title        = {A back-illuminated 6 {\(\mu\)}m {SPAD} depth sensor with {PDE} 36.5{\%}
                  at 940 nm via combination of dual diffraction structure and 2{\texttimes}2
                  on-chip lens},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185251},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185251},
  timestamp    = {Tue, 15 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/FujisakiTSKNOEI23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FukazawaM23,
  author       = {Mitsuya Fukazawa and
                  Tetsuo Matsui},
  title        = {A 24-OSR to Simplify Anti-Aliasing Filter 2MHz-BW 83dB-DR 3rd-order
                  {DT-DSM} using FIA-Based Integrator and Noise-Shaping {SAR} Combined
                  Digital Noise-Coupling Quantizer},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185310},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185310},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/FukazawaM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GhoshSBSKVKBGSK23,
  author       = {Souvik Ghosh and
                  Quentin Smets and
                  S. Banerjee and
                  Tom Schram and
                  K. Kennes and
                  R. Verheyen and
                  P. Kumar and
                  M.{-}E. Boulon and
                  Benjamin Groven and
                  H. M. Silva and
                  S. Kundu and
                  Daire Cott and
                  Dennis Lin and
                  P. Favia and
                  T. Nuytten and
                  A. Phommahaxay and
                  Inge Asselberghs and
                  C. De La Rosa and
                  Gouri Sankar Kar and
                  Steven Brems},
  title        = {Integration of epitaxial monolayer MX{\unicode{8322}} channels on
                  300mm wafers via Collective-Die-To-Wafer (CoD2W) transfer},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185215},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185215},
  timestamp    = {Tue, 16 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/GhoshSBSKVKBGSK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GongXWJYNHWYGLL23,
  author       = {Tiancheng Gong and
                  Lihua Xu and
                  Wei Wei and
                  Pengfei Jiang and
                  Peng Yuan and
                  Bowen Nie and
                  Yuanquan Huang and
                  Yuan Wang and
                  Yang Yang and
                  Jianfeng Gao and
                  Junfeng Li and
                  Jun Luo and
                  Lingfei Wang and
                  Jianguo Yang and
                  Qing Luo and
                  Ling Li and
                  Steve S. Chung and
                  Ming Liu},
  title        = {First Demonstration of a Design Methodology for Highly Reliable Operation
                  at High Temperature on 128kb 1T1C FeRAM Chip},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185402},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185402},
  timestamp    = {Fri, 12 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/GongXWJYNHWYGLL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GrossierDVBMMMS23,
  author       = {N. Grossier and
                  Fabio Disegni and
                  A. Ventre and
                  A. Barcella and
                  R. Mariani and
                  V. Marino and
                  S. Mazzara and
                  A. Scavuzzo and
                  M. Bansal and
                  B. Soni and
                  A. Anand and
                  S. Banzal and
                  D. Joshi and
                  R. Narwal and
                  M. Niranjani and
                  K. Trivedi and
                  P. Ferreira and
                  Rossella Ranica and
                  L. Vullo and
                  Andreia Cathelin and
                  Alfonso Maurelli and
                  S. Pezzini and
                  M. Peri},
  title        = {{ASIL-D} automotive-grade microcontroller in 28nm {FD-SOI} with full-OTA
                  capable 21MB embedded {PCM} memory and highly scalable power management},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185252},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185252},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/GrossierDVBMMMS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GuoCNVBJVP23,
  author       = {P. Guo and
                  Zu{-}Yao Chang and
                  Emile Noothout and
                  Hendrik J. Vos and
                  Johannes G. Bosch and
                  Nico de Jong and
                  Martin D. Verweij and
                  Michiel A. P. Pertijs},
  title        = {A Pitch-Matched Transceiver {ASIC} for 3D Ultrasonography with Micro-Beamforming
                  ADCs based on Passive Boxcar Integration and a Multi-Level Datalink},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185159},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185159},
  timestamp    = {Mon, 04 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/GuoCNVBJVP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GuptaKRTA23,
  author       = {Animesh Gupta and
                  Sayan Kumar and
                  Viveka Konandur Rajanna and
                  Sachin Taneja and
                  Massimo Alioto},
  title        = {Visual Content-Agnostic Novelty Detection Engine with 2.4 pJ/pixel
                  Energy and Two-Order of Magnitude {DNN} Activity Reduction in 40 nm},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185225},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185225},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/GuptaKRTA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HaYW23,
  author       = {Dongwan Ha and
                  Ruida Yun and
                  Kevin R. Wrenner},
  title        = {A 0.22mm\({}^{\mbox{2}}\) per Channel Data Link for Reinforced Isolation
                  with {\textgreater}25kVpk Surge Tolerance and {\textgreater}295kV/{\(\mu\)}s
                  Common Mode Transient Immunity},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185242},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185242},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HaYW23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HafezAAABBBBCCC23,
  author       = {Walid M. Hafez and
                  P. Agnihotri and
                  M. Asoro and
                  M. Aykol and
                  B. Bains and
                  R. Bambery and
                  M. Bapna and
                  A. Barik and
                  A. Chatterjee and
                  P. C. Chiu and
                  T. Chu and
                  C. Firby and
                  K. Fischer and
                  M. Fradkin and
                  Hannes Greve and
                  A. Gupta and
                  E. Haralson and
                  M. Haran and
                  Jeffery Hicks and
                  A. Illa and
                  M. Jang and
                  S. Klopcic and
                  M. Kobrinsky and
                  B. Kuns and
                  H.{-}h. Lai and
                  G. Lanni and
                  S.{-}H. Lee and
                  N. Lindert and
                  C.{-}l. Lo and
                  Y. Luo and
                  G. Malyavanatham and
                  B. Marinkovic and
                  Y. Maymon and
                  M. Nabors and
                  J. Neirynck and
                  P. Packan and
                  A. Paliwal and
                  L. Pantisano and
                  Leif Paulson and
                  Padma Penmatsa and
                  Chetan Prasad and
                  Conor Puls and
                  T. Rahman and
                  R. Ramaswamy and
                  S. Samant and
                  Bernhard Sell and
                  K. Sethi and
                  F. Shah and
                  M. Shamanna and
                  K. Shang and
                  Q. Li and
                  M. Sibakoti and
                  J. Stoeger and
                  N. Strutt and
                  R. Thirugnanasambandam and
                  C. Tsai and
                  X. Wang and
                  A. Wang and
                  S.{-}j. Wu and
                  Q. Xu and
                  X.{-}h. Zhong and
                  S. Natarajan},
  title        = {Intel PowerVia Technology: Backside Power Delivery for High Density
                  and High-Performance Computing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185208},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185208},
  timestamp    = {Thu, 31 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HafezAAABBBBCCC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HanCKSCC23,
  author       = {Hyeonho Han and
                  Woojun Choi and
                  Jaehyun Kim and
                  Jaesuk Sung and
                  Heonjin Choi and
                  Youngcheol Chae},
  title        = {A Highly-Digital PWM-Based Impedance Monitoring {IC} with 143.2dB
                  {DR} and 17.7fFrms Resolution},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185363},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185363},
  timestamp    = {Sun, 30 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HanCKSCC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HanKCG23,
  author       = {Kaizhen Han and
                  Yuye Kang and
                  Yue Chen and
                  Xiao Gong},
  title        = {Novel Bridge Transmission Line Method for Thin-Film Semiconductors:
                  Modelling, Simulation Verification, and Experimental Demonstration},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185324},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185324},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HanKCG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HanPJLKKSPSPLLK23,
  author       = {Jung{-}Won Han and
                  S. H. Park and
                  M. Y. Jeong and
                  K. S. Lee and
                  K. N. Kim and
                  H. J. Kim and
                  J. C. Shin and
                  S. M. Park and
                  S. H. Shin and
                  S. W. Park and
                  K. S. Lee and
                  J. H. Lee and
                  S. H. Kim and
                  B. C. Kim and
                  M. H. Jung and
                  I. Y. Yoon and
                  H. Kim and
                  S. U. Jang and
                  K. J. Park and
                  Y. K. Kim and
                  I. G. Kim and
                  J. H. Oh and
                  S. Y. Han and
                  B. S. Kim and
                  B. J. Kuh and
                  J. M. Park},
  title        = {Ongoing Evolution of {DRAM} Scaling via Third Dimension -Vertically
                  Stacked {DRAM} -},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185290},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185290},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HanPJLKKSPSPLLK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HanSBGKZ23,
  author       = {Yi Han and
                  Jingxuan Sun and
                  Jin Hee Bae and
                  Detlev Gr{\"{u}}tzmacher and
                  Joachim Knoch and
                  Qing{-}Tai Zhao},
  title        = {High Performance 5 nm Si Nanowire FETs with a Record Small {SS} =
                  2.3 mV/dec and High Transconductance at 5.5 {K} Enabled by Dopant
                  Segregated Silicide Source/Drain},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185373},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185373},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HanSBGKZ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/He023,
  author       = {Yan He and
                  Kaiyuan Yang},
  title        = {A Fully Synthesizable 100Mbps Edge-Chasing True Random Number Generator},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185323},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185323},
  timestamp    = {Sat, 06 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/He023.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HeoKCBKH23,
  author       = {Seongjae Heo and
                  Dongmin Kim and
                  Wooseok Choi and
                  Sanghyun Ban and
                  Ohhyuk Kwon and
                  Hyunsang Hwang},
  title        = {Experimental Demonstration of Probabilistic-Bit (p-bit) Utilizing
                  Stochastic Oscillation of Threshold Switch Device},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185217},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185217},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HeoKCBKH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HikakeLHPSHTUUK23,
  author       = {Kaito Hikake and
                  Zhuo Li and
                  Junxiang Hao and
                  Chitra Pandy and
                  Takuya Saraya and
                  Toshiro Hiramoto and
                  Takanori Takahashi and
                  Mutsunori Uenuma and
                  Yukiharu Uraoka and
                  Masaharu Kobayashi},
  title        = {A Nanosheet Oxide Semiconductor {FET} Using {ALD} InGaOx Channel and
                  InSnOx Electrode with Normally-off Operation, High Mobility and Reliability
                  for 3D Integrated Devices},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185234},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185234},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HikakeLHPSHTUUK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HoodaCLTZT23,
  author       = {Sonu Hooda and
                  Chun{-}Kuei Chen and
                  Manohar Lal and
                  Shih{-}Hao Tsai and
                  Evgeny Zamburg and
                  Aaron Voon{-}Yew Thean},
  title        = {Overcoming Negative nFET {VTH} by Defect-Compensated Low-Thermal Budget
                  {ITO-IGZO} Hetero-Oxide Channel to Achieve Record Mobility and Enhancement-mode
                  Operation},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185266},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185266},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HoodaCLTZT23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HsiangLCLLLCLHL23,
  author       = {Kuo{-}Yu Hsiang and
                  J.{-}Y. Lee and
                  F.{-}S. Chang and
                  Z.{-}F. Lou and
                  Z.{-}X. Li and
                  Z.{-}H. Li and
                  J.{-}H. Chen and
                  C. W. Liu and
                  T.{-}H. Hou and
                  Min{-}Hung Lee},
  title        = {FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles
                  and an Applicable Array Circuit toward Unlimited eNVM Operations},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185274},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185274},
  timestamp    = {Wed, 03 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/HsiangLCLLLCLHL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HsiaoCHSYSCWTLC23,
  author       = {Yan{-}Ting Hsiao and
                  Shu{-}Yan Chuang and
                  Hung{-}Yu Hou and
                  Yun{-}Chun Su and
                  Hsiu{-}Cheng Yeh and
                  Hsin{-}Tzu Song and
                  Yun{-}Jui Chang and
                  Wei{-}Yang Weng and
                  Ya{-}Chen Tsai and
                  Pin{-}Yu Lin and
                  Sih{-}Ying Chen and
                  Yen{-}Ju Lin and
                  Mei{-}Wei Lin and
                  Jun{-}Chau Chien},
  title        = {A CMOS/Microfluidics Point-of-Care SoC employing Square-Wave Voltcoulometry
                  for Biosensing with Aptamers and CRISPR-Cas12a Enzymes},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185383},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185383},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HsiaoCHSYSCWTLC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HsiehLLHHWL23,
  author       = {Chih{-}Chang Hsieh and
                  Hang{-}Ting Lue and
                  Yung{-}Chun Li and
                  Shuo{-}Nan Hung and
                  Chun{-}Hsiung Hung and
                  Keh{-}Chung Wang and
                  Chih{-}Yuan Lu},
  title        = {Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth
                  (300Gb/s) 3D {NAND} Based In-Memory Search Accelerator for Ternary
                  Content Addressable Memory {(TCAM)} and Proximity Search of Hamming
                  Distance},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185361},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185361},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HsiehLLHHWL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HsiehTLWHLHC23,
  author       = {E. R. Hsieh and
                  Y. T. Tang and
                  C. R. Liu and
                  S. M. Wang and
                  Y. L. Hsueh and
                  R. Q. Lin and
                  Y. X. Huang and
                  Y. T. Chen},
  title        = {3-bits-per-cell 2T32CFE nvTCAM by Angstrom-laminated Ferroelectric
                  Layers with 10{\({^1}\)}{\({^1}\)} Cycles of Endurance and 4.92V of
                  Ultra-wide Memory-windows for In-memory-searching},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185226},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185226},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HsiehTLWHLHC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HuangHLCWCKL23,
  author       = {Yao{-}Hung Huang and
                  Yu{-}Cheng Hsieh and
                  Yu{-}Cheng Lin and
                  Yue{-}Der Chih and
                  Eric Wang and
                  Jonathan Chang and
                  Ya{-}Chin King and
                  Chrong Jung Lin},
  title        = {High Density Embedded 3D Stackable Via {RRAM} in Advanced {MCU} Applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185230},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185230},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HuangHLCWCKL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HuangSWLHQTGMWM23,
  author       = {F. Huang and
                  B. Saini and
                  L. Wan and
                  H. Lu and
                  X. He and
                  S. Qin and
                  Wilman Tsai and
                  A. Gruverman and
                  Andrew C. Meng and
                  H.{-}S. Philip Wong and
                  Paul C. McIntyre and
                  S. S. Wong},
  title        = {First Observation of Ultra-high Polarization ({\textasciitilde} 108
                  {\(\mu\)}C/cm{\({^2}\)}) in Nanometer Scaled High Performance Ferroelectric
                  {HZO} Capacitors with Mo Electrodes},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185240},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185240},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/HuangSWLHQTGMWM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HungMSKTOFAAI23,
  author       = {Luong Hung and
                  Koji Matsuura and
                  Hiroki Suto and
                  Kazutoshi Kodama and
                  Yosuke Tanaka and
                  Toshiaki Ono and
                  Junichiro Fujimagari and
                  Kentaro Akiyama and
                  Miho Akahide and
                  Yoshiaki Inada},
  title        = {An 0.08 e\({}^{\mbox{-.}}\) pJ/step 14-bit gain-adaptive single-slope
                  column {ADC} with enhanced {HDR} function for high-quality imagers},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185372},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185372},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HungMSKTOFAAI23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HuoZDZQT023,
  author       = {Dexuan Huo and
                  Jilin Zhang and
                  Xinyu Dai and
                  Jian Zhang and
                  Chunqi Qian and
                  Kea{-}Tiong Tang and
                  Hong Chen},
  title        = {{ANP-G:} {A} 28nm 1.04pJ/SOP Sub-mm2 Spiking and Back-propagation
                  Hybrid Neural Network Asynchronous Olfactory Processor Enabling Few-shot
                  Class-incremental On-chip Learning},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185410},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185410},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HuoZDZQT023.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HwangKSKPJ23,
  author       = {Junghyeon Hwang and
                  Chaeheon Kim and
                  Hunbeom Shin and
                  Hwayoung Kim and
                  Sang{-}Hee Ko Park and
                  Sanghun Jeon},
  title        = {Ultra-high Tunneling Electroresistance Ratio {(2} {\texttimes} 10\({}^{\mbox{4}}\))
                  {\&} Endurance (10\({}^{\mbox{8}}\)) in Oxide Semiconductor-Hafnia
                  Self-rectifying {(1.5} {\texttimes} 10\({}^{\mbox{3}}\)) Ferroelectric
                  Tunnel Junction},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185231},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185231},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HwangKSKPJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/InabaOAFIKSFM23,
  author       = {Takumi Inaba and
                  Hiroshi Oka and
                  Hidehiro Asai and
                  Hiroshi Fuketa and
                  Shota Iizuka and
                  Kimihiko Kato and
                  Shunsuke Shitakata and
                  Koichi Fukuda and
                  Takahiro Mori},
  title        = {Determining the low-frequency noise source in cryogenic operation
                  of short-channel bulk MOSFETs},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185298},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185298},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/InabaOAFIKSFM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/InoueTKCBYHITI23,
  author       = {Hisashi Inoue and
                  Hiroto Tamura and
                  Ai Kitoh and
                  Xiangyu Chen and
                  Zolboo Byambadorj and
                  Takeaki Yajima and
                  Yasushi Hotta and
                  Tetsuya Iizuka and
                  Gouhei Tanaka and
                  Isao H. Inoue},
  title        = {Long-time-constant leaky-integrating oxygen-vacancy drift-diffusion
                  {FET} for human-interactive spiking reservoir computing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185412},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185412},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/InoueTKCBYHITI23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/IshiharaSOSMYMU23,
  author       = {N. Ishihara and
                  Y. Shimada and
                  T. Ochi and
                  S. Seto and
                  H. Matsuo and
                  H. Yamashita and
                  S. Morita and
                  M. Ukishima and
                  K. Uejima and
                  Y. Arayashiki and
                  S. Kajiwara and
                  A. Murayama and
                  K. Nishiyama and
                  K. Sugimae and
                  S. Mori and
                  Y. Saito and
                  T. Shundo and
                  A. Maeda and
                  H. Kamiya and
                  Y. Uchiyama and
                  M. Fujiwara and
                  F. Aiso and
                  K. Sekine and
                  N. Ohtani},
  title        = {Highly Scalable Metal Induced Lateral Crystallization {(MILC)} Techniques
                  for Vertical Si Channel in Ultra-High ({\textgreater} 300 Layers)
                  3D Flash Memory},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185401},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185401},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/IshiharaSOSMYMU23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JangYLHWVTYMCCM23,
  author       = {Moon Hyung Jang and
                  Wei{-}Han Yu and
                  Changuk Lee and
                  Maddy Hays and
                  Pingyu Wang and
                  Nick Vitale and
                  Pulkit Tandon and
                  Pumiao Yan and
                  Pui{-}In Mak and
                  Youngcheol Chae and
                  E. J. Chichilnisky and
                  Boris Murmann and
                  Dante G. Muratore},
  title        = {A 1024-Channel 268 nW/pixel 36x36 {\(\mu\)}m\({}^{\mbox{2}}\)/ch Data-Compressive
                  Neural Recording {IC} for High-Bandwidth Brain-Computer Interfaces},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185288},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185288},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JangYLHWVTYMCCM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JavvajiBBROBMB23,
  author       = {Sundeep Javvaji and
                  Muhammed Bolatkale and
                  Shagun Bajoria and
                  Robert Rutten and
                  Bert Oude{-}Essink and
                  Koen Beijens and
                  Kofi A. A. Makinwa and
                  Lucien J. Breems},
  title        = {A 6GHz Multi-Path Multi-Frequency Chopping CT{\(\Delta\)}{\(\Sigma\)}
                  Modulator achieving 122dBFS {SFDR} from 150kHz to 120MHz {BW}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185356},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185356},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JavvajiBBROBMB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JedheDKXGGJCLWP23,
  author       = {Gajanan Jedhe and
                  Chetan Deshpande and
                  Sushil Kumar and
                  Cheng{-}Xin Xue and
                  Zijie Guo and
                  Ritesh Garg and
                  Kim Soon Jway and
                  En{-}Jui Chang and
                  Jenwei Liang and
                  Zhe Wan and
                  Zhenhao Pan},
  title        = {A 12nm 137 {TOPS/W} Digital Compute-In-Memory using Foundry 8T {SRAM}
                  Bitcell supporting 16 Kernel Weight Sets for {AI} Edge Applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185253},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185253},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JedheDKXGGJCLWP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JeongKSLCPKKJPK23,
  author       = {Jaeyong Jeong and
                  Seong Kwang Kim and
                  Yoon{-}Je Suh and
                  Jisung Lee and
                  Joonyoung Choi and
                  Juhyuk Park and
                  Joon Pyo Kim and
                  Bong Ho Kim and
                  Younjung Jo and
                  Seung{-}Young Park and
                  Jongmin Kim and
                  Sanghyeon Kim},
  title        = {Cryogenic {RF} Transistors and Routing Circuits Based on 3D Stackable
                  InGaAs HEMTs with Nb Superconductors for Large-Scale Quantum Signal
                  Processing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185262},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185262},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JeongKSLCPKKJPK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JeongLMMLKMCSKC23,
  author       = {Jaehun Jeong and
                  Sanghyeon Lee and
                  Sada{-}Aki Masuoka and
                  Shincheol Min and
                  Sanghoon Lee and
                  Seungkwon Kim and
                  Taehun Myung and
                  Byungha Choi and
                  Chang{-}Woo Sohn and
                  Sung Won Kim and
                  Jeongmin Choi and
                  Jungmin Park and
                  Hyungjong Lee and
                  Taeyoung Kim and
                  Seokhoon Kim and
                  Yuri Yasuda{-}Masuoka and
                  Ja{-}Hum Ku and
                  Gitae Jeong},
  title        = {World's First {GAA} 3nm Foundry platform Technology {(SF3)} with Novel
                  Multi-Bridge-Channel-FET (MBCFET{\texttrademark}) Process},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185353},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185353},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JeongLMMLKMCSKC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JiaoHZZWKKZLG23,
  author       = {Leming Jiao and
                  Kaizhen Han and
                  Zuopu Zhou and
                  Zijie Zheng and
                  Xiaolin Wang and
                  Qiwen Kong and
                  Yuye Kang and
                  Jishen Zhang and
                  Long Liu and
                  Xiao Gong},
  title        = {First Demonstration of BEOL-Compatible Write-Enhanced Ferroelectric-Modulated
                  Diode {(FMD):} New Possibility for Oxide Semiconductor Memory Devices},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185255},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185255},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JiaoHZZWKKZLG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JoKKCPLSYPKLSKL23,
  author       = {Youngmin Jo and
                  Anil Kavala and
                  Tongsung Kim and
                  Byung{-}Kwan Chun and
                  Jungjune Park and
                  Taesung Lee and
                  Jungmin Seo and
                  Manjae Yang and
                  Taehyeon Park and
                  Hyunjin Kwon and
                  Cheolhui Lee and
                  Younghoon Son and
                  Junghwan Kwak and
                  Younggyu Lee and
                  Hwan{-}Seok Ku and
                  Dae{-}Hoon Na and
                  Changyeon Yu and
                  Jonghoon Park and
                  Jae{-}Hwan Kim and
                  Hyojin Kwon and
                  Chan{-}ho Kim and
                  Moon{-}Ki Jung and
                  Chanjin Park and
                  Donghyun Seo and
                  Moosung Kim and
                  Seungjae Lee and
                  Jin{-}Yub Lee and
                  Dongku Kang and
                  Chiweon Yoon and
                  SungHoi Hur},
  title        = {A 3.0 Gb/s/pin 4\({}^{\mbox{th}}\) generation F-chip with Toggle 5.0
                  Specification for 16Tb {NAND} Flash Memory Multi chip Package},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185391},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185391},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JoKKCPLSYPKLSKL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JoKLHKCY23,
  author       = {Wooyoung Jo and
                  Sangjin Kim and
                  Juhyoung Lee and
                  Donghyeon Han and
                  Sangyeob Kim and
                  Seungyoon Choi and
                  Hoi{-}Jun Yoo},
  title        = {NeRPIM: {A} 4.2 mJ/frame Neural Rendering Processing-in-memory Processor
                  with Space Encoding Block-wise Mapping for Mobile Devices},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185399},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185399},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JoKLHKCY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JuWCG23,
  author       = {Yuhao Ju and
                  Yijie Wei and
                  Xi Chen and
                  Jie Gu},
  title        = {A General-Purpose Compute-in-Memory Processor Combining {CPU} and
                  Deep Learning with Elevated {CPU} Efficiency and Enhanced Data Locality},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185311},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185311},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JuWCG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JungLKLKOL23,
  author       = {Jaehong Jung and
                  Kyungmin Lee and
                  Gunwoo Kong and
                  Baekmin Lim and
                  Seungjin Kim and
                  Seunghyun Oh and
                  Jongwoo Lee},
  title        = {A 2.4-to-4.2GHz 440.2fsrms-Integrated-Jitter 4.3mW Ring-Oscillator-Based
                  {PLL} Using a Switched-Capacitor-Bias-Based Sampling {PD} in 4nm FinFET
                  {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185300},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185300},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JungLKLKOL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JungOKPSCHJ23,
  author       = {Yoontae Jung and
                  Sein Oh and
                  Jimin Koo and
                  Seunga Park and
                  Ji{-}Hoon Suh and
                  Donghee Cho and
                  Sohmyung Ha and
                  Minkyu Je},
  title        = {A 187dB FoMS 46fJ/Conv 2\({}^{\mbox{nd}}\)-order Highpass {\(\Delta\)}{\(\sum\)}
                  Capacitance-to-Digital Converter},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185219},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185219},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JungOKPSCHJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JungmannJKSHCML23,
  author       = {N. Jungmann and
                  R. Joshi and
                  E. Kachir and
                  K. Shimanovich and
                  B. He and
                  T. Cohen and
                  T. Miller and
                  D. Leu and
                  Dinesh Kannambadi and
                  I. Wagner and
                  Kenneth Reyer and
                  H. Konen and
                  M. Suleiman and
                  V. Sindhe and
                  Y. Freiman},
  title        = {A 1.9GHz 0.57V Vmin 576Kb embedded product-ready {L2} cache in 5nm
                  FinFET technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185232},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185232},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/JungmannJKSHCML23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KaiserPB23,
  author       = {Karl Kaiser and
                  Dinesh Patil and
                  Edith Beign{\'{e}}},
  title        = {A prototype 5nm custom sensor SoC for Augmented Reality/Virtual Reality
                  targeting Smartglasses with embedded computer vision, audio, security
                  and {ML}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185381},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185381},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KaiserPB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KangHCG23,
  author       = {Yuye Kang and
                  Kaizhen Han and
                  Yue Chen and
                  Xiao Gong},
  title        = {Thickness-Engineered Extremely-thin Channel High Performance {ITO}
                  TFTs with Raised {S/D} Architecture: Record-Low RSD, Highest Moblity
                  (Sub-4 nm {TCH} Regime), and High {VTH} Tunability},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185421},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185421},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KangHCG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KangSJL0BJKHHJY23,
  author       = {Gyuseong Kang and
                  Hyunjin Shin and
                  Hyuntaek Jung and
                  Sunkyu Lee and
                  Jaeseung Choi and
                  Sangyeop Baek and
                  Hyunsung Jung and
                  Daeshik Kim and
                  Sohee Hwang and
                  Shinhee Han and
                  Yongsung Ji and
                  Sei Seung Yoon},
  title        = {A 14nm 128Mb Embedded {MRAM} Macro achieved the Best Figure-Of-Merit
                  with 80MHz Read operation and 18.1Mb/mm{\({^2}\)} implementation at
                  0.64V},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185352},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185352},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KangSJL0BJKHHJY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KarmakarZBF23,
  author       = {Shoubhik Karmakar and
                  Huajun Zhang and
                  Marco Berkhout and
                  Qinwen Fan},
  title        = {A Class-D Piezoelectric Speaker Driver Using {A} Quadrature Feedback
                  Chopping Scheme achieving 29dB Large-Signal {THD+N} Improvement},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185166},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185166},
  timestamp    = {Mon, 26 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/KarmakarZBF23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KashaniSS23,
  author       = {Milad Haghi Kashani and
                  Hossein Shakiba and
                  Ali Sheikholeslami},
  title        = {A 0.32pJ/b 90Gbps {PAM4} Optical Receiver Front-End with Automatic
                  Gain Control in 12nm {CMOS} FinFET},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185378},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185378},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KashaniSS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KiharaTSHK23,
  author       = {Yoshihide Kihara and
                  Maju Tomura and
                  Wataru Sakamoto and
                  Masanobu Honda and
                  Masayuki Kojima},
  title        = {Beyond 10 {\(\mu\)}m Depth Ultra-High Speed Etch Process with 84{\%}
                  Lower Carbon Footprint for Memory Channel Hole of 3D {NAND} Flash
                  over 400 Layers},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185160},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185160},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KiharaTSHK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KikuchiTHCOONSY23,
  author       = {Y. Kikuchi and
                  M. Tomita and
                  T. Hayashi and
                  H. Chiba and
                  T. Ogita and
                  T. Okawa and
                  K. Nishida and
                  M. Sugimoto and
                  D. Yoneyama and
                  T. Umeki and
                  H. Oishi and
                  S. Miyake and
                  K. Hiramatsu and
                  H. Kumano and
                  H. Kawashima and
                  N. Yamada and
                  M. Tamura and
                  H. Ohnuma and
                  K. Tatani},
  title        = {Noise Performance Improvements of 2-Layer Transistor Pixel Stacked
                  {CMOS} Image Sensor with Non-doped Pixel-FinFETs},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185422},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185422},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KikuchiTHCOONSY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimCBKBKSBLJ23,
  author       = {Sekeon Kim and
                  Keonhee Cho and
                  Kyeongrim Baek and
                  Hyunjun Kim and
                  Younmee Bae and
                  Mijung Kim and
                  Dongwook Seo and
                  Sangyeop Baeck and
                  Sungjae Lee and
                  Seong{-}Ook Jung},
  title        = {A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant
                  Internal Node Transition Elimination for Ultra-Low-Power Applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185239},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185239},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimCBKBKSBLJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimHHK023,
  author       = {Jung{-}Hoon Kim and
                  Jaehoon Heo and
                  Wontak Han and
                  Jaeuk Kim and
                  Joo{-}Young Kim},
  title        = {{SP-PIM:} {A} 22.41TFLOPS/W, 8.81Epochs/Sec Super-Pipelined Processing-In-Memory
                  Accelerator with Local Error Prediction for On-Device Learning},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185428},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185428},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimHHK023.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimKKAKJLK23,
  author       = {Sunghwan Kim and
                  Geun{-}Myeong Kim and
                  Seong{-}Nam Kim and
                  Saetbyeol Ahn and
                  Yoon{-}Suk Kim and
                  Inkook Jang and
                  Kyoung{-}Woo Lee and
                  Dae Sin Kim},
  title        = {Structural Reliability and Performance Analysis of Backside {PDN}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185330},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185330},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimKKAKJLK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimKKCPALSCRKNC23,
  author       = {Whayoung Kim and
                  Jaehyeon Kim and
                  Dongjin Ko and
                  Jun{-}Hwe Cha and
                  Gyeongcheol Park and
                  Youngbae Ahn and
                  Jong{-}Young Lee and
                  Minchul Sung and
                  Hyejung Choi and
                  Seung Wook Ryu and
                  Seiyon Kim and
                  Myung{-}Hee Na and
                  Seonyong Cha},
  title        = {Demonstration of crystalline {IGZO} transistor with high thermal stability
                  for memory applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185258},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185258},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimKKCPALSCRKNC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimKYCMSJ23,
  author       = {Taeryeong Kim and
                  Ji{-}Young Kim and
                  Jeonghyeok You and
                  Hohyun Chae and
                  Byoung{-}Mo Moon and
                  Kyomin Sohn and
                  Seong{-}Ook Jung},
  title        = {A Low-Voltage Area-Efficient {TSV} {I/O} for {HBM} with Data Rate
                  up to 15Gb/s Featuring Overlapped Multiplexing Driver, {ISI} Compensators
                  and {QEC}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185328},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185328},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimKYCMSJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimPLSKL0C23,
  author       = {Seongho Kim and
                  Young{-}Keun Park and
                  Gyu Soup Lee and
                  Eui Joong Shin and
                  Woon{-}San Ko and
                  Hi Deok Lee and
                  Ga{-}Won Lee and
                  Byung Jin Cho},
  title        = {Epitaxial Strain Control of HfxZr1-xO2 with Sub-nm {IGZO} Seed Layer
                  Achieving EOT=0.44 nm for {DRAM} Cell Capacitor},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185400},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185400},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimPLSKL0C23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimSPJYLPLNAH23,
  author       = {Kyungmoon Kim and
                  Yujeong Seo and
                  Sejun Park and
                  Woojae Jang and
                  Dongho Yoo and
                  Joonsung Lim and
                  Il{-}Han Park and
                  Jaeduk Lee and
                  Kyungyoon Noh and
                  Sujin Ahn and
                  Sunghoi Hur},
  title        = {High Bit Cost Scalability and Reliable Cell Characteristics for 7th
                  Generation 1Tb 4Bit/Cell 3D-NAND Flash},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185404},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185404},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimSPJYLPLNAH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimSRLKSKKJCLJK23,
  author       = {Kanguk Kim and
                  Youngwoo Son and
                  Hoin Ryu and
                  Byunghyun Lee and
                  Jooncheol Kim and
                  Hyunsu Shin and
                  Joonyoung Kang and
                  Jihun Kim and
                  Shinwoo Jeong and
                  Kyosuk Chae and
                  Dongkak Lee and
                  Ilwoo Jung and
                  Yongkwan Kim and
                  Boyoung Song and
                  Jeonghoon Oh and
                  Jungwoo Song and
                  Seguen Park and
                  Keumjoo Lee and
                  Hyodong Ban and
                  Jiyoung Kim and
                  Jooyoung Lee},
  title        = {14nm {DRAM} Development and Manufacturing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185314},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185314},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimSRLKSKKJCLJK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimUJLHLY23,
  author       = {Sangjin Kim and
                  Soyeon Um and
                  Wooyoung Jo and
                  Jingu Lee and
                  Sangwoo Ha and
                  Zhiyong Li and
                  Hoi{-}Jun Yoo},
  title        = {Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling
                  {ADC} for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185439},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185439},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimUJLHLY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimYCCLLLYDTLSB23,
  author       = {Jeongkyun Kim and
                  Byungho Yook and
                  Taemin Choi and
                  Kyuwon Choi and
                  Chanho Lee and
                  Yunrong Li and
                  Youngo Lee and
                  Seok Yun and
                  Changhoon Do and
                  Hoyoung Tang and
                  Inhak Lee and
                  Dongwook Seo and
                  Sangyeop Baeck},
  title        = {A 4.0GHz {UHS} Pseudo Two-port {SRAM} with {BL} Charge Time Reduction
                  and Flying Word-Line for {HPC} Applications in 4nm FinFET Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185223},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185223},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KimYCCLLLYDTLSB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KirtaniaAKYD23,
  author       = {Sharadindu Gopal Kirtania and
                  Khandker Akif Aabrar and
                  Asif Islam Khan and
                  Shimeng Yu and
                  Samyak Datta},
  title        = {Cold-FeFET as Embedded Non-Volatile Memory with Unlimited Cycling
                  Endurance},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185382},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185382},
  timestamp    = {Wed, 11 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KirtaniaAKYD23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KoPBJSKLJLLPKKJ23,
  author       = {S. Ko and
                  J. H. Park and
                  J. H. Bak and
                  H. Jung and
                  J. Shim and
                  D. S. Kim and
                  W. Lim and
                  D.{-}E. Jeong and
                  J. H. Lee and
                  K. Lee and
                  J.{-}H. Park and
                  Y. Kim and
                  C. Kim and
                  J. H. Jeong and
                  C. Y. Lee and
                  S. H. Han and
                  Y. Ji and
                  S. H. Hwang and
                  H. J. Shin and
                  K. Lee and
                  Y. J. Song and
                  Y. G. Shin and
                  J. H. Song},
  title        = {Highly Reliable and Manufacturable {MRAM} embedded in 14nm FinFET
                  node},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185248},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185248},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KoPBJSKLJLLPKKJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KobayashiH23,
  author       = {Daisuke Kobayashi and
                  Kazuyuki Hirose},
  title        = {How Harsh is Space?-Equations That Connect Space and Ground {VLSI}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185386},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185386},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KobayashiH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KobrinskySMMQAR23,
  author       = {Mauro J. Kobrinsky and
                  J. D. Silva and
                  E. Mannebach and
                  S. Mills and
                  M. Abd El Qader and
                  O. Adebayo and
                  N. Arkali Radhakrishna and
                  M. Beasley and
                  J. Chawla and
                  S. Chugh and
                  A. Dasgupta and
                  U. Desai and
                  E. De Re and
                  G. Dewey and
                  T. Edwards and
                  C. Engel and
                  V. Gudmundsson and
                  Jeffery Hicks and
                  B. Krist and
                  R. Mehandru and
                  Inanc Meric and
                  Patrick Morrow and
                  D. Nandi and
                  P. Patel and
                  R. Ramamurthy and
                  D. Samanta and
                  L. Shoer and
                  A. St Amour and
                  L. H. Tan and
                  Sukru Yemenicioglu and
                  X. Wang and
                  T. Ghani},
  title        = {Novel Cell Architectures with Back-side Transistor Contacts for Scaling
                  and Performance},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185319},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185319},
  timestamp    = {Thu, 31 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KobrinskySMMQAR23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KomuraMOTISKKOY23,
  author       = {Yusuke Komura and
                  Shoki Miyata and
                  Yuki Okamoto and
                  Yuki Tamatsukuri and
                  Hiroki Inoue and
                  Toshihiko Saito and
                  Munehiro Kozuma and
                  Hidetomo Kobayashi and
                  Tatsuya Onuki and
                  Yuichi Yanagisawa and
                  Toshihiko Takeuchi and
                  Yutaka Okazaki and
                  Hitoshi Kunitake and
                  Daiki Nakamura and
                  Takaaki Nagata and
                  Yasumasa Yamane and
                  Makoto Ikeda and
                  Shih{-}Ci Yen and
                  Chuan{-}Hua Chang and
                  Wen{-}Hsiang Hsieh and
                  Hiroshi Yoshida and
                  Min{-}Cheng Chen and
                  Ming{-}Han Liao and
                  Shou{-}Zen Chang and
                  Shunpei Yamazaki},
  title        = {Two-Dimensionally Arranged Display Drivers Achieved by OS/Si Structure},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185358},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185358},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KomuraMOTISKKOY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KosugeSHSHK23,
  author       = {Atsutake Kosuge and
                  Rei Sumikawa and
                  Yao{-}Chung Hsu and
                  Kota Shiba and
                  Mototsugu Hamada and
                  Tadahiro Kuroda},
  title        = {A 183.4nJ/inference 152.8{\(\mu\)}W Single-Chip Fully Synthesizable
                  Wired-Logic {DNN} Processor for Always-On 35 Voice Commands Recognition
                  Application},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185297},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185297},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KosugeSHSHK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KukHKKK23,
  author       = {Song{-}Hyeon Kuk and
                  Jae{-}Hoon Han and
                  Bong Ho Kim and
                  Joon Pyo Kim and
                  Sang{-}Hyeon Kim},
  title        = {Strategy for 3D Ferroelectric Transistor: Critical Surface Orientation
                  Dependence of HfZrOx on Si},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185431},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185431},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KukHKKK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KunduDSSBGCDBLB23,
  author       = {S. Kundu and
                  D. H. van Doip and
                  Tom Schram and
                  Quentin Smets and
                  S. Banerjee and
                  Benjamin Groven and
                  Daire Cott and
                  S. Decoster and
                  P. Bezard and
                  F. Lazzarino and
                  K. Banerjee and
                  Souvik Ghosh and
                  J. F. de Mamelfe and
                  Pierre Morin and
                  Cesar J. Lockhart de la Rosa and
                  Inge Asselberghs and
                  Gouri Sankar Kar},
  title        = {Towards low damage and fab-compatible top-contacts in {MX2} transistors
                  using a combined synchronous pulse atomic layer etch and wet-chemical
                  etch approach},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185413},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185413},
  timestamp    = {Tue, 16 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KunduDSSBGCDBLB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KwonKCKKJPRYLL23,
  author       = {Y. Kwon and
                  Y. Kwak and
                  Y. Choi and
                  K. Kim and
                  S. Kim and
                  W. Jang and
                  J. Park and
                  K. Ryu and
                  S. Yoo and
                  H. W. Lim and
                  J. Y. Lee},
  title        = {A 16-channel Active-Matrix Mini-LED Driver with an {USI-B} for {EMI}
                  noise reduction},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185271},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185271},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/KwonKCKKJPRYLL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeCHCLLTLL23,
  author       = {J.{-}Y. Lee and
                  F.{-}S. Chang and
                  Kuo{-}Yu Hsiang and
                  P.{-}H. Chen and
                  Z.{-}F. Luo and
                  Z.{-}X. Li and
                  J.{-}H. Tsai and
                  C. W. Liu and
                  Min{-}Hung Lee},
  title        = {3D Stackable Vertical Ferroelectric Tunneling Junction {(V-FTJ)} with
                  on/off Ratio 1500x, Applicable Cell Current, Self-Rectifying Ratio
                  1000x, Robust Endurance of 10{\unicode{8313}} Cycles, Multilevel and
                  Demonstrated Macro Operation Toward High-Density {BEOL} NVMs},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185163},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185163},
  timestamp    = {Wed, 03 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/LeeCHCLLTLL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeJJDYYJLHPKKK23,
  author       = {Seungyoung Lee and
                  Sungyup Jung and
                  Yunkyeong Jang and
                  Jungho Do and
                  Jisu Yu and
                  Hyeoungyu You and
                  Minjae Jeong and
                  Jinyoung Lim and
                  Jiyun Han and
                  Sangdo Park and
                  Yongdeok Kim and
                  Jooyeon Kwon and
                  Hoonki Kim and
                  Seiseung Yoon},
  title        = {Breakthrough Design Technology Co-optimization using {BSPDN} and Standard
                  Cell Variants for Maximizing Block-level {PPA}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185417},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185417},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LeeJJDYYJLHPKKK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeJLLLSESGB23,
  author       = {J. Lee and
                  J. Jeong and
                  S. Lee and
                  S. Lee and
                  J. Lim and
                  S. C. Song and
                  S. Ekbote and
                  N. Stevens{-}Yu and
                  D. Greenlaw and
                  Rock{-}Hyun Baek},
  title        = {Front-side and Back-side Power Delivery Network Guidelines for 2nm
                  node High Perf Computing and Mobile SoC applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185394},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185394},
  timestamp    = {Fri, 04 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LeeJLLLSESGB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeLLSJKKALRVPJ23,
  author       = {Jungho Lee and
                  Joseph G. Letner and
                  Jongyup Lim and
                  Yi Sun and
                  Seokhyeon Jeong and
                  Yejoong Kim and
                  Beomseo Koo and
                  Gabriele Atzeni and
                  Jiawei Liao and
                  Julianna M. Richie and
                  Elena Della Valle and
                  Paras R. Patel and
                  Taekwang Jang and
                  Cynthia A. Chestek and
                  Jamie Phillips and
                  James D. Weiland and
                  Dennis Sylvester and
                  Hun{-}Seok Kim and
                  David T. Blaauw},
  title        = {A Wireless Neural Stimulator {IC} for Cortical Visual Prosthesis},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185375},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185375},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/LeeLLSJKKALRVPJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeePCCJH23,
  author       = {Chan{-}Ho Lee and
                  Hyo{-}Jin Park and
                  Joo{-}Mi Cho and
                  Hyeon{-}Ji Choi and
                  Young{-}Jun Jeon and
                  Sung{-}Wan Hong},
  title        = {A 1V 20.7{\(\mu\)}W Four-Stage Amplifier Capable of Driving a 4-to-12nF
                  Capacitive Load with {\textgreater}1.07MHz {GBW} with an Improved
                  Active Zero},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185347},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185347},
  timestamp    = {Mon, 04 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/LeePCCJH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeYPLKLLLPAH23,
  author       = {Changhwan Lee and
                  Min{-}Tai Yu and
                  Sejun Park and
                  Hoki Lee and
                  Bio Kim and
                  Suhwan Lim and
                  Jaeduk Lee and
                  Sung{-}Hun Lee and
                  Mincheol Park and
                  Sujin Ahn and
                  Sunghoi Hur},
  title        = {Novel Strategies for Highly Uniform and Reliable Cell Characteristics
                  of 8th Generation 1Tb 3D-NAND Flash Memory},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185390},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185390},
  timestamp    = {Sun, 30 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LeeYPLKLLLPAH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiDLTYY23,
  author       = {Jiamin Li and
                  Yilong Dong and
                  Longyang Lin and
                  Joanne Si Ying Tan and
                  Fong Jia Yi and
                  Jerald Yoo},
  title        = {Wireless Body-Area Network Transceiver ICs with Concurrent Body-Coupled
                  Powering and Communication using Single Electrode},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185270},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185270},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LiDLTYY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiangZLLLHPCKLH23,
  author       = {Yan{-}Kui Liang and
                  June{-}Yang Zheng and
                  Yu{-}Lon Lin and
                  Wei{-}Li Li and
                  Yu{-}Cheng Lu and
                  Dong{-}Ru Hsieh and
                  Li{-}Chi Peng and
                  Tsung{-}Te Chou and
                  Chi{-}Chung Kei and
                  Chun{-}Chieh Lu and
                  Huai{-}Ying Huang and
                  Yuan{-}Chieh Tseng and
                  Tien{-}Sheng Chao and
                  Edward Yi Chang and
                  Chun{-}Hsiung Lin},
  title        = {Aggressively Scaled Atomic Layer Deposited Amorphous InZnOx Thin Film
                  Transistor Exhibiting Prominent Short Channel Characteristics (SS=
                  69 mV/dec.; {DIBL} = 27.8 mV/V) and High Gm(802 {\(\mu\)}S/{\(\mu\)}m
                  at {VDS} = 2V)},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185343},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185343},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LiangZLLLHPCKLH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiaoTC23,
  author       = {Fan{-}Wei Liao and
                  Shan{-}Chih Tsou and
                  Chien{-}Sheng Chao},
  title        = {A 6nW 30.8kHz Relaxation Oscillator with Sampling Bias-Free {RC} Circuit
                  and Dynamic Power Scaling in a 12nm FinFET},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185329},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185329},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LiaoTC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LinFCYY23,
  author       = {Liang{-}Hsin Lin and
                  Zih{-}Sing Fu and
                  Po{-}Shao Chen and
                  Bo{-}Yin Yang and
                  Chia{-}Hsiang Yang},
  title        = {A 4.8mW, 800Mbps Hybrid Crypto SoC for Post-Quantum Secure Neural
                  Interfacing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185393},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185393},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LinFCYY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LinPZSCY23,
  author       = {Yu{-}Cheng Lin and
                  Chanmin Park and
                  Wenda Zhao and
                  Nan Sun and
                  Youngcheol Chae and
                  Chia{-}Hsiang Yang},
  title        = {A 26.4mW, 18.6MS/s Image Reconstruction Processor for IoT Compressive
                  Sensing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185357},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185357},
  timestamp    = {Mon, 25 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LinPZSCY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiuCCLHTHCCCL23,
  author       = {Yi{-}Chun Liu and
                  Yu{-}Rui Chen and
                  Yun{-}Wen Chen and
                  Hsin{-}Cheng Lin and
                  Wan{-}Hsuan Hsieh and
                  Chien{-}Te Tu and
                  Bo{-}Wei Huang and
                  Wei{-}Jen Chen and
                  Chun{-}Yi Cheng and
                  Shee{-}Jier Chueh and
                  Chee Wee Liu},
  title        = {Extremely High-{\(\kappa\)} Hf0.2Zr0.8O2 Gate Stacks Integrated into
                  Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record
                  Ion per Footprint of 9200{\(\mu\)}A/{\(\mu\)}m and Record Ion per
                  Stack of 360{\(\mu\)}A at VOV=VDS=0.5V},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185327},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185327},
  timestamp    = {Wed, 03 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/LiuCCLHTHCCCL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LoLY23,
  author       = {Yi{-}Lin Lo and
                  Yu{-}Chen Lo and
                  Chia{-}Hsiang Yang},
  title        = {A 169mW Fully-Integrated Ultrasound Imaging Processor Supporting Advanced
                  Modes for Hand-Held Devices},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185273},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185273},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LoLY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LuCHLCLCLC23,
  author       = {C.{-}L. Lu and
                  C.{-}H. Chuang and
                  C.{-}H. Huang and
                  S.{-}C. Lin and
                  Y.{-}H. Chang and
                  W.{-}Y. Lai and
                  M.{-}H. Chiu and
                  Ming Han Liao and
                  S.{-}Z. Chang},
  title        = {4-Layer Wafer on Wafer Stacking Demonstration with Face to Face/Face
                  to Back Stacked Flexibility Using Hybrid Bond/TSV-Middle for Various
                  3D Integration},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185308},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185308},
  timestamp    = {Thu, 11 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/LuCHLCLCLC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LuLCLCWYCCCCCHL23,
  author       = {C. A. Lu and
                  H. P. Lee and
                  H. C. Chen and
                  Y. C. Lin and
                  Y. H. Chung and
                  S. H. Wang and
                  J. Y. Yeh and
                  V. S. Chang and
                  M. C. Chiang and
                  W. Chang and
                  H. C. Chung and
                  C. F. Cheng and
                  H. H. Hsu and
                  H. H. Liu and
                  William P. N. Chen and
                  C. Y. Lin},
  title        = {Characterizing and Reducing the Layout Dependent Effect and Gate Resistance
                  to Enable Multiple-Vt Scaling for a 3nm {CMOS} Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185282},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185282},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/LuLCLCWYCCCCCHL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MertensHCZWMDRT23,
  author       = {Hans Mertens and
                  M. Hosseini and
                  Thomas Chiarella and
                  D. Zhou and
                  S. Wang and
                  G. Mannaert and
                  E. Dupuy and
                  D. Radisic and
                  Z. Tao and
                  Y. Oniki and
                  Andriy Hikavyy and
                  R. Rosseel and
                  A. Mingardi and
                  S. Choudhury and
                  P. Puttarame Gowda and
                  F. Sebaai and
                  A. Peter and
                  Kevin Vandersmissen and
                  J. P. Soulie and
                  An De Keersgieter and
                  L. Petersen Barbosa Lima and
                  C. Cavalcante and
                  D. Batuk and
                  G. T. Martinez and
                  J. Geypen and
                  F. Seidel and
                  K. Paulussen and
                  P. Favia and
                  J{\"{u}}rgen B{\"{o}}mmels and
                  Roger Loo and
                  P. Wong and
                  A. Sepulveda Marquez and
                  B. T. Chan and
                  J{\'{e}}r{\^{o}}me Mitard and
                  S. Subramanian and
                  S. Demuynck and
                  E. Dentoni Litta and
                  N. Horiguchi and
                  S. Samavedam and
                  S. Biesemans},
  title        = {Nanosheet-based Complementary Field-Effect Transistors (CFETs) at
                  48nm Gate Pitch, and Middle Dielectric Isolation to enable {CFET}
                  Inner Spacer Formation and Multi-Vt Patterning},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185218},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185218},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/MertensHCZWMDRT23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MittalSPKSMCL23,
  author       = {Rishabh Mittal and
                  Hajime Shibata and
                  Sharvil Patil and
                  Erik Krommenhoek and
                  Prawal Shrestha and
                  Gabriele Manganaro and
                  Anantha P. Chandrakasan and
                  Hae{-}Seung Lee},
  title        = {A 6.4-GS/s 1-GHz {BW} Continuous-Time Pipelined {ADC} with Time-Interleaved
                  Sub-ADC-DAC Achieving 61.7-dB {SNDR} in 16-nm FinFET},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185279},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185279},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/MittalSPKSMCL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Mizuno23,
  author       = {Hiroyuki Mizuno},
  title        = {Quantum Computing from Hype to Game Changer},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185419},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185419},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/Mizuno23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MohammadiLK23,
  author       = {Reza Mohammadi and
                  Peter M. Levine and
                  Karim S. Karim},
  title        = {A Monolithic Amorphous-Selenium/CMOS Small-Pixel-Effect-Enhanced X-Ray-Energy-Discriminating
                  Quantum-Counting Pixel for Biomedical Imaging},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185340},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185340},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/MohammadiLK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MorozSCAL23,
  author       = {Victor Moroz and
                  Alexei Svizhenko and
                  Munkang Choi and
                  Plamen Asenov and
                  Jaehyun Lee},
  title        = {Exploring Power Savings of Gate-All-Around Cryogenic Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185420},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185420},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/MorozSCAL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MossPBRSPRW23,
  author       = {Benjamin R. Moss and
                  Christopher V. Poulton and
                  Matthew J. Byrd and
                  Peter Russo and
                  Oleg Shatrovoy and
                  David Paquette and
                  Andrew Reardon and
                  Michael R. Watts},
  title        = {A 2048-channel, 125{\(\mu\)}W/ch {DAC} Controlling a 9, 216-element
                  Optical Phased Array Coherent Solid-State LiDAR},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185161},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185161},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/MossPBRSPRW23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MuYKK23,
  author       = {Junjie Mu and
                  Chengshuo Yu and
                  Tony Tae{-}Hyoung Kim and
                  Bongjin Kim},
  title        = {A Bit-Serial Computing Accelerator for Solving Coupled Partial Differential
                  Equations},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185162},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185162},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/MuYKK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MunSMPKS23,
  author       = {Han{-}Gyeol Mun and
                  Hyunwoo Son and
                  Seunghyun Moon and
                  Jaehyun Park and
                  ByungJun Kim and
                  Jae{-}Yoon Sim},
  title        = {A 28 nm 66.8 {TOPS/W} Sparsity-Aware Dynamic-Precision Deep-Learning
                  Processor},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185264},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185264},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/MunSMPKS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/NaylorMJOPKALLB23,
  author       = {C. H. Naylor and
                  Kirby Maxey and
                  C. Jezewski and
                  K. P. O'Brien and
                  A. V. Penumatcha and
                  M. S. Kavrik and
                  B. Agrawal and
                  C. V. Littlefield and
                  J. Lux and
                  B. Barley and
                  Justin R. Weber and
                  A. Sen Gupta and
                  C. J. Dorow and
                  N. Arefin and
                  S. King and
                  R. Chebiam and
                  J. Plombon and
                  S. B. Clendenning and
                  U. E. Avci and
                  Mauro J. Kobrinsky and
                  M. Metz},
  title        = {2D Materials in the {BEOL}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185307},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185307},
  timestamp    = {Thu, 31 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/NaylorMJOPKALLB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/NishiPCSZTTN0DG23,
  author       = {Yoshinori Nishi and
                  John W. Poulton and
                  Xi Chen and
                  Sanquan Song and
                  Brian Zimmer and
                  Walker J. Turner and
                  Stephen G. Tell and
                  Nikola Nedovic and
                  John M. Wilson and
                  William J. Dally and
                  C. Thomas Gray},
  title        = {A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver
                  for Short-Reach Die-to-Die Interfaces in 5-nm {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185334},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185334},
  timestamp    = {Sun, 30 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/NishiPCSZTTN0DG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/NovelloAKJ23,
  author       = {Alessandro Novello and
                  Gabriele Atzeni and
                  Tim Keller and
                  Taekwang Jang},
  title        = {A 4.1W/mm{\({^2}\)} Peak Power Density and 77{\%} Peak Efficiency
                  Fully Integrated {DC-DC} Converter based on Electromagnetically Coupled
                  Class-D {LC} Oscillators and a Resonant {LC} Flying Impedance in 22nm
                  {FDSOI} {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185344},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185344},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/NovelloAKJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/OhPJKCHJ23,
  author       = {Sein Oh and
                  Seunga Park and
                  Yoontae Jung and
                  Jimin Koo and
                  Donghee Cho and
                  Sohmyung Ha and
                  Minkyu Je},
  title        = {A 2.5mW 12MHz-BW 69dB {SNDR} Passive Bandpass {\(\Delta\)}{\(\Sigma\)}
                  {ADC} with Highpass Noise-Shaping {SAR} Quantizers},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185342},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185342},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/OhPJKCHJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/OkadaYYHOIYIYDH23,
  author       = {Chihiro Okada and
                  Sozo Yokogawa and
                  Yuhi Yorikado and
                  Katsumi Honda and
                  Naoki Okuno and
                  Ryohei Ikeno and
                  Makoto Yamakoshi and
                  Hiroshi Ito and
                  Shohei Yoshitsune and
                  Masatsugu Desaki and
                  Shota Hida and
                  Atsushi Nose and
                  Hayato Wakabayashi and
                  Fumihiko Koga},
  title        = {216 fps 672 {\texttimes} 512 pixel 3 {\(\mu\)}m Indirect Time-of-Flight
                  Image Sensor with 1-Frame Depth Acquisition for Motion Artifact Suppression},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185332},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185332},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/OkadaYYHOIYIYDH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/OkamotoKMSIKOAS23,
  author       = {Yuki Okamoto and
                  Yusuke Komura and
                  T. Mizuguchi and
                  Toshihiko Saito and
                  M. Ito and
                  K. Kimura and
                  Tatsuya Onuki and
                  Yoshinori Ando and
                  H. Sawai and
                  T. Murakawa and
                  Hitoshi Kunitake and
                  Takanori Matsuzaki and
                  H. Kimura and
                  M. Fujita and
                  Makoto Ikeda and
                  Shunpei Yamazaki},
  title        = {1Mbit 1T1C 3D {DRAM} with Monolithically Stacked One Planar {FET}
                  and Two Vertical {FET} Heterogeneous Oxide Semiconductor layers over
                  Si {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185263},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185263},
  timestamp    = {Mon, 02 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/OkamotoKMSIKOAS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/OsadaNNLWLFLC23,
  author       = {Yoshiaki Osada and
                  Takaaki Nakazato and
                  Koji Nii and
                  Jhon{-}Jhy Liaw and
                  Shien{-}Yang Michael Wu and
                  Quincy Li and
                  Hidehiro Fujiwara and
                  Hung{-}Jen Liao and
                  Tsung{-}Yung Jonathan Chang},
  title        = {3.7-GHz Multi-Bank High-Current Single-Port Cache {SRAM} with 0.5V-1.4V
                  Wide Voltage Range Operation in 3nm FinFET for {HPC} Applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185289},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185289},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/OsadaNNLWLFLC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/OshimaYO23,
  author       = {Takashi Oshima and
                  Keisuke Yamamoto and
                  Goichi Ono},
  title        = {A 0.75V 0.016mm\({}^{\mbox{2}}\) 12ENOB 7nm {CMOS} cyclic {ADC} with
                  1.5bit passive amplification stage and dynamic capacitance scaling},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185426},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185426},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/OshimaYO23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ParkCCLH23,
  author       = {Hyo{-}Jin Park and
                  Joo{-}Mi Cho and
                  Hyeon{-}Ji Choi and
                  Chan{-}Ho Lee and
                  Sung{-}Wan Hong},
  title        = {96.48{\%} Peak-Efficiency Continuous-Current Step-Up Battery Charger
                  {(CC-SUBC)} with Dual Energy-Harvesting Sources for Automotive Application},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185247},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185247},
  timestamp    = {Mon, 04 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ParkCCLH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ParkHEAAYKKCL23,
  author       = {Eunsung Park and
                  Won{-}Yong Ha and
                  Doyoon Eom and
                  Dae{-}Hwan Ahn and
                  Hyuk An and
                  Suhyun Yi and
                  Kyung{-}Do Kim and
                  Jongchae Kim and
                  Woo{-}Young Choi and
                  Myung{-}Jae Lee},
  title        = {Doping-Optimized Back-illuminated Single-Photon Avalanche Diode in
                  Stacked 40 nm {CIS} Technology Achieving 60{\%} {PDP} at 905 nm},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185229},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185229},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ParkHEAAYKKCL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ParkJMRS23,
  author       = {Jaehan Park and
                  Cheonhoo Jeon and
                  Donggyu Minn and
                  Heesung Roh and
                  Jae{-}Yoon Sim},
  title        = {A 6.5nW, -73.5dBm Sensitivity, Cryptographic Wake-Up Receiver with
                  a PUF-based {OTP} and Temperature-Insensitive Code Recovery},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185235},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185235},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ParkJMRS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ParkKLSKCBKASLA23,
  author       = {Jiheon Park and
                  Daeyun Kim and
                  Hoyong Lee and
                  Seung{-}Chul Shin and
                  Myoungoh Ki and
                  Bumsik Chung and
                  Myunghan Bae and
                  Myeonggyun Kye and
                  Jonghan Ahn and
                  Inho Song and
                  Sunhwa Lee and
                  Jaeil An and
                  Il{-}Pyeong Hwang and
                  Taemin An and
                  Young{-}Gu Jin and
                  Youngchan Kim and
                  Youngsun Oh and
                  Juhyun Ko and
                  Haechang Lee and
                  Joonseo Yim},
  title        = {An Indirect Time-of-Flight {CMOS} Image Sensor Achieving Sub-ms Motion
                  Lagging and 60fps Depth Image from On-chip {ISP}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185418},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185418},
  timestamp    = {Fri, 23 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ParkKLSKCBKASLA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/PitnerSCLSZLCPZ23,
  author       = {Gregory Pitner and
                  Nathaniel Safron and
                  Tzu{-}Ang Chao and
                  Shengman Li and
                  Sheng{-}Kai Su and
                  Gilad Zeevi and
                  Qing Lin and
                  Hsin{-}Yuan Chiu and
                  Matthias Passlack and
                  Zichen Zhang and
                  D. Mahaveer Sathaiya and
                  Aslan Wei and
                  Carlo Gilardi and
                  Edward Chen and
                  San Lin Liew and
                  Vincent D.{-}H. Hou and
                  Chung{-}Wei Wu and
                  Jeff Wu and
                  Zhiwei Lin and
                  Jeffrey Fagan and
                  Ming Zheng and
                  Han Wang and
                  Subhasish Mitra and
                  H.{-}S. Philip Wong and
                  Iuliana P. Radu},
  title        = {Building high performance transistors on carbon nanotube channel},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185374},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185374},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/PitnerSCLSZLCPZ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Ranganathan23,
  author       = {Parthasarathy Ranganathan},
  title        = {A Six-Word Story on the Future of {VLSI:} AI-driven, Software-defined,
                  and Uncomfortably Exciting},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185339},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185339},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/Ranganathan23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RicciSBRBLLSB23,
  author       = {Luca Ricci and
                  Lorenzo Scaletti and
                  Gabriele B{\`{e}} and
                  Michele Rocco and
                  Luca Bertulessi and
                  Salvatore Levantino and
                  Andrea L. Lacaita and
                  Carlo Samori and
                  Andrea Bonfanti},
  title        = {A 2GS/s 11b 8x Interleaved {ADC} with 9.2 {ENOB} and 69.9dB {SFDR}
                  in 28nm {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185370},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185370},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/RicciSBRBLLSB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RuediQG23,
  author       = {P.{-}F. R{\"{u}}edi and
                  R. Quaglia and
                  H.{-}R. Graf},
  title        = {A 90 {\(\mu\)}W at 1 fps and 1.33 mW at 30 fps 120 dB intra-scene
                  dynamic range 640 {\texttimes} 480 stacked image sensor for autonomous
                  vision systems},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185387},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185387},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/RuediQG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RyuAKR23,
  author       = {Sigang Ryu and
                  Adou Sangbone Assoa and
                  Shota Konno and
                  Arijit Raychowdhury},
  title        = {A 65nm 60mW Dual-Loop Adaptive Digital Beamformer with Optimized Sidelobe
                  Cancellation and On-Chip {DOA} Estimation for mm-Wave Applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185316},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185316},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/RyuAKR23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SakoNKNFMNKSYUK23,
  author       = {Mario Sako and
                  T. Nakajima and
                  Fumihiro Kono and
                  T. Nakano and
                  Masaki Fujiu and
                  Junji Musha and
                  Dai Nakamura and
                  Naoaki Kanagawa and
                  Y. Shimizu and
                  Kosuke Yanagidaira and
                  Tetsuaki Utsumi and
                  T. Kawano and
                  Yoshikazu Hosomura and
                  Hiroki Yabe and
                  M. Kano and
                  Hiroshi Sugawara and
                  A. H. Sravan and
                  K. Hayashi and
                  Toshiyuki Kouchi and
                  Y. Watanabe},
  title        = {A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm\({}^{\mbox{2}}\)
                  bit density with 3.2Gbps interface and 205MB/s program throughput},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185237},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185237},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SakoNKNFMNKSYUK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SchonBDFGHHVKLG23,
  author       = {Guillaume Schon and
                  Denis Bourke and
                  Pierre{-}Antoine Doisneau and
                  Thomas Finateu and
                  Adrien Gonzalez and
                  Naoyuki Hanajima and
                  Tahar Hitana and
                  Lucas Janse Van Vuuren and
                  Moataz Kadry and
                  Charles Laurent and
                  Florian Le Goff and
                  Daniel Matolin and
                  Adel Mezaour and
                  Beno{\^{\i}}t Michel and
                  Thulaxan Naguleswaran and
                  Tjaart Opperman and
                  Patrice Perrin and
                  Etienne Reynaud and
                  Farzaneh Shahrokhi and
                  Hiba Tahachouite and
                  Chen Tianfan and
                  Gerd Van den Branden and
                  Akli Ziram and
                  Jean{-}Luc Jaffard and
                  Christoph Posch},
  title        = {A 320 x 320 1/5" {BSI-CMOS} stacked event sensor for low-power vision
                  applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185354},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185354},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SchonBDFGHHVKLG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ShamannaAAAABCC23,
  author       = {M. Shamanna and
                  E. Abuayob and
                  G. Aenuganti and
                  C. Alvares and
                  J. Antony and
                  A. Bahudhanam and
                  A. Chandran and
                  P. Chew and
                  A. Chatterjee and
                  B. Chauhan and
                  N. Dandeti and
                  J. Desai and
                  M. Doyle and
                  T. Dmukauskas and
                  P. Farache and
                  E. Fetzer and
                  K. Fischer and
                  P. Hack and
                  Y. Greenzweig and
                  J. Giacobbe and
                  Walid M. Hafez and
                  E. Haralson and
                  A. Hegde and
                  A. Illa and
                  M. Islam and
                  S. Jain and
                  M. Jang and
                  J. Nguyen and
                  T. Tong and
                  L. Jiang and
                  Eric Karl and
                  P. Kalangi and
                  G. Khoo and
                  A. Krishnamoorthy and
                  B. Kuns and
                  W. Li and
                  R. Livengood and
                  T. Malik and
                  R. Priyanka and
                  H. Faraby and
                  Y. Maymon and
                  K. Mistry and
                  K. Morgan and
                  S. Natarajan and
                  O. Nevo and
                  M. Oh and
                  P. Pardy and
                  J. Park and
                  P. Penmatsa and
                  B. Phelps and
                  C. Peterson and
                  S. Rajappa and
                  A. Raveh and
                  A Rezaie and
                  T. Ravishankar and
                  R. Ramaswamy and
                  S. Reddy and
                  R. Saha and
                  S. Sen and
                  R. Sanchez and
                  R. Sanaga and
                  B. Simkhovich and
                  Bernhard Sell and
                  M. Senger and
                  B. Schnarch and
                  M. Seshadri and
                  O. Sidorov and
                  S. Subramanian and
                  K. Subramanian and
                  B. Truong and
                  S. Bangalore and
                  Jeffery Hicks and
                  S. Venkatesh and
                  D. Christensen and
                  K. Bhargav and
                  M. Von Haartman and
                  P. Joshi and
                  S. Zickel and
                  C.{-}H. Lin and
                  J. Huening and
                  T.{-}H. Wu and
                  N. Bakken and
                  A. Afzal and
                  A. Raman and
                  Sj. Rao and
                  V. Kawar and
                  J. Neirynck and
                  D. Bradley and
                  M. Duwe and
                  S. Wu and
                  V. Patil and
                  M. Bayoumy},
  title        = {E-Core Implementation in Intel 4 with PowerVia (Backside Power) Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185369},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185369},
  timestamp    = {Thu, 31 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ShamannaAAAABCC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ShinKLK23,
  author       = {Seunghwa Shin and
                  Gyeong{-}Gu Kang and
                  Gyu{-}Wan Lim and
                  Hyun{-}Sik Kim},
  title        = {A Mobile {OLED} Source-Driver {IC} featuring Ultra-Compact 3-Stage-Cascaded
                  10-Bit {DAC} and 42V/{\(\mu\)}s-Slew-Rate True-DC-Interpolative Super-OTA
                  Buffer},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185301},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185301},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ShinKLK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SistoPCMFZCJVSZ23,
  author       = {Giuliano Sisto and
                  R. Preston and
                  Rongmei Chen and
                  Gioele Mirabelli and
                  Anita Farokhnejad and
                  Yun Zhou and
                  Ivan Ciofi and
                  Anne Jourdain and
                  A. Veloso and
                  Michele Stucchi and
                  Odysseas Zografos and
                  Pieter Weckx and
                  Geert Hellings and
                  Julien Ryckaert},
  title        = {Block-level Evaluation and Optimization of Backside {PDN} for High-Performance
                  Computing at the {A14} node},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185211},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185211},
  timestamp    = {Sat, 20 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SistoPCMFZCJVSZ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SivaramI23,
  author       = {Siva Sivaram and
                  Alper Ilkbahar},
  title        = {Searching for Nonlinearity: Scaling Limits in {NAND} Flash},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185165},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185165},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SivaramI23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SonPJKKCYKJMHJS23,
  author       = {Kihwang Son and
                  Seulki Park and
                  Kyunghoon Jung and
                  Jun{-}Gyu Kim and
                  Younggun Ko and
                  Keonyong Cheon and
                  Changkeun Yoon and
                  Jiho Kim and
                  Jaehun Jeong and
                  Taehun Myung and
                  Changmin Hong and
                  Weonwi Jang and
                  Min{-}Chul Sun and
                  Sungil Jo and
                  Ju{-}Youn Kim and
                  Byungmoo Song and
                  Yuri Yasuda{-}Masuoka and
                  Ja{-}Hum Ku and
                  Gitae Jeong},
  title        = {Highly Reliable/Manufacturable 4nm FinFET Platform Technology {(SF4X)}
                  for {HPC} Application with Dual-CPP/HP-HD Standard Cells},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185365},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185365},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SonPJKKCYKJMHJS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SongAMBBDTTVHSB23,
  author       = {Minyoung Song and
                  Erwin Allebes and
                  Chris Marshall and
                  Anoop Narayan Bhat and
                  Elbert Bechthum and
                  Johan Dijkhuis and
                  Stefano Traferro and
                  Evgenii Tiurin and
                  Peter Vis and
                  Johan H. C. van den Heuvel and
                  Mohieddine El Soussi and
                  Pepijn Boer and
                  Alireza Sheikh and
                  Bernard Meyer and
                  Jiang Liu and
                  Stan van der Ven and
                  Nick Winkel and
                  Martijn Hijdra and
                  Gururaja Kasanadi Ramachandra and
                  Yunus Baykal and
                  Huib Visser and
                  Peng Zhang and
                  Arjan Breeschoten and
                  Yao{-}Hong Liu and
                  Christian Bachmann},
  title        = {An 8.7 mW/TX, 21 mW/RX 6-to-9GHz {IEEE} 802.15.4a/4z Compliant {IR-UWB}
                  Transceiver with Pulse Pre-Emphasis achieving 14mm Ranging Precision},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185245},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185245},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SongAMBBDTTVHSB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SongHKKPY23,
  author       = {Seokchan Song and
                  Donghyeon Han and
                  Sangjin Kim and
                  Sangyeob Kim and
                  Gwangtae Park and
                  Hoi{-}Jun Yoo},
  title        = {{GPPU:} {A} 330.4-{\(\mu\)}J/ task Neural Path Planning Processor
                  with Hybrid {GNN} Acceleration for Autonomous 3D Navigation},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185367},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185367},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SongHKKPY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SongKLF23,
  author       = {Seungheun Song and
                  Taewook Kang and
                  Seungjong Lee and
                  Michael P. Flynn},
  title        = {A 150-MS/s Fully Dynamic SAR-Assisted Pipeline {ADC} Using a Floating
                  Ring Amplifier and Gain-Enhancing Miller Negative-C},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185377},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185377},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SongKLF23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SpetalnickCKCLK23,
  author       = {Samuel D. Spetalnick and
                  Muya Chang and
                  Shota Konno and
                  Brian Crafton and
                  Ashwin Sanjay Lele and
                  Win{-}San Khwa and
                  Yu{-}Der Chih and
                  Meng{-}Fan Chang and
                  Arijit Raychowdhury},
  title        = {A 2.38 MCells/mm\({}^{\mbox{2}}\) 9.81 -350 {TOPS/W} {RRAM} Compute-in-Memory
                  Macro in 40nm {CMOS} with Hybrid Offset/IOFF Cancellation and {ICELL}
                  {RBLSL} Drop Mitigation},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185424},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185424},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SpetalnickCKCLK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SrimaniYRRNWMFH23,
  author       = {Tathagata Srimani and
                  Andrew C. Yu and
                  Robert M. Radway and
                  Dennis Rich and
                  Mark Nelson and
                  S. Wong and
                  Denis Murphy and
                  Samuel Fuller and
                  Gage Hills and
                  Subhasish Mitra and
                  Max M. Shulaker},
  title        = {Foundry Monolithic 3D {BEOL} Transistor + Memory Stack: Iso-performance
                  and Iso-footprint {BEOL} Carbon Nanotube {FET+RRAM} vs. {FEOL} Silicon
                  {FET+RRAM}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185414},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185414},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/SrimaniYRRNWMFH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SuzukiHBUU23,
  author       = {Kenta Suzuki and
                  Keizo Hiraga and
                  Kazuhiro Bessho and
                  Kimiyoshi Usami and
                  Taku Umebayashi},
  title        = {A 40 nm 2 kb MTJ-Based Non-Volatile {SRAM} Macro with Novel Data-Aware
                  Store Architecture for Normally Off Computing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185432},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185432},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SuzukiHBUU23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SuzukiULTT23,
  author       = {Yasunari Suzuki and
                  Yosuke Ueno and
                  Wang Liao and
                  Masamitsu Tanaka and
                  Teruo Tanimoto},
  title        = {Circuit designs for practical-scale fault-tolerant quantum computing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185351},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185351},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SuzukiULTT23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SuzukiYYGOKAKCM23,
  author       = {Junnosuke Suzuki and
                  Jaehoon Yu and
                  Mari Yasunaga and
                  {\'{A}}ngel L{\'{o}}pez Garc{\'{\i}}a{-}Arias and
                  Yasuyuki Okoshi and
                  Shungo Kumazawa and
                  Kota Ando and
                  Kazushi Kawamura and
                  Thiem Van Chu and
                  Masato Motomura},
  title        = {Pianissimo: {A} Sub-mW Class {DNN} Accelerator with Progressive Bit-by-Bit
                  Datapath Architecture for Adaptive Inference at Edge},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185293},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185293},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/SuzukiYYGOKAKCM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SwaminathanSWLS23,
  author       = {Raja Swaminathan and
                  Michael J. Schulte and
                  Brett Wilkerson and
                  Gabriel H. Loh and
                  Alan Smith and
                  Norman James},
  title        = {{AMD} Instinct\({}^{\mbox{TM}}\) {MI250X} Accelerator enabled by Elevated
                  Fanout Bridge Advanced Packaging Architecture},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185224},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185224},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/SwaminathanSWLS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TakatsukaOIHISW23,
  author       = {Takafumi Takatsuka and
                  Jun Ogi and
                  Yasuji Ikeda and
                  Kazuki Hizu and
                  Yutaka Inaoka and
                  Shunsuke Sakama and
                  Iori Watanabe and
                  T. Ishikawa and
                  Shohei Shimada and
                  Junki Suzuki and
                  Hidenori Maeda and
                  Kenji Toshima and
                  Yusuke Nonaka and
                  Akifumi Yamamura and
                  Hideki Ozawa and
                  Fumihiko Koga and
                  Yusuke Oike},
  title        = {A 3.36 {\(\mathrm{\mu}\)}m-pitch {SPAD} photon-counting image sensor
                  using clustered multi-cycle clocked recharging technique with intermediate
                  most-significant-bit readout},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185241},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185241},
  timestamp    = {Mon, 08 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TakatsukaOIHISW23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TanejaSKDM23,
  author       = {Sachin Taneja and
                  Vikram B. Suresh and
                  Raghavan Kumar and
                  Vivek De and
                  Sanu Mathew},
  title        = {218Kauth/s, 3nJ/auth SCA/ML-Resistant Privacy-Preserving Mutual Authentication
                  Accelerator with a Crypto-Double-Coupled {PUF} in 4nm class {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185214},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185214},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TanejaSKDM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TangCHBZCLZTWMY23,
  author       = {Wei Tang and
                  Sung{-}Gun Cho and
                  Tim Tri Hoang and
                  Jacob Botimer and
                  Wei Qiang Zhu and
                  Ching{-}Chi Chang and
                  Cheng{-}Hsun Lu and
                  Junkang Zhu and
                  Yaoyu Tao and
                  Tianyu Wei and
                  Naomi Kavi Motwani and
                  Mani Yalamanchi and
                  Ramya Yarlagadda and
                  Sirisha Kale and
                  Mark Flannigan and
                  Allen Chan and
                  Thungoc Tran and
                  Sergey Y. Shumarayev and
                  Zhengya Zhang},
  title        = {Arvon: {A} Heterogeneous SiP Integrating a 14nm {FPGA} and Two 22nm
                  1.8TFLOPS/W DSPs with 1.7Tbps/mm\({}^{\mbox{2}}\) {AIB} 2.0 Interface
                  to Provide Versatile Workload Acceleration},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185388},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185388},
  timestamp    = {Sun, 30 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TangCHBZCLZTWMY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TaoZSLH23,
  author       = {Weichen Tao and
                  Weichen Zhao and
                  Robert Bogdan Staszewski and
                  Fujiang Lin and
                  Yizhe Hu},
  title        = {An 18.8-to-23.3 GHz {ADPLL} Based on Charge-Steering-Sampling Technique
                  Achieving 75.9 fs {RMS} Jitter and -252 dB FoM},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185415},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185415},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TaoZSLH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TharejaPWDYSZCH23,
  author       = {Gaurav Thareja and
                  Ashish Pal and
                  Xingye Wang and
                  Sefa Dag and
                  Shi You and
                  Shashank Sharma and
                  Qing Zhu and
                  Carmen L. Cervantes and
                  Shinjae Hwang and
                  Matthew Spuller and
                  Ben Ng and
                  Pradeep S. Kumar and
                  Norman Tam and
                  Max Gage and
                  Sameer Deshpande and
                  Zhiyuan Wu and
                  Alexander Jansen and
                  Liton Dey and
                  Feng Chen and
                  Xianjin Xie and
                  Keyvan Kashefizadeh and
                  Vinod Reddy and
                  Andy Lo and
                  Zhebo Chen and
                  Sidney Huey and
                  Jianshe Tang and
                  He Ren and
                  Mehul Naik and
                  Brian Brown and
                  Sree Kesapragada and
                  Buvna Ayyagari{-}Sangamalli and
                  El Mehdi Bazizi and
                  Xianmin Tang},
  title        = {{BEOL} Interconnect Innovation: Materials, Process and Systems Co-optimization
                  for 3nm Node and Beyond},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185299},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185299},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TharejaPWDYSZCH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TimmermansFHLC23,
  author       = {Martijn Timmermans and
                  Marco Fattori and
                  Pieter Harpe and
                  Yao{-}Hong Liu and
                  Eugenio Cantatore},
  title        = {A 3-320 fJ/conv.step Continuous Time Level Crossing {ADC} with Dynamic
                  Self-Biasing Comparators Achieving 61.4 dB-SNDR},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185322},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185322},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TimmermansFHLC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ToprasertpongLC23,
  author       = {Kasidit Toprasertpong and
                  Shuhan Liu and
                  Jian Chen and
                  Sumaiya Wahid and
                  Koustav Jana and
                  Wei{-}Chen Chen and
                  Shengman Li and
                  Eric Pop and
                  H.{-}S. Philip Wong},
  title        = {Co-designed Capacitive Coupling-Immune Sensing Scheme for Indium-Tin-Oxide
                  {(ITO)} 2T Gain Cell Operating at Positive Voltage Below 2 {V}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185433},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185433},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ToprasertpongLC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TsengFFAWKB23,
  author       = {Chien{-}Wei Tseng and
                  Zhen Feng and
                  Zichen Fan and
                  Hyochan An and
                  Yunfan Wang and
                  Hun{-}Seok Kim and
                  David T. Blaauw},
  title        = {A Reconfigurable Analog {FIR} Filter Achieving -70dB Rejection with
                  Sharp Transition for Narrowband Receivers},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185222},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185222},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TsengFFAWKB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TungY23,
  author       = {Chih{-}Hang Tung and
                  Doug C. H. Yu},
  title        = {An Integrated System Scaling Solution for Future High Performance
                  Computing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185238},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185238},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/TungY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Vega-GonzalezRC23,
  author       = {Victor Vega{-}Gonzalez and
                  D. Radisic and
                  Bt Chan and
                  S. Choudhury and
                  S. Wang and
                  A. Mingardi and
                  Q. Toan Le and
                  H. Decoster and
                  Y. Oniki and
                  P. Puttarame and
                  Kevin Vandersmissen and
                  J. P. Soulie and
                  A. Peter and
                  A. Sepulveda and
                  D. Batuk and
                  G. T. Martinez and
                  Olivier Richard and
                  J{\"{u}}rgen B{\"{o}}mmels and
                  S. Biesemans and
                  E. Dentoni Litta and
                  Naoto Horiguchi and
                  S. Park and
                  Zsolt Tokei},
  title        = {Integration of a Stacked Contact {MOL} for Monolithic {CFET}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185260},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185260},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/Vega-GonzalezRC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangALGHWFYSP0P23,
  author       = {Chun Wang and
                  Ibrahim Abdo and
                  Chenxin Liu and
                  Carrel da Gomez and
                  Hans Herdian and
                  Wenqian Wang and
                  Xi Fu and
                  Dongwon You and
                  Abanob Shehata and
                  Sunghwan Park and
                  Yun Wang and
                  Jian Pang and
                  Hiroyuki Sakai and
                  Atsushi Shirane and
                  Kenichi Okada},
  title        = {A Sub-THz Full-Duplex Phased-Array Transceiver with Self-Interference
                  Cancellation and {LO} Feedthrough Suppression},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185423},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185423},
  timestamp    = {Sun, 30 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WangALGHWFYSP0P23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangJDSCYK023,
  author       = {Wei Wang and
                  Liwen Jiang and
                  Shayok Dutta and
                  Yumin Su and
                  Zhiyu Chen and
                  Zhanghao Yu and
                  Caleb Kemere and
                  Kaiyuan Yang},
  title        = {A 36nW {CMOS} Temperature Sensor with {\textless}0.1K Inaccuracy and
                  Uniform Resolution},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185286},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185286},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WangJDSCYK023.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangLSCHVSGPLLH23,
  author       = {Li{-}Chen Wang and
                  W. Li and
                  Nirmaan Shanker and
                  Suraj S. Cheema and
                  Shang{-}Lin Hsu and
                  S. Volkman and
                  U. Sikder and
                  C. Garg and
                  J.{-}H. Park and
                  Y.{-}H. Liao and
                  Yen{-}Kai Lin and
                  Chenming Hu and
                  Sayeef S. Salahuddin},
  title        = {Record Transconductance in Leff{\textasciitilde}30 nm Self-Aligned
                  Replacement Gate {ETSOI} nFETs Using Low {EOT} Negative Capacitance
                  HfO2-ZrO2 Superlattice Gate Stack},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185436},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185436},
  timestamp    = {Thu, 28 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WangLSCHVSGPLLH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangLY23,
  author       = {Li Wang and
                  Zilu Liu and
                  C. Patrick Yue},
  title        = {A 24-30 GHz Cascaded {QPLL} Achieving 56.8-fs {RMS} Jitter and -248.6-dB
                  FoMjitter},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185269},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185269},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WangLY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangQDYZGYLW0Y23,
  author       = {Yang Wang and
                  Yubin Qin and
                  Dazheng Deng and
                  Xiaolong Yang and
                  Zhiren Zhao and
                  Ruiqi Guo and
                  Zhiheng Yue and
                  Leibo Liu and
                  Shaojun Wei and
                  Yang Hu and
                  Shouyi Yin},
  title        = {A 28nm 77.35TOPS/W Similar Vectors Traceable Transformer Processor
                  with Principal-Component-Prior Speculating and Dynamic Bit-wise Stationary
                  Computing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185403},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185403},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WangQDYZGYLW0Y23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangYXBLBJZTGSZ23,
  author       = {Song Wang and
                  Bing Yu and
                  Wenwu Xiao and
                  Fujun Bai and
                  Xiaodong Long and
                  Liang Bai and
                  Xuerong Jia and
                  Fengguo Zuo and
                  Jie Tan and
                  Yixin Guo and
                  Peng Sun and
                  Jun Zhou and
                  Qiong Zhan and
                  Sheng Hu and
                  Yu Zhou and
                  Yi Kang and
                  Qiwei Ren and
                  Xiping Jiang},
  title        = {A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded {DRAM} with Multilayer
                  Arrays by Fine Pitch Hybrid Bonding and Mini-TSV},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185427},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185427},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WangYXBLBJZTGSZ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangZKJHSZLKLZG23,
  author       = {Xiaolin Wang and
                  Zijie Zheng and
                  Qiwen Kong and
                  Leming Jiao and
                  Kaizhen Han and
                  Chen Sun and
                  Zuopu Zhou and
                  Long Liu and
                  Yuye Kang and
                  Gan Liu and
                  Dong Zhang and
                  Xiao Gong},
  title        = {First Demonstration of BEOL-Compatible {MFMIS} Fe-FETs with 3D Multi-Fin
                  Floating Gate: In-situ ALD-deposited MFM, {LCH} of 50 nm, {\textgreater}
                  2{\texttimes}10\({}^{\mbox{9}}\) Endurance, and 58.3{\%} Area Saving},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185306},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185306},
  timestamp    = {Tue, 19 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/WangZKJHSZLKLZG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangZXZSSJYWLL23,
  author       = {Dong Wang and
                  Jiazheng Zhou and
                  Hui Xu and
                  Ningyuan Zhang and
                  Xiaolei Su and
                  Zhengkun Shen and
                  Haoyun Jiang and
                  Fan Yang and
                  Yixiao Wang and
                  Junhua Liu and
                  Huailin Liao},
  title        = {An All-Digital Outphasing Transmitter {IC} for Ka-Band Bit-to-RF Concurrent
                  Multi-Beam {DBF} Array},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185304},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185304},
  timestamp    = {Sun, 30 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WangZXZSSJYWLL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WeiC023,
  author       = {Yijie Wei and
                  Xi Chen and
                  Jie Gu},
  title        = {Human Activity Recognition SoC for {AR/VR} with Integrated Neural
                  Sensing, {AI} Classifier and Chained Infrared Communication for Multi-chip
                  Collaboration},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185392},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185392},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WeiC023.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WenHHWCLCSKWLLH23,
  author       = {Tai{-}Hao Wen and
                  Je{-}Min Hung and
                  Hung{-}Hsi Hsu and
                  Yuan Wu and
                  Fu{-}Chun Chang and
                  Chung{-}Yuan Li and
                  Chih{-}Han Chien and
                  Chin{-}I Su and
                  Win{-}San Khwa and
                  Jui{-}Jen Wu and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Mon{-}Shu Ho and
                  Yu{-}Der Chih and
                  Tsung{-}Yung Jonathan Chang and
                  Meng{-}Fan Chang},
  title        = {A 28nm Nonvolatile {AI} Edge Processor using 4Mb Analog-Based Near-Memory-Compute
                  ReRAM with 27.2 {TOPS/W} for Tiny {AI} Edge Devices},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185326},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185326},
  timestamp    = {Tue, 20 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/WenHHWCLCSKWLLH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WuHSCHCCSWYCLRW23,
  author       = {Ming{-}Hung Wu and
                  Ming{-}Chun Hong and
                  Ching Shih and
                  Yao{-}Jen Chang and
                  Yu{-}Chen Hsin and
                  Shih{-}Ching Chiu and
                  Kuan{-}Ming Chen and
                  Yi{-}Hui Su and
                  Chih{-}Yao Wang and
                  Shan{-}Yi Yang and
                  Guan{-}Long Chen and
                  Hsin{-}Han Lee and
                  Sk. Ziaur Rahaman and
                  I{-}Jung Wang and
                  Chen{-}Yi Shih and
                  Tsun{-}Chun Chang and
                  Jeng{-}Hua Wei and
                  Shyh{-}Shyuan Sheu and
                  Wei{-}Chung Lo and
                  Shih{-}Chieh Chang and
                  Tuo{-}Hung Hou},
  title        = {{U-MRAM:} Transistor-Less, High-Speed {(10} ns), Low-Voltage {(0.6}
                  V), Field-Free Unipolar {MRAM} for High-Density Data Memory},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185336},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185336},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WuHSCHCCSWYCLRW23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WuHSFAHSCCLYQYL23,
  author       = {Wen{-}Chia Wu and
                  Terry Y. T. Hung and
                  D. Mahaveer Sathaiya and
                  Dongxu Fan and
                  Goutham Arutchelvan and
                  Chen{-}Feng Hsu and
                  Sheng{-}Kai Su and
                  Ang{-}Sheng Chou and
                  Edward Chen and
                  Weisheng Li and
                  Zhihao Yu and
                  Hao Qiu and
                  Ying{-}Mei Yang and
                  Kuang{-}I Lin and
                  Yun{-}Yang Shen and
                  Wen{-}Hao Chang and
                  San Lin Liew and
                  Vincent D.{-}H. Hou and
                  Jin Cai and
                  Chung{-}Cheng Wu and
                  Jeff Wu and
                  H.{-}S. Philip Wong and
                  Xinran Wang and
                  Chao{-}Hsin Chien and
                  Chao{-}Ching Cheng and
                  Iuliana P. Radu},
  title        = {Scaled contact length with low contact resistance in monolayer 2D
                  channel transistors},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185408},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185408},
  timestamp    = {Thu, 03 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/WuHSFAHSCCLYQYL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/XiaoWBHAMA23,
  author       = {T. Patrick Xiao and
                  W. S. Wahby and
                  Christopher H. Bennett and
                  Park Hays and
                  V. Agrawal and
                  Matthew J. Marinella and
                  Sapan Agarwal},
  title        = {Enabling High-Speed, High-Resolution Space-based Focal Plane Arrays
                  with Analog In-Memory Computing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185348},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185348},
  timestamp    = {Fri, 04 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/XiaoWBHAMA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/XieSKIKKY23,
  author       = {Wenao Xie and
                  Haoyang Sang and
                  Beomseok Kwon and
                  Dongseok Im and
                  Sangjin Kim and
                  Sangyeob Kim and
                  Hoi{-}Jun Yoo},
  title        = {A 709.3 {TOPS/W} Event-Driven Smart Vision SoC with High-Linearity
                  and Reconfigurable {MRAM} {PIM}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185337},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185337},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/XieSKIKKY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/XieYNSLFRPYZCP23,
  author       = {Qingyun Xie and
                  Mengyang Yuan and
                  John Niroula and
                  Bejoy Sikder and
                  Shisong Luo and
                  Kai Fu and
                  Nitul S. Rajput and
                  Ayan Biswas Pranta and
                  Pradyot Yadav and
                  Yuji Zhao and
                  Nadim Chowdhury and
                  Tom{\'{a}}s Palacios},
  title        = {Towards {DTCO} in High Temperature GaN-on-Si Technology: Arithmetic
                  Logic Unit at 300 {\textdegree}C and {CAD} Framework up to 500 {\textdegree}C},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185364},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185364},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/XieYNSLFRPYZCP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/XuYHLSX23,
  author       = {Kai Xu and
                  Bowen Yu and
                  Jun Hu and
                  Yubin Li and
                  Robert Bogdan Staszewski and
                  Hongtao Xu},
  title        = {A 50{\(\mu\)}W Ring-Type Complementary Inverse-Class-D Oscillator
                  with 191.4dBc/Hz FoM and 205.6dBc/Hz FoMA},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185366},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185366},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/XuYHLSX23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/XuanBHKSLKMSLWA23,
  author       = {Zhe Xuan and
                  Ganesh Balamurugan and
                  Duanni Huang and
                  Ranjeet Kumar and
                  Jahnavi Sharma and
                  Cooper Levy and
                  Jinyong Kim and
                  Chaoxuan Ma and
                  Guan{-}Lin Su and
                  Songtao Liu and
                  Xinru Wu and
                  Tolga Acikalin and
                  Haisheng Rong and
                  James E. Jaussi},
  title        = {A 256 Gbps Heterogeneously Integrated Silicon Photonic Microring-based
                  {DWDM} Receiver Suitable for In-Package Optical {I/O}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185280},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185280},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/XuanBHKSLKMSLWA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Yan0JSTZFLC23,
  author       = {Angxiao Yan and
                  Wei Deng and
                  Haikun Jia and
                  Shiyan Sun and
                  Chao Tang and
                  Bufan Zhu and
                  Yu Fu and
                  Hongzhuo Liu and
                  Baoyong Chi},
  title        = {An 11.4-to-16.4GHz {FMCW} Digital {PLL} with Cycle-slipping Compensation
                  and Back-tracking {DPD} Achieving 0.034{\%} {RMS} Frequency Error
                  under 3.4-GHz Chirp Bandwidth and 960-MHz/{\(\mu\)}s Chirp Slope},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185335},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185335},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/Yan0JSTZFLC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YangOLZI23,
  author       = {Zunsong Yang and
                  Masaru Osada and
                  Shuowei Li and
                  Yuyang Zhu and
                  Tetsuya Iizuka},
  title        = {A Reference-Sampling {PLL} with Low-Ripple Double-Sampling {PD} Achieving
                  -80-dBc Reference Spur and -259-dB FoM with 12-pF Input Load},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185259},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185259},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YangOLZI23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YangSBXVCMHHR23,
  author       = {S. Yang and
                  Pieter Schuddinck and
                  Marie Garcia Bardon and
                  Yang Xiang and
                  Anabela Veloso and
                  B. T. Chan and
                  Gioele Mirabelli and
                  Gaspard Hiblot and
                  Geert Hellings and
                  Julien Ryckaert},
  title        = {{PPA} and Scaling Potential of Backside Power Options in {N2} and
                  {A14} Nanosheet Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185302},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185302},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YangSBXVCMHHR23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YeoHKKC23,
  author       = {Seongil Yeo and
                  Uyong Hyeon and
                  Mingyeong Kim and
                  Jusung Kim and
                  Kunhee Cho},
  title        = {A 19.8W/29.6W Hybrid Step-Up/Down {DC-DC} Converter with 97.2{\%}
                  Peak Efficiency for 1-Cell/2-Cell Battery Charger Applications},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185209},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185209},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YeoHKKC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YiKSPLKDJKCCKNC23,
  author       = {Jaeyun Yi and
                  Myoungsub Kim and
                  Jungwon Seo and
                  Namkyun Park and
                  Seungyun Lee and
                  Jongil Kim and
                  Gapsok Do and
                  Hongjin Jang and
                  Hyochol Koo and
                  Sunglae Cho and
                  Sujin Chae and
                  Taehoon Kim and
                  Myung{-}Hee Na and
                  Seonyong Cha},
  title        = {The chalcogenide-based memory technology continues: beyond 20nm 4-deck
                  256Gb cross-point memory},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185210},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185210},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YiKSPLKDJKCCKNC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YiKZDHP23,
  author       = {Il{-}Min Yi and
                  Srujan Kumar Kaile and
                  Yuanming Zhu and
                  Julian Camilo Gomez Diaz and
                  Sebastian Hoyos and
                  Samuel Palermo},
  title        = {A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFET},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185267},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185267},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YiKZDHP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YooJLCBLJKKLKJP23,
  author       = {J.{-}H. Yoo and
                  H.{-}B. Jo and
                  I.{-}G. Lee and
                  S.{-}M. Choi and
                  J.{-}M. Baek and
                  S. T. Lee and
                  H. Jang and
                  M. W. Kong and
                  H. H. Kim and
                  H. J. Lee and
                  H.{-}J. Kim and
                  H.{-}S. Jeong and
                  W.{-}S. Park and
                  D.{-}H. Ko and
                  S. H. Shin and
                  H.{-}M. Kwon and
                  S. K. Kim and
                  J. G. Kim and
                  J. Yun and
                  T. Kim and
                  K.{-}Y. Shin and
                  T.{-}W. Kim and
                  J.{-}K. Shin and
                  J.{-}H. Lee and
                  C.{-}S. Shin and
                  K.{-}S. Seo and
                  Dae{-}Hyun Kim},
  title        = {Lg = 60 nm In0.53 Ga0.47 As MBCFETs: From gm{\_}max = 13.7 mS/{\"{u}}m
                  and {Q} = 180 to virtual-source modeling},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185250},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185250},
  timestamp    = {Tue, 05 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/YooJLCBLJKKLKJP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YoonHKCKMKNC23,
  author       = {Sunghyun Yoon and
                  Sung{-}In Hong and
                  Daehyun Kim and
                  Garam Choi and
                  Young Mo Kim and
                  Kyunghoon Min and
                  Seiyon Kim and
                  Myung{-}Hee Na and
                  Seonyong Cha},
  title        = {{QLC} Programmable 3D Ferroelectric {NAND} Flash Memory by Memory
                  Window Expansion using Cell Stack Engineering},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185294},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185294},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YoonHKCKMKNC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YouWWCL23,
  author       = {Wei{-}Xiang You and
                  Cheng{-}Yin Wang and
                  Yih Wang and
                  Tsung{-}Yung Jonathan Chang and
                  Szuya Sandy Liao},
  title        = {Write-enhanced Single-ended 11T {SRAM} Enabling Single Bitcell Reconfigurable
                  Compute-in-Memory Employing Complementary FETs},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185283},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185283},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YouWWCL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YounisA0AKJH23,
  author       = {Mohamed Badr Younis and
                  Mostafa Gamal Ahmed and
                  Tianyu Wang and
                  Ahmed E. AbdelRahman and
                  Mahmoud A. Khalil and
                  Anup P. Jose and
                  Pavan Kumar Hanumolu},
  title        = {A 5.2 Gb/s 3 mm Air-Gap 4.7 pJ/bit Capacitively-Coupled Transceiver
                  for Giant Video Walls Enabled by a Dual-Edge Tracking Clock and Data
                  Recovery Loop},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185437},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185437},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/YounisA0AKJH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YuMH23,
  author       = {Hsin Yu and
                  John Carl Joel Salao Marquez and
                  Chih{-}Cheng Hsieh},
  title        = {A -20{\textdegree}C{\textasciitilde}+107{\textdegree}C 52mk-NETD Reference-cell-free
                  15-bits {ROIC} for 80{\texttimes}60 Micro-bolometer Thermal Imager},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185249},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185249},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YuMH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YuanDLCCLCZCLYW23,
  author       = {Jun Yuan and
                  Jie Deng and
                  Vicki Lin and
                  Ying Chen and
                  Joseph Chiu and
                  Minghuei Lin and
                  Jun Chen and
                  Deedee Zhang and
                  Yukai Chen and
                  David Liu and
                  Bo Yu and
                  Hao Wang and
                  Giri Nallapati and
                  Vivek Mohan and
                  Venu Sanaka and
                  Berkan Baran and
                  Frank Dahan and
                  Prasad Bhadri and
                  Rajesh Geol and
                  Venu Boynapalli and
                  Seyfi Bazarjani and
                  Paul Penzes and
                  Parag Agashe and
                  P. R. Chidambaram},
  title        = {High Performance 5G Mobile {SOC} Productization with 4nm {EUV} Fin-FET
                  Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185435},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185435},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YuanDLCCLCZCLYW23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YueZWHLYSJDLSYL23,
  author       = {Jinshan Yue and
                  Mingtao Zhan and
                  Zi Wang and
                  Yifan He and
                  Yaolei Li and
                  Songming Yu and
                  Wenyu Sun and
                  Lu Jie and
                  Chunmeng Dou and
                  Xueqing Li and
                  Nan Sun and
                  Huazhong Yang and
                  Ming Liu and
                  Yongpan Liu},
  title        = {A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization
                  Producer-Consumer Architecture and High-Frequency Read-Free {CIM}
                  Macro},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185315},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185315},
  timestamp    = {Thu, 16 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/YueZWHLYSJDLSYL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZamparetteM23,
  author       = {Roger Luis Brito Zamparette and
                  Kofi A. A. Makinwa},
  title        = {A 720 nW Current Sensor with 0-to-15 {V} Input Common-Mode Range and
                  {\(\pm\)}0.5{\%} Gain Error from -40 to 85 {\textdegree}C},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185309},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185309},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZamparetteM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZengJSEFCSYCS23,
  author       = {Nanyu Zeng and
                  Taesung Jung and
                  Mohit Sharma and
                  Guy Eichler and
                  Jason D. Fabbri and
                  R. James Cotton and
                  Eleonora Spinazzi and
                  Brett Youngerman and
                  Luca P. Carloni and
                  Kenneth L. Shepard},
  title        = {A Wireless, Mechanically Flexible, 25{\(\mu\)}m-Thick, 65, 536-Channel
                  Subdural Surface Recording and Stimulating Microelectrode Array with
                  Integrated Antennas},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185321},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185321},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZengJSEFCSYCS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangC0CM23,
  author       = {Minglei Zhang and
                  Yuefeng Cao and
                  Yan Zhu and
                  Chi{-}Hang Chan and
                  Rui Paulo Martins},
  title        = {A 79.5dB-SNDR Pipelined-SAR {ADC} with a Linearity-Shifting 32{\texttimes}
                  Dynamic Amplifier and Mounted-Over-Die Bypass Capacitors},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185416},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185416},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangC0CM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangKAYHSH23,
  author       = {Aoyang Zhang and
                  Daniel Kr{\"{u}}ger and
                  Behdad Aghelnejad and
                  Guang Yang and
                  Henry Hinton and
                  Yi{-}Qiao Song and
                  Donhee Ham},
  title        = {A Wideband {CMOS} {NMR} Spectrometer for Multinuclear Molecular Fingerprinting},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185407},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185407},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangKAYHSH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangKHKTLWYLC23,
  author       = {Nick Zhang and
                  Young Suk Kim and
                  Peter Hsu and
                  Samsoo Kim and
                  Derek Tao and
                  Hung{-}Jen Liao and
                  Ping{-}Wei Wang and
                  Geoffrey Yeap and
                  Quincy Li and
                  Tsung{-}Yung Jonathan Chang},
  title        = {A 4.24GHz 128X256 {SRAM} Operating Double Pump Read Write Same Cycle
                  in 5nm Technology},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185268},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185268},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangKHKTLWYLC23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangLFKA23,
  author       = {Hui Zhang and
                  Longyang Lin and
                  Qiang Fang and
                  Udara Samurdhi Harshanga Kalingage and
                  Massimo Alioto},
  title        = {Self-Referenced Design-Agnostic Laser Voltage Probing Attack Detection
                  with 100{\%} Protection Coverage, 58{\%} Area Overhead for Automated
                  Design},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185360},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185360},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangLFKA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangLNSAY23,
  author       = {Zhuocheng Zhang and
                  Zehao Lin and
                  Chang Niu and
                  Mengwei Si and
                  Muhammad Ashraful Alam and
                  Peide D. Ye},
  title        = {Ultrahigh Bias Stability of {ALD} In2O3 FETs Enabled by High Temperature
                  {O2} Annealing},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185292},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185292},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangLNSAY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangMZ0LMM23,
  author       = {Xiongjie Zhang and
                  Qiaobo Ma and
                  Anyang Zhao and
                  Yang Jiang and
                  Man{-}Kay Law and
                  Pui{-}In Mak and
                  Rui Paulo Martins},
  title        = {A 0.05-to-3.1A 585mA/mm\({}^{\mbox{3}}\) 97.3{\%}-Efficiency Outphase
                  Switched-Capacitor Hybrid Buck Converter with Relieved Capacitor Inrush
                  Current and COUT-Free Operation},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185256},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185256},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangMZ0LMM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangSLQXZFYHMF23,
  author       = {Yuncheng Zhang and
                  Zheng Sun and
                  Bangan Liu and
                  Junjun Qiu and
                  Dingxin Xu and
                  Yi Zhang and
                  Xi Fu and
                  Dongwon You and
                  Hongye Huang and
                  Waleed Madany and
                  Ashbir Aviat Fadila and
                  Zezheng Liu and
                  Wenqian Wang and
                  Yuang Xiong and
                  Atsushi Shirane and
                  Kenichi Okada},
  title        = {A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on
                  1-bit Delta-Sigma Modulator and Transformer Combined {FIR} FIlter},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185368},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185368},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangSLQXZFYHMF23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangWKZLHSWLJZ23,
  author       = {Dong Zhang and
                  Jixuan Wu and
                  Qiwen Kong and
                  Zuopu Zhou and
                  Long Liu and
                  Kaizhen Han and
                  Chen Sun and
                  Xiaolin Wang and
                  Gan Liu and
                  Leming Jiao and
                  Zijie Zheng and
                  Yuye Kang and
                  Jiezhi Chen and
                  Xiao Gong},
  title        = {Grain Size Reduction of Ferroelectric {HZO} Enabled by a Novel Solid
                  Phase Epitaxy {(SPE)} Approach: Working Principle, Experimental Demonstration,
                  and Theoretical Understanding},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185216},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185216},
  timestamp    = {Tue, 19 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangWKZLHSWLJZ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangZCQLWL23,
  author       = {Zhao Zhang and
                  Zhaoyu Zhang and
                  Yong Chen and
                  Nan Qi and
                  Jian Liu and
                  Nanjian Wu and
                  Liyuan Liu},
  title        = {A 64-Gb/s Reference-Less {PAM4} {CDR} with Asymmetrical Linear Phase
                  Detector Soring 231.5-fsrms Clock Jitter and 0.21-pJ/bit Energy Efficiency
                  in 40-nm {CMOS}},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185285},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185285},
  timestamp    = {Thu, 02 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangZCQLWL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangZLXDYZWY23,
  author       = {Jie Zhang and
                  Zhuocheng Zhang and
                  Zehao Lin and
                  Ke Xu and
                  Hongyi Dou and
                  Bo Yang and
                  Xinghang Zhang and
                  Haiyan Wang and
                  Peide D. Ye},
  title        = {First Demonstration of BEOL-Compatible Atomic-Layer-Deposited InGaZnO
                  TFTs with 1.5 nm Channel Thickness and 60 nm Channel Length Achieving
                  {ON/OFF} Ratio Exceeding 10\({}^{\mbox{11}}\), {SS} of 68 mV/dec,
                  Normal-off Operation and High Positive Gate Bias Stability},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185312},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185312},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhangZLXDYZWY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhaoCCHWLXCL23,
  author       = {Zefu Zhao and
                  Yu{-}Rui Chen and
                  Yun{-}Wen Chen and
                  Wan{-}Hsuan Hsieh and
                  Jer{-}Fu Wang and
                  Jia{-}Yang Lee and
                  Yifan Xing and
                  Guan{-}Hua Chen and
                  Chee Wee Liu},
  title        = {Towards Epitaxial Ferroelectric {HZO} on n\({}^{\mbox{+}}\)-Si/Ge
                  Substrates Achieving Record 2Pr = 84 {\(\mu\)}C/cm{\({^2}\)} and Endurance
                  {\textgreater} 1E11},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185233},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185233},
  timestamp    = {Wed, 03 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhaoCCHWLXCL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhengCLAWY23,
  author       = {Dongqi Zheng and
                  Adam Charnas and
                  Jian{-}Yu Lin and
                  Jackson Anderson and
                  Dana Weinstein and
                  Peide D. Ye},
  title        = {Ultrathin Atomic-Layer-Deposited In2O3 Radio-Frequency Transistors
                  with Record High fT of 36 GHz and {BEOL} Compatibility},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185331},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185331},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhengCLAWY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhengJZWLHSKZWN23,
  author       = {Zijie Zheng and
                  Leming Jiao and
                  Zuopu Zhou and
                  Yuxuan Wang and
                  Long Liu and
                  Kaizhen Han and
                  Chen Sun and
                  Qiwen Kong and
                  Dong Zhang and
                  Xiaolin Wang and
                  Kai Ni and
                  Xiao Gong},
  title        = {First Demonstration of Work Function-Engineered BEOL-Compatible {IGZO}
                  Non-Volatile {MFMIS} AFeFETs and Their Co-Integration with Volatile-AFeFETs},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185355},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185355},
  timestamp    = {Tue, 19 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhengJZWLHSKZWN23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhengWXKMLCSZLG23,
  author       = {Gerui Zheng and
                  Yuxuan Wang and
                  Haiwen Xu and
                  Rami Khazaka and
                  Lutz Muehlenbein and
                  Sheng Luo and
                  Xuanqi Chen and
                  Rui Shao and
                  Zijie Zheng and
                  Gengchiau Liang and
                  Xiao Gong},
  title        = {Record High Active Boron Doping using Low Temperature In-situ {CVD:}
                  Enabling Sub-5{\texttimes}10\({}^{\mbox{-10}}\) {\(\Omega\)}-cm\({}^{\mbox{2}}\)
                  {\(\rho\)}c from Cryogenic {(5} {K)} to Room Temperature},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185320},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185320},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhengWXKMLCSZLG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhouJKZHCSNG23,
  author       = {Zuopu Zhou and
                  Leming Jiao and
                  Qiwen Kong and
                  Zijie Zheng and
                  Kaizhen Han and
                  Yue Chen and
                  Chen Sun and
                  Bich{-}Yen Nguyen and
                  Xiao Gong},
  title        = {Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with
                  {BEOL} 3D Monolithically Integrated {IGZO} Access Transistor for 4F\({}^{\mbox{2}}\)
                  High-Density Integration},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185243},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185243},
  timestamp    = {Tue, 19 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhouJKZHCSNG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhouJZWZNG23,
  author       = {Zuopu Zhou and
                  Leming Jiao and
                  Zijie Zheng and
                  Xiaolin Wang and
                  Dong Zhang and
                  Kai Ni and
                  Xiao Gong},
  title        = {First Study of the Charge Trapping Aggravation Induced by Anti-Ferroelectric
                  Switching in the {MFIS} Stack},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185236},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185236},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhouJZWZNG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhuHJZRL23,
  author       = {Yi Zhu and
                  Yuhan Hou and
                  Jack Ji and
                  Aaron Zhou and
                  Andrew G. Richardson and
                  Xilin Liu},
  title        = {A Wireless Sensor-Brain Interface System for Tracking and Guiding
                  Animal Behaviors Through Goal-Directed Closed-loop Neuromodulation},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185303},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185303},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhuHJZRL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsit/2023,
  title        = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023},
  isbn         = {978-4-86348-806-9},
  timestamp    = {Fri, 28 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/2023.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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