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@inproceedings{DBLP:conf/fpga/AndersonNT04,
author = {Jason Helge Anderson and
Farid N. Najm and
Tim Tuan},
editor = {Russell Tessier and
Herman Schmit},
title = {Active leakage power optimization for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {33--41},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968287},
doi = {10.1145/968280.968287},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AndersonNT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BajracharyaSGE04,
author = {Sashisu Bajracharya and
Chang Shu and
Kris Gaj and
Tarek A. El{-}Ghazawi},
editor = {Russell Tessier and
Herman Schmit},
title = {Implementation of elliptic curve cryptosystems over GF(2\({}^{\mbox{n}}\))
in optimal normal basis on a reconfigurable computer},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {259},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968354},
doi = {10.1145/968280.968354},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BajracharyaSGE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BakerP04,
author = {Zachary K. Baker and
Viktor K. Prasanna},
editor = {Russell Tessier and
Herman Schmit},
title = {Time and area efficient pattern matching on FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {223--232},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968312},
doi = {10.1145/968280.968312},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BakerP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BerubeAM04,
author = {Paul Berube and
Jos{\'{e}} Nelson Amaral and
Mike H. MacGregor},
editor = {Russell Tessier and
Herman Schmit},
title = {An {FPGA} prototype for the experimental evaluation of a multizone
network cache},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {253},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968341},
doi = {10.1145/968280.968341},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BerubeAM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CaffarenaBLPN04,
author = {Gabriel Caffarena and
Slobodan Bojanic and
Juan A. L{\'{o}}pez and
Carlos E. Pedreira and
Octavio Nieto{-}Taladriz},
editor = {Russell Tessier and
Herman Schmit},
title = {High-speed systolic array for gene matching},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {248},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968325},
doi = {10.1145/968280.968325},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CaffarenaBLPN04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CarboneS04,
author = {Richard Carbone and
Andreas E. Savakis},
editor = {Russell Tessier and
Herman Schmit},
title = {A flexible hardware architecture for 2-D discrete wavelet transform},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {246},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968319},
doi = {10.1145/968280.968319},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CarboneS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChangH04,
author = {Mark L. Chang and
Scott Hauck},
editor = {Russell Tessier and
Herman Schmit},
title = {Least-significant bit optimization techniques for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {251},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968334},
doi = {10.1145/968280.968334},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ChangH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChenCLH04,
author = {Deming Chen and
Jason Cong and
Fei Li and
Lei He},
editor = {Russell Tessier and
Herman Schmit},
title = {Low-power technology mapping for {FPGA} architectures with dual supply
voltages},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {109--117},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968297},
doi = {10.1145/968280.968297},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ChenCLH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChenKLR04,
author = {Wang Chen and
Panos Kosmas and
Miriam Leeser and
Carey M. Rappaport},
editor = {Russell Tessier and
Herman Schmit},
title = {An {FPGA} implementation of the two-dimensional finite-difference
time-domain {(FDTD)} algorithm},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {213--222},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968311},
doi = {10.1145/968280.968311},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ChenKLR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Chmelar04,
author = {Erik Chmelar},
editor = {Russell Tessier and
Herman Schmit},
title = {Subframe multiplexing for {FPGA} manufacturing test configuration},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {245},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968315},
doi = {10.1145/968280.968315},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Chmelar04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ComptonH04,
author = {Katherine Compton and
Scott Hauck},
editor = {Russell Tessier and
Herman Schmit},
title = {Flexibility measurement of domain-specific reconfigurable hardware},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {155--161},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968303},
doi = {10.1145/968280.968303},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ComptonH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CongFHZ04,
author = {Jason Cong and
Yiping Fan and
Guoling Han and
Zhiru Zhang},
editor = {Russell Tessier and
Herman Schmit},
title = {Application-specific instruction generation for configurable processor
architectures},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {183--189},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968307},
doi = {10.1145/968280.968307},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CongFHZ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CzajkowskiR04,
author = {Tomasz S. Czajkowski and
Jonathan Rose},
editor = {Russell Tessier and
Herman Schmit},
title = {A synthesis oriented omniscient manual editor},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {89--98},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968295},
doi = {10.1145/968280.968295},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CzajkowskiR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DanekK04,
author = {Martin Danek and
Josef Kol{\'{a}}r},
editor = {Russell Tessier and
Herman Schmit},
title = {{FPGA} modelling for high-performance algorithms},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {251},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968335},
doi = {10.1145/968280.968335},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DanekK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DeHonHRHNRS04,
author = {Andr{\'{e}} DeHon and
Brad L. Hutchings and
Daryl Rudusky and
James Hwang and
Nikhil and
Salil Raje and
Adrian Stoica},
editor = {Russell Tessier and
Herman Schmit},
title = {What is the right model for programming and using modern FPGAs?},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {119},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968281},
doi = {10.1145/968280.968281},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/DeHonHRHNRS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DeHonW04,
author = {Andr{\'{e}} DeHon and
Michael J. Wilson},
editor = {Russell Tessier and
Herman Schmit},
title = {Nanowire-based sublithographic programmable logic arrays},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {123--132},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968299},
doi = {10.1145/968280.968299},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DeHonW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DenningDI04,
author = {Daniel Denning and
Malachy Devlin and
James Irvine},
editor = {Russell Tessier and
Herman Schmit},
title = {Hardware co-simulation in system generator of the {AES-128} encryption
algorithm},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {247},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968322},
doi = {10.1145/968280.968322},
timestamp = {Fri, 03 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DenningDI04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DossR04,
author = {Christopher C. Doss and
Robert L. Riley Jr.},
editor = {Russell Tessier and
Herman Schmit},
title = {FPGA-based implementation of single-precision exponential unit},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {248},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968324},
doi = {10.1145/968280.968324},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DossR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FerreraC04,
author = {Steve Ferrera and
Nicholas P. Carter},
editor = {Russell Tessier and
Herman Schmit},
title = {A magnetoelectronic macrocell employing reconfigurable threshold logic},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {143--151},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968301},
doi = {10.1145/968280.968301},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/FerreraC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GalanisTTSG04,
author = {Michalis D. Galanis and
George Theodoridis and
Spyros Tragoudas and
Dimitrios Soudris and
Constantinos E. Goutis},
editor = {Russell Tessier and
Herman Schmit},
title = {A novel coarse-grain reconfigurable data-path for accelerating {DSP}
kernels},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {252},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968337},
doi = {10.1145/968280.968337},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GalanisTTSG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GayasenTVKIT04,
author = {Aman Gayasen and
Yuh{-}Fang Tsai and
Narayanan Vijaykrishnan and
Mahmut T. Kandemir and
Mary Jane Irwin and
Tim Tuan},
editor = {Russell Tessier and
Herman Schmit},
title = {Reducing leakage energy in FPGAs using region-constrained placement},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {51--58},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968289},
doi = {10.1145/968280.968289},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GayasenTVKIT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GuoNVV04,
author = {Zhi Guo and
Walid A. Najjar and
Frank Vahid and
Kees A. Vissers},
editor = {Russell Tessier and
Herman Schmit},
title = {A quantitative analysis of the speedup factors of FPGAs over processors},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {162--170},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968304},
doi = {10.1145/968280.968304},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GuoNVV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GuoYCHZEDGKM04,
author = {Jong{-}Ru Guo and
Chao You and
Michael Chu and
Robert W. Heikaus and
Kuan Zhou and
Okan Erdogan and
Jiedong Diao and
Bryan S. Goda and
Russell P. Kraft and
John F. McDonald},
editor = {Russell Tessier and
Herman Schmit},
title = {The gigahertz {FPGA:} design consideration and applications},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {248},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968326},
doi = {10.1145/968280.968326},
timestamp = {Thu, 29 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GuoYCHZEDGKM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HinkelbeinKKMM04,
author = {Christian Hinkelbein and
Andrei Khomich and
Andreas Kugel and
Reinhard M{\"{a}}nner and
Matthias M{\"{u}}ller},
editor = {Russell Tessier and
Herman Schmit},
title = {Using an {FPGA} coprocessor for improving execution speed of {TRT-LUT:}
one of the feature extraction algorithms for {ATLAS} {LVL2} trigger},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {247},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968321},
doi = {10.1145/968280.968321},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HinkelbeinKKMM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/JaganathanSS04,
author = {Ranjesh G. Jaganathan and
Matthew Simpson and
Ron Sass},
editor = {Russell Tessier and
Herman Schmit},
title = {Automatic discovery, selection, and specialization of modules in {RCADE}},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {256},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968348},
doi = {10.1145/968280.968348},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/JaganathanSS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/JiangTB04,
author = {Tianyi Jiang and
Xiaoyong Tang and
Prithviraj Banerjee},
editor = {Russell Tessier and
Herman Schmit},
title = {High level area, delay and power estimation for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {249},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968329},
doi = {10.1145/968280.968329},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/JiangTB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KawanamiHNTNSK04,
author = {Takashi Kawanami and
Masakazu Hioki and
Hiroshi Nagase and
Toshiyuki Tsutsumi and
Tadashi Nakagawa and
Toshihiro Sekigawa and
Hanpei Koike},
editor = {Russell Tessier and
Herman Schmit},
title = {Preliminary performance analysis of flex power FPGA, a power reconfigurable
device with fine granularity},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {257},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968351},
doi = {10.1145/968280.968351},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KawanamiHNTNSK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KeaneBE04,
author = {John F. Keane and
Christopher Bradley and
Carl Ebeling},
editor = {Russell Tessier and
Herman Schmit},
title = {A compiled accelerator for biological cell signaling simulations},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {233--241},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968313},
doi = {10.1145/968280.968313},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KeaneBE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KohlbrennerG04,
author = {Paul Kohlbrenner and
Kris Gaj},
editor = {Russell Tessier and
Herman Schmit},
title = {An embedded true random number generator for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {71--78},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968292},
doi = {10.1145/968280.968292},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KohlbrennerG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KrishnanGB04,
author = {Rohini Krishnan and
Jos{\'{e}} Pineda de Gyvez and
Martijn T. Bennebroek},
editor = {Russell Tessier and
Herman Schmit},
title = {Low energy {FPGA} interconnect design},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {255},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968345},
doi = {10.1145/968280.968345},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KrishnanGB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KujothWGCC04,
author = {Richard B. Kujoth and
Chi{-}Wei Wang and
Derek B. Gottlieb and
Jeffrey J. Cook and
Nicholas P. Carter},
editor = {Russell Tessier and
Herman Schmit},
title = {A reconfigurable unit for a clustered programmable-reconfigurable
processor},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {200--209},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968309},
doi = {10.1145/968280.968309},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KujothWGCC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KuonADEC04,
author = {Ian Kuon and
Navid Azizi and
Ahmad Darabiha and
Aaron Egier and
Paul Chow},
editor = {Russell Tessier and
Herman Schmit},
title = {FPGA-based supercomputing: an implementation for molecular dynamics},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {253},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968340},
doi = {10.1145/968280.968340},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KuonADEC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KuonER04,
author = {Ian Kuon and
Aaron Egier and
Jonathan Rose},
editor = {Russell Tessier and
Herman Schmit},
title = {Transistor grouping and metal layer trade-offs in automatic tile layout
of FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {249},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968327},
doi = {10.1145/968280.968327},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KuonER04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LeeS04,
author = {Jae{-}Jin Lee and
Gi{-}Yong Song},
editor = {Russell Tessier and
Herman Schmit},
title = {Bit-level super-systolic array for {FIR} filter with a FPGA-based
bit-serial semi-systolic multiplier},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {249},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968328},
doi = {10.1145/968280.968328},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LeeS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LeonardYS04,
author = {Brian Leonard and
Jeff Young and
Ron Sass},
editor = {Russell Tessier and
Herman Schmit},
title = {Online placement infrastructure to support run-time reconfiguration},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {256},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968347},
doi = {10.1145/968280.968347},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LeonardYS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiLHC04,
author = {Fei Li and
Yan Lin and
Lei He and
Jason Cong},
editor = {Russell Tessier and
Herman Schmit},
title = {Low-power {FPGA} using pre-defined dual-Vdd/dual-Vt fabrics},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {42--50},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968288},
doi = {10.1145/968280.968288},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LiLHC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiuCCMCS04,
author = {Jianhua Liu and
Michael Chang and
Chung{-}Kuan Cheng and
John F. MacDonald and
Nan{-}Chi Chou and
Peter Suaris},
editor = {Russell Tessier and
Herman Schmit},
title = {Fast adders in modern FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {250},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968330},
doi = {10.1145/968280.968330},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LiuCCMCS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LodiGCCTC04,
author = {Andrea Lodi and
Roberto Giansante and
Carlo Chiesa and
Luca Ciccarelli and
Mario Toma and
Fabio Campi},
editor = {Russell Tessier and
Herman Schmit},
title = {Routing architecture for multi-context FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {246},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968318},
doi = {10.1145/968280.968318},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LodiGCCTC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Lopez-BuedoB04,
author = {Sergio L{\'{o}}pez{-}Buedo and
Eduardo I. Boemo},
editor = {Russell Tessier and
Herman Schmit},
title = {Making visible the thermal behaviour of embedded microprocessors on
FPGAs: a progress report},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {79--86},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968293},
doi = {10.1145/968280.968293},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Lopez-BuedoB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ManojJK04,
author = {A. Manoj Kumar and
B. Jayaram and
V. Kamakoti},
editor = {Russell Tessier and
Herman Schmit},
title = {{SHAPER:} synthesis for hybrid {FPGA} architectures containing {PLA}
elements using reconvergence analysis},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {251},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968333},
doi = {10.1145/968280.968333},
timestamp = {Wed, 04 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ManojJK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MehrotraSPCH04,
author = {Pronita Mehrotra and
Mrugendra Singhai and
Mike Pratt and
Mark Cassada and
Patrick Hamilton},
editor = {Russell Tessier and
Herman Schmit},
title = {{FPGA} implementation of a high speed network interface card for optical
burst switched networks},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {255},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968344},
doi = {10.1145/968280.968344},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/MehrotraSPCH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Metzgen04,
author = {Paul Metzgen},
editor = {Russell Tessier and
Herman Schmit},
title = {A high performance 32-bit {ALU} for programmable logic},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {61--70},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968291},
doi = {10.1145/968280.968291},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Metzgen04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/PionteckSSKG04,
author = {Thilo Pionteck and
Thorsten Staake and
Thomas Stiefmeier and
Lukusa D. Kabulepa and
Manfred Glesner},
editor = {Russell Tessier and
Herman Schmit},
title = {On the design of a function-specific reconfigurable: hardware accelerator
for the MAC-layer in WLANs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {258},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968352},
doi = {10.1145/968280.968352},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/PionteckSSKG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RahmanP04,
author = {Arifur Rahman and
Vijay Polavarapuv},
editor = {Russell Tessier and
Herman Schmit},
title = {Evaluation of low-leakage design techniques for field programmable
gate arrays},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {23--30},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968285},
doi = {10.1145/968280.968285},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RahmanP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RoySB04,
author = {Sanghamitra Roy and
Debjit Sinha and
Prithviraj Banerjee},
editor = {Russell Tessier and
Herman Schmit},
title = {An algorithm for trading off quantization error with hardware resources
for {MATLAB} based {FPGA} design},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {256},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968349},
doi = {10.1145/968280.968349},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RoySB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RuslanovJ04,
author = {Anatole D. Ruslanov and
Jeremy R. Johnson},
editor = {Russell Tessier and
Herman Schmit},
title = {An {FPGA} implementation of bene permutation networks},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {245},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968317},
doi = {10.1145/968280.968317},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RuslanovJ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SadasivamH04,
author = {Magesh Sadasivam and
Sangjin Hong},
editor = {Russell Tessier and
Herman Schmit},
title = {Dynamically reconfigurable architecture for high-throughput processing
of data centric applications},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {254},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968343},
doi = {10.1145/968280.968343},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SadasivamH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SaifAN04,
author = {Sherif M. Saif and
Hazem M. Abbas and
Salwa M. Nassar},
editor = {Russell Tessier and
Herman Schmit},
title = {An {FPGA} implementation of block truncation coding for gray and color
images},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {245},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968316},
doi = {10.1145/968280.968316},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SaifAN04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SantAnnaLM04,
author = {Remy Eskinazi Sant'Anna and
Manoel Eus{\'{e}}bio de Lima and
Paulo Romero Martins Maciel},
editor = {Russell Tessier and
Herman Schmit},
title = {A left-edge algorithm approach for scheduling and allocation of hardware
contexts in dynamically reconfigurable architectures},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {259},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968355},
doi = {10.1145/968280.968355},
timestamp = {Mon, 04 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SantAnnaLM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SelvakkumaranRRK04,
author = {Navaratnasothie Selvakkumaran and
Abhishek Ranjan and
Salil Raje and
George Karypis},
editor = {Russell Tessier and
Herman Schmit},
title = {Multi-resource aware partitioning algorithms for FPGAs with heterogeneous
resources},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {253},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968339},
doi = {10.1145/968280.968339},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/SelvakkumaranRRK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ShannonC04,
author = {Lesley Shannon and
Paul Chow},
editor = {Russell Tessier and
Herman Schmit},
title = {Using reconfigurability to achieve real-time profiling for hardware/software
codesign},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {190--199},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968308},
doi = {10.1145/968280.968308},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ShannonC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SharmaCEH04,
author = {Akshay Sharma and
Katherine Compton and
Carl Ebeling and
Scott Hauck},
editor = {Russell Tessier and
Herman Schmit},
title = {Exploration of pipelined {FPGA} interconnect structures},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {13--22},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968284},
doi = {10.1145/968280.968284},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SharmaCEH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SteckenbillerK04,
author = {Helmut Steckenbiller and
Rudi Knorr},
editor = {Russell Tessier and
Herman Schmit},
title = {Buffer schemes for runtime reconfiguration of function variants in
communication systems},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {247},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968323},
doi = {10.1145/968280.968323},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SteckenbillerK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SuarisLDC04,
author = {Peter Suaris and
Lung{-}Tien Liu and
Yuzheng Ding and
Nan{-}Chi Chou},
editor = {Russell Tessier and
Herman Schmit},
title = {Incremental physical resynthesis for timing optimization},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {99--108},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968296},
doi = {10.1145/968280.968296},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SuarisLDC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TanakaYK04,
author = {Katsunori Tanaka and
Shigeru Yamashita and
Yahiko Kambayashi},
editor = {Russell Tessier and
Herman Schmit},
title = {SPFD-based one-to-many rewiring},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {250},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968332},
doi = {10.1145/968280.968332},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TanakaYK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TeifelM04,
author = {John Teifel and
Rajit Manohar},
editor = {Russell Tessier and
Herman Schmit},
title = {Highly pipelined asynchronous FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {133--142},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968300},
doi = {10.1145/968280.968300},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TeifelM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TodorovichBCV04,
author = {Elias Todorovich and
Eduardo I. Boemo and
Francisco Cardells{-}Tormo and
Javier Valls},
editor = {Russell Tessier and
Herman Schmit},
title = {Power analysis and estimation tool integrated with {XPOWER}},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {259},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968356},
doi = {10.1145/968280.968356},
timestamp = {Wed, 04 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/TodorovichBCV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Underwood04,
author = {Keith D. Underwood},
editor = {Russell Tessier and
Herman Schmit},
title = {FPGAs vs. CPUs: trends in peak floating-point performance},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {171--180},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968305},
doi = {10.1145/968280.968305},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Underwood04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/VermaD04,
author = {Vinay Verma and
Shantanu Dutt},
editor = {Russell Tessier and
Herman Schmit},
title = {Roving testing using new built-in-self-tester designs for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {257},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968350},
doi = {10.1145/968280.968350},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/VermaD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/VinhB04,
author = {Phan Cong Vinh and
Jonathan P. Bowen},
editor = {Russell Tessier and
Herman Schmit},
title = {An algorithmic approach by heuristics to dynamical reconfiguration
of logic resources on reconfigurable FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {254},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968342},
doi = {10.1145/968280.968342},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/VinhB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WeaverHW04,
author = {Nicholas Weaver and
John R. Hauser and
John Wawrzynek},
editor = {Russell Tessier and
Herman Schmit},
title = {The {SFRA:} a corner-turn {FPGA} architecture},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {3--12},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968283},
doi = {10.1145/968280.968283},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/WeaverHW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Wirthlin04,
author = {Michael J. Wirthlin},
editor = {Russell Tessier and
Herman Schmit},
title = {Improving the reliability of {FPGA} circuits using triple-modular
redundancy {(TMR)} {\&} efficient voter placement},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {252},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968338},
doi = {10.1145/968280.968338},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Wirthlin04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WolinskiKG04,
author = {Christophe Wolinski and
Krzysztof Kuchcinski and
Maya B. Gokhale},
editor = {Russell Tessier and
Herman Schmit},
title = {A constraints programming approach to communication scheduling on
SoPC architectures},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {252},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968336},
doi = {10.1145/968280.968336},
timestamp = {Mon, 20 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/WolinskiKG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WozS04,
author = {Bret Woz and
Andreas E. Savakis},
editor = {Russell Tessier and
Herman Schmit},
title = {A {VHDL} {MPEG-7} shape descriptor extractor},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {246},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968320},
doi = {10.1145/968280.968320},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/WozS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WunderlichH04,
author = {Roland E. Wunderlich and
James C. Hoe},
editor = {Russell Tessier and
Herman Schmit},
title = {In-system {FPGA} prototyping of an itanium microarchitecture},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {255},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968346},
doi = {10.1145/968280.968346},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/WunderlichH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YangKM04,
author = {Bo Yang and
Ramesh Karri and
David A. McGrew},
editor = {Russell Tessier and
Herman Schmit},
title = {Divide and concatenate: a scalable hardware architecture for universal
{MAC}},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {258},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968353},
doi = {10.1145/968280.968353},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/YangKM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZambrenoSC04,
author = {Joseph Zambreno and
Rahul Simha and
Alok N. Choudhary},
editor = {Russell Tessier and
Herman Schmit},
title = {Addressing application integrity attacks using a reconfigurable architecture},
booktitle = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
pages = {250},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280.968331},
doi = {10.1145/968280.968331},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZambrenoSC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2004,
editor = {Russell Tessier and
Herman Schmit},
title = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280},
doi = {10.1145/968280},
isbn = {1-58113-829-6},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2004.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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