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@inproceedings{DBLP:conf/rsp/AzadiAK23,
author = {Alireza Azadi and
Amir Arjomand and
Kenneth B. Kent},
title = {Extending Memory Compatibility with Yosys Front-End in {VTR} Flow},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {05:1--05:8},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649269},
doi = {10.1145/3625223.3649269},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AzadiAK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JafarofK23,
author = {Navid Jafarof and
Kenneth B. Kent},
title = {The Impact of Heterogeneous Logic on Adders and Multipliers in {VTR}},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {02:1--02:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649266},
doi = {10.1145/3625223.3649266},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/JafarofK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MagalhaesNN23,
author = {Felipe G. Magalhaes and
Mahdi Nikdast and
Gabriela Nicolescu},
title = {SerIOS: Enhancing Hardware Security in Integrated Optoelectronic Systems},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {04:1--04:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649275},
doi = {10.1145/3625223.3649275},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MagalhaesNN23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MilanLBBT23,
author = {Rapha{\"{e}}le Milan and
Lo{\"{\i}}c Lagadec and
Th{\'{e}}otime Bollengier and
Lilian Bossuet and
Ciprian Teodorov},
title = {Secured-by-design systems-on-chip: a {MBSE} Approach},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {07:1--07:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649277},
doi = {10.1145/3625223.3649277},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MilanLBBT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MissonZAMN23,
author = {Henrique Amaral Misson and
Rim Zrelli and
Maroua Ben Attia and
Felipe Gohring de Magalhaes and
Gabriela Nicolescu},
title = {ReDaML: {A} Modeling Language for {DO-178C} High-Level Requirements
in Airspace Systems},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {08:1--08:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649278},
doi = {10.1145/3625223.3649278},
timestamp = {Tue, 09 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MissonZAMN23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MorganBBGECKO23,
author = {Fearghal Morgan and
John Patrick Byrne and
Abishek Bupathi and
Roshan George and
Muhammad Adnan Elahi and
Frank Callaly and
Sean Kelly and
Declan O'Loughlin},
title = {HDLGen-ChatGPT Case Study: {RISC-V} Processor {VHDL} and Verilog Model
- Testbench and {EDA} Project Generation},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {11:1--11:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649280},
doi = {10.1145/3625223.3649280},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MorganBBGECKO23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NadeemKD23,
author = {Mohamed A. Nadeem and
Jan Kleinekath{\"{o}}fer and
Rolf Drechsler},
title = {Polynomial Formal Verification exploiting Constant Cutwidth},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {03:1--03:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649274},
doi = {10.1145/3625223.3649274},
timestamp = {Tue, 13 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/NadeemKD23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ParkMLYH23,
author = {Choonghoon Park and
Hyunsu Moh and
Jimin Lee and
Changjae Yi and
Soonhoi Ha},
title = {Fast and Accurate Virtual Prototyping of an {NPU} with Analytical
Memory Modeling},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {01:1--01:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649265},
doi = {10.1145/3625223.3649265},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ParkMLYH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Peker023,
author = {Melih Peker and
Ozcan Ozturk},
title = {Fast Compiler Optimization Flag Selection},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {10:1--10:5},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649273},
doi = {10.1145/3625223.3649273},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Peker023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/StephenneMCOJFN23,
author = {Colin Stephenne and
Felipe Gohring de Magalhaes and
Fr{\'{e}}d{\'{e}}ric Cuppens and
Jean{-}Yves Ouattara and
Militza Jean and
Jose Fernandez and
Gabriela Nicolescu},
title = {Security assessment of a commercial router using physical access:
a case study},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {09:1--09:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649279},
doi = {10.1145/3625223.3649279},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/StephenneMCOJFN23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Strauch23,
author = {Tobias Strauch},
title = {{MRPHS:} {A} Verilog {RTL} to {C++} Model Compiler Using Intermediate
Representations for Object-oriented Model-driven Prototyping},
booktitle = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
pages = {06:1--06:7},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223.3649276},
doi = {10.1145/3625223.3649276},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Strauch23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2023,
title = {Proceedings of the 34th International Workshop on Rapid System Prototyping,
{RSP} 2023, Hamburg, Germany, 21 September 2023},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3625223},
doi = {10.1145/3625223},
timestamp = {Mon, 24 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HellerRDBD22,
author = {Dominique Heller and
Mostafa Rizk and
R. Douguet and
Amer Baghdadi and
Jean{-}Philippe Diguet},
title = {Marine Objects Detection Using Deep Learning on Embedded Edge Devices},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {1--7},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10039025},
doi = {10.1109/RSP57251.2022.10039025},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HellerRDBD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KangY22,
author = {Seungyeop Kang and
Sungjoo Yoo},
title = {TernaryNeRF: Quantizing Voxel Grid-based NeRF Models},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {8--14},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10039009},
doi = {10.1109/RSP57251.2022.10039009},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KangY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NingRBD22,
author = {Z. Ning and
Mostafa Rizk and
Amer Baghdadi and
Jean{-}Philippe Diguet},
title = {Enhancing embedded AI-based object detection using multi-view approach},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {15--21},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10039026},
doi = {10.1109/RSP57251.2022.10039026},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/NingRBD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RosadoMTRD22,
author = {Martim Rosado and
Stavros Mallios and
Pedro Tom{\'{a}}s and
Nuno Roma and
Andr{\'{e}} David},
title = {Early prototyping and testing of {CERN} {LHC} {CMS} high-granularity
calorimeter slow-control system},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {36--42},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10039014},
doi = {10.1109/RSP57251.2022.10039014},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/RosadoMTRD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RutschGSME22,
author = {Gabriel Rutsch and
Maximilian Groebner and
Anthony Sanders and
Konrad Maier and
Wolfgang Ecker},
title = {A framework that enables systematic analysis of mixed-signal applications
on {FPGA}},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {50--56},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10039031},
doi = {10.1109/RSP57251.2022.10039031},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RutschGSME22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SinhaDK22,
author = {Ritwik Sinha and
Seyed Alireza Damghani and
Kenneth B. Kent},
title = {Machine Learning-Based Hard/Soft Logic Trade-offs in {VTR}},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {57--63},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10039002},
doi = {10.1109/RSP57251.2022.10039002},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SinhaDK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VianesPR22,
author = {Arthur Vian{\`{e}}s and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {A Case for Second-Level Software Cache Coherency on Many-Core Accelerators},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {29--35},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10038999},
doi = {10.1109/RSP57251.2022.10038999},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VianesPR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WenzelH22,
author = {Jakob Wenzel and
Christian Hochberger},
title = {Automatically Restructuring {HDL} Modules for Improved Reusability
in Rapid Synthesis},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {43--49},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10039003},
doi = {10.1109/RSP57251.2022.10039003},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WenzelH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ZhangGMD22,
author = {Weiyan Zhang and
Mehran Goli and
Alireza Mahzoon and
Rolf Drechsler},
title = {ANN-based Performance Estimation of Embedded Software for {RISC-V}
Processors},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
pages = {22--28},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022.10039004},
doi = {10.1109/RSP57251.2022.10039004},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ZhangGMD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2022,
title = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2022,
Shanghai, China, October 13, 2022},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/RSP57251.2022},
doi = {10.1109/RSP57251.2022},
isbn = {979-8-3503-9851-9},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BollengierLT21,
author = {Th{\'{e}}otime Bollengier and
Lo{\"{\i}}c Lagadec and
Ciprian Teodorov},
title = {Prototyping {FPGA} through overlays},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {15--21},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806222},
doi = {10.1109/RSP53691.2021.9806222},
timestamp = {Mon, 04 Jul 2022 08:26:36 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BollengierLT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BuscherGWH21,
author = {Nils B{\"{u}}scher and
Daniel Gis and
Johann{-}Peter Wolff and
Christian Haubelt},
title = {Data Augmentation Framework for Smart Sensor System Development Using
the Sensor-in-the-Loop Prototyping Platform},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {22--28},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806209},
doi = {10.1109/RSP53691.2021.9806209},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BuscherGWH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FerresMR21,
author = {Bruno Ferres and
Olivier Muller and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {Integrating Quick Resource Estimators in Hardware Construction Framework
for Design Space Exploration},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {64--70},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806276},
doi = {10.1109/RSP53691.2021.9806276},
timestamp = {Sat, 02 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/FerresMR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FranceBMNB21,
author = {Lo{\"{\i}}c France and
Florent Bruguier and
Maria Mushtaq and
David Novo and
Pascal Benoit},
title = {Implementing Rowhammer Memory Corruption in the gem5 Simulator},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {36--42},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806242},
doi = {10.1109/RSP53691.2021.9806242},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/FranceBMNB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KaurKDK21,
author = {Harpreet Kaur and
Georgiy Krylov and
Seyed Alireza Damghani and
Kenneth B. Kent},
title = {Heterogeneous Logic Implementation for Adders in {VTR}},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {57--63},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806205},
doi = {10.1109/RSP53691.2021.9806205},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KaurKDK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KimCPY21,
author = {Soobeom Kim and
Seunghwan Cho and
Eunhyeok Park and
Sungjoo Yoo},
title = {{FPGA} Prototyping of Systolic Array-based Accelerator for Low-Precision
Inference of Deep Neural Networks},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {1--7},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806200},
doi = {10.1109/RSP53691.2021.9806200},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KimCPY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MagalhaesNHLN21,
author = {Felipe G{\"{o}}hring de Magalh{\~{a}}es and
Mahdi Nikdast and
Fabiano Hessel and
Odile Liboiron{-}Ladouceur and
Gabriela Nicolescu},
title = {HyCo: {A} Low-Latency Hybrid Control Plane for Optical Interconnection
Networks},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {50--56},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806198},
doi = {10.1109/RSP53691.2021.9806198},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MagalhaesNHLN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MambuCDK21,
author = {Kevin Mambu and
Henri{-}Pierre Charles and
Julie Dumas and
Maha Kooli},
title = {Instruction Set Design Methodology for In-Memory Computing through
QEMU-based System Emulator},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {43--49},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806255},
doi = {10.1109/RSP53691.2021.9806255},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MambuCDK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NeubauerMMBKR21,
author = {Kevin Neubauer and
Leonard Masing and
Michael Mahl and
J{\"{u}}rgen Becker and
Max E. Kramer and
Clemens Reichmann},
title = {Template-Driven and Hardware-Centric Cross-Domain {E/E} Architecture
Simulation},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {29--35},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806231},
doi = {10.1109/RSP53691.2021.9806231},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/NeubauerMMBKR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SorianoNB21,
author = {Theo Soriano and
David Novo and
Pascal Benoit},
title = {An FPGA-based Emulation Platform for Edge Computing Node Design Exploration},
booktitle = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
pages = {8--14},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021.9806230},
doi = {10.1109/RSP53691.2021.9806230},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SorianoNB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2021,
title = {{IEEE} International Workshop on Rapid System Prototyping, {RSP} 2021,
Paris, France, October 14, 2021},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RSP53691.2021},
doi = {10.1109/RSP53691.2021},
isbn = {978-1-6654-6956-2},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BruantHMGP20,
author = {Jean Bruant and
Pierre{-}Henri Horrein and
Olivier Muller and
Tristan Grol{\'{e}}at and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {(System)Verilog to Chisel Translation for Faster Hardware Design},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244852},
doi = {10.1109/RSP51120.2020.9244852},
timestamp = {Tue, 10 Nov 2020 11:00:25 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BruantHMGP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DamghaniLK20,
author = {Seyed Alireza Damghani and
Jean{-}Philippe Legault and
Kenneth B. Kent},
title = {Desired Footprint by Technology Mapping Modification using a Genetic
Algorithm in Odin {II}},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244862},
doi = {10.1109/RSP51120.2020.9244862},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DamghaniLK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DominguesCMPSO20,
author = {Jos{\'{e}} D. Domingues and
F{\'{a}}bio D. L. Coutinho and
Pedro M. C. Marques and
Samuel Santos Pereira and
Hugerles S. Silva and
Arnaldo S. R. Oliveira},
title = {MPSoC Fast Prototyping of a Reconfigurable {DU} Downlink Transmission
Chain for 5G New Radio},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244857},
doi = {10.1109/RSP51120.2020.9244857},
timestamp = {Thu, 03 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/DominguesCMPSO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GisBH20,
author = {Daniel Gis and
Nils B{\"{u}}scher and
Christian Haubelt},
title = {Advanced Debugging Architecture for Smart Inertial Sensors using Sensor-in-the-Loop},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244851},
doi = {10.1109/RSP51120.2020.9244851},
timestamp = {Tue, 10 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GisBH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LenormandGCC20,
author = {Erwan Lenormand and
Thierry Goubier and
Lo{\"{\i}}c Cudennec and
Henri{-}Pierre Charles},
title = {A combined fast/cycle accurate simulation tool for reconfigurable
accelerator evaluation: application to distributed data management},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244859},
doi = {10.1109/RSP51120.2020.9244859},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LenormandGCC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MoreacABHD20,
author = {Erwan Mor{\'{e}}ac and
El Mehdi Abdali and
Fran{\c{c}}ois Berry and
Dominique Heller and
Jean{-}Philippe Diguet},
title = {Hardware-in-the-loop simulation with dynamic partial {FPGA} reconfiguration
applied to computer vision in ROS-based {UAV}},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244863},
doi = {10.1109/RSP51120.2020.9244863},
timestamp = {Tue, 10 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MoreacABHD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NadalB20,
author = {J{\'{e}}r{\'{e}}my Nadal and
Amer Baghdadi},
title = {{FPGA} based design and prototyping of efficient 5G {QC-LDPC} channel
decoding},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244853},
doi = {10.1109/RSP51120.2020.9244853},
timestamp = {Tue, 10 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NadalB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WuFSK20,
author = {Chen Wu and
Virginie Fresse and
Beno{\^{\i}}t Suffran and
Hubert Konik},
title = {Mathematic models based on multiple-criteria decision analysis for
tuning industrial {CNN} in an {FPGA} computing cluster},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244856},
doi = {10.1109/RSP51120.2020.9244856},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/WuFSK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ZhangPT20,
author = {Xuzhi Zhang and
Narendra Prabhu and
Russell Tessier},
title = {NestedNet: {A} Container-based Prototyping Tool for Hierarchical Software
Defined Networks},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244858},
doi = {10.1109/RSP51120.2020.9244858},
timestamp = {Tue, 10 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ZhangPT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2020,
title = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
publisher = {{IEEE}},
year = {2020},
url = {https://ieeexplore.ieee.org/xpl/conhome/9244848/proceeding},
isbn = {978-1-7281-8466-1},
timestamp = {Tue, 10 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/2020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BonicelBLRP19,
author = {Louis Bonicel and
Roland Bohrer and
Benoit Leprettre and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Multi-Triggered Embedded Software Code Generation for Electrical Metering
and Protection Applications},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {1--7},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358490},
doi = {10.1145/3339985.3358490},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BonicelBLRP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GuesmiABFAR19,
author = {Amira Guesmi and
Ihsen Alouani and
Mouna Baklouti and
Tarek Frikha and
Mohamed Abid and
Atika Rivenq},
title = {{HEAP:} {A} Heterogeneous Approximate Floating-Point Multiplier for
Error Tolerant Applications},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {36--42},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358495},
doi = {10.1145/3339985.3358495},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GuesmiABFAR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HartsellMRDBJKS19,
author = {Charles Hartsell and
Nagabhushan Mahadevan and
Shreyas Ramakrishna and
Abhishek Dubey and
Theodore Bapty and
Taylor T. Johnson and
Xenofon D. Koutsoukos and
Janos Sztipanovits and
Gabor Karsai},
title = {{CPS} Design with Learning-Enabled Components: {A} Case Study},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {57--63},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358491},
doi = {10.1145/3339985.3358491},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HartsellMRDBJKS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LakhdarCK19,
author = {Riyane Sid Lakhdar and
Henri{-}Pierre Charles and
Maha Kooli},
title = {Toward Modeling Cache-Miss Ratio for Dense-Data-Access-Based Optimization},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {64--70},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358498},
doi = {10.1145/3339985.3358498},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LakhdarCK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MiuraTOTA19,
author = {Keita Miura and
Shota Tokunaga and
Noriyuki Ota and
Yoshiharu Tange and
Takuya Azumi},
title = {Autoware Toolbox: MATLAB/Simulink Benchmark Suite for ROS-based Self-driving
Software Platform},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {8--14},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358494},
doi = {10.1145/3339985.3358494},
timestamp = {Thu, 28 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MiuraTOTA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/QuirogaTSTZN19,
author = {Josue V. Quiroga and
Mart{\'{\i}} Torrents and
Nehir S{\"{o}}nmez and
Dimitris Theodoropoulos and
Ferad Zyulkyarov and
Mario Nemirovsky},
title = {Evaluation of a Rack-Scale Disaggregated Memory Prototype for Cloud
Data Centers},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {15--21},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358496},
doi = {10.1145/3339985.3358496},
timestamp = {Tue, 21 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/QuirogaTSTZN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RatajB19,
author = {Artur Rataj and
Etienne Borde},
title = {Fast and robust modelling using a direct translation from a robotic
application to its abstracted behaviour},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {50--56},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358492},
doi = {10.1145/3339985.3358492},
timestamp = {Thu, 28 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RatajB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SaidiCSGSV19,
author = {Salah Eddine Saidi and
Amir Charif and
Tanguy Sassolas and
Pierre{-}Guillaume Le Guay and
Henrique Vicente Souza and
Nicolas Ventroux},
title = {Fast Virtual Prototyping of Cyber-Physical Systems using SystemC and
{FMI:} {ADAS} Use Case},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {43--49},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358488},
doi = {10.1145/3339985.3358488},
timestamp = {Thu, 28 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SaidiCSGSV19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Strauch19,
author = {Tobias Strauch},
title = {Combining Simulation and {FPGA} Based Verification to an Affordable
and Ultra-Fast Multi-Billion-Gate Verification System},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {22--28},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358487},
doi = {10.1145/3339985.3358487},
timestamp = {Thu, 28 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Strauch19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YoungDILK19,
author = {Scott Ryan Young and
Alexandrea Demmings and
Nasrin Eshraghi Ivari and
Jean{-}Philippe Legault and
Kenneth B. Kent},
title = {Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic
Right Shift Support in Odin {II}},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {71--74},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358497},
doi = {10.1145/3339985.3358497},
timestamp = {Wed, 22 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/YoungDILK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YuVLDTM19,
author = {Derek Yu and
Michael Vaquier and
Evan Laflamme and
Gabrielle Doucette{-}Poirier and
Justin Tremblay and
Brett H. Meyer},
title = {ARINC-825TBv2: {A} Hardware-in-the-Ioop Simulation Platform for Aerospace
Security Research},
booktitle = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
pages = {29--35},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985.3358489},
doi = {10.1145/3339985.3358489},
timestamp = {Thu, 28 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/YuVLDTM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2019,
title = {Proceedings of the 30th International Workshop on Rapid System Prototyping,
{RSP} 2019, New York, NY, USA, October 17-18, 2019},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3339985},
doi = {10.1145/3339985},
isbn = {978-1-4503-6847-6},
timestamp = {Thu, 28 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AldegheriB18,
author = {Stefano Aldegheri and
Nicola Bombieri},
title = {Rapid Prototyping of Embedded Vision Systems: Embedding Computer Vision
Applications into Low-Power Heterogeneous Architectures},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {63--69},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631995},
doi = {10.1109/RSP.2018.8631995},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AldegheriB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BaumelaGMP18,
author = {Thomas Baumela and
Olivier Gruber and
Olivier Muller and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Message-Oriented Devices on FPGAs},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {8--14},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631987},
doi = {10.1109/RSP.2018.8631987},
timestamp = {Wed, 06 Feb 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BaumelaGMP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BozzoliSSB18,
author = {Ludovica Bozzoli and
Corrado De Sio and
Luca Sterpone and
Cinzia Bernardeschi},
title = {PyXEL: An Integrated Environment for the Analysis of Fault Effects
in SRAM-Based {FPGA} Routing},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {70--75},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8632000},
doi = {10.1109/RSP.2018.8632000},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BozzoliSSB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChabotANN18,
author = {Alexandre Chabot and
Ihsen Alouani and
Sma{\"{\i}}l Niar and
R{\'{e}}da Nouacer},
title = {A Comprehensive Fault Injection Strategy for Embedded Systems Reliability
Assessment},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {22--28},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631986},
doi = {10.1109/RSP.2018.8631986},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ChabotANN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DelizyGMMRS18,
author = {Tristan Delizy and
Stephane Gros and
Kevin Marquet and
Matthieu Moy and
Tanguy Risset and
Guillaume Salagnac},
title = {Estimating the Impact of Architectural and Software Design Choices
on Dynamic Allocation of Heterogeneous Memories},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {15--21},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631994},
doi = {10.1109/RSP.2018.8631994},
timestamp = {Tue, 05 Feb 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DelizyGMMRS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/France-PilloisM18,
author = {Maxime France{-}Pillois and
J{\'{e}}r{\^{o}}me Martin and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {Accurate MPSoC Prototyping Platform and Methodology for the Studying
of the Linux Synchronization Barrier Slowdown Issues},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {56--62},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631996},
doi = {10.1109/RSP.2018.8631996},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/France-PilloisM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GoliSD18,
author = {Mehran Goli and
Jannis Stoppe and
Rolf Drechsler},
title = {Resilience Evaluation for Approximating SystemC Designs Using Machine
Learning Techniques},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {97--103},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631997},
doi = {10.1109/RSP.2018.8631997},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GoliSD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HarrisonA18,
author = {William L. Harrison and
Gerard Allwein},
title = {Semantics-Directed Prototyping of Hardware Runtime Monitors},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {42--48},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631992},
doi = {10.1109/RSP.2018.8631992},
timestamp = {Tue, 05 Feb 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HarrisonA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KimKY18,
author = {Dongyoung Kim and
Soobeom Kim and
Sungjoo Yoo},
title = {{FPGA} Prototyping of Low-Precision Zero-Skipping Accelerator for
Neural Networks},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {104--110},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8632001},
doi = {10.1109/RSP.2018.8632001},
timestamp = {Tue, 05 Feb 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KimKY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LegaultPK18,
author = {Jean{-}Philippe Legault and
Panagiotis Patros and
Kenneth B. Kent},
title = {Towards Trainable Synthesis for Optimized Circuit Deployment on {FPGA}},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {90--96},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631999},
doi = {10.1109/RSP.2018.8631999},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LegaultPK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MeurerFH18,
author = {Rodrigo Schmitt Meurer and
Ant{\^{o}}nio Augusto Fr{\"{o}}hlich and
Jomi Fred H{\"{u}}bner},
title = {Ambient Intelligence for the Internet of Things Through Context-Awareness},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {83--89},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631989},
doi = {10.1109/RSP.2018.8631989},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MeurerFH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MorganOABTKCGBC18,
author = {Fearghal Morgan and
Declan O'Loughlin and
Jeremy Audiger and
Yohan Boyer and
Niall Timlin{-}Canning and
Krzysztof Kepa and
Seamus Cawley and
Ian Gallivan and
L{\'{a}}szl{\'{o}} Bak{\'{o}} and
Frank Callaly},
title = {Vicilogic 2.0: Online Learning and Prototyping of Digital Systems
Using {PYNQ-Z1/-Z2} SoC},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {76--82},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631990},
doi = {10.1109/RSP.2018.8631990},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MorganOABTKCGBC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OosakoITK18,
author = {Yuuki Oosako and
Nagisa Ishiura and
Hiroyuki Tomiyama and
Hiroyuki Kanbara},
title = {Synthesis of Full Hardware Implementation of RTOS-Based Systems},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {1--7},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631993},
doi = {10.1109/RSP.2018.8631993},
timestamp = {Tue, 05 Feb 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OosakoITK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VerniersPS18,
author = {Kevin Verniers and
Liesbet Van der Perre and
Nobby Stevens},
title = {Assessment of a BeagleBone Black High Sampling Rate Digital Waveform
Generator},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {36--41},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631998},
doi = {10.1109/RSP.2018.8631998},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VerniersPS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WaqasJBN18,
author = {Muhammad Waqas and
Atif Raza Jafri and
Amer Baghdadi and
Muhammad Najam{-}ul{-}Islam},
title = {Rapid Prototyping of Parameterized Rotated and Cyclic {Q} Delayed
Constellations Demapper},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {29--35},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631988},
doi = {10.1109/RSP.2018.8631988},
timestamp = {Tue, 22 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/WaqasJBN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WuSJZLH18,
author = {Yawen Wu and
Yinan Sun and
Zhenge Jia and
Lefan Zhang and
Yongpan Liu and
Jingtong Hu},
title = {Prototyping Energy Harvesting Powered Systems with Nonvolatile Processor
(Invited Paper)},
booktitle = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
pages = {49--55},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/RSP.2018.8631991},
doi = {10.1109/RSP.2018.8631991},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WuSJZLH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2018,
title = {2018 International Symposium on Rapid System Prototyping, {RSP} 2018,
Torino, Italy, October 4-5, 2018},
publisher = {{IEEE}},
year = {2018},
url = {https://ieeexplore.ieee.org/xpl/conhome/8624259/proceeding},
isbn = {978-1-5386-7557-1},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HafnaouiCANB17,
author = {Imane Hafnaoui and
Chao Chen and
Rabeh Ayari and
Gabriela Nicolescu and
Giovanni Beltrame},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {An analysis of random cache effects on real-time multi-core scheduling
algorithms},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {64--70},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130320},
doi = {10.1145/3130265.3130320},
timestamp = {Mon, 04 Jul 2022 08:26:30 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HafnaouiCANB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ItoOIKT17,
author = {Naoya Ito and
Yuuki Oosako and
Nagisa Ishiura and
Hiroyuki Kanbara and
Hiroyuki Tomiyama},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Binary synthesis implementing external interrupt handler as independent
module},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {92--98},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130317},
doi = {10.1145/3130265.3130317},
timestamp = {Mon, 01 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ItoOIKT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JangY17,
author = {Jeonggyu Jang and
Hoeseok Yang},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Executable dataflow benchmark generation technique for multi-core
embedded systems},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {50--56},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130323},
doi = {10.1145/3130265.3130323},
timestamp = {Mon, 01 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JangY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KooliCTGN17,
author = {Maha Kooli and
Henri{-}Pierre Charles and
Cl{\'{e}}ment Touzet and
Bastien Giraud and
Jean{-}Philippe No{\"{e}}l},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Software platform dedicated for in-memory computing circuit evaluation},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {43--49},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130322},
doi = {10.1145/3130265.3130322},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KooliCTGN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeeHK0K17,
author = {Gyeongmin Lee and
Seonyeong Heo and
Bongjun Kim and
Jong Kim and
Hanjun Kim},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Rapid prototyping of IoT applications with Esperanto compiler},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {85--91},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3138857},
doi = {10.1145/3130265.3138857},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LeeHK0K17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MuckDD17,
author = {Tiago M{\"{u}}ck and
Bryan Donyanavard and
Nikil D. Dutt},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {PoIiCym: rapid prototyping of resource management policies for HMPs},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {23--29},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130321},
doi = {10.1145/3130265.3130321},
timestamp = {Mon, 01 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MuckDD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Mueller-Gritschneder17,
author = {Daniel Mueller{-}Gritschneder and
Keerthikumara Devarajegowda and
Martin Dittrich and
Wolfgang Ecker and
Marc Greim and
Ulf Schlichtmann},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {The extendable translating instruction set simulator {(ETISS)} interlinked
with an {MDA} framework for fast {RISC} prototyping},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {79--84},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3138858},
doi = {10.1145/3130265.3138858},
timestamp = {Mon, 01 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Mueller-Gritschneder17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SeeleySDPK17,
author = {Sean Seeley and
Vidya Sankaranaryanan and
Zack Deveau and
Panagiotis Patros and
Kenneth B. Kent},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Simulation-based circuit-activity estimation for FPGAs containing
hard blocks},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {36--42},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130326},
doi = {10.1145/3130265.3130326},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SeeleySDPK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ShimizuION17,
author = {Miho Shimizu and
Nagisa Ishiura and
Sayuri Ota and
Wakako Nakano},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Speculative execution in distributed controllers for high-level synthesis},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {99--104},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130319},
doi = {10.1145/3130265.3130319},
timestamp = {Mon, 01 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ShimizuION17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TikuP17,
author = {Saideep Tiku and
Sudeep Pasricha},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Energy-efficient and robust middleware prototyping for smart mobile
computing},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {2--8},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3138855},
doi = {10.1145/3130265.3138855},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/TikuP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VolgyesiDKMMK17,
author = {P{\'{e}}ter V{\"{o}}lgyesi and
Abhishek Dubey and
Timothy Krentz and
Istv{\'{a}}n Madari and
Mary Metelko and
Gabor Karsai},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Time synchronization services for low-cost fog computing applications},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {57--63},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130325},
doi = {10.1145/3130265.3130325},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/VolgyesiDKMMK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WicaksanaBMSR17,
author = {Arief Wicaksana and
Alban Bourge and
Olivier Muller and
Arif Sasongko and
Fr{\'{e}}d{\'{e}}ric Rousseau},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Prototyping dynamic task migration on heterogeneous reconfigurable
systems},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {16--22},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130316},
doi = {10.1145/3130265.3130316},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/WicaksanaBMSR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WitteraufHT17,
author = {Michael Witterauf and
Frank Hannig and
J{\"{u}}rgen Teich},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {Constructing fast and cycle-accurate simulators for configurable accelerators
using {C++} templates},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {9--15},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130324},
doi = {10.1145/3130265.3130324},
timestamp = {Mon, 01 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WitteraufHT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YiPK17,
author = {Wooseok Yi and
Junki Park and
Jae{-}Joon Kim},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {GeCo: classification restricted Boltzmann machine hardware for on-chip
learning},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {30--35},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3138856},
doi = {10.1145/3130265.3138856},
timestamp = {Mon, 01 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/YiPK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YokotaSH17,
author = {Minato Yokota and
Kaoru Saso and
Yuko Hara{-}Azumi},
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {One-instruction set computer-based multicore processors for energy-efficient
streaming data processing},
booktitle = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
pages = {71--77},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265.3130318},
doi = {10.1145/3130265.3130318},
timestamp = {Mon, 01 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/YokotaSH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2017,
editor = {Sungjoo Yoo and
Fabiano Hessel and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Kenneth B. Kent and
Kyoungwoo Lee},
title = {International Symposium on Rapid System Prototyping, {RSP} 2017, Shortening
the Path from Specification to Prototype, October 19-20, 2017, Seoul,
South Korea},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3130265},
doi = {10.1145/3130265},
isbn = {978-1-4503-5418-9},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/0002LSZJ16,
author = {Rahma Bouaziz and
Laurent Lemarchand and
Frank Singhoff and
Bechir Zalila and
Mohamed Jmaiel},
title = {Efficient parallel multi-objective optimization for real-time systems
software design exploration},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {58--64},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990310},
doi = {10.1145/2990299.2990310},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/0002LSZJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/0010MNC16,
author = {Xiang Chen and
Jiachen Mao and
Kent W. Nixon and
Yiran Chen},
title = {MORPh: mobile {OLED} power friendly camera system},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {1--5},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990302},
doi = {10.1145/2990299.2990302},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/0010MNC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AyariHBN16,
author = {Rabeh Ayari and
Imane Hafnaoui and
Giovanni Beltrame and
Gabriela Nicolescu},
title = {Schedulability-guided exploration of multi-core systems},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {121--127},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990319},
doi = {10.1145/2990299.2990319},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AyariHBN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Azim16,
author = {Akramul Azim},
title = {Overloads in compositional embedded real-time control systems},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {51--57},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990309},
doi = {10.1145/2990299.2990309},
timestamp = {Wed, 03 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Azim16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DammanEGNSH16,
author = {Corentin Damman and
Gregory Edison and
Fabrice Guet and
Eric Noulard and
Luca Santinelli and
J{\'{e}}r{\^{o}}me Hugues},
title = {Architectural performance analysis of {FPGA} synthesized {LEON} processors},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {33--40},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990306},
doi = {10.1145/2990299.2990306},
timestamp = {Wed, 03 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/DammanEGNSH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DantasSS16,
author = {Paulo Cezar Dantas and
Andrea Sarmento and
Adriano Sarmento},
title = {A {HW/SW} embedded system for accelerating diagnosis of glaucoma from
eye fundus images},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {12--18},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990303},
doi = {10.1145/2990299.2990303},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DantasSS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FarooqCARTM16,
author = {Umer Farooq and
Roselyne Chotin{-}Avot and
Muhammad Moazam Azeem and
Maminionja Ravoson and
Mariem Turki and
Habib Mehrez},
title = {Inter-FPGA routing environment for performance exploration of multi-FPGA
systems},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {107--113},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990317},
doi = {10.1145/2990299.2990317},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/FarooqCARTM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FengTQDCS16,
author = {Shen Feng and
Mian Tang and
Fernando Quivira and
Tim Dyson and
Filip Cuckov and
Gunar Schirner},
title = {EEGu2: an embedded device for brain/body signal acquisition and processing},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {19--25},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990304},
doi = {10.1145/2990299.2990304},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FengTQDCS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HarrisonPA16,
author = {William L. Harrison and
Adam M. Procter and
Gerard Allwein},
title = {Model-driven design {\&} synthesis of the {SHA-256} cryptographic
hash function in rewire},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {114--120},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990318},
doi = {10.1145/2990299.2990318},
timestamp = {Wed, 03 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HarrisonPA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LuOKBAE16,
author = {Tian Lu and
Carlos Ortega and
Jason M. Kulick and
G. H. Bernstein and
Scott Ardisson and
Rob Engelhardt},
title = {Rapid {SOC} prototyping utilizing quilt packaging technology for modular
functional {IC} partitioning},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {79--85},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990313},
doi = {10.1145/2990299.2990313},
timestamp = {Fri, 06 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LuOKBAE16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MoazzemiHD16,
author = {Kasra Moazzemi and
Chen{-}Ying Hsieh and
Nikil D. Dutt},
title = {{HAMEX:} heterogeneous architecture and memory exploration framework},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {100--106},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990316},
doi = {10.1145/2990299.2990316},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MoazzemiHD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MoratelliFNH16,
author = {Carlos Moratelli and
Sergio Johann Filho and
Marcelo Veiga Neves and
Fabiano Hessel},
title = {Embedded virtualization for the design of secure IoT applications},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {2--6},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990301},
doi = {10.1145/2990299.2990301},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MoratelliFNH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Mutlu16,
author = {Onur Mutlu},
title = {Keynote: rethinking memory system design},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {1},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990300},
doi = {10.1145/2990299.2990300},
timestamp = {Wed, 03 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Mutlu16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NouriAMFHD16,
author = {Ayoub Nouri and
Rahma Ben Atitallah and
Anca Molnos and
Christian Fabre and
Fr{\'{e}}d{\'{e}}ric Heitzmann and
Olivier Debicki},
title = {Transforming {VHDL} descriptions into formal component-based models},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {128--135},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990320},
doi = {10.1145/2990299.2990320},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/NouriAMFHD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NtafamPCP16,
author = {Perrin N. Ntafam and
Eric Paire and
Alain Clouard and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Simulation driven insertion of data prefetching instructions for early
software-on-SoC optimization},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {93--99},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990315},
doi = {10.1145/2990299.2990315},
timestamp = {Wed, 03 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/NtafamPCP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OhkawaYMOY16,
author = {Takeshi Ohkawa and
Kazushi Yamashina and
Takuya Matsumoto and
Kanemitsu Ootsu and
Takashi Yokota},
title = {Architecture exploration of intelligent robot system using ros-compliant
{FPGA} component},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {72--78},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990312},
doi = {10.1145/2990299.2990312},
timestamp = {Wed, 03 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/OhkawaYMOY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PatelSQJ16,
author = {Ankurkumar Patel and
Troy Silloway and
Fnu Qinggele and
Yong{-}Kyu Jung},
title = {Design of an expandable real-time simulation (eRTS) platform for multi-level
rapid prototyping},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {65--71},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990311},
doi = {10.1145/2990299.2990311},
timestamp = {Wed, 03 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/PatelSQJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PatrosK16,
author = {Panagiotis Patros and
Kenneth B. Kent},
title = {Automatic detection and elision of reset sub-circuits},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {26--32},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990305},
doi = {10.1145/2990299.2990305},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PatrosK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ThieleSJLFB16,
author = {Lothar Thiele and
Felix Sutton and
Romain Jacob and
Roman Lim and
Reto Da Forno and
Jan Beutel},
title = {On platforms for {CPS} - adaptive, predictable and efficient},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {48--50},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990308},
doi = {10.1145/2990299.2990308},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ThieleSJLFB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WenzelH16,
author = {Jakob Wenzel and
Christian Hochberger},
title = {RapidSoC: short turnaround creation of {FPGA} based SoCs},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {86--92},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990314},
doi = {10.1145/2990299.2990314},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WenzelH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WicaksanaPMRS16,
author = {Arief Wicaksana and
Adrien Prost{-}Boucle and
Olivier Muller and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Arif Sasongko},
title = {On-board non-regression test of {HLS} tools targeting {FPGA}},
booktitle = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
pages = {41--47},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1145/2990299.2990307},
doi = {10.1145/2990299.2990307},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/WicaksanaPMRS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2016,
title = {2016 International Symposium on Rapid System Prototyping, {RSP} 2016,
Pittsburg, PA, USA, October 6-7, 2016},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/xpl/conhome/7907640/proceeding},
isbn = {978-1-4503-4535-4},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AlouaniMN15,
author = {Ihsen Alouani and
Braham Lotfi Mediouni and
Sma{\"{\i}}l Niar},
title = {A multi-objective approach for software/hardware partitioning in a
multi-target tracking system},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {119--125},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416556},
doi = {10.1109/RSP.2015.7416556},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AlouaniMN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BeckerMC15,
author = {Denis Becker and
Matthieu Moy and
J{\'{e}}r{\^{o}}me Cornet},
title = {Challenges for the parallelization of loosely timed SystemC programs},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {54--60},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416547},
doi = {10.1109/RSP.2015.7416547},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BeckerMC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Chandrasekharan15,
author = {Arun Chandrasekharan and
Kenneth Schmitz and
Ulrich K{\"{u}}hne and
Rolf Drechsler},
title = {Ensuring safety and reliability of IP-based system design - {A} container
approach},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {76--82},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416550},
doi = {10.1109/RSP.2015.7416550},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Chandrasekharan15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DucreuxGLPTG15,
author = {Laurent{-}Frederic Ducreux and
Claire Guyon{-}Gardeux and
Maxime Louvel and
Fran{\c{c}}ois Pacull and
Safietou Raby Thior and
Maria Isabel {Vergara Gallego}},
title = {Rapid prototyping of complete systems, the case study of a smart parking},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {133--139},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416558},
doi = {10.1109/RSP.2015.7416558},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/DucreuxGLPTG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GiraldoSCWB15,
author = {Juan Sebastian Piedrahita Giraldo and
Anderson Luiz Sartor and
Luigi Carro and
Stephan Wong and
Antonio Carlos Schneider Beck},
title = {Evaluation of energy savings on a {VLIW} processor through dynamic
issue-width adaptation},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {11--17},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416540},
doi = {10.1109/RSP.2015.7416540},
timestamp = {Wed, 02 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GiraldoSCWB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GovilC15,
author = {Naman Govil and
Shubhajit Roy Chowdhury},
title = {{GMA:} a high speed metaheuristic algorithmic approach to hardware
software partitioning for Low-cost SoCs},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {105--111},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416554},
doi = {10.1109/RSP.2015.7416554},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GovilC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Grasset15,
author = {Arnaud Grasset},
title = {Design of critical embedded systems: from early specifications to
prototypes},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {38},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416544},
doi = {10.1109/RSP.2015.7416544},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Grasset15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HuguesD15,
author = {J{\'{e}}r{\^{o}}me Hugues and
Julien Delange},
title = {Model-based design and automated validation of {ARINC653} architectures},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {3--9},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416539},
doi = {10.1109/RSP.2015.7416539},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HuguesD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KoYKH15,
author = {Youngsub Ko and
Youngmin Yi and
Joongbaik Kim and
Soonhoi Ha},
title = {Fast GPU-in-the-loop simulation technique at OpenGL {ES} {API} level
for Android Graphics Applications},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {47--53},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416546},
doi = {10.1109/RSP.2015.7416546},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KoYKH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KumarEK15,
author = {Pranav Srinivas Kumar and
William Emfinger and
Gabor Karsai},
title = {A testbed to simulate and analyze resilient cyber-physical systems},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {97--103},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416553},
doi = {10.1109/RSP.2015.7416553},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KumarEK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KumarEKKWGRA15,
author = {Pranav Srinivas Kumar and
William Emfinger and
Amogh Kulkarni and
Gabor Karsai and
Dexter Watkins and
Benjamin Gasser and
Cameron Ridgewell and
Amrutur Anilkumar},
title = {{ROSMOD:} a toolsuite for modeling, generating, deploying, and managing
distributed real-time component-based software using {ROS}},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {39--45},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416545},
doi = {10.1109/RSP.2015.7416545},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KumarEKKWGRA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LattmannKMSNBK15,
author = {Zsolt Lattmann and
James Klingler and
Patrik Meijer and
Jason Scott and
Sandeep Neema and
Ted Bapty and
Gabor Karsai},
title = {Towards an analysis-driven rapid design process for cyber-physical
systems},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {90--96},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416552},
doi = {10.1109/RSP.2015.7416552},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LattmannKMSNBK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LudwichF15,
author = {Mateus Krepsky Ludwich and
Ant{\^{o}}nio Augusto Fr{\"{o}}hlich},
title = {Proper handling of interrupts in cyber-physical systems},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {83--89},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416551},
doi = {10.1109/RSP.2015.7416551},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LudwichF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MathieuGHM15,
author = {Gaudron Mathieu and
Bois Guy and
J{\'{e}}r{\^{o}}me Hugues and
Fellipe Monteiro},
title = {Performance verification for {ESL} design methodology from {AADL}
models},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {33--37},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416543},
doi = {10.1109/RSP.2015.7416543},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MathieuGHM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MoralesBHB15,
author = {Valentin Mena Morales and
Yahia Brakni and
Pierre{-}Henri Horrein and
Amer Baghdadi},
title = {Caasper: providing accessible FPGA-acceleration over the network},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {68--74},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416549},
doi = {10.1109/RSP.2015.7416549},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MoralesBHB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PayetFRR15,
author = {Matthieu Payet and
Virginie Fresse and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Pascal Remy},
title = {Dynamic data flow analysis for NoC based application synthesis},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {61--67},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416548},
doi = {10.1109/RSP.2015.7416548},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/PayetFRR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ReisFW15,
author = {Joao Gabriel Reis and
Ant{\^{o}}nio Augusto Fr{\"{o}}hlich and
Lucas Francisco Wanner},
title = {X-Ware: mutant computing substrates},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {25--31},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416542},
doi = {10.1109/RSP.2015.7416542},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ReisFW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SantosVK15,
author = {Rui Santos and
Shyamsundar Venkataraman and
Akash Kumar},
title = {Generic scrubbing-based architecture for custom error correction algorithms},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {112--118},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416555},
doi = {10.1109/RSP.2015.7416555},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SantosVK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TerraillonPH15,
author = {Jean{-}Loup Terraillon and
Maxime Perrotin and
Christophe Honvault},
title = {Keynote: Toward a space system development framework},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {2},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416538},
doi = {10.1109/RSP.2015.7416538},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/TerraillonPH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YanK15,
author = {Bo Yan and
Kenneth B. Kent},
title = {Hard block reduction and synthesis improvements in Odin {II}},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {126--132},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416557},
doi = {10.1109/RSP.2015.7416557},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/YanK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YangSKFMA15,
author = {Sheng Yang and
Rishad A. Shafik and
S. Saqib Khursheed and
David Flynn and
Geoff V. Merrett and
Bashir M. Al{-}Hashimi},
title = {Application-specific memory protection policies for energy-efficient
reliable design},
booktitle = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
pages = {18--24},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/RSP.2015.7416541},
doi = {10.1109/RSP.2015.7416541},
timestamp = {Mon, 15 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/YangSKFMA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2015,
title = {2015 International Symposium on Rapid System Prototyping, {RSP} 2015,
Amsterdam, The Netherlands, October 8-9, 2015},
publisher = {{IEEE}},
year = {2015},
url = {https://ieeexplore.ieee.org/xpl/conhome/7411942/proceeding},
isbn = {978-1-4673-8276-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AbdoolRR14,
author = {Azim Abdool and
Cathy{-}Ann Radix and
Sean Rocke},
title = {Exploration and assessment of memory architectures for densely-deployed
embedded sensor networks},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {65--71},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966894},
doi = {10.1109/RSP.2014.6966894},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AbdoolRR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AlwiE14,
author = {Syed Hussein Syed Alwi and
Emmanuelle Encrenaz},
title = {FSM-based properties and abstraction of components},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {37--43},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966690},
doi = {10.1109/RSP.2014.6966690},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AlwiE14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AntablyFR14,
author = {Ashraf El Antably and
Nicolas Fournel and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {Lightweight task migration in embedded multi-tiled architectures using
task code replication},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {93--99},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966898},
doi = {10.1109/RSP.2014.6966898},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AntablyFR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BalasubramanianDOEKK14,
author = {Daniel Balasubramanian and
Abhishek Dubey and
William R. Otte and
William Emfinger and
Pranav Srinivas Kumar and
Gabor Karsai},
title = {A Rapid Testing Framework for a Mobile Cloud},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {128--134},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966903},
doi = {10.1109/RSP.2014.6966903},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BalasubramanianDOEKK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BarzegarSA14,
author = {Ali Barzegar and
Ehsan Saboori and
Samar Abdi},
title = {{DRAC:} a dynamically reconfigurable active {L1} cache model for hybrid
prototyping of multicore embedded systems},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {86--92},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966897},
doi = {10.1109/RSP.2014.6966897},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BarzegarSA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BordeRCPSD14,
author = {Etienne Borde and
Smail Rahmoun and
Fabien Cadoret and
Laurent Pautet and
Frank Singhoff and
Pierre Dissaux},
title = {Architecture models refinement for fine grain timing analysis of embedded
systems},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {44--50},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966691},
doi = {10.1109/RSP.2014.6966691},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BordeRCPSD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BougioukouNPVA14,
author = {Eleni Bougioukou and
Athina Ntalla and
Aspa Palli and
Maria Varsamou and
Theodore Antonakopoulos},
title = {Prototyping and performance evaluation of a dynamically adaptable
block device driver for PCIe-based SSDs},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {51--57},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966692},
doi = {10.1109/RSP.2014.6966692},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BougioukouNPVA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChaturvediSZS14,
author = {Vivek Chaturvedi and
Amit Kumar Singh and
Wei Zhang and
Thambipillai Srikanthan},
title = {Thermal-aware task scheduling for peak temperature minimization under
periodic constraint for 3D-MPSoCs},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {107--113},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966900},
doi = {10.1109/RSP.2014.6966900},
timestamp = {Thu, 27 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChaturvediSZS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChenGRP14,
author = {Hui Chen and
Guillaume Godet{-}Bar and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Device driver generation targeting multiple operating systems using
a model-driven methodology},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {30--36},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966689},
doi = {10.1109/RSP.2014.6966689},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ChenGRP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DebM14,
author = {Sujay Deb and
Hemanta Kumar Mondal},
title = {Wireless network-on-chip: a new era in multi-core chip design},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {59--64},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966893},
doi = {10.1109/RSP.2014.6966893},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/DebM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FischerKHM14,
author = {Till Fischer and
Christian K{\"{o}}llner and
Manuel Hardle and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Product line development for modular FPGA-based embedded systems},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {9--15},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966686},
doi = {10.1109/RSP.2014.6966686},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/FischerKHM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GomezSKT14,
author = {Andres Gomez and
Lars Schor and
Pratyush Kumar and
Lothar Thiele},
title = {{SF3P:} a framework to explore and prototype hierarchical compositions
of real-time schedulers},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {2--8},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966685},
doi = {10.1109/RSP.2014.6966685},
timestamp = {Wed, 08 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GomezSKT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HiliFDR14,
author = {Nicolas Hili and
Christian Fabre and
Sophie Dupuy{-}Chessa and
Dominique Rieu},
title = {A model-driven approach for embedded system prototyping and design},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {23--29},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966688},
doi = {10.1109/RSP.2014.6966688},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HiliFDR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeeKPYL14,
author = {Taemin Lee and
Dongki Kim and
Hyunsun Park and
Sungjoo Yoo and
Sunggu Lee},
title = {FPGA-based prototyping systems for emerging memory technologies},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {115--120},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966901},
doi = {10.1109/RSP.2014.6966901},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LeeKPYL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LiNK14,
author = {Jingjing Li and
Konstantin Nasartschuk and
Kenneth B. Kent},
title = {System-on-chip processor using different {FPGA} architectures in the
{VTR} {CAD} flow},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {72--77},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966895},
doi = {10.1109/RSP.2014.6966895},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LiNK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MagalhaesFLH14,
author = {Felipe G. Magalhaes and
Sergio Johann Filho and
Oliver B. Longhi and
Fabiano Hessel},
title = {Embedded cluster-based architecture with high level support - presenting
the HC-MPSoC},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {100--106},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966899},
doi = {10.1109/RSP.2014.6966899},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MagalhaesFLH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RizkBJMA14,
author = {Mostafa Rizk and
Amer Baghdadi and
Michel J{\'{e}}z{\'{e}}quel and
Yasser Mohanna and
Youssef Atat},
title = {Design and prototyping flow of NISC-based flexible {MIMO} turbo-equalizer},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {16--21},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966687},
doi = {10.1109/RSP.2014.6966687},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/RizkBJMA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SarmaD14,
author = {Santanu Sarma and
Nikil D. Dutt},
title = {{FPGA} emulation and prototyping of a cyberphysical-system-on-chip
(CPSoC)},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {121--127},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966902},
doi = {10.1109/RSP.2014.6966902},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SarmaD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SureshSK14,
author = {Dipika Suresh and
Amit Kumar Singh and
Akash Kumar},
title = {A multi-stage thermal management strategy for 3D multicores},
booktitle = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
pages = {78--84},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/RSP.2014.6966896},
doi = {10.1109/RSP.2014.6966896},
timestamp = {Fri, 24 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SureshSK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2014,
title = {25nd {IEEE} International Symposium on Rapid System Prototyping, {RSP}
2014, New Delhi, India, October 16-17, 2014},
publisher = {{IEEE}},
year = {2014},
url = {https://ieeexplore.ieee.org/xpl/conhome/6963811/proceeding},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2014.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AdlerOMM13,
author = {Nico Adler and
Stefan Otten and
Markus Mohrhard and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Rapid safety evaluation of hardware architectural designs compliant
with {ISO} 26262},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {66--72},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683960},
doi = {10.1109/RSP.2013.6683960},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AdlerOMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AguiarFMH13,
author = {Alexandra Aguiar and
Sergio Johann Filho and
Felipe Gohring de Magalhaes and
Fabiano Hessel},
title = {Customizable {RTOS} to support communication infrastructures and to
improve design space exploration in MPSoCs},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {130--135},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683969},
doi = {10.1109/RSP.2013.6683969},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AguiarFMH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BohrerFMWPCH13,
author = {Vinicius Bohrer and
Ramon Fernandes and
C{\'{e}}sar A. M. Marcon and
Thais Webber and
Leticia B. Poehls and
Ricardo M. Czekster and
Fabiano Hessel},
title = {A flexible framework for modeling and simulation of multipurpose wireless
networks},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {94--100},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683964},
doi = {10.1109/RSP.2013.6683964},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BohrerFMWPCH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CattaneoPDSS13,
author = {Riccardo Cattaneo and
Christian Pilato and
Gianluca Durelli and
Marco Domenico Santambrogio and
Donatella Sciuto},
title = {{SMASH:} {A} heuristic methodology for designing partially reconfigurable
MPSoCs},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {102--108},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683965},
doi = {10.1109/RSP.2013.6683965},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CattaneoPDSS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CheshmiSMT13,
author = {Kazem Cheshmi and
Mohammadreza Soltaniyeh and
Siamak Mohammadi and
Jelena Trajkovic},
title = {Quota setting router architecture for quality of service in {GALS}
NoC},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {44--50},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683957},
doi = {10.1109/RSP.2013.6683957},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/CheshmiSMT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DrumlMKSWBH13,
author = {Norbert Druml and
Manuel Menghin and
Daniel Kroisleitner and
Christian Steger and
Reinhold Weiss and
Holger Bock and
Josef Haid},
title = {Emulation-based design evaluation of reader/smart card systems},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {80--86},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683962},
doi = {10.1109/RSP.2013.6683962},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/DrumlMKSWBH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/El-MahiPNB13,
author = {Olfat El{-}Mahi and
Gilles Pesant and
Gabriela Nicolescu and
Giovanni Beltrame},
title = {Embedded system verification through constraint-based scheduling},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {73--79},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683961},
doi = {10.1109/RSP.2013.6683961},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/El-MahiPNB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FernandoSHKC13,
author = {Shakith Fernando and
Firew Siyoum and
Yifan He and
Akash Kumar and
Henk Corporaal},
title = {MAMPSx: {A} design framework for rapid synthesis of predictable heterogeneous
MPSoCs},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {136--142},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683970},
doi = {10.1109/RSP.2013.6683970},
timestamp = {Sat, 24 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FernandoSHKC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GaudelSPHDL13,
author = {Vincent Gaudel and
Frank Singhoff and
Alain Plantec and
J{\'{e}}r{\^{o}}me Hugues and
Pierre Dissaux and
J{\'{e}}r{\^{o}}me Legrand},
title = {Enforcing software engineering tools interoperability: An example
with {AADL} subsets},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {59--65},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683959},
doi = {10.1109/RSP.2013.6683959},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GaudelSPHDL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JuniorFR13,
author = {Ot{\'{a}}vio Alc{\^{a}}ntara de Lima J{\'{u}}nior and
Virginie Fresse and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {FlexOE: {A} congestion-aware routing algorithm for NoCs},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {51--57},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683958},
doi = {10.1109/RSP.2013.6683958},
timestamp = {Thu, 11 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/JuniorFR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LovergineTVF13,
author = {Silvia Lovergine and
Antonino Tumeo and
Oreste Villa and
Fabrizio Ferrandi},
title = {{YAPPA:} {A} compiler-based parallelization framework for irregular
applications on MPSoCs},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {123--129},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683968},
doi = {10.1109/RSP.2013.6683968},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LovergineTVF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MarconABWVM13,
author = {C{\'{e}}sar A. M. Marcon and
Alexandre M. Amory and
Felipe T. Bortolon and
Thais Webber and
Thomas Volpato and
Jader Munareto},
title = {An implementation of a distributed fault-tolerant mechanism for 2D
mesh NoCs},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {24--29},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683954},
doi = {10.1109/RSP.2013.6683954},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MarconABWVM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MoreiraMGHC13,
author = {Matheus T. Moreira and
Felipe G. Magalhaes and
Matheus Gibiluka and
Fabiano Hessel and
Ney Laert Vilar Calazans},
title = {BaBaNoC: An asynchronous network-on-chip described in Balsa},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {37--43},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683956},
doi = {10.1109/RSP.2013.6683956},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MoreiraMGHC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MuckF13,
author = {Tiago Rog{\'{e}}rio M{\"{u}}ck and
Ant{\^{o}}nio Augusto Fr{\"{o}}hlich},
title = {Seamless integration of {HW/SW} components in a HLS-based SoC design
environment},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {109--115},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683966},
doi = {10.1109/RSP.2013.6683966},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MuckF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MurugappaLBJ13,
author = {Purushotham Murugappa and
Vianney Lapotre and
Amer Baghdadi and
Michel J{\'{e}}z{\'{e}}quel},
title = {Rapid design and prototyping of a reconfigurable decoder architecture
for {QC-LDPC} codes},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {87--93},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683963},
doi = {10.1109/RSP.2013.6683963},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MurugappaLBJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NakadaMYN13,
author = {Takashi Nakada and
Shinobu Miwa and
Keisuke Y. Yano and
Hiroshi Nakamura},
title = {Performance modeling for designing NoC-based multiprocessors},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {30--36},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683955},
doi = {10.1109/RSP.2013.6683955},
timestamp = {Thu, 21 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NakadaMYN13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NasartschukHK13,
author = {Konstantin Nasartschuk and
Rainer Herpers and
Kenneth B. Kent},
title = {Visual exploration of changing {FPGA} architectures in the {VTR} project},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {16--22},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683953},
doi = {10.1109/RSP.2013.6683953},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NasartschukHK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SantosMS13,
author = {Ricardo Santos and
Renan A. Marks and
Renato Santos},
title = {A framework for instruction encoding designs on embedded processors},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {116--122},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683967},
doi = {10.1109/RSP.2013.6683967},
timestamp = {Mon, 01 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SantosMS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TangTM13,
author = {Qingshan Tang and
Matthieu Tuna and
Habib Mehrez},
title = {Routing algorithm for multi-FPGA based systems using multi-point physical
tracks},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {2--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683951},
doi = {10.1109/RSP.2013.6683951},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/TangTM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/UlianaKA13,
author = {David Uliana and
Krzysztof Kepa and
Peter Athanas},
title = {FPGA-based {HPC} application design for non-experts},
booktitle = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
pages = {9--15},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/RSP.2013.6683952},
doi = {10.1109/RSP.2013.6683952},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/UlianaKA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2013,
title = {Proceedings of the 24th {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2013, Montreal, QC, Canada, October 3-4, 2013},
publisher = {{IEEE}},
year = {2013},
url = {https://ieeexplore.ieee.org/xpl/conhome/6676470/proceeding},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2013.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AdlerHMMR12,
author = {Nico Adler and
Martin Hillenbrand and
Klaus D. M{\"{u}}ller{-}Glaser and
Eduard Metzker and
Clemens Reichmann},
title = {Graphically notated fault modeling and safety analysis in the context
of electric and electronic architecture development and functional
safety},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {36--42},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380688},
doi = {10.1109/RSP.2012.6380688},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AdlerHMMR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AguiarMSH12,
author = {Alexandra Aguiar and
Carlos Moratelli and
Marcos Sartori and
Fabiano Hessel},
title = {Hardware-assisted virtualization targeting MIPS-based SoCs},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {2--8},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380683},
doi = {10.1109/RSP.2012.6380683},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AguiarMSH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AlouaniNKA12,
author = {Ihsen Alouani and
Sma{\"{\i}}l Niar and
Fadi J. Kurdahi and
Mohamed Abid},
title = {Parity-based mono-Copy Cache for low power consumption and high reliability},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {44--48},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380689},
doi = {10.1109/RSP.2012.6380689},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AlouaniNKA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BouissouMC12,
author = {Olivier Bouissou and
Samuel Mimram and
Alexandre Chapoutot},
title = {HySon: Set-based simulation of hybrid systems},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {79--85},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380694},
doi = {10.1109/RSP.2012.6380694},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BouissouMC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DasK12,
author = {Anup Das and
Akash Kumar},
title = {Fault-aware task re-mapping for throughput constrained multimedia
applications on NoC-based MPSoCs},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {149--155},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380704},
doi = {10.1109/RSP.2012.6380704},
timestamp = {Sat, 24 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DasK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Dutt12,
author = {Nikil D. Dutt},
title = {Keynote speach},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380682},
doi = {10.1109/RSP.2012.6380682},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Dutt12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FotsingG12,
author = {Christian Fotsing and
Annie Geniet},
title = {Integrating semantic properties within a Petri net based scheduling
tool},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {93--99},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380696},
doi = {10.1109/RSP.2012.6380696},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/FotsingG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FresseGTR12,
author = {Virginie Fresse and
Zhiwei Ge and
Junyan Tan and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {Case study: Deployment of the 2D NoC on 3D for the generation of large
emulation platforms},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {23--29},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380686},
doi = {10.1109/RSP.2012.6380686},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/FresseGTR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GhidiniWMGFM12,
author = {Yan Ghidini and
Thais Webber and
Edson I. Moreno and
Fernando Grando and
Rubem Dutra Ribeiro Fagundes and
C{\'{e}}sar A. M. Marcon},
title = {Buffer depth and traffic influence on 3D NoCs performance},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {9--15},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380684},
doi = {10.1109/RSP.2012.6380684},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GhidiniWMGFM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GrayA12,
author = {Ian Gray and
Neil C. Audsley},
title = {Challenges in software development for multicore System-on-Chip development},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {115--121},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380699},
doi = {10.1109/RSP.2012.6380699},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GrayA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GuedesABA12,
author = {Marcelo Guedes and
Rafael Auler and
Edson Borin and
Rodolfo Azevedo},
title = {An ArchC approach for automatic energy consumption characterization
of processors},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {57--63},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380691},
doi = {10.1109/RSP.2012.6380691},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GuedesABA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JiashuDK12,
author = {Jiashu Li and
Anup Das and
Akash Kumar},
title = {A design flow for partially reconfigurable heterogeneous multi-processor
platforms},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {170--176},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380707},
doi = {10.1109/RSP.2012.6380707},
timestamp = {Sat, 24 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JiashuDK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KimPLS12,
author = {BaekGyu Kim and
Linh T. X. Phan and
Insup Lee and
Oleg Sokolsky},
title = {A model-based {I/O} interface synthesis framework for the cross-platform
software modeling},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {16--22},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380685},
doi = {10.1109/RSP.2012.6380685},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KimPLS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LagraaTP12,
author = {Sofiane Lagraa and
Alexandre Termier and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Automatic congestion detection in MPSoC programs using data mining
on simulation traces},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {64--70},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380692},
doi = {10.1109/RSP.2012.6380692},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LagraaTP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeePK12,
author = {Sungjin Lee and
Jisung Park and
Jihong Kim},
title = {FlashBench: {A} workbench for a rapid development of flash-based storage
devices},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {163--169},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380706},
doi = {10.1109/RSP.2012.6380706},
timestamp = {Tue, 07 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LeePK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MahrB12,
author = {Philipp Mahr and
Christophe Bobda},
title = {Reducing communication costs on Dynamic Networks-on-Chip through runtime
relocation of tasks},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {177--182},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380708},
doi = {10.1109/RSP.2012.6380708},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MahrB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Mallet12,
author = {Fr{\'{e}}d{\'{e}}ric Mallet},
title = {Automatic generation of observers from {MARTE/CCSL}},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {86--92},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380695},
doi = {10.1109/RSP.2012.6380695},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Mallet12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MurugappaBBJ12,
author = {Purushotham Murugappa and
Jean{-}Noel Bazin and
Amer Baghdadi and
Michel J{\'{e}}z{\'{e}}quel},
title = {{FPGA} prototyping and performance evaluation of multi-standard Turbo/LDPC
Encoding and Decoding},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {143--148},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380703},
doi = {10.1109/RSP.2012.6380703},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MurugappaBBJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NasartschukHK12,
author = {Konstantin Nasartschuk and
Rainer Herpers and
Kenneth B. Kent},
title = {Visualization support for {FPGA} architecture exploration},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {128--134},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380701},
doi = {10.1109/RSP.2012.6380701},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NasartschukHK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NguyenGSB12,
author = {Hai H. Nguyen and
Mikael Guillemot and
Yvon Savaria and
Yves Blaqui{\`{e}}re},
title = {A new approach for pin detection for an electronic system prototyping
reconfigurable platform},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {122--127},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380700},
doi = {10.1109/RSP.2012.6380700},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/NguyenGSB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Ochoa-RuizLBCMD12,
author = {Gilberto Ochoa{-}Ruiz and
Ouassila Labbani and
El{-}Bay Bourennane and
Sana Cherif and
Samy Meftali and
Jean{-}Luc Dekeyser},
title = {Enabling partially reconfigurable {IP} cores parameterisation and
integration using {MARTE} and {IP-XACT}},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {107--113},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380698},
doi = {10.1109/RSP.2012.6380698},
timestamp = {Sat, 16 Sep 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Ochoa-RuizLBCMD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PetryWCMC12,
author = {Carlos A. Petry and
Eduardo W{\"{a}}chter and
Guilherme M. Castilhos and
Fernando Gehm Moraes and
Ney Laert Vilar Calazans},
title = {A spectrum of MPSoC models for design space exploration and its use},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {30--35},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380687},
doi = {10.1109/RSP.2012.6380687},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/PetryWCMC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PuschiniMPAF12,
author = {Diego Puschini and
Julien Mottin and
Nicolas Palix and
Lian Apostol and
Christian Fabre},
title = {Integrated architecture exploration workflow: {A} NoC-based case study},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {135--141},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380702},
doi = {10.1109/RSP.2012.6380702},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/PuschiniMPAF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RomaM12,
author = {Nuno Roma and
Pedro Magalh{\~{a}}es},
title = {System-level prototyping framework for heterogeneous multi-core architecture
applied to biological sequence analysis},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {156--162},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380705},
doi = {10.1109/RSP.2012.6380705},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/RomaM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SchwalbGSM12,
author = {Tobias Schwalb and
Tobias G{\"{a}}deke and
Johannes Schmid and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Seamless model-based design and deployment of wireless networked systems},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {100--106},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380697},
doi = {10.1109/RSP.2012.6380697},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SchwalbGSM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TangMT12,
author = {Qingshan Tang and
Habib Mehrez and
Matthieu Tuna},
title = {Design for prototyping of a parameterizable cluster-based Multi-Core
System-on-Chip on a multi-FPGA board},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {71--77},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380693},
doi = {10.1109/RSP.2012.6380693},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/TangMT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YunYKH12,
author = {Dukyoung Yun and
Youngmin Yi and
Sungchan Kim and
Soonhoi Ha},
title = {A cycle-level parallel simulation technique exploiting both space
and time parallelism},
booktitle = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
pages = {50--56},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/RSP.2012.6380690},
doi = {10.1109/RSP.2012.6380690},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/YunYKH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2012,
title = {Proceedings of the 23rd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2012, Tampere, Finland, October 11-12, 2012},
publisher = {{IEEE}},
year = {2012},
url = {https://ieeexplore.ieee.org/xpl/conhome/6375584/proceeding},
isbn = {978-1-4673-2786-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2012.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AguiarMH11,
author = {Alexandra Aguiar and
Felipe Gohring de Magalhaes and
Fabiano Hessel},
title = {Embedded virtualization for the next generation of cluster-based MPSoCs},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {113--119},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929984},
doi = {10.1109/RSP.2011.5929984},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AguiarMH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Al-KhayatMBJ11,
author = {Rachid Al{-}Khayat and
Purushotham Murugappa and
Amer Baghdadi and
Michel J{\'{e}}z{\'{e}}quel},
title = {Area and throughput optimized {ASIP} for multi-standard turbo decoding},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {79--84},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929979},
doi = {10.1109/RSP.2011.5929979},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Al-KhayatMBJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AmoryMML11,
author = {Alexandre M. Amory and
C{\'{e}}sar A. M. Marcon and
Fernando Gehm Moraes and
Marcelo Lubaszewski},
title = {Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the
energy consumption and the application execution time},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {164--170},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929991},
doi = {10.1109/RSP.2011.5929991},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AmoryMML11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BakloutiAMAD11,
author = {Mouna Baklouti and
Manel Ammar and
Philippe Marquet and
Mohamed Abid and
Jean{-}Luc Dekeyser},
title = {A model-driven based framework for rapid parallel SoC {FPGA} prototyping},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {149--155},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929989},
doi = {10.1109/RSP.2011.5929989},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BakloutiAMAD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BalasubramanianPNKLPP11,
author = {Daniel Balasubramanian and
G{\'{a}}bor Pap and
Harmon Nine and
Gabor Karsai and
Michael R. Lowry and
Corina S. Pasareanu and
Thomas Pressburger},
title = {Rapid property specification and checking for model-based formalisms},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {121--127},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929985},
doi = {10.1109/RSP.2011.5929985},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BalasubramanianPNKLPP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BelaidMM11,
author = {Ikbel Belaid and
Fabrice Muller and
Maher Benjemaa},
title = {Schedulers-Driven approach for dynamic placement/scheduling of multiple
DAGs onto SoPCs},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {179--185},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929993},
doi = {10.1109/RSP.2011.5929993},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BelaidMM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BeyrouthyF11,
author = {Taha Beyrouthy and
Laurent Fesquet},
title = {An event-driven {FIR} filter: Design and implementation},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {59--65},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929976},
doi = {10.1109/RSP.2011.5929976},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BeyrouthyF11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BochemKH11,
author = {Alexander Bochem and
Kenneth B. Kent and
Rainer Herpers},
title = {{FPGA} based real-time object detection approach with validation of
precision and performance},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {9--15},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929969},
doi = {10.1109/RSP.2011.5929969},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BochemKH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BochemKLWD11,
author = {Alexander Bochem and
Kenneth B. Kent and
Yves G. Losier and
Jeremy Williams and
Justin Deschenes},
title = {{FPGA} design for monitoring CANbus traffic in a prosthetic limb sensor
network},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {30--36},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929972},
doi = {10.1109/RSP.2011.5929972},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BochemKLWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BrehmWLK11,
author = {Christian Brehm and
Norbert Wehn and
Sacha Loitz and
Wolfgang Kunz},
title = {Validation of channel decoding ASIPs a case study},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {74--78},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929978},
doi = {10.1109/RSP.2011.5929978},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BrehmWLK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CallananCCCLMNPPPX11,
author = {Owen Callanan and
Antonio Castelfranco and
Catherine H. Crawford and
Eoin Creedon and
Scott Lekuch and
Kay M{\"{u}}ller and
Mark Nutter and
Hartmut Penner and
Brian Purcell and
Mark Purcell and
Jimi Xenidis},
title = {A study in rapid prototyping: Leveraging software and hardware simulation
tools in the bringup of system-on-a-chip based platforms},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {45--52},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929974},
doi = {10.1109/RSP.2011.5929974},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/CallananCCCLMNPPPX11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Carmel-VeilleuxBB11,
author = {Tennessee Carmel{-}Veilleux and
Jean{-}Fran{\c{c}}ois Boland and
Guy Bois},
title = {A novel low-overhead flexible instrumentation framework for virtual
platforms},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {92--98},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929981},
doi = {10.1109/RSP.2011.5929981},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Carmel-VeilleuxBB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChenGRP11,
author = {Hui Chen and
Guillaume Godet{-}Bar and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Me3D: {A} model-driven methodology expediting embedded device driver
development},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {171--177},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929992},
doi = {10.1109/RSP.2011.5929992},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ChenGRP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChowdhuryML11,
author = {Sazzadur Chowdhury and
Roberto Muscedere and
Sundeep Lal},
title = {An FPGA-based signal processing system for a 77 GHz {MEMS} tri-mode
automotive radar},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {2--8},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929968},
doi = {10.1109/RSP.2011.5929968},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ChowdhuryML11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HeddeP11,
author = {Damien Hedde and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {A non intrusive simulation-based trace system to analyse Multiprocessor
Systems-on-Chip software},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {106--112},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929983},
doi = {10.1109/RSP.2011.5929983},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HeddeP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HeinzHKM11,
author = {Matthias Heinz and
Martin Hillenbrand and
Kai Klindworth and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Rapid automotive bus system synthesis based on communication requirements},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {53--58},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929975},
doi = {10.1109/RSP.2011.5929975},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HeinzHKM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KutzerGHT11,
author = {Philipp Kutzer and
Jens Gladigau and
Christian Haubelt and
J{\"{u}}rgen Teich},
title = {Automatic generation of system-level virtual prototypes from streaming
application models},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {128--134},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929986},
doi = {10.1109/RSP.2011.5929986},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KutzerGHT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeNoursBP11,
author = {S{\'{e}}bastien Le Nours and
Anthony Barreteau and
Olivier Pasquier},
title = {A state-based modeling approach for fast performance evaluation of
embedded system architectures},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {156--162},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929990},
doi = {10.1109/RSP.2011.5929990},
timestamp = {Mon, 12 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LeNoursBP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MendozaKBM11,
author = {Francisco Mendoza and
Christian K{\"{o}}llner and
J{\"{u}}rgen Becker and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {An automated approach to SystemC/Simulink co-simulation},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {135--141},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929987},
doi = {10.1109/RSP.2011.5929987},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MendozaKBM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MoreiraKBCAR11,
author = {Jo{\~{a}}o Moreira and
Felipe Klein and
Alexandro Baldassin and
Paulo Centoducatte and
Rodolfo Azevedo and
Sandro Rigo},
title = {Using multiple abstraction levels to speedup an MPSoC virtual platform
simulator},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {99--105},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929982},
doi = {10.1109/RSP.2011.5929982},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MoreiraKBCAR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MorenoMCM11,
author = {Edson I. Moreno and
C{\'{e}}sar A. M. Marcon and
Ney Laert Vilar Calazans and
Fernando Gehm Moraes},
title = {Arbitration and routing impact on NoC design},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {193--198},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929995},
doi = {10.1109/RSP.2011.5929995},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MorenoMCM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MuhlbauerGB11,
author = {Felix M{\"{u}}hlbauer and
Michael Gro{\ss}hans and
Christophe Bobda},
title = {Rapid prototyping of OpenCV image processing applications using {ASP}},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {16--22},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929970},
doi = {10.1109/RSP.2011.5929970},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MuhlbauerGB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PhilippSG11,
author = {Fran{\c{c}}ois Philipp and
Faizal Arya Samman and
Manfred Glesner},
title = {Design of an autonomous platform for distributed sensing-actuating
systems},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {85--90},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929980},
doi = {10.1109/RSP.2011.5929980},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/PhilippSG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PlishkerZBCK11,
author = {William Plishker and
George F. Zaki and
Shuvra S. Bhattacharyya and
Charles Clancy and
John Kuykendall},
title = {Applying graphics processor acceleration in a software defined radio
prototyping environment},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {67--73},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929977},
doi = {10.1109/RSP.2011.5929977},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/PlishkerZBCK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PongyupinpanichG11,
author = {Surapong Pongyupinpanich and
Manfred Glesner},
title = {On-chip efficient Round-Robin scheduler for high-speed interconnection},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {199--202},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929996},
doi = {10.1109/RSP.2011.5929996},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/PongyupinpanichG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SchwalbM11,
author = {Tobias Schwalb and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Extension of component-based models for control and monitoring of
embedded systems at runtime},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {142--148},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929988},
doi = {10.1109/RSP.2011.5929988},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SchwalbM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SzeferZCCCLCL11,
author = {Jakub Szefer and
Wei Zhang and
Yu{-}Yuan Chen and
David Champagne and
King Chan and
Will X. Y. Li and
Ray C. C. Cheung and
Ruby B. Lee},
title = {Rapid single-chip secure processor prototyping on the OpenSPARC {FPGA}
platform},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {38--44},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929973},
doi = {10.1109/RSP.2011.5929973},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SzeferZCCCLCL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TanFR11,
author = {Junyan Tan and
Virginie Fresse and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {Generation of emulation platforms for NoC exploration on {FPGA}},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {186--192},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929994},
doi = {10.1109/RSP.2011.5929994},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/TanFR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ZhangG11,
author = {Ming Zhang and
Zonghua Gu},
title = {Optimization issues in mapping {AUTOSAR} components to distributed
multithreaded implementations},
booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
pages = {23--29},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/RSP.2011.5929971},
doi = {10.1109/RSP.2011.5929971},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ZhangG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2011,
title = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011},
publisher = {{IEEE}},
year = {2011},
url = {https://ieeexplore.ieee.org/xpl/conhome/5888815/proceeding},
isbn = {978-1-4577-0658-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AbdiHYCVG10,
author = {Samar Abdi and
Yonghyun Hwang and
Lochi Yu and
Hansu Cho and
Ines Viskic and
Daniel D. Gajski},
title = {Embedded system environment: {A} framework for TLM-based design and
prototyping},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656342},
doi = {10.1109/RSP.2010.5656342},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AbdiHYCVG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AguiarH10,
author = {Alexandra Aguiar and
Fabiano Hessel},
title = {Embedded systems' virtualization: The next challenge?},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656430},
doi = {10.1109/RSP.2010.5656430},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AguiarH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AliAR10,
author = {Zulfiqar Ali and
Ali Arshad and
Umair Razzaq},
title = {An {FPGA} based semi-parallel architecture for higher order Moving
Target Indication {(MTI)} processing},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656326},
doi = {10.1109/RSP.2010.5656326},
timestamp = {Tue, 02 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AliAR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AllamOH10,
author = {Atef Allam and
Ian O'Connor and
Wim Heirman},
title = {Performance evaluation for passive-type Optical network-on-chip},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656333},
doi = {10.1109/RSP.2010.5656333},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AllamOH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BouchebabaPOLLBN10,
author = {Youcef Bouchebaba and
Pierre G. Paulin and
Ali Erdem {\"{O}}zcan and
Bruno Lavigueur and
Michel Langevin and
Olivier Benny and
Gabriela Nicolescu},
title = {MpAssign: {A} framework for solving the many-core platform mapping
problem},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656327},
doi = {10.1109/RSP.2010.5656327},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BouchebabaPOLLBN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DoLNH10,
author = {Trang T. T. Do and
Thinh M. Le and
Binh P. Nguyen and
Yajun Ha},
title = {Performance-cost analyses software for {H.264} Forward/Inverse Integer
Transform},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656347},
doi = {10.1109/RSP.2010.5656347},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/DoLNH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DrusinskyS10,
author = {Doron Drusinsky and
Man{-}tak Shing},
title = {Validating quality attribute requirements via execution-based model
checking},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656438},
doi = {10.1109/RSP.2010.5656438},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/DrusinskyS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ForwardBL10,
author = {Andrew Forward and
Omar Bahy Badreddin and
Timothy C. Lethbridge},
title = {Umple: Towards combining model driven with prototype driven system
development},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656338},
doi = {10.1109/RSP.2010.5656338},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ForwardBL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Gerstlauer10,
author = {Andreas Gerstlauer},
title = {Host-compiled simulation of multi-core platforms},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--6},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656352},
doi = {10.1109/RSP.2010.5656352},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Gerstlauer10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Gerstlauer10a,
author = {Andreas Gerstlauer},
title = {Host-compiled simulation of multi-core platforms},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--6},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656355},
doi = {10.1109/RSP.2010.5656355},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Gerstlauer10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GirodiasGBNALP10,
author = {Bruno Girodias and
Luiza Gheorghe and
Youcef Bouchebaba and
Gabriela Nicolescu and
El Mostapha Aboulhamid and
Michel Langevin and
Pierre G. Paulin},
title = {Combining memory optimization with mapping of multimedia applications
for multi-processors system-on-chip},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--9},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656435},
doi = {10.1109/RSP.2010.5656435},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GirodiasGBNALP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HemingwayPKNBKS10,
author = {Graham Hemingway and
Joseph Porter and
Nicholas Kottenstette and
Harmon Nine and
Christopher P. van Buskirk and
Gabor Karsai and
Janos Sztipanovits},
title = {Automated synthesis of Time-Triggered Architecture-based TrueTime
models for platform effects simulation and analysis},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656335},
doi = {10.1109/RSP.2010.5656335},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HemingwayPKNBKS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HillenbrandHAMM10,
author = {Martin Hillenbrand and
Matthias Heinz and
Nico Adler and
Johannes Matheis and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Failure mode and effect analysis based on electric and electronic
architectures of vehicles to support the safety lifecycle {ISO/DIS}
26262},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656351},
doi = {10.1109/RSP.2010.5656351},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HillenbrandHAMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HillenbrandHM10,
author = {Martin Hillenbrand and
Matthias Heinz and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Rapid specification of hardware-in-the-loop test systems in the automotive
domain based on the electric / electronic architecture description
of, vehicles},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--6},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656344},
doi = {10.1109/RSP.2010.5656344},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HillenbrandHM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HillenbrandHMAMR10,
author = {Martin Hillenbrand and
Matthias Heinz and
Klaus D. M{\"{u}}ller{-}Glaser and
Nico Adler and
Johannes Matheis and
Clemens Reichmann},
title = {An approach for rapidly adapting the demands of {ISO/DIS} 26262 to
electric/electronic architecture modeling},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656336},
doi = {10.1109/RSP.2010.5656336},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HillenbrandHMAMR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HusemannMRLS10,
author = {Ronaldo Husemann and
Mariano Majolo and
Valter Roesler and
Jos{\'{e}} Valdeni de Lima and
Altamiro Amadeu Susin},
title = {Highly efficient forward two-dimensional {DCT} module architecture
for {H.264/SVC}},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656330},
doi = {10.1109/RSP.2010.5656330},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HusemannMRLS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KanjilalSB10,
author = {Ananya Kanjilal and
Sabnam Sengupta and
Swapan Bhattacharya},
title = {Scenario path identification for distributed systems: {A} graph based
approach},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--8},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656332},
doi = {10.1109/RSP.2010.5656332},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/KanjilalSB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LafiLJ10,
author = {Walid Lafi and
Didier Lattard and
Ahmed Amine Jerraya},
title = {An efficient hierarchical router for large 3D NoCs},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--5},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656418},
doi = {10.1109/RSP.2010.5656418},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LafiLJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LattuadaF10,
author = {Marco Lattuada and
Fabrizio Ferrandi},
title = {Fine grain analysis of simulators accuracy for calibrating performance
models},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656414},
doi = {10.1109/RSP.2010.5656414},
timestamp = {Wed, 13 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LattuadaF10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MaFL10,
author = {Weiqin Ma and
A. Forin and
Jyh{-}Charn Liu},
title = {Rapid prototyping and compact testing of {CPU} emulators},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656339},
doi = {10.1109/RSP.2010.5656339},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MaFL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MahrB10,
author = {Philipp Mahr and
Christophe Bobda},
title = {Reconfigurable router for dynamic Networks-on-Chip},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--6},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656341},
doi = {10.1109/RSP.2010.5656341},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MahrB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RecioSA10,
author = {Adolfo Recio and
Jorge Alberto Sur{\'{\i}}s and
Peter Athanas},
title = {Automatic modulation classification for rapid radio deployment},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/rsp\_2010.46},
doi = {10.1109/RSP\_2010.46},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/RecioSA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Schirner10,
author = {Gunar Schirner},
title = {Exploring {SW} performance using preemptive {RTOS} models},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656350},
doi = {10.1109/RSP.2010.5656350},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Schirner10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WuKSPB10,
author = {Hsiang{-}Huang Wu and
Hojin Kee and
Nimish Sane and
William Plishker and
Shuvra S. Bhattacharyya},
title = {Rapid prototyping for digital signal processing systems using Parameterized
Synchronous Dataflow graphs},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656423},
doi = {10.1109/RSP.2010.5656423},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/WuKSPB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YaoCM10,
author = {Gavin Xiaoxu Yao and
Ray C. C. Cheung and
Kim{-}Fung Man},
title = {Counter Embedded Memory architecture for trusted computing platform},
booktitle = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/RSP.2010.5656329},
doi = {10.1109/RSP.2010.5656329},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/YaoCM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2010,
title = {Proceedings of the 21st {IEEE} International Symposium on Rapid System
Prototyping, {RSP} 2010, Fairfax, VA, USA, 8-11 June, 2010},
publisher = {{IEEE}},
year = {2010},
url = {https://ieeexplore.ieee.org/xpl/conhome/5633873/proceeding},
isbn = {978-1-4244-7073-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AndrycTK09,
author = {Kevin Andryc and
Russell Tessier and
Patrick Kelly},
title = {An Interactive Approach to Timing Accurate {PCI-X} Simulation},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {181--187},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.9},
doi = {10.1109/RSP.2009.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AndrycTK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AoumeurBS09,
author = {Nasreddine Aoumeur and
Kamel Barkaoui and
Gunter Saake},
title = {Rapid-Prototyping of Adaptive Component-Based Systems Using Runtime
Aspectual Interactions},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {18--25},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.22},
doi = {10.1109/RSP.2009.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AoumeurBS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarnevaliDRV09,
author = {Laura Carnevali and
Dario D'Amico and
Lorenzo Ridi and
Enrico Vicario},
title = {Automatic Code Generation from Real-Time Systems Specifications},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {102--105},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.24},
doi = {10.1109/RSP.2009.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarnevaliDRV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Chagoya-GarzonGRPRLVP09,
author = {Alexandre Chagoya{-}Garzon and
Xavier Guerin and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
Davide Rossetti and
Alessandro Lonardo and
Piero Vicini and
Pier Stanislao Paolucci},
title = {Synthesis of Communication Mechanisms for Multi-tile Systems Based
on Heterogeneous Multi-processor System-On-Chips},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {48--54},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.12},
doi = {10.1109/RSP.2009.12},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Chagoya-GarzonGRPRLVP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChuongLS09,
author = {Lieu My Chuong and
Siew Kei Lam and
Thambipillai Srikanthan},
title = {Area-Time Estimation of Controller for Porting C-Based Functions onto
{FPGA}},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {145--151},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.15},
doi = {10.1109/RSP.2009.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChuongLS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ColeGK09,
author = {John Cole and
Larry Garey and
Kenneth B. Kent},
title = {Rapid Prototyping Projection Algorithms with {FPGA} Technology},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {95--101},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.37},
doi = {10.1109/RSP.2009.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ColeGK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DashS09,
author = {Santanu Kumar Dash and
Thambipillai Srikanthan},
title = {Instruction Cache Tuning for Embedded Multitasking Applications},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {152--158},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.16},
doi = {10.1109/RSP.2009.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DashS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GlasKMB09,
author = {Benjamin Glas and
Alexander Klimm and
Klaus D. M{\"{u}}ller{-}Glaser and
J{\"{u}}rgen Becker},
title = {Configuration Measurement for FPGA-based Trusted Platforms},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {123--129},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.28},
doi = {10.1109/RSP.2009.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GlasKMB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HeinzHM09,
author = {Matthias Heinz and
Verena Hoss and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Physical Layer Extraction of FlexRay Configuration Parameters},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {173--180},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.13},
doi = {10.1109/RSP.2009.13},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HeinzHM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HillenbrandM09,
author = {Martin Hillenbrand and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {An Approach to Supply Simulations of the Functional Environment of
ECUs for Hardware-in-the-Loop Test Systems Based on EE-architectures
Conform to {AUTOSAR}},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {188--195},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.14},
doi = {10.1109/RSP.2009.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HillenbrandM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JaberKABMP09,
author = {Chafic Jaber and
Andreas Kanstein and
Ludovic Apvrille and
Amer Baghdadi and
Patricia Le Moenner and
Renaud Pacalet},
title = {High-Level System Modeling for Rapid {HW/SW} Architecture Exploration},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {88--94},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.27},
doi = {10.1109/RSP.2009.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JaberKABMP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JafriBJ09,
author = {Atif Raza Jafri and
Amer Baghdadi and
Michel J{\'{e}}z{\'{e}}quel},
title = {Rapid Prototyping of ASIP-based Flexible {MMSE-IC} Linear Equalizer},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {130--133},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.17},
doi = {10.1109/RSP.2009.17},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JafriBJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JakkaDYDMC09,
author = {Bhasker Jakka and
Dillip Dash and
Caner Yalcin and
Ly Dang and
Omar Mire and
Aldo Cometti},
title = {A Flexible High Throughput {FPGA} Based Prototype Platform for {RW}
Channel Development},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {41--47},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.38},
doi = {10.1109/RSP.2009.38},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JakkaDYDMC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KuhneBP09,
author = {Ulrich K{\"{u}}hne and
Sven Beyer and
Christian Pichler},
title = {Generating an Efficient Instruction Set Simulator from a Complete
Property Suite},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {109--115},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.19},
doi = {10.1109/RSP.2009.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KuhneBP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LarabiMM09,
author = {Zahir Larabi and
Yves Mathieu and
St{\'{e}}phane Mancini},
title = {Efficient Data Access Management for FPGA-Based Image Processing SoCs},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {159--165},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.20},
doi = {10.1109/RSP.2009.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LarabiMM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeeBW09,
author = {Dongwon Lee and
Shuvra S. Bhattacharyya and
Wayne H. Wolf},
title = {High-Performance Buffer Mapping to Exploit {DRAM} Concurrency in Multiprocessor
{DSP} Systems},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {137--144},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.34},
doi = {10.1109/RSP.2009.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LeeBW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LibbyK09,
author = {Joseph C. Libby and
Kenneth B. Kent},
title = {A Methodology for Rapid Optimization of HandelC Specifications},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {81--87},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.31},
doi = {10.1109/RSP.2009.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LibbyK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MichalisID09,
author = {Michalis Platsis and
Ioannis Papaefstathiou and
Dimitrios Meintanis},
title = {Design and Implementation of an {UWB} Digital Transmitter Based on
the Multiband {OFDM} Physical Layer Proposal},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {166--169},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.10},
doi = {10.1109/RSP.2009.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MichalisID09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PavlatosDP09,
author = {Christos Pavlatos and
Alexandros C. Dimopoulos and
George K. Papakonstantinou},
title = {A Formal Method for Rapid SoC Prototyping},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {34--37},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.25},
doi = {10.1109/RSP.2009.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PavlatosDP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PorterVKNKS09,
author = {Joseph Porter and
P{\'{e}}ter V{\"{o}}lgyesi and
Nicholas Kottenstette and
Harmon Nine and
Gabor Karsai and
Janos Sztipanovits},
title = {An Experimental Model-Based Rapid Prototyping Environment for High-Confidence
Embedded Software},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {3--10},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.32},
doi = {10.1109/RSP.2009.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PorterVKNKS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PouillonBMPG09,
author = {Nicolas Pouillon and
Alexandre B{\'{e}}coulet and
Aline Vieira de Mello and
Fran{\c{c}}ois P{\^{e}}cheux and
Alain Greiner},
title = {A Generic Instruction Set Simulator {API} for Timed and Untimed Simulation
and Debug of MP2-SoCs},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {116--122},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.11},
doi = {10.1109/RSP.2009.11},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PouillonBMPG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ReisF09,
author = {Tiago de Albuquerque Reis and
Ant{\^{o}}nio Augusto Fr{\"{o}}hlich},
title = {Operating System Support for Difference-Based Partial Hardware Reconfiguration},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {75--80},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.33},
doi = {10.1109/RSP.2009.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ReisF09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RenaultKH09,
author = {Xavier Renault and
Fabrice Kordon and
J{\'{e}}r{\^{o}}me Hugues},
title = {Adapting Models to Model Checkers, {A} Case Study : Analysing {AADL}
Using Time or Colored Petri Nets},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {26--33},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.30},
doi = {10.1109/RSP.2009.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RenaultKH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SaadBB09,
author = {Jean Saad and
Amer Baghdadi and
Frantz Bodereau},
title = {FPGA-based Radar Signal Processing for Automotive Driver Assistance
System},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {196--199},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.26},
doi = {10.1109/RSP.2009.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SaadBB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SanderGRBM09,
author = {Oliver Sander and
Benjamin Glas and
Christoph Roth and
J{\"{u}}rgen Becker and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Testing of an {FPGA} Based C2X-Communication Prototype with a Model
Based Traffic Generation},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {68--71},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.29},
doi = {10.1109/RSP.2009.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SanderGRBM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SchneiderMH09,
author = {Sven Schneider and
Andr{\'{e}} Meisel and
Wolfram Hardt},
title = {Communication-Aware Hierarchical Online-Placement in Heterogeneous
Reconfigurable Systems},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {61--67},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.23},
doi = {10.1109/RSP.2009.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SchneiderMH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SinghJPS09,
author = {Amit Kumar Singh and
Wu Jigang and
Alok Prakash and
Thambipillai Srikanthan},
title = {Efficient Heuristics for Minimizing Communication Overhead in NoC-based
Heterogeneous MPSoC Platforms},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {55--60},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.18},
doi = {10.1109/RSP.2009.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SinghJPS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SulflowKFGD09,
author = {Andr{\'{e}} S{\"{u}}lflow and
Ulrich K{\"{u}}hne and
G{\"{o}}rschwin Fey and
Daniel Gro{\ss}e and
Rolf Drechsler},
title = {WoLFram- {A} Word Level Framework for Formal Verification},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {11--17},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.21},
doi = {10.1109/RSP.2009.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SulflowKFGD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2009,
title = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://ieeexplore.ieee.org/xpl/conhome/5158481/proceeding},
isbn = {978-0-7695-3690-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BallSMS08,
author = {Gregory P. Ball and
Kevin Squire and
Craig H. Martell and
Man{-}tak Shing},
title = {{MAJIC:} {A} Java Application for Controlling Multiple, Heterogeneous
Robotic Agents},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {189--195},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.30},
doi = {10.1109/RSP.2008.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BallSMS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Bollella08,
author = {Greg Bollella},
title = {The {RTSJ} for Prototyping Real-Time Systems: {A} Case Study},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.39},
doi = {10.1109/RSP.2008.39},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Bollella08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DemontesBA08,
author = {Ludovic Demontes and
Marius Bonaciu and
Paul Amblard},
title = {Software for Multi Processor System on Chip: Moving an {MPEG4} Decoder
from Generic {RISC} Platforms to {CELL}},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {34--40},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.21},
doi = {10.1109/RSP.2008.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DemontesBA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FilhoAMH08,
author = {Sergio Johann Filho and
Alexandra Aguiar and
C{\'{e}}sar Augusto Missio Marcon and
Fabiano Hessel},
title = {High-Level Estimation of Execution Time and Energy Consumption for
Fast Homogeneous MPSoCs Prototyping},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {27--33},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.25},
doi = {10.1109/RSP.2008.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FilhoAMH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GhaffariMV08,
author = {Fakhreddine Ghaffari and
Beno{\^{\i}}t Miramond and
Fran{\c{c}}ois Verdier},
title = {Dynamic Adaptation of Hardware-Software Scheduling for Reconfigurable
System-on-Chip},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {112--118},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.28},
doi = {10.1109/RSP.2008.28},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/GhaffariMV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GlasKSMB08,
author = {Benjamin Glas and
Alexander Klimm and
David Schwab and
Klaus D. M{\"{u}}ller{-}Glaser and
J{\"{u}}rgen Becker},
title = {A Prototype of Trusted Platform Functionality on Reconfigurable Hardware
for Bitstream Updates},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {135--141},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.24},
doi = {10.1109/RSP.2008.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GlasKSMB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HinkelmannRG08,
author = {Heiko Hinkelmann and
Andreas Reinhardt and
Manfred Glesner},
title = {A Methodology for Wireless Sensor Network Prototyping with Sophisticated
Debugging Support},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {82--88},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.13},
doi = {10.1109/RSP.2008.13},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HinkelmannRG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HuguesPT08,
author = {J{\'{e}}r{\^{o}}me Hugues and
Maxime Perrotin and
Thanassis Tsiodras},
title = {Using {MDE} for the Rapid Prototyping of Space Critical Systems},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {10--16},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.19},
doi = {10.1109/RSP.2008.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HuguesPT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KhwajaU08,
author = {Amir A. Khwaja and
Joseph E. Urban},
title = {RealSpec: An Executable Specification Language for Prototyping Concurrent
Systems},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {3--9},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.9},
doi = {10.1109/RSP.2008.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KhwajaU08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LewisF08,
author = {Bruce A. Lewis and
Peter H. Feiler},
title = {Multi-dimensional Model Based Engineering Using {AADL}},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.40},
doi = {10.1109/RSP.2008.40},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LewisF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LukovicF08,
author = {Slobodan Lukovic and
Leandro Fiorin},
title = {An Automated Design Flow for NoC-based MPSoCs on {FPGA}},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {58--64},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.31},
doi = {10.1109/RSP.2008.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LukovicF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MajerWAHT08,
author = {Mateusz Majer and
Stefan Wildermann and
Josef Angermeier and
Stefan Hanke and
J{\"{u}}rgen Teich},
title = {Co-design Architecture and Implementation for Point-Based Rendering
on FPGAs},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {142--148},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.23},
doi = {10.1109/RSP.2008.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MajerWAHT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MariatosAA08,
author = {V. Mariatos and
Kostas Adaos and
George Alexiou},
title = {A Novel System-on-Chip Architecture for Efficient Image Processing},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {165--171},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.33},
doi = {10.1109/RSP.2008.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MariatosAA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MeiselDSH08,
author = {Andr{\'{e}} Meisel and
Alexander Draeger and
Sven Schneider and
Wolfram Hardt},
title = {Design Flow for Reconfiguration Based on the Overlaying Concept},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {89--95},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.20},
doi = {10.1109/RSP.2008.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MeiselDSH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MorenoPCJ08,
author = {Edson Ifarraguirre Moreno and
Katalin Maria Popovici and
Ney Laert Vilar Calazans and
Ahmed Amine Jerraya},
title = {Integrating Abstract NoC Models within MPSoC Design},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {65--71},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.29},
doi = {10.1109/RSP.2008.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MorenoPCJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MossCBA08,
author = {Laurent Moss and
Marc{-}Andr{\'{e}} Cantin and
Guy Bois and
El Mostapha Aboulhamid},
title = {Automation of Communication Refinement and Hardware Synthesis within
a System-Level Design Methodology},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {75--81},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.17},
doi = {10.1109/RSP.2008.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MossCBA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MullerBJ08,
author = {Olivier Muller and
Amer Baghdadi and
Michel J{\'{e}}z{\'{e}}quel},
title = {From Application to ASIP-based {FPGA} Prototype: a Case Study on Turbo
Decoding},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {128--134},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.16},
doi = {10.1109/RSP.2008.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MullerBJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NgoDLKB08,
author = {N. T. Ngo and
Trang T. T. Do and
Thinh M. Le and
Y. S. Kadam and
Amine Bermak},
title = {ASIP-controlled Inverse Integer Transform for {H.264/AVC} Compression},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {158--164},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.34},
doi = {10.1109/RSP.2008.34},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/NgoDLKB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PlishkerSKAB08,
author = {William Plishker and
Nimish Sane and
Mary Kiemb and
Kapil Anand and
Shuvra S. Bhattacharyya},
title = {Functional {DIF} for Rapid Prototyping},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {17--23},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.32},
doi = {10.1109/RSP.2008.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PlishkerSKAB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ProudfootKAC08,
author = {Ryan B. Proudfoot and
Kenneth B. Kent and
Eric E. Aubanel and
Nan Chen},
title = {Flexible Software-Hardware Network Intrusion Detection System},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {182--188},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.11},
doi = {10.1109/RSP.2008.11},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ProudfootKAC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SaxA08,
author = {Eric Sax and
Stefan Abendroth},
title = {Testing Automotive System Prototypes Far before Driving on the Proving
Ground},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.41},
doi = {10.1109/RSP.2008.41},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SaxA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SenguptaKB08,
author = {Sabnam Sengupta and
Ananya Kanjilal and
Swapan Bhattacharya},
title = {Requirement Traceability in Software Development Process: An Empirical
Approach},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {105--111},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.14},
doi = {10.1109/RSP.2008.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SenguptaKB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SenouciKRP08,
author = {Benaoumeur Senouci and
Abdellah{-}Medjadji Kouadri{-}Kouadri and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Multi-CPU/FPGA Platform Based Heterogeneous Multiprocessor Prototyping:
New Challenges for Embedded Software Designers},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {41--47},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.27},
doi = {10.1109/RSP.2008.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SenouciKRP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ShenGP08,
author = {Hao Shen and
Patrice Gerin and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Configurable Heterogeneous MPSoC Architecture Exploration Using Abstraction
Levels},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {51--57},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.18},
doi = {10.1109/RSP.2008.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ShenGP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SpiesZGK08,
author = {Christopher Spies and
Peter Zipf and
Manfred Glesner and
Harald Klingbeil},
title = {Bandwidth Requirement Determination for a Digitally Controlled Cavity
Synchronisation in a Heavy Ion Synchrotron Using Ptolemy {II}},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {196--202},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.26},
doi = {10.1109/RSP.2008.26},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SpiesZGK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TianLJL08,
author = {Xiaohua Tian and
Thinh M. Le and
Xi Jiang and
Yong Lian},
title = {Implementation Strategies for Statistical Codec Designs in {H.264/AVC}
Standard},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {151--157},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.22},
doi = {10.1109/RSP.2008.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TianLJL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WoodLK08,
author = {Ryan Wood and
Joseph C. Libby and
Kenneth B. Kent},
title = {Application Specific Instruction Sets and their Impact on the Design
Space Requirements of a Hardware Java Virtual Machine},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {175--181},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.10},
doi = {10.1109/RSP.2008.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WoodLK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WuYLZ08,
author = {Yingpan Wu and
Lixin Yu and
Lidong Lan and
Haiyang Zhou},
title = {A Coverage-Driven Constraint Random-Based Functional Verification
Method of Memory Controller},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {99--104},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.12},
doi = {10.1109/RSP.2008.12},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WuYLZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X08,
title = {Author Index},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {203},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.35},
doi = {10.1109/RSP.2008.35},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X08a,
title = {Publisher's Information},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {204},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.36},
doi = {10.1109/RSP.2008.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/XuP08,
author = {Susan Xu and
Hugh Pollitt{-}Smith},
title = {A Multi-MicroBlaze Based {SOC} System: From SystemC Modeling to {FPGA}
Prototyping},
booktitle = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
pages = {121--127},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RSP.2008.15},
doi = {10.1109/RSP.2008.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/XuP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2008,
title = {The 19th {IEEE/IFIP} International Symposium on Rapid System Prototyping:
{RSP} 2009, Shortening the Path from Specification to Prototype, 2-5
June 2008, Monterey, California, {USA}},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://ieeexplore.ieee.org/xpl/conhome/4550866/proceeding},
isbn = {978-0-7695-3180-9},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AroraKJW07,
author = {Himanshu Arora and
Nikolaus Klemmer and
Thomas Jochum and
Patrick D. Wolf},
title = {Design Methodology and {CAD} Tools for Prototyping Delta-Sigma Fractional-N
Frequency Synthesizers},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {150--156},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.20},
doi = {10.1109/RSP.2007.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AroraKJW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BeckertFRH07,
author = {Rene Beckert and
Thomas Fuchs and
Steffen R{\"{u}}lke and
Wolfram Hardt},
title = {A Tailored Design Partitioning Method for Hardware Emulation},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {99--105},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.10},
doi = {10.1109/RSP.2007.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BeckertFRH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BenalycherifMD07,
author = {Lyes Benalycherif and
Anthony McIsaac and
Neil Dunlop},
title = {Structured Approach to Property Specification and Verification of
{HW} {IP}},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {161--166},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.36},
doi = {10.1109/RSP.2007.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BenalycherifMD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BezerraH07,
author = {Juliana de Melo Bezerra and
Celso Massaki Hirata},
title = {A Semantics for {UML-RT} using n-calculus},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {75--82},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.9},
doi = {10.1109/RSP.2007.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BezerraH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CararaMM07,
author = {Everton Carara and
Aline Mello and
Fernando Moraes},
title = {Communication Models in Networks-on-Chip},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {57--60},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.17},
doi = {10.1109/RSP.2007.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CararaMM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarusoGSCM07,
author = {Luis Carlos Caruso and
Guilherme Montez Guindani and
Hugo Schmitt and
Ney Calazans and
Fernando Moraes},
title = {{SPP-NIDS} - {A} Sea of Processors Platform for Network Intrusion
Detection Systems},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {27--33},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.35},
doi = {10.1109/RSP.2007.35},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarusoGSCM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarvalhoCM07,
author = {Ewerson Carvalho and
Ney Calazans and
Fernando Moraes},
title = {Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {34--40},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.26},
doi = {10.1109/RSP.2007.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarvalhoCM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChattopadhyayRKKLAM07,
author = {Anupam Chattopadhyay and
Zoltan Endre Rakosi and
Kingshuk Karuri and
David Kammler and
Rainer Leupers and
Gerd Ascheid and
Heinrich Meyr},
title = {Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable
{VLIW} Processors},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {189--194},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.32},
doi = {10.1109/RSP.2007.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChattopadhyayRKKLAM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChoZCJ07,
author = {Youngchul Cho and
Nacer{-}Eddine Zergainoh and
Kiyoung Choi and
Ahmed Amine Jerraya},
title = {Low Runtime-Overhead Software Synthesis for Communicating Concurrent
Processes},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {195--201},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.27},
doi = {10.1109/RSP.2007.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChoZCJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DrusinskyS07,
author = {Doron Drusinsky and
Man{-}tak Shing},
title = {Verifying Distributed Protocols using MSC-Assertions, Run-time Monitoring,
and Automatic Test Generation},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {82--88},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.39},
doi = {10.1109/RSP.2007.39},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DrusinskyS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GrafMR07,
author = {Philipp Graf and
Klaus D. M{\"{u}}ller{-}Glaser and
Clemens Reichmann},
title = {Nonintrusive Black- and White-Box Testing of Embedded Systems Software
against {UML} Models},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {130--138},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.30},
doi = {10.1109/RSP.2007.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GrafMR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Kamdem07,
author = {Romain Kamdem},
title = {Hardware/Firmware Verification of Graphic {IP}},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {48--56},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.25},
doi = {10.1109/RSP.2007.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Kamdem07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KentIS07,
author = {Kenneth B. Kent and
Beatriz C. Iaderoza and
Micaela Serra},
title = {Codesign of a Computationally Intensive Problem in {GF(3)}},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {10--16},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.16},
doi = {10.1109/RSP.2007.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KentIS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KochPAM07,
author = {Roman Koch and
Thilo Pionteck and
Carsten Albrecht and
Erik Maehle},
title = {A Lightweight Framework for Runtime Reconfigurable System Prototyping},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {61--64},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.7},
doi = {10.1109/RSP.2007.7},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KochPAM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KordonV07,
author = {Fabrice Kordon and
Jean{-}Baptiste Voron},
title = {Rapid Prototyping of Intrusion Detection Systems},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {89--98},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.34},
doi = {10.1109/RSP.2007.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KordonV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KordonVI07,
author = {J{\'{e}}r{\^{o}}me Hugues and
Bechir Zalila and
Laurent Pautet and
Fabrice Kordon},
title = {Rapid Prototyping of Distributed Real-Time Embedded Systems Using
the {AADL} and Ocarina},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {106--112},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.33},
doi = {10.1109/RSP.2007.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KordonVI07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KronbauerBACRAA07,
author = {Fernando Kronbauer and
Alexandro Baldassin and
Bruno C. Albertini and
Paulo Centoducatte and
Sandro Rigo and
Guido Araujo and
Rodolfo Azevedo},
title = {A Flexible Platform Framework for Rapid Transactional Memory Systems
Prototyping and Evaluation},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {123--129},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.6},
doi = {10.1109/RSP.2007.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KronbauerBACRAA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LuSSJ07,
author = {Zhonghai Lu and
Jonas Sicking and
Ingo Sander and
Axel Jantsch},
title = {Using Synchronizers for Refining Synchronous Communication onto Hardware/Software
Architectures},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {143--149},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.38},
doi = {10.1109/RSP.2007.38},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LuSSJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MariatosAA07,
author = {V. Mariatos and
Kostas Adaos and
George Alexiou},
title = {Design and Implementation of a Reconfigurable, Embedded Real-Time
Face Detection System},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {65--68},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.19},
doi = {10.1109/RSP.2007.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MariatosAA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MatschulatMH07,
author = {David Matschulat and
C{\'{e}}sar A. M. Marcon and
Fabiano Hessel},
title = {{ER-EDF:} {A} QoS Scheduler for Real-Time Embedded Systems},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {181--188},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.22},
doi = {10.1109/RSP.2007.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MatschulatMH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MattosBC07,
author = {J{\'{u}}lio C. B. de Mattos and
Antonio Carlos Schneider Beck and
Luigi Carro},
title = {Object-Oriented Reconfiguration},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {69--74},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.31},
doi = {10.1109/RSP.2007.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MattosBC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MavroidisPP07,
author = {Ioannis Mavroidis and
Ioannis Papaefstathiou and
Dionisios N. Pnevmatikatos},
title = {Hardware Implementation of 2-Opt Local Search Algorithm for the Traveling
Salesman Problem},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {41--47},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.24},
doi = {10.1109/RSP.2007.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MavroidisPP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OberederP07,
author = {Harald Obereder and
Markus Pfaff},
title = {Behavioral synthesis of property specification language {(PSL)} assertions},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {157--160},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.14},
doi = {10.1109/RSP.2007.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OberederP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ParkCLJCY07,
author = {Chanik Park and
Wonmoon Cheon and
Yangsup Lee and
Myoung{-}Soo Jung and
Wonhee Cho and
Hanbin Yoon},
title = {A Re-configurable {FTL} (Flash Translation Layer) Architecture for
{NAND} Flash based Applications},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {202--208},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.8},
doi = {10.1109/RSP.2007.8},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ParkCLJCY07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PopoviciGRPJ07,
author = {Katalin Popovici and
Xavier Guerin and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Pier Stanislao Paolucci and
Ahmed Amine Jerraya},
title = {Efficient Software Development Platforms for Multimedia Applications
at Different Abstraction Levels},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {113--122},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.21},
doi = {10.1109/RSP.2007.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PopoviciGRPJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RinconBMVVDL07,
author = {Fernando Rinc{\'{o}}n and
Jes{\'{u}}s Barba and
Francisco Moya and
Felix Jes{\'{u}}s Villanueva and
David Villa and
Julio Dondo and
Juan Carlos L{\'{o}}pez},
title = {Unified Inter-Communication Architecture for Systems-on-Chip},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {17--26},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.37},
doi = {10.1109/RSP.2007.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RinconBMVVDL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RosaSAZPABS07,
author = {Vagner S. Rosa and
Wagston T. Staehler and
Arnaldo Azevedo and
Bruno Zatt and
Roger Endrigo Carvalho Porto and
Luciano Volcan Agostini and
Sergio Bampi and
Altamiro Amadeu Susin},
title = {{FPGA} Prototyping Strategy for a {H.264/AVC} Video Decoder},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {174--180},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.23},
doi = {10.1109/RSP.2007.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RosaSAZPABS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SassatelliSWGM07,
author = {Gilles Sassatelli and
Nicolas Saint{-}Jean and
Cristiane R. Woszezenki and
Ismael Grehs and
Fernando Gehm Moraes},
title = {Architectural Issues in Homogeneous NoC-Based MPSoC},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {139--142},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.12},
doi = {10.1109/RSP.2007.12},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SassatelliSWGM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SilvaEBV07,
author = {Andr{\'{e}} Silva and
Guilherme {\'{A}}lvaro R. M. Esmeraldo and
Edna Barros and
Pablo Viana},
title = {Cache-Analyzer: Design Space Evaluation of Configurable-Caches in
a Single-Pass},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {3--9},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.15},
doi = {10.1109/RSP.2007.15},
timestamp = {Fri, 02 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SilvaEBV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TianLHL07,
author = {Xiaohua Tian and
Thinh M. Le and
B. L. Ho and
Yong Lian},
title = {A {CABAC} Encoder Design of {H.264/AVC} with {RDO} Support},
booktitle = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
pages = {167--173},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/RSP.2007.5},
doi = {10.1109/RSP.2007.5},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TianLHL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2007,
title = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://ieeexplore.ieee.org/xpl/conhome/4228468/proceeding},
isbn = {978-0-7695-2834-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BieserM06,
author = {Carsten Bieser and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Rapid Prototyping Design Acceleration Using a Novel Merging Methodology
for Partial Configuration Streams of Xilinx Virtex-II FPGAs},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {193--199},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.32},
doi = {10.1109/RSP.2006.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BieserM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BraunsteinE06,
author = {C{\'{e}}cile Braunstein and
Emmanuelle Encrenaz},
title = {Formalizing the Incremental Design and Verification Process of a Pipelined
Protocol Converter},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {103--109},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.19},
doi = {10.1109/RSP.2006.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BraunsteinE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChattopadhyaySZLAM06,
author = {Anupam Chattopadhyay and
Arnab Sinha and
Diandian Zhang and
Rainer Leupers and
Gerd Ascheid and
Heinrich Meyr},
title = {Integrated Verification Approach during ADL-Driven Processor Design},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {110--118},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.21},
doi = {10.1109/RSP.2006.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChattopadhyaySZLAM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChenB06,
author = {Ang Chen and
Didier Buchs},
title = {Generative Business Process Prototyping Framework},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {140--148},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.20},
doi = {10.1109/RSP.2006.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChenB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CheungTLR06,
author = {Daniel Cheung{-}Foo{-}Wo and
Jean{-}Yves Tigli and
Stephane Lavirotte and
Michel Riveill},
title = {Wcomp: a Multi-Design Approach for Prototyping Applications using
Heterogeneous Resources},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {119--125},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.42},
doi = {10.1109/RSP.2006.42},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CheungTLR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DrusinskySD06,
author = {Doron Drusinsky and
Man{-}tak Shing and
Kadir Alpaslan Demir},
title = {Creation and Validation of Embedded Assertion Statecharts},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {17--23},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.12},
doi = {10.1109/RSP.2006.12},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DrusinskySD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DwivediKBK06,
author = {Basant Kumar Dwivedi and
Arun Kejariwal and
M. Balakrishnan and
Anshul Kumar},
title = {Rapid Resource-Constrained Hardware Performance Estimation},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {40--46},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.33},
doi = {10.1109/RSP.2006.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DwivediKBK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GheorgheBNB06,
author = {Luiza Gheorghe and
Faouzi Bouchhima and
Gabriela Nicolescu and
Hanifa Boucheneb},
title = {Formal Definitions of Simulation Interfaces in a Continuous/Discrete
Co-Simulation Tool},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {186--192},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.18},
doi = {10.1109/RSP.2006.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GheorgheBNB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GirodiasBNAPL06,
author = {Bruno Girodias and
Youcef Bouchebaba and
Gabriela Nicolescu and
El Mostapha Aboulhamid and
Pierre G. Paulin and
Bruno Lavigueur},
title = {Application-Level Memory Optimization for MPSoC},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {169--178},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.8},
doi = {10.1109/RSP.2006.8},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GirodiasBNAPL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GrafM06,
author = {Philipp Graf and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Dynamic Mapping of Runtime Information Models for Debugging Embedded
Software},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {3--9},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.15},
doi = {10.1109/RSP.2006.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GrafM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HurbainAIBMP06,
author = {Isabelle Hurbain and
Corinne Ancourt and
Fran{\c{c}}ois Irigoin and
Michel Barreteau and
Nicolas Museux and
Frederic Pasquier},
title = {A Case Study of Design Space Exploration for Embedded Multimedia Applications
on SoCs},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {133--139},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.1},
doi = {10.1109/RSP.2006.1},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HurbainAIBMP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KachrisV06,
author = {Christoforos Kachris and
Stamatis Vassiliadis},
title = {Performance Evaluation of an Adaptive {FPGA} for Network Applications},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {54--62},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.27},
doi = {10.1109/RSP.2006.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KachrisV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KentPZ06,
author = {Kenneth B. Kent and
Ryan B. Proudfoot and
Yong Zhao},
title = {Parameter-Specific {FPGA} Implementation of Edit-Distance Calculation},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {209--215},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.26},
doi = {10.1109/RSP.2006.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KentPZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KoutroulisKT06,
author = {Eftichios Koutroulis and
Kostas Kalaitzakis and
Vasileios Tzitzilonis},
title = {Development of an FPGA-based System for Real-Time Simulation of},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {200--208},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.14},
doi = {10.1109/RSP.2006.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KoutroulisKT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KriaaBYPFJ06,
author = {Lobna Kriaa and
Aimen Bouchhima and
Wassim Youssef and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
Anne{-}Marie Fouillart and
Ahmed Amine Jerraya},
title = {Service Based Component Design Approach for Flexible Hardware/Software
Interface Modeling},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {156--162},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.35},
doi = {10.1109/RSP.2006.35},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KriaaBYPFJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeTHNL06,
author = {Thinh M. Le and
Xiaohua Tian and
B. L. Ho and
J. Nankoo and
Yong Lian},
title = {System-on-Chip Design Methodology for a Statistical Coder},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {82--90},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.40},
doi = {10.1109/RSP.2006.40},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LeTHNL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LoboFGSPS06,
author = {Pedro J. Lobo and
M. A. Freire and
Mat{\'{\i}}as J. Garrido and
C{\'{e}}sar Sanz and
Fernando Pescador and
David Samper Mart{\'{\i}}nez},
title = {The Prototyping Methodology of a Data Receiver for Digital Audio Broadcasting
{(DAB)} Networks},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {76--81},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.41},
doi = {10.1109/RSP.2006.41},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LoboFGSPS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MathiasK06,
author = {Graham Mathias and
Kenneth B. Kent},
title = {An Embedded Java Virtual Machine Using Network-on-Chip Design},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {149--155},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.7},
doi = {10.1109/RSP.2006.7},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MathiasK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MetzgerBRVA06,
author = {Michel Metzger and
Fr{\'{e}}d{\'{e}}ric Bastien and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Julie Vachon and
El Mostapha Aboulhamid},
title = {Introspection Mechanisms for Semi-Formal Verification in a System-Level
Design Environment},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {91--97},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.22},
doi = {10.1109/RSP.2006.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MetzgerBRVA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Morin-AlloryFB06,
author = {Katell Morin{-}Allory and
Laurent Fesquet and
Dominique Borrione},
title = {Asynchronous Assertion Monitors for multi-Clock Domain System Verification},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {98--102},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.9},
doi = {10.1109/RSP.2006.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Morin-AlloryFB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MuhlbauerB06,
author = {Felix M{\"{u}}hlbauer and
Christophe Bobda},
title = {Design and Implementation of an Object Tracker on a Reconfigurable
System on Chip},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {230},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.13},
doi = {10.1109/RSP.2006.13},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MuhlbauerB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NiarI06,
author = {Sma{\"{\i}}l Niar and
Nicolas Inglart},
title = {Rapid Performance and Power Consumption Estimation Methods for Embedded
System Design},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {47--53},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.30},
doi = {10.1109/RSP.2006.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NiarI06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OliveiraBCW06,
author = {Marcio Ferreira da Silva Oliveira and
Lisane B. de Brisolara and
Luigi Carro and
Fl{\'{a}}vio Rech Wagner},
title = {Early Embedded Software Design Space Exploration Using UML-Based Estimation},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {24--32},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.16},
doi = {10.1109/RSP.2006.16},
timestamp = {Fri, 02 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/OliveiraBCW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ParkYC06,
author = {Sanggyu Park and
Sang{-}yong Yoon and
Soo{-}Ik Chae},
title = {A Mixed-Level Virtual Prototyping Environment for Refinement-Based
Design Environment},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {63--68},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.3},
doi = {10.1109/RSP.2006.3},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ParkYC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PedroLB06,
author = {Luis Pedro and
Levi Lucio and
Didier Buchs},
title = {Principles for System Prototype and Verification Using Metamodel Based
Transformations},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {10--17},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.29},
doi = {10.1109/RSP.2006.29},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PedroLB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RosaCB06,
author = {Vagner S. Rosa and
Eduardo A. C. da Costa and
Sergio Bampi},
title = {A High Performance Parallel {FIR} Filters Generation Tool},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {216--222},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.2},
doi = {10.1109/RSP.2006.2},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RosaCB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SenouciBRPJ06,
author = {Benaoumeur Senouci and
Aimen Bouchhima and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
Ahmed Amine Jerraya},
title = {Fast Prototyping of {POSIX} Based Applications on a Multiprocessor
SoC Architecture: "Hardware-Dependent Software Oriented Approach"},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {69--75},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.17},
doi = {10.1109/RSP.2006.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SenouciBRPJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Siripokarpirom06,
author = {Rawat Siripokarpirom},
title = {Platform Development for Run-Time Reconfigurable Co-Emulation},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {179--185},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.28},
doi = {10.1109/RSP.2006.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Siripokarpirom06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SotiriadesKCD06,
author = {Euripides Sotiriades and
Christos Kozanitis and
Grigorios Chrysos and
Apostolos Dollas},
title = {Rapid Phototyping of a System-on-a-Chip for the {BLAST} Algorithm
Implementation},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {223--229},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.31},
doi = {10.1109/RSP.2006.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SotiriadesKCD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TianzhouYHW06,
author = {Tianzhou Chen and
Yin Yan and
Hongjun Dai and
Hu Wei},
title = {An Agile {BSP} Modeling Methodology: Cross Platform {BSP} Framework
{(CPBF)}},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {126--132},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.6},
doi = {10.1109/RSP.2006.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TianzhouYHW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VetromilleOMRH06,
author = {Melissa Vetromille and
Luciano Ost and
C{\'{e}}sar A. M. Marcon and
Carlos Eduardo Reif and
Fabiano Hessel},
title = {{RTOS} Scheduler Implementation in Hardware and Software for Real
Time Applications},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {163--168},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.34},
doi = {10.1109/RSP.2006.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VetromilleOMRH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X06,
title = {Message from the General Chairs},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.23},
doi = {10.1109/RSP.2006.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X06a,
title = {Message from the Organizing Chair},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.24},
doi = {10.1109/RSP.2006.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X06b,
title = {Message from the Program Chairs},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.25},
doi = {10.1109/RSP.2006.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X06b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X06c,
title = {Acknowledgments},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.5},
doi = {10.1109/RSP.2006.5},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X06c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X06d,
title = {Conference Committees},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.11},
doi = {10.1109/RSP.2006.11},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X06d.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YangB06,
author = {Ming Yang and
Nikolaos G. Bourbakis},
title = {A Prototyping Tool for Analysis and Modeling of Video Transmission
Traces over {IP} Networks},
booktitle = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
pages = {33--39},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/RSP.2006.4},
doi = {10.1109/RSP.2006.4},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/YangB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2006,
title = {17th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2006), 14-16 June 2006, Chania, Crete, Greece},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://ieeexplore.ieee.org/xpl/conhome/10855/proceeding},
isbn = {0-7695-2580-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AhmadiniaBDMTFV05,
author = {Ali Ahmadinia and
Christophe Bobda and
Ji Ding and
Mateusz Majer and
J{\"{u}}rgen Teich and
S{\'{a}}ndor P. Fekete and
Jan van der Veen},
title = {A Practical Approach for Circuit Routing on Dynamic Reconfigurable
Devices},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {84--90},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.7},
doi = {10.1109/RSP.2005.7},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AhmadiniaBDMTFV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ArgarwalAA05,
author = {Deepak Argarwal and
Christopher Robert Anderson and
Peter M. Athanas},
title = {An 8-GHz Ultra Wideband Transceiver Prototyping Testbed},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {121--127},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.12},
doi = {10.1109/RSP.2005.12},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ArgarwalAA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AugustonMS05,
author = {Mikhail Auguston and
James Bret Michael and
Man{-}tak Shing},
title = {Test Automation and Safety Assessment in Rapid Systems Prototyping},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {188--194},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.49},
doi = {10.1109/RSP.2005.49},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AugustonMS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AzevedoAWB05,
author = {Arnaldo Azevedo and
Luciano Volcan Agostini and
Fl{\'{a}}vio Rech Wagner and
Sergio Bampi},
title = {Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined
{VLIW} Units},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {255--257},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.10},
doi = {10.1109/RSP.2005.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AzevedoAWB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BelanovicR05,
author = {Pavle Belanovic and
Markus Rupp},
title = {Automated Floating-Point to Fixed-Point Conversion with the Fixify
Environment},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {172--178},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.15},
doi = {10.1109/RSP.2005.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BelanovicR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BergeronSFD05,
author = {Etienne Bergeron and
Xavier Saint{-}Mleux and
Marc Feeley and
Jean{-}Pierre David},
title = {High Level Synthesis for Data-Driven Applications},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {54--60},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.26},
doi = {10.1109/RSP.2005.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BergeronSFD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BieserM05,
author = {Carsten Bieser and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {{COMPASS} - {A} Novel Concept of a Reconfigurable Platform for Automotive
System Development and Test},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {135--140},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.18},
doi = {10.1109/RSP.2005.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BieserM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BouchhimaNAA05,
author = {Faouzi Bouchhima and
Gabriela Nicolescu and
El Mostapha Aboulhamid and
Mohamed Abid},
title = {Discrete-Continuous Simulation Model for Accurate Validation in Component-Based
Heterogeneous SoC Design},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {181--187},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.22},
doi = {10.1109/RSP.2005.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BouchhimaNAA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BriereDMNOG05,
author = {Matthieu Briere and
Emmanuel Drouard and
Fabien Mieyeville and
David Navarro and
Ian O'Connor and
Fr{\'{e}}d{\'{e}}ric Gaffiot},
title = {Heterogeneous Modelling of an Optical Network-on-Chip with SystemC},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {10--16},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.25},
doi = {10.1109/RSP.2005.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BriereDMNOG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarterXG05,
author = {John D. Carter and
Ming Xu and
William B. Gardner},
title = {Rapid Prototyping of Embedded Software Using Selective Formalism},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {99--104},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.43},
doi = {10.1109/RSP.2005.43},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarterXG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CastonguayS05,
author = {Ami Castonguay and
Yvon Savaria},
title = {A HyperTransport Chip-to-Chip Interconnect Tunnel Developed Using
SystemC},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {264--266},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.6},
doi = {10.1109/RSP.2005.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CastonguayS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Chirila-RusDVSV05,
author = {Adrian Chirila{-}Rus and
Kristof Denolf and
Bart Vanhoof and
Paul R. Schumacher and
Kees A. Vissers},
title = {Communication Primitives Driven Hardware Design and Test Methodology
Applied on Complex Video Applications},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {246--249},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.17},
doi = {10.1109/RSP.2005.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Chirila-RusDVSV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChungSK05,
author = {Moo{-}Kyoung Chung and
Heejun Shim and
Chong{-}Min Kyung},
title = {Performance Improvement of Multiprocessor Simulation by Optimizing
Synchronization a Communication},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {158--164},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.38},
doi = {10.1109/RSP.2005.38},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChungSK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CordesDLG05,
author = {Ben Cordes and
Jennifer G. Dy and
Miriam Leeser and
James Goebel},
title = {Enabling a Real-Time Solution for Neuron Detection with Reconfigurable
Hardware},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {128--134},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.24},
doi = {10.1109/RSP.2005.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CordesDLG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DemoracskiA05,
author = {Luke Demoracski and
Dimiter R. Avresky},
title = {An Approach for Functional Decomposition Applied to State-Based Designs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {243--245},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.13},
doi = {10.1109/RSP.2005.13},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DemoracskiA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DragoneL05,
author = {Silvio Dragone and
Clemens Lombriser},
title = {The Ordering of Events in a Prototyping Platform},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {211--217},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.51},
doi = {10.1109/RSP.2005.51},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DragoneL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DrusinskySD05,
author = {Doron Drusinsky and
Man{-}tak Shing and
Kadir Alpaslan Demir},
title = {Test-Time, Run-Time, and Simulation-Time Temporal Assertions in {RSP}},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {105--110},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.50},
doi = {10.1109/RSP.2005.50},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DrusinskySD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GrassetRJ05,
author = {Arnaud Grasset and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Ahmed Amine Jerraya},
title = {Automatic Generation of Component Wrappers by Composition of Hardware
Library Elements Starting from Communication Service Specification},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {47--53},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.16},
doi = {10.1109/RSP.2005.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GrassetRJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HallK05,
author = {Thomas S. Hall and
Kenneth B. Kent},
title = {Thread-Level Parallel Execution in Co-Designed Virtual Machines},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {249--251},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.52},
doi = {10.1109/RSP.2005.52},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HallK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HsuB05,
author = {Chia{-}Jui Hsu and
Shuvra S. Bhattacharyya},
title = {Porting {DSP} Applications across Design Tools Using the Dataflow
Interchange Format},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {40--46},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.39},
doi = {10.1109/RSP.2005.39},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HsuB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HuetCP05,
author = {Sylvain Huet and
Emmanuel Casseau and
Olivier Pasquier},
title = {Design Exploration and {HW/SW} Rapid Prototyping for Real-Time System
Design},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {240--243},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.21},
doi = {10.1109/RSP.2005.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HuetCP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IhmorLH05,
author = {Stefan Ihmor and
Tobias Loke and
Wolfram Hardt},
title = {Synthesis of Communication Structures and Protocols in Distributed
Embedded Systems},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {3--9},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.47},
doi = {10.1109/RSP.2005.47},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IhmorLH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IndrusiakPG05,
author = {Leandro Soares Indrusiak and
Romualdo Begale Prudencio and
Manfred Glesner},
title = {Modeling and Prototyping of Communication Systems Using Java: {A}
Case Study},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {225--231},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.32},
doi = {10.1109/RSP.2005.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IndrusiakPG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IrmanB05,
author = {Martin Irman and
Jan Bajcsy},
title = {A Rapid System Prototyping Platform for Error Control Coding in Optical
{CDMA} Networks},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {232--234},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.8},
doi = {10.1109/RSP.2005.8},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IrmanB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JeradB05,
author = {Chadlia Jerad and
Kamel Barkaoui},
title = {On the Use of Rewriting Logic for Verification of Distributed Software
Architecture Description Based LfP},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {202--208},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.34},
doi = {10.1109/RSP.2005.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JeradB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KostarasV05,
author = {Rolf Drechsler and
G{\"{o}}rschwin Fey and
Christian Genz and
Daniel Gro{\ss}e},
title = {SyCE: An Integrated Environment for System Design in SystemC},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {258--260},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.46},
doi = {10.1109/RSP.2005.46},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KostarasV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KostarasV05a,
author = {Nikolaos Kostaras and
Haridimos T. Vergos},
title = {KoVer: {A} Sophisticated Residue Arithmetic Core Generator},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {261--263},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.27},
doi = {10.1109/RSP.2005.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KostarasV05a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KrastevaJTR05,
author = {Yana Esteves Krasteva and
Ana B. Jimeno and
Eduardo de la Torre and
Teresa Riesgo},
title = {Straight Method for Reallocation of Complex Cores by Dynamic Reconfiguration
in Virtex {II} FPGAs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {77--83},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.45},
doi = {10.1109/RSP.2005.45},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KrastevaJTR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LapalmeAN05,
author = {James Lapalme and
El Mostapha Aboulhamid and
Gabriela Nicolescu},
title = {Leveraging Model Representations for System Level Design Tools},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {33--39},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.28},
doi = {10.1109/RSP.2005.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LapalmeAN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LemaireCDLJ05,
author = {Romain Lemaire and
Fabien Clermidy and
Yves Durand and
Didier Lattard and
Ahmed Amine Jerraya},
title = {Performance Evaluation of a NoC-Based Design for {MC-CDMA} Telecommunications
Using {NS-2}},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {24--30},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.37},
doi = {10.1109/RSP.2005.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LemaireCDLJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LucioPB05,
author = {Levi Lucio and
Luis Pedro and
Didier Buchs},
title = {A Test Language for {CO-OPN} Specifications},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {195--201},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.9},
doi = {10.1109/RSP.2005.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LucioPB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MarconKSC05,
author = {C{\'{e}}sar A. M. Marcon and
M{\'{a}}rcio Eduardo Kreutz and
Altamiro Amadeu Susin and
Ney Laert Vilar Calazans},
title = {Models for Embedded Application Mapping onto NoCs: Timing Analysis},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {17--23},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.33},
doi = {10.1109/RSP.2005.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MarconKSC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NajibiSNPS05,
author = {Mehrdad Najibi and
Kamran Saleh and
Mohsen Naderi and
Hossein Pedram and
Mehdi Sedighi},
title = {Prototyping Globally Asynchronous Locally Synchronous Circuits on
Commercial Synchronous FPGAs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {63--69},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.41},
doi = {10.1109/RSP.2005.41},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NajibiSNPS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ParkC05,
author = {Sanggyu Park and
Soo{-}Ik Chae},
title = {A C/C++-Based Functional Verification Framework Using the SystemC
Verification Library},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {237--239},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.5},
doi = {10.1109/RSP.2005.5},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ParkC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PetkovAH05,
author = {Ivan Petkov and
Paul Amblard and
Marin Hristov},
title = {Systematic Design Flow for Fast Hardware/Software Prototype Generation
from Bus Functional Model for MPSoC},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {218--224},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.48},
doi = {10.1109/RSP.2005.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PetkovAH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/QaderJ05,
author = {Ghulam Qader and
M. Younus Javed},
title = {Simulation of Resolution of {CS} Problem for Multiple Common Variables
in Multiprocessor Environment},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {93--98},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.44},
doi = {10.1109/RSP.2005.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/QaderJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SchliebuschCWKALM05,
author = {Oliver Schliebusch and
Anupam Chattopadhyay and
Ernst Martin Witte and
David Kammler and
Gerd Ascheid and
Rainer Leupers and
Heinrich Meyr},
title = {Optimization Techniques for ADL-Driven {RTL} Processor Synthesis},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {165--171},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.36},
doi = {10.1109/RSP.2005.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SchliebuschCWKALM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SongZG05,
author = {S. W. Song and
J. D. Zheng and
William B. Gardner},
title = {Prototyping a Residential Gateway Using Xilinx {ISE}},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {267--269},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.40},
doi = {10.1109/RSP.2005.40},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SongZG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ThornbergOO05,
author = {Benny Th{\"{o}}rnberg and
Leif Olsson and
Mattias O'Nils},
title = {Optimization of Memory Allocation for Real-Time Video Processing on
{FPGA}},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {141--147},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.35},
doi = {10.1109/RSP.2005.35},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ThornbergOO05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VergmaudHPK05,
author = {Thomas Vergnaud and
J{\'{e}}r{\^{o}}me Hugues and
Laurent Pautet and
Fabrice Kordon},
title = {Rapid Development Methodology for Customized Middleware},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {111--117},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.42},
doi = {10.1109/RSP.2005.42},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VergmaudHPK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VisariusMSH05,
author = {Markus Visarius and
Andr{\'{e}} Meisel and
Markus Scheithauer and
Wolfram Hardt},
title = {Dynamic Reconfiguration of IP-Based Systems},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {70--76},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.23},
doi = {10.1109/RSP.2005.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VisariusMSH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VivekanandarajahS05,
author = {Kugan Vivekanandarajah and
Thambipillai Srikanthan},
title = {Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
pages = {151--157},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.20},
doi = {10.1109/RSP.2005.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VivekanandarajahS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X05,
title = {Message from the General Chairs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.29},
doi = {10.1109/RSP.2005.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X05a,
title = {Message from the Organizing Chair},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.30},
doi = {10.1109/RSP.2005.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X05a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X05b,
title = {Message from the Program Chairs},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.31},
doi = {10.1109/RSP.2005.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X05b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/X05c,
title = {Conference Committees},
booktitle = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/RSP.2005.19},
doi = {10.1109/RSP.2005.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/X05c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2005,
title = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2005), 8-10 June 2005, Montreal, Canada},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://ieeexplore.ieee.org/xpl/conhome/10092/proceeding},
isbn = {0-7695-2361-7},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AlliotD04,
author = {Sylvain Alliot and
Ed F. Deprettere},
title = {Architecture Exploration of a Large Scale System},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {217--224},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.10},
doi = {10.1109/RSP.2004.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AlliotD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BangCJ04,
author = {Ki{-}Seok Bang and
Jin{-}Young Choi and
Sung{-}Ho Jang},
title = {Formal Specification and Verification of Embedded System with Shared
Resources},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {8--14},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.21},
doi = {10.1109/RSP.2004.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BangCJ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BelanovicHKRS04,
author = {Pavle Belanovic and
Martin Holzer and
Bastian Knerr and
Markus Rupp and
Guillaume Sauzon},
title = {Automatic Generation of Virtual Prototypes},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {114--118},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.16},
doi = {10.1109/RSP.2004.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BelanovicHKRS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BhattacharyyaBC04,
author = {Swapan Bhattacharyya and
Joydeep Bhattacharyya and
Adrish Ray Chaudhuri},
title = {{ASET:} {A} Formal Model for System Emulation and Verification},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {21--28},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.11},
doi = {10.1109/RSP.2004.11},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BhattacharyyaBC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChenAL04,
author = {Ying Chen and
Dennis Abts and
David J. Lilja},
title = {State Pruning for Test Vector Generation for a Multiprocessor Cache
Coherence Protocol},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {74--77},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.40},
doi = {10.1109/RSP.2004.40},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChenAL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChungK04,
author = {Moo{-}Kyoung Chung and
Chong{-}Min Kyung},
title = {Improvement of Compiled Instruction Set Simulator by Increasing Flexibility
a},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {38--44},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.26},
doi = {10.1109/RSP.2004.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChungK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DenningISD04,
author = {Daniel Denning and
James Irvine and
Derek Stark and
Malachy Devlin},
title = {Multi-User {FPGA} Co-Simulation over {TCP/IP}},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {151--156},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.31},
doi = {10.1109/RSP.2004.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DenningISD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DiabyTDW04,
author = {M. Diaby and
Matthieu Tuna and
Jean Lou Desbarbieux and
Franck Wajsb{\"{u}}rt},
title = {High Level Synthesis Methodology from {C} to {FPGA} Used for a Network
Protocol Communication},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {103--108},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.24},
doi = {10.1109/RSP.2004.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DiabyTDW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DollasPSTKV04,
author = {Apostolos Dollas and
Kyprianos Papademetriou and
Euripides Sotiriades and
Dimitrios Theodoropoulos and
Iosif Koidis and
George Vernardos},
title = {A Case Study on Rapid Prototyping of Hardware Systems: The Effect
of {CAD} Tool Capabilities, Design Flows, and Design Styles},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {180--186},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.5},
doi = {10.1109/RSP.2004.5},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DollasPSTKV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Drechsler04,
author = {Rolf Drechsler},
title = {Towards Formal Verification on the System Level},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {2--5},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.43},
doi = {10.1109/RSP.2004.43},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Drechsler04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DrusinskyS04,
author = {Doron Drusinsky and
Man{-}tak Shing},
title = {TLCharts: Armor-plating Harel Statecharts with Temporal Logic Conditions},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {29--36},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.42},
doi = {10.1109/RSP.2004.42},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DrusinskyS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GharsalliBBMCJ04,
author = {Ferid Gharsalli and
Amer Baghdadi and
Marius Bonaciu and
Giedrius Majauskas and
Wander O. Ces{\'{a}}rio and
Ahmed Amine Jerraya},
title = {An Efficient Architecture for the Implementation of Message Passing
Programming Model on Massive Multiprocessor},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {80--87},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.8},
doi = {10.1109/RSP.2004.8},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GharsalliBBMCJ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GilliersVK04,
author = {Fr{\'{e}}d{\'{e}}ric Gilliers and
Jean{-}Pierre Velu and
Fabrice Kordon},
title = {Generation of Distributed Programs in Their Target Execution Environment},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {127--134},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.22},
doi = {10.1109/RSP.2004.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GilliersVK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GrassetRJ04,
author = {Arnaud Grasset and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Ahmed Amine Jerraya},
title = {Network Interface Generation for {MPSOC:} From Communication Service
Requirements to {RTL} Implementation},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {66--69},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.32},
doi = {10.1109/RSP.2004.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GrassetRJ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Greaves04,
author = {David J. Greaves},
title = {Automated Hardware Synthesis from Formal Specification Using {SAT}
Solvers},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {15--20},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.13},
doi = {10.1109/RSP.2004.13},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Greaves04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HesselRRPMS04,
author = {Fabiano Hessel and
Vitor M. da Rosa and
Igor M. Reis and
Ricardo Planner and
C{\'{e}}sar A. M. Marcon and
Altamiro Amadeu Susin},
title = {Abstract {RTOS} Modeling for Embedded Systems},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {210--216},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.6},
doi = {10.1109/RSP.2004.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HesselRRPMS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KentMS04,
author = {Kenneth B. Kent and
Hejun Ma and
Micaela Serra},
title = {Rapid Prototyping of a Co-Designed Java Virtual Machine},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {164--171},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.35},
doi = {10.1109/RSP.2004.35},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KentMS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LawlerY04,
author = {George M. Lawler and
Paul E. Young},
title = {Approaching Interoperability from the Bottom up: {A} Lattice Structure
for the Object-Oriented Method for Interoperability {(OOMI)}},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {135--142},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.9},
doi = {10.1109/RSP.2004.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LawlerY04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LudewigHSG04,
author = {Ralf Ludewig and
Thomas Hollstein and
Falko Sch{\"{u}}tz and
Manfred Glesner},
title = {Rapid Prototyping of an Integrated Testing and Debugging Unit},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {187--192},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.36},
doi = {10.1109/RSP.2004.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LudewigHSG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MartinelliWZ04,
author = {Paolo Martinelli and
Armin Wellig and
Julien Zory},
title = {Transaction-Level Prototyping of a {UMTS} Outer-Modem for System-on-Chip
Validation and Architecture Exploration},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {193--200},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.45},
doi = {10.1109/RSP.2004.45},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MartinelliWZ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MeiselVHI04,
author = {Andr{\'{e}} Meisel and
Markus Visarius and
Wolfram Hardt and
Stefan Ihmor},
title = {Self-Reconfiguration of Communication Interfaces},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {144--150},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.39},
doi = {10.1109/RSP.2004.39},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MeiselVHI04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MichaelSMB04,
author = {James Bret Michael and
Man{-}tak Shing and
Michael H. Miklaski and
Joel D. Babbitt},
title = {Modeling and Simulation of System-of-Systems Timing Constraints with
{UML-RT} and OMNeT++},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {202--209},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.30},
doi = {10.1109/RSP.2004.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MichaelSMB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MohsenH04,
author = {Amjad Mohsen and
Richard Hofmann},
title = {Characterizing Power Consumption and Delay of Functional/Library Components
for Hardware/Software Co-Design of Embedded Systems},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {45--52},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.17},
doi = {10.1109/RSP.2004.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MohsenH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NobiliSF04,
author = {M. De Nobili and
Robert W. Stewart and
Graham C. Freeland},
title = {Rapid Prototyping and Performance Analysis for {CDMA2000}},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {70--73},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.34},
doi = {10.1109/RSP.2004.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NobiliSF04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PapandreouVA04,
author = {Nikolaos Papandreou and
Maria Varsamou and
Theodore Antonakopoulos},
title = {Transmission Systems Prototyping Based on Stateflow/Simulink Models},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {174--179},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.44},
doi = {10.1109/RSP.2004.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PapandreouVA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ParkCLP04,
author = {Chankin Park and
Seungmo Cho and
Jaewook Lee and
Hyungjun Park},
title = {Co-Validation Environment for Memory Card},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {62--65},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.18},
doi = {10.1109/RSP.2004.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ParkCLP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SarmentoCJ04,
author = {Adriano Sarmento and
Wander O. Ces{\'{a}}rio and
Ahmed Amine Jerraya},
title = {Automatic Building of Executable Models from Abstract SoC Architectures
Made of Heterogeneous Subsystems},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {88--95},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.14},
doi = {10.1109/RSP.2004.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SarmentoCJ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Sendall04,
author = {Shane Sendall},
title = {Domain Driven Software Development -- {A} World of Transformations},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {110--112},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.20},
doi = {10.1109/RSP.2004.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Sendall04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SerraMC04,
author = {Mois{\`{e}}s Serra and
Pere Mart{\'{\i}}{-}Puig and
Jordi Carrabina},
title = {Implementation of a Channel Equalizer for {OFDM} Wireless LANs},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {232--238},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.25},
doi = {10.1109/RSP.2004.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SerraMC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SiripokarpiromM04,
author = {Rawat Siripokarpirom and
Friedrich Mayer{-}Lindenberg},
title = {Hardware-Assisted Simulation and Evaluation of {IP} Cores Using FPGA-Based
Rapid Prototyping Boards},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {96--102},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.23},
doi = {10.1109/RSP.2004.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SiripokarpiromM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TanougastBMRJW04,
author = {Camel Tanougast and
Yves Berviller and
Christian Mannino and
Hassan Rabah and
Michael Janiaut and
Serge Weber},
title = {SystemC Model of a {MPEG-2} {DVB-T} Bit-Rate Measurement Architecture
for {FPGA} Implementation},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {157--163},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.41},
doi = {10.1109/RSP.2004.41},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TanougastBMRJW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ThomaSRHM04,
author = {Yann Thoma and
Eduardo Sanchez and
Daniel Roggen and
Carl Hetherington and
Juan Manuel Moreno},
title = {Prototyping with a Bio-Inspired Reconfigurable Chip},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {239--246},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.33},
doi = {10.1109/RSP.2004.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ThomaSRHM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WoutersWVDL04,
author = {Maryse Wouters and
Peter Van Wesemael and
Roeland Vandebriel and
Andy Dewilde and
Michael Libois},
title = {Real Time Prototyping of Broadband Wireless {LAN} Systems},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {226--231},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.38},
doi = {10.1109/RSP.2004.38},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WoutersWVDL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YanagisawaUM04,
author = {Hideaki Yanagisawa and
Minoru Uehara and
Hideki Mori},
title = {Automatic Generation of a Simulation Compiler by a {HW/SW} Co-Design
System},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {53--59},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.15},
doi = {10.1109/RSP.2004.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/YanagisawaUM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ZhangSK04,
author = {Kang Zhang and
Guang{-}Lei Song and
Jun Kong},
title = {Rapid Software Prototyping Using Visual Language Techniques},
booktitle = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
pages = {119--126},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/RSP.2004.37},
doi = {10.1109/RSP.2004.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ZhangSK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2004,
title = {15th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2004), 28-30 June 2004, Geneva, Switzerland},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://ieeexplore.ieee.org/xpl/conhome/9174/proceeding},
isbn = {0-7695-2159-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2004.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Bahl03,
author = {Sanat Kamal Bahl},
title = {Design and Prototyping a Fast Hadamard Transformer for {WCDMA}},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {134--140},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207040},
doi = {10.1109/IWRSP.2003.1207040},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Bahl03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BassanoB03,
author = {Vincent Bassano and
Gilles Bernot},
title = {Marked Regulatory Graphs: {A} Formal Framework to Simulate Biological
Regulatory Networks with Simple Automata},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {93--99},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207035},
doi = {10.1109/IWRSP.2003.1207035},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BassanoB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarchioloMM03,
author = {Vincenza Carchiolo and
Michele Malgeri and
Giuseppe Mangioni},
title = {Synthesis of {LOTOS} Specification of the {IEEE-1394} Firewire Protocol},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {86--92},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207034},
doi = {10.1109/IWRSP.2003.1207034},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarchioloMM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChangKRCCBN03,
author = {Chen Chang and
Kimmo Kuusilinna and
Brian C. Richards and
Allen Chen and
Nathan Chan and
Robert W. Brodersen and
Borivoje Nikolic},
title = {Rapid Design and Analysis of Communication Systems Using the {BEE}
Hardware Emulation Environment},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {148},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207042},
doi = {10.1109/IWRSP.2003.1207042},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChangKRCCBN03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DebOJ03,
author = {Abhijit K. Deb and
Johnny {\"{O}}berg and
Axel Jantsch},
title = {Simulation and Analysis of Embedded {DSP} Systems Using Petri Nets},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {64--70},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207031},
doi = {10.1109/IWRSP.2003.1207031},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DebOJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DollasEK03,
author = {Apostolos Dollas and
Dionissios Efstathiou and
Thomas Kyriakides},
title = {A Universal Low Cost Run-Time and Programming Environment for Reconfigurable
Computing},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {2--8},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207023},
doi = {10.1109/IWRSP.2003.1207023},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DollasEK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DrusinkyS03,
author = {Doron Drusinsky and
Man{-}tak Shing},
title = {Verification of Timing Properties in Rapid System Prototyping},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {47},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207029},
doi = {10.1109/IWRSP.2003.1207029},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DrusinkyS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FongHA03,
author = {Ryan J. Fong and
Scott J. Harper and
Peter M. Athanas},
title = {A Versatile Framework for {FPGA} Field Updates: An Application of
Partial Self-Reconfiguation},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {117--123},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207038},
doi = {10.1109/IWRSP.2003.1207038},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FongHA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ForsterFWBM03,
author = {Stefan F{\"{o}}rster and
Marco Fischer and
Andr{\'{e}} Windisch and
Burkhard Balser and
Dieter Monjau},
title = {A New Specification Methodology for Embedded Systems Based on the
- Calculus Process Algebra},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {26--32},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207026},
doi = {10.1109/IWRSP.2003.1207026},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ForsterFWBM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GuoXMC03,
author = {Yuanbin Guo and
Gang Xu and
Dennis McCain and
Joseph R. Cavallaro},
title = {Rapid Scheduling of Efficient {VLSI} Architectures for Next-Generation
{HSDPA}},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {179--185},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207046},
doi = {10.1109/IWRSP.2003.1207046},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GuoXMC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HabibP03,
author = {Sami J. Habib and
Alice C. Parker},
title = {i-CAD: {A} Rapid Prototyping {CAD} Tool for Intranet Design},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {16},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207025},
doi = {10.1109/IWRSP.2003.1207025},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HabibP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HahnPPS03,
author = {Gabor Hahn and
Jan Philipps and
Alexander Pretschner and
Thomas Stauner},
title = {Prototype-Based Tests for Hybrid Reactive Systems},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {78},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207033},
doi = {10.1109/IWRSP.2003.1207033},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HahnPPS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Herranz-NievaM03,
author = {{\'{A}}ngel Herranz{-}Nieva and
Juan Jos{\'{e}} Moreno{-}Navarro},
title = {Rapid Prototyping and Incremental Evolution Using {SLAM}},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {201},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207049},
doi = {10.1109/IWRSP.2003.1207049},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Herranz-NievaM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HuaQB03,
author = {Shaoxiong Hua and
Gang Qu and
Shuvra S. Bhattacharyya},
title = {Exploring the Probabilistic Design Space of Multimedia Systems},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {233},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207053},
doi = {10.1109/IWRSP.2003.1207053},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HuaQB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HuguesPK03,
author = {J{\'{e}}r{\^{o}}me Hugues and
Laurent Pautet and
Fabrice Kordon},
title = {Contributions to middleware architectures to prototype distribution
infrastructures},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {124},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207039},
doi = {10.1109/IWRSP.2003.1207039},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/HuguesPK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IhmorBKVH03,
author = {Stefan Ihmor and
N. Bastos Jr. and
R. Cardoso Klein and
Markus Visarius and
Wolfram Hardt},
title = {Rapid Prototyping of Real-Time Communication---A Case Study: Interacting
Robots},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {186},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207047},
doi = {10.1109/IWRSP.2003.1207047},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IhmorBKVH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KeroS03,
author = {Nikolaus Ker{\"{o}} and
Thilo Sauter},
title = {Efficient Analysis of Mixed-Signal ASICs for Smart Sensors},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {40--46},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207028},
doi = {10.1109/IWRSP.2003.1207028},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KeroS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LiangPL03,
author = {Xianzhong Liang and
Joseph Puett and
Luqi},
title = {Synthesizing Approach for Perspective-Based Architecture Design},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {218--225},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207051},
doi = {10.1109/IWRSP.2003.1207051},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LiangPL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LudewigOMJHG03,
author = {Ralf Ludewig and
Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Juan Jes{\'{u}}s Ocampo Hidalgo and
Manfred Glesner},
title = {Emulation of Analog Components for the Rapid Prototyping of Wireless
Baseband Systems},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {172--178},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207045},
doi = {10.1109/IWRSP.2003.1207045},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LudewigOMJHG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LuqiSPBGQZCLRBF03,
author = {Luqi and
Man{-}tak Shing and
Joseph Puett and
Valdis Berzins and
Zhiwei Guan and
Ying Qiao and
Lynn Zhang and
Nabendu Chaki and
Xianzhong Liang and
Bill Ray and
Michael Brown and
David L. Floodeen},
title = {Comparative Rapid Prototyping, {A} Case Study},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {210--217},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207050},
doi = {10.1109/IWRSP.2003.1207050},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LuqiSPBGQZCLRBF03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MilosavljeviP03,
author = {Gordana Milosavljevic and
Branko Perisic},
title = {Really Rapid Prototyping of Large-Scale Business Information Systems},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {100},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207036},
doi = {10.1109/IWRSP.2003.1207036},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MilosavljeviP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MishraKD03,
author = {Prabhat Mishra and
Arun Kejariwal and
Nikil D. Dutt},
title = {Rapid Exploration of Pipelined Processors through Automatic Generation
of Synthesizable {RTL} Models},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {226--232},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207052},
doi = {10.1109/IWRSP.2003.1207052},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MishraKD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PapandreouVA03,
author = {Nikolaos Papandreou and
Maria Varsamou and
Theodore Antonakopoulos},
title = {xDSL Systems Prototyping using a Flexible Emulation Environment},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {194--200},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207048},
doi = {10.1109/IWRSP.2003.1207048},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PapandreouVA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PionteckGKG03,
author = {Thilo Pionteck and
A. Garcya and
Lukusa D. Kabulepa and
Manfred Glesner},
title = {The requirement for flexibility in IP-based designs increasesHardware
Evaluation of Low Power Communication Mechanisms for Transport-Triggered
Architectures},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {141--147},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207041},
doi = {10.1109/IWRSP.2003.1207041},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PionteckGKG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RettbergZLB03,
author = {Achim Rettberg and
Mauro Cesar Zanella and
Thomas Lehmann and
Christophe Bobda},
title = {A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {71--77},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207032},
doi = {10.1109/IWRSP.2003.1207032},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RettbergZLB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SasongkoBRJ03,
author = {Arif Sasongko and
Amer Baghdadi and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Ahmed Amine Jerraya},
title = {Embedded Application Prototyping on a Communication-Restricted Reconfigurable},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {33--39},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207027},
doi = {10.1109/IWRSP.2003.1207027},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/SasongkoBRJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TahaW03,
author = {Tarek M. Taha and
D. Scott Wills},
title = {An Instruction Throughput Model of Superscalar Processors},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {156--163},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207043},
doi = {10.1109/IWRSP.2003.1207043},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TahaW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TambourZUMJ03,
author = {Ludovic Tambour and
Nacer{-}Eddine Zergainoh and
Pascal Urard and
Henri Michel and
Ahmed Amine Jerraya},
title = {An Efficient Methodology and Semi-Automated Flow for Design and Validation
of Complex Digital Signal Processing {ASICS} Macro-Cells},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {56--63},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207030},
doi = {10.1109/IWRSP.2003.1207030},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TambourZUMJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TessierGMG03,
author = {Patrick Tessier and
S{\'{e}}bastien G{\'{e}}rard and
Chokri Mraidha and
Jean{-}Marc Geib},
title = {A Component-Based Methodology for Embedded System Prototyping},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {9--15},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207024},
doi = {10.1109/IWRSP.2003.1207024},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TessierGMG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YoungCBL03,
author = {Paul Young and
Nabendu Chaki and
Valdis Berzins and
Luqi},
title = {Evaluation of Middleware Architectures in Achieving System Interoperability},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {108--116},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207037},
doi = {10.1109/IWRSP.2003.1207037},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/YoungCBL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ZhangV03,
author = {Chuanjun Zhang and
Frank Vahid},
title = {Cache Configuration Exploration on Prototyping Platforms},
booktitle = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
pages = {164},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IWRSP.2003.1207044},
doi = {10.1109/IWRSP.2003.1207044},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ZhangV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2003,
title = {14th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2003), 9-11 June 2003, San Diego, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://ieeexplore.ieee.org/xpl/conhome/8579/proceeding},
isbn = {0-7695-1943-1},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2003.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BobdaS02,
author = {Christophe Bobda and
Nils Steenbock},
title = {A Rapid Prototyping Environment for Distributed Reconfigurable Systems},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {153--158},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029751},
doi = {10.1109/IWRSP.2002.1029751},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BobdaS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BorghsJBMVP02,
author = {Eric Borghs and
Jeroen Jacobs and
Micha{\"{e}}l Beck and
Adrian Mihanta and
Piet Vandaele and
Thierry Pollet},
title = {Prototyping Ethernet in the First Mile over Point-to-Point Copper},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {53},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029738},
doi = {10.1109/IWRSP.2002.1029738},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BorghsJBMVP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BuchenriederNPS02,
author = {Klaus Buchenrieder and
Ulrich Nageldinger and
Andreas Pyttel and
Alexander Sedlmeier},
title = {System Prototyping by Integration of Reconfigurable Hardware into
a Heterogeneous System Model},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {115--121},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029746},
doi = {10.1109/IWRSP.2002.1029746},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BuchenriederNPS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BusaAVLR02,
author = {Natalino G. Bus{\'{a}} and
Ghiath Alkadi and
Michael J. Verberne and
Rafael Peset Llopis and
Sethuraman Ramanatha},
title = {{RAPIDO:} {A} Modular, Multi-Board, Heterogeneous Multi-Processor,
{PCI} Bus Based Prototyping Framework for the Validation of SoC {VLSI}
Designs},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {159--165},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029752},
doi = {10.1109/IWRSP.2002.1029752},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BusaAVLR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChachkovB02,
author = {Stanislav Chachkov and
Didier Buchs},
title = {Interfacing Software Libraries from Non-deterministic Prototypes},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {92--98},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029743},
doi = {10.1109/IWRSP.2002.1029743},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChachkovB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GarridoSJM02,
author = {Mat{\'{\i}}as J. Garrido and
C{\'{e}}sar Sanz and
Marcos Jim{\'{e}}nez and
Juan M. Meneses},
title = {A Flexible {H.263} Video Coder Prototype Based on {FPGA}},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {34--41},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029735},
doi = {10.1109/IWRSP.2002.1029735},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GarridoSJM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GolatowskiHBT02,
author = {Frank Golatowski and
Jens Hildebrandt and
Jan Blumenthal and
Dirk Timmermann},
title = {Framework for Validation, Test and Analysis of Real-Time Scheduling
Algorithms and Scheduler Implementations},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {146--152},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029750},
doi = {10.1109/IWRSP.2002.1029750},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GolatowskiHBT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GulerCKWHV02,
author = {Murat Guler and
N. Scott Clements and
Nidhi Kejriwal and
Linda M. Wills and
Bonnie S. Heck and
George J. Vachtsevanos},
title = {Rapid Prototyping of Transition Management Code for Reconfigurable
Control Systems},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {76--83},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029741},
doi = {10.1109/IWRSP.2002.1029741},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GulerCKWHV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HinkelbeinKMM02,
author = {Christian Hinkelbein and
Andreas Kugel and
Reinhard M{\"{a}}nner and
Matthias M{\"{u}}ller},
title = {Reconfigurable Hardware Control Software},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {84--91},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029742},
doi = {10.1109/IWRSP.2002.1029742},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HinkelbeinKMM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HoLLBG02,
author = {Chun Hok Ho and
Monk{-}Ping Leong and
Philip Heng Wai Leong and
J{\"{u}}rgen Becker and
Manfred Glesner},
title = {Rapid Prototyping of {FPGA} Based Floating Point {DSP} Systems},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {19--24},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029733},
doi = {10.1109/IWRSP.2002.1029733},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HoLLBG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JainKK02,
author = {Sushil Chandra Jain and
Anshul Kumar and
Shashi Kumar},
title = {Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {66},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029740},
doi = {10.1109/IWRSP.2002.1029740},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JainKK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KitajimaSTI02,
author = {Akira Kitajima and
Toshiyuki Sasaki and
Yoshinori Takeuchi and
Masaharu Imai},
title = {Design of Application Specific {CISC} Using {PEAS-III}},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {12--17},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029732},
doi = {10.1109/IWRSP.2002.1029732},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KitajimaSTI02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KuhlRPM02,
author = {Markus K{\"{u}}hl and
Clemens Reichmann and
I. Pr{\"{o}}tel and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {From Object-Oriented Modeling to Code Generation for Rapid Prototyping
of Embedded Electronic Systems},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {108--114},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029745},
doi = {10.1109/IWRSP.2002.1029745},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KuhlRPM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LudewigOMG02,
author = {Ralf Ludewig and
Alberto Garc{\'{\i}}a Ortiz and
Tudor Murgan and
Manfred Glesner},
title = {Power Estimation Based on Transition Activity Analysis with an Architecture
Precise Rapid Prototyping System},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {138},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029749},
doi = {10.1109/IWRSP.2002.1029749},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LudewigOMG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Martin-LangerwerfRKP02,
author = {Javier Mart{\'{\i}}n{-}Langerwerf and
Carsten Reuter and
Holger Kropp and
Peter Pirsch},
title = {Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing
Applications},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {60--65},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029739},
doi = {10.1109/IWRSP.2002.1029739},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Martin-LangerwerfRKP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ObeidOLG02,
author = {Abdulfattah Mohammad Obeid and
Alberto Garc{\'{\i}}a Ortiz and
Ralf Ludewig and
Manfred Glesner},
title = {Prototyping of a High Performance Generic Viterbi Decoder},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {42--47},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029736},
doi = {10.1109/IWRSP.2002.1029736},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ObeidOLG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Pavesi02,
author = {Marco Pavesi},
title = {Market Estimation for System Prototyping {EDA} Segment},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {2},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029731},
doi = {10.1109/IWRSP.2002.1029731},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Pavesi02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PionteckTKGK02,
author = {Thilo Pionteck and
N. Toender and
Lukusa D. Kabulepa and
Manfred Glesner and
Tideya Kella},
title = {On the Rapid Prototyping of Equalizers for {OFDM} Systems},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {48--52},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029737},
doi = {10.1109/IWRSP.2002.1029737},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PionteckTKGK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Sanchez-SolanoSCBJB02,
author = {Santiago S{\'{a}}nchez{-}Solano and
Raouf Senhadji and
Alejandro Cabrera Sarmiento and
Iluminada Baturone and
Carlos Jes{\'{u}}s Jim{\'{e}}nez{-}Fern{\'{a}}ndez and
Angel Barriga},
title = {Prototyping of Fuzzy Logic-Based Controllers Using Standard {FPGA}
Development Boards},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {25},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029734},
doi = {10.1109/IWRSP.2002.1029734},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Sanchez-SolanoSCBJB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ShuLWL02,
author = {Guoqiang Shu and
Chao Li and
Qing Wang and
Mingshu Li},
title = {Validating Objected-Oriented Prototype of Real-Time Systems with Timed
Automata},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {99},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029744},
doi = {10.1109/IWRSP.2002.1029744},
timestamp = {Wed, 12 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ShuLWL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VestiasN02,
author = {M{\'{a}}rio P. V{\'{e}}stias and
Hor{\'{a}}cio C. Neto},
title = {System-Level Co-Synthesis of Dataflow Dominated Applications on Reconfigurable
Hardware/Software Architectures},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {130--137},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029748},
doi = {10.1109/IWRSP.2002.1029748},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VestiasN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WoutersHHRSU02,
author = {Maryse Wouters and
Tom Huybrechts and
Roeland Huys and
Stefaan De Rore and
Steven Sanders and
Erik Uman},
title = {{PICARD:} Platform Concepts for Prototyping and Demonstration of High
Speed Communication Systems},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {166},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029753},
doi = {10.1109/IWRSP.2002.1029753},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WoutersHHRSU02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/YanagisawaUM02,
author = {Hideaki Yanagisawa and
Minoru Uehara and
Hideki Mori},
title = {{ISA} Based System Design Language in {HW/SW} Co-Design Environment},
booktitle = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
pages = {122},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IWRSP.2002.1029747},
doi = {10.1109/IWRSP.2002.1029747},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/YanagisawaUM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2002,
title = {13th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2002), 1-3 July 2002, Darmstadt, Germany},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://ieeexplore.ieee.org/xpl/conhome/8003/proceeding},
isbn = {0-7695-1703-X},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2002.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AlippiFPS01,
author = {Cesare Alippi and
William Fornaciari and
Laura Pozzi and
Mariagiovanna Sami},
title = {Determining the Optimum Extended Instruction-Set Architecture for
Application Specific Reconfigurable {VLIW} CPUs},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {50--57},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933838},
doi = {10.1109/IWRSP.2001.933838},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AlippiFPS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Andrews01,
author = {Anneliese Amschler Andrews},
title = {The Colorado Advanced Software Institute: From Virtual Research Laboratory
to Software Clinic},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {4--11},
publisher = {{IEEE} Computer Society},
year = {2001},
timestamp = {Wed, 11 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/Andrews01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BakalisAANL01,
author = {Dimitris Bakalis and
Kostas Adaos and
George Alexiou and
Dimitris Nikolos and
Dimitrios Lymperopoulos},
title = {{EUDOXUS:} {A} WWW-based Generator of Reusable Arithmetic Cores},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {182--187},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933858},
doi = {10.1109/IWRSP.2001.933858},
timestamp = {Tue, 10 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/BakalisAANL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BobdaS01,
author = {Christophe Bobda and
Nils Steenbock},
title = {Singular Value Decomposition on Distributed Reconfigurable Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {38--43},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933836},
doi = {10.1109/IWRSP.2001.933836},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BobdaS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CesarioNGLJ01,
author = {Wander O. Ces{\'{a}}rio and
Gabriela Nicolescu and
Lovic Gauthier and
Damien Lyonnard and
Ahmed Amine Jerraya},
title = {Colif: a Multilevel Design Representation for Application-Specific
Multiprocessor System-on-Chip Design},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {110--115},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933847},
doi = {10.1109/IWRSP.2001.933847},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CesarioNGLJ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChachkovB01,
author = {Stanislav Chachkov and
Didier Buchs},
title = {From an Abstract Object-Oriented Model to a Ready-to-Use Embedded
System Controller},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {142--148},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933852},
doi = {10.1109/IWRSP.2001.933852},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChachkovB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Chappell01,
author = {Stephen P. G. Chappell},
title = {Rapid Development of Reconfigurable Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {44--49},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933837},
doi = {10.1109/IWRSP.2001.933837},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Chappell01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Cook01,
author = {Jonathan E. Cook},
title = {Supporting Rapid Prototyping through Frequent and Reliable Deployment
of Evolving Components},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {194--199},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933860},
doi = {10.1109/IWRSP.2001.933860},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Cook01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DeppeRZH01,
author = {Markus Deppe and
Michael Robrecht and
Mauro Cesar Zanella and
Wolfram Hardt},
title = {Rapid Prototyping of Real-Time Control Laws for Complex Mechatronic
Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {188--193},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933859},
doi = {10.1109/IWRSP.2001.933859},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DeppeRZH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DollasAKSPP01,
author = {Apostolos Dollas and
Nikolaos Aslanides and
Stamatios Kavvadias and
Euripides Sotiriades and
Kyprianos Papademetriou and
Dionisios N. Pnevmatikatos},
title = {Rapid Prototyping of a Reusable 4x4 Active {ATM} Switch Core with
the {PCI} Pamette},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {17--23},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933833},
doi = {10.1109/IWRSP.2001.933833},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DollasAKSPP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ErnstKHH01,
author = {M. Ernst and
Steffen Klupsch and
Oliver Hauck and
Sorin A. Huss},
title = {Rapid Prototyping for Hardware Accelerated Elliptic Curve Public-Key
Cryptosystems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {24--31},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933834},
doi = {10.1109/IWRSP.2001.933834},
timestamp = {Fri, 04 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ErnstKHH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HanselCS01,
author = {David Hansel and
Rance Cleaveland and
Scott A. Smolka},
title = {Distributed Prototyping from Validated Specifications},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {97--102},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933845},
doi = {10.1109/IWRSP.2001.933845},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HanselCS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HeathT01,
author = {J. Robert Heath and
Andrew Tan},
title = {Modeling, Design, Virtual and Physical Prototyping, Testing, and Verification
of a Multifunctional Processor Queue for a Single-Chip Multiprocessor
Architecture},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {128--135},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933850},
doi = {10.1109/IWRSP.2001.933850},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HeathT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HommaisPA01,
author = {Denis Hommais and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and
Ivan Aug{\'{e}}},
title = {A Tool Box to Map System Level Communications on {HW/SW} Architectures},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {77--83},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933842},
doi = {10.1109/IWRSP.2001.933842},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HommaisPA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KuhlSMD01,
author = {Markus K{\"{u}}hl and
Bernhard Spitzer and
Klaus D. M{\"{u}}ller{-}Glaser and
Ulf Dambacher},
title = {Universal Object-Oriented Modeling for Rapid Prototyping of Embedded
Electronic Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {149--154},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933853},
doi = {10.1109/IWRSP.2001.933853},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KuhlSMD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LoyMD01,
author = {Dietmar Loy and
Atsushi Murase and
Andreas Doederlein},
title = {System Level Prototyping for Embedded Networking Applications},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {12--16},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933832},
doi = {10.1109/IWRSP.2001.933832},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LoyMD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LuqiBGSABK01,
author = {Luqi and
Valdis Berzins and
Jun Ge and
Man{-}tak Shing and
Mikhail Auguston and
Barrett R. Bryant and
Boon Kwang Kin},
title = {{DCAPS} - Architecture for Distributed Computer Aided Prototyping
System},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {103--109},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933846},
doi = {10.1109/IWRSP.2001.933846},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LuqiBGSABK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MostertCLM01,
author = {Sias Mostert and
Nathalie Cossement and
Rudy Lauwereins and
Jef L. van Meerbergen},
title = {DF*: Modeling Dynamic Process Creation and Events for Interactive
Multimedia Applications},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933849},
doi = {10.1109/IWRSP.2001.933849},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MostertCLM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MukherjeeMBFHG01,
author = {Amar Mukherjee and
Nitin Motgi and
J{\"{u}}rgen Becker and
A. Friebe and
C. Habermann and
Manfred Glesner},
title = {Prototyping of Efficient Hardware Algorithms for Data Compression
in Future Communication Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {58--63},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933839},
doi = {10.1109/IWRSP.2001.933839},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MukherjeeMBFHG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MuresanWMV01,
author = {Valentin Muresan and
Xiaojun Wang and
Valentina Muresan and
Mircea Vladutiu},
title = {Mixed Classical Scheduling Algorithms and Tree Growing Technique in
Block-Test Scheduling under Power Constraints},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {162--167},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933855},
doi = {10.1109/IWRSP.2001.933855},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MuresanWMV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NavarrePBS01,
author = {David Navarre and
Philippe A. Palanque and
R{\'{e}}mi Bastide and
Ousmane Sy},
title = {A Model-Based Tool for Interactive Prototyping of Highly Interactive
Applications},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {136--141},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933851},
doi = {10.1109/IWRSP.2001.933851},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NavarrePBS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NedjahM01,
author = {Nadia Nedjah and
Luiza de Macedo Mourelle},
title = {How Many CLBs Does Your Circuit Need to be Implemented?},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {174--181},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933857},
doi = {10.1109/IWRSP.2001.933857},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NedjahM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NusserS01,
author = {Gerd Nusser and
Ralf{-}Dieter Schimkat},
title = {Rapid Application Development of Middleware Components by Using {XML}},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {116--121},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933848},
doi = {10.1109/IWRSP.2001.933848},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NusserS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ORourkeWDG01,
author = {Barry O'Rourke and
Steve Wisniewski and
Thilo Demmeler and
Paolo Giusto},
title = {Rapid Prototyping of Automotive Communication Protocols},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {64--69},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933840},
doi = {10.1109/IWRSP.2001.933840},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ORourkeWDG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PretschnerLP01,
author = {Alexander Pretschner and
Heiko L{\"{o}}tzbeyer and
Jan Philipps},
title = {Model Based Testing in Evolutionary Software Development},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {155--161},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933854},
doi = {10.1109/IWRSP.2001.933854},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PretschnerLP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RayF01,
author = {William J. Ray and
Andy Farrar},
title = {Object Model Driven Code Generation for the Enterprise},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {84--89},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933843},
doi = {10.1109/IWRSP.2001.933843},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RayF01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RegepK01,
author = {Dan Marius Regep and
Fabrice Kordon},
title = {LfP : {A} Specification Language for Rapid Prototyping of Concurrent
Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {90--96},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933844},
doi = {10.1109/IWRSP.2001.933844},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RegepK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SabetV01,
author = {Pirouz Bazargan{-}Sabet and
Laurent Vuillemin},
title = {An Approach to Mapping the Timing Behavior of {VLSI} Circuits on Emulators},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {168--173},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933856},
doi = {10.1109/IWRSP.2001.933856},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SabetV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SassatelliCGT01,
author = {Gilles Sassatelli and
Gaston Cambon and
J{\'{e}}r{\^{o}}me Galy and
Lionel Torres},
title = {A Dynamically Reconfigurable Architecture for Embedded Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {32--37},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933835},
doi = {10.1109/IWRSP.2001.933835},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SassatelliCGT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SiewiorekSS01,
author = {Daniel P. Siewiorek and
Asim Smailagic and
Daniel Salber},
title = {Rapid Prototyping of Computer Systems: Experiences and Lessons},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {2--3},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933831},
doi = {10.1109/IWRSP.2001.933831},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SiewiorekSS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SpitzerKM01,
author = {Bernhard Spitzer and
Markus K{\"{u}}hl and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {A Methodology for Architecture-Oriented Rapid Prototyping},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {200--205},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933862},
doi = {10.1109/IWRSP.2001.933862},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SpitzerKM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VasilkoMMSH01,
author = {Milan Vasilko and
Lukas Mach{\'{a}}cek and
Marek Matej and
Piotr Stepien and
Steve Holloway},
title = {A Rapid Prototyping Methodology and Platform for Seamless Communication
Systems},
booktitle = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
pages = {70--76},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IWRSP.2001.933841},
doi = {10.1109/IWRSP.2001.933841},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VasilkoMMSH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2001,
title = {12th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
2001), 25-27 June 2001, Monterey, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://ieeexplore.ieee.org/xpl/conhome/7430/proceeding},
isbn = {0-7695-1206-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2001.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ArechavalaG00,
author = {Yolanda Gonz{\'{a}}lez Arechavala and
Fernando de Cuadra Garc{\'{\i}}a},
title = {{MODUS:} Integrated Behavior-Oriented Model for Rapid Prototyping},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {40--45},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855184},
doi = {10.1109/IWRSP.2000.855184},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ArechavalaG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BaghdadiZCRJ00,
author = {Amer Baghdadi and
Nacer{-}Eddine Zergainoh and
Wander O. Ces{\'{a}}rio and
T. Roudier and
Ahmed Amine Jerraya},
title = {Design Space Exploration for Hardware/Software Codesign of Multiprocessor
Systems},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {8--13},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.854975},
doi = {10.1109/IWRSP.2000.854975},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BaghdadiZCRJ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BaratL00,
author = {Francisco Barat and
Rudy Lauwereins},
title = {Reconfigurable Instruction Set Processors: {A} Survey},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {168--173},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855217},
doi = {10.1109/IWRSP.2000.855217},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BaratL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BeckerKRG00,
author = {J{\"{u}}rgen Becker and
Lukusa D. Kabulepa and
Frank{-}Michael Renner and
Manfred Glesner},
title = {Simulation and Rapid Prototyping of Flexible Systems-on-a-Chip for
Future Mobile Communication Applications},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {160},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855216},
doi = {10.1109/IWRSP.2000.855216},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BeckerKRG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BhattacharyaB00,
author = {Bishnupriya Bhattacharya and
Shuvra S. Bhattacharyya},
title = {Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for {DSP}
Systems},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {84--89},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855200},
doi = {10.1109/IWRSP.2000.855200},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BhattacharyaB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Bredenfeld00,
author = {Ansgar Bredenfeld},
title = {Integration and Evolution of Model-Based Tool Prototypes},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {142--147},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855212},
doi = {10.1109/IWRSP.2000.855212},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Bredenfeld00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CanellasM00,
author = {Nicolau Ca{\~{n}}ellas and
J. M. Moreno},
title = {Speeding up Hardware Prototyping by Incremental Simulation/Emulation},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {98--102},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855203},
doi = {10.1109/IWRSP.2000.855203},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CanellasM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Cockx00,
author = {Johan Cockx},
title = {Efficient Modeling of Preemption in a Virtual Prototype},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {14--19},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.854977},
doi = {10.1109/IWRSP.2000.854977},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Cockx00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DimmlerP00,
author = {Martin Dimmler and
Yves Piguet},
title = {Intuitive Design of Complex Real-Time Control Systems},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {52},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855194},
doi = {10.1109/IWRSP.2000.855194},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DimmlerP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/EggersZ00,
author = {G{\"{o}}ran Eggers and
Hans Christoph Zeidler},
title = {Efficient Clock-Cycle Precise Simulation at Architecture Level in
{C++}},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {222},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855239},
doi = {10.1109/IWRSP.2000.855239},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/EggersZ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/EilersVPKSK00,
author = {Dirk Eilers and
Alfred Voglgsang and
Arnold Plankl and
Gerri K{\"{o}}rner and
Helmut Steckenbiller and
Rudi Knorr},
title = {A Prototype of an {AAL} for High Bit Rate Real-Time Data Transmission
System over {ATM} Networks Using a {RSE} {CODEC}},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {109--114},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855206},
doi = {10.1109/IWRSP.2000.855206},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/EilersVPKSK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GauthierJ00,
author = {Lovic Gauthier and
Ahmed Amine Jerraya},
title = {Cycle-True Simulation of the {ST10} Microcontroller Including the
Core and the Peripherals},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {60--65},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855195},
doi = {10.1109/IWRSP.2000.855195},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GauthierJ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Greaves00,
author = {David J. Greaves},
title = {A Verilog to {C} Compiler},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855208},
doi = {10.1109/IWRSP.2000.855208},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Greaves00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HaSEVPRM00,
author = {Yajun Ha and
Patrick Schaumont and
Marc Engels and
Serge Vernalde and
Freddy Potargent and
Luc Rijnders and
Hugo De Man},
title = {A Hardware Virtual Machine for the Networked Reconfiguration},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {194--199},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855224},
doi = {10.1109/IWRSP.2000.855224},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HaSEVPRM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HardtKR00,
author = {Wolfram Hardt and
Bernd Kleinjohann and
Achim Rettberg},
title = {The {FLYSIG} Prototyping Approach},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {115},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855207},
doi = {10.1109/IWRSP.2000.855207},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HardtKR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IliopoulosA00,
author = {Marios Iliopoulos and
Theodore Antonakopoulos},
title = {A Methodology for Implementing Medium Access Protocols Using a General
Parameterized Architecture},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {2--7},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.854974},
doi = {10.1109/IWRSP.2000.854974},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IliopoulosA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Jain00,
author = {Vijay K. Jain},
title = {Mapping a High-Speed Wireless Communication Function to the Reconfigurable
J-Platform},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {103--108},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855204},
doi = {10.1109/IWRSP.2000.855204},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Jain00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JankaW00,
author = {Randall S. Janka and
Linda M. Wills},
title = {Combining Virtual Benchmarking with Rapid System Prototyping for Real-Time
Embedded Multiprocessor Signal Processing System Codesign},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {20},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855176},
doi = {10.1109/IWRSP.2000.855176},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JankaW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KamdemF00,
author = {Romain Kamdem and
Alain Fonkoua},
title = {Coprocessor Synthesis of Multirate System Using Static Scheduling
Theory},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {148--153},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855214},
doi = {10.1109/IWRSP.2000.855214},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KamdemF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KentS00,
author = {Kenneth B. Kent and
Micaela Serra},
title = {Hardware/Software Co-Design of a Java Virtual Machine},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {66--71},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855196},
doi = {10.1109/IWRSP.2000.855196},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KentS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Koch00,
author = {Andreas Koch},
title = {A Comprehensive Prototyping-Platform for Hardware-Software Codesign},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {78},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855198},
doi = {10.1109/IWRSP.2000.855198},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Koch00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KrupnovaS00,
author = {Helena Krupnova and
Gabriele Saucier},
title = {{FPGA} Technology Snapshot: Current Devices and Design Tools},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {200},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855226},
doi = {10.1109/IWRSP.2000.855226},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KrupnovaS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MayerG00,
author = {Ulrich Mayer and
Manfred Glesner},
title = {Hardware Accelerated Estimation of Multiplexer-Introduced Loss for
{MPEG-4} Data Streams},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {214},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855238},
doi = {10.1109/IWRSP.2000.855238},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MayerG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Moona00,
author = {Rajat Moona},
title = {Processor Models for Retargetable Tools},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {34--39},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855183},
doi = {10.1109/IWRSP.2000.855183},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Moona00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MuresanWMV00,
author = {Valentin Muresan and
Xiaojun Wang and
Valentina Muresan and
Mircea Vladutiu},
title = {Power-Constrained Block-Test List Scheduling},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {182--187},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855220},
doi = {10.1109/IWRSP.2000.855220},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MuresanWMV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MuthKF00,
author = {Annette Muth and
Thomas Kolloch and
Thomas Maier{-}Komor and
Georg F{\"{a}}rber},
title = {An Evaluation of Code Generation Strategies Targeting Hardware for
the Rapid Prototyping of SDL-Specifications},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {134},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855210},
doi = {10.1109/IWRSP.2000.855210},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MuthKF00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NitschWSR00,
author = {Carsten Nitsch and
Karlheinz Wei{\ss} and
Thorsten Steckstor and
Wolfgang Rosenstiel},
title = {Embedded System Architecture Design Based on Real-Time Emulation},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {228--233},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855241},
doi = {10.1109/IWRSP.2000.855241},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NitschWSR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NogueiraLB00,
author = {Juan Carlos Nogueira and
Luqi and
Swapan Bhattacharya},
title = {A Risk Assessment Model for Software Prototyping Projects},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {28--33},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855182},
doi = {10.1109/IWRSP.2000.855182},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NogueiraLB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OhYC00,
author = {Kyung{-}soo Oh and
Sang{-}yong Yoon and
Soo{-}Ik Chae},
title = {Emulator Environment Based on an {FPGA} Prototyping Board},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {72--77},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855197},
doi = {10.1109/IWRSP.2000.855197},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OhYC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ParkBCK00,
author = {Myung{-}Hwan Park and
Ki{-}Seok Bang and
Jin{-}Young Choi and
Inhye Kang},
title = {Equivalence Checking of Two Statechart Specifications},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {46--51},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855185},
doi = {10.1109/IWRSP.2000.855185},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/ParkBCK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PoureAB00,
author = {Philippe Poure and
Fabrice Aub{\'{e}}part and
Francis Braun},
title = {A Design Methodology for Hardware Prototyping of Integrated {AC} Drive
Control: Application to Direct Torque Control of an Induction Machine},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {90},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855202},
doi = {10.1109/IWRSP.2000.855202},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PoureAB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Prasad00,
author = {P. G. Prasad},
title = {Validation of Link Layer Synthesizable Core - {A} Prototyping Case
Study},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {208--213},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855236},
doi = {10.1109/IWRSP.2000.855236},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Prasad00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RegepK00,
author = {Dan Marius Regep and
Fabrice Kordon},
title = {Using MetaScribe to Prototype an {UML} to C++/Ada95 Code Generator},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855209},
doi = {10.1109/IWRSP.2000.855209},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RegepK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RennerBG00,
author = {Frank{-}Michael Renner and
J{\"{u}}rgen Becker and
Manfred Glesner},
title = {Automated Communication Synthesis for Architecture-Precise Rapid Prototyping
of Real-Time Embedded Systems},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {154--159},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855215},
doi = {10.1109/IWRSP.2000.855215},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RennerBG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TorreRUMR00,
author = {Eduardo de la Torre and
Teresa Riesgo and
Javier Uceda and
E. Macip and
M. Rizzi},
title = {Highly Configurable Control Boards: {A} Tool and a Design Experience},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {174},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855218},
doi = {10.1109/IWRSP.2000.855218},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TorreRUMR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VicenteLH00,
author = {Juan de Vicente and
Juan Lanchares and
Rom{\'{a}}n Hermida},
title = {Adaptive {FPGA} Placement by Natural Optimization},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {188--193},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855223},
doi = {10.1109/IWRSP.2000.855223},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VicenteLH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/2000,
title = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://ieeexplore.ieee.org/xpl/conhome/6906/proceeding},
isbn = {0-7695-0668-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/2000.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AbkeBS99,
author = {Joerg Abke and
Erich Barke and
J{\"{o}}rn Stohmann},
title = {A Universal Module Generator for LUT-Based FPGAs},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {230--235},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779058},
doi = {10.1109/IWRSP.1999.779058},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AbkeBS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AchterenALPGBC99,
author = {Tanja Van Achteren and
Marleen Ad{\'{e}} and
Rudy Lauwereins and
Marc Proesmans and
Luc Van Gool and
Jan Bormans and
Francky Catthoor},
title = {Transformations of a 3D Image Reconstruction Algorithm for Data Transfer
and Storage Optimization},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {81--86},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779035},
doi = {10.1109/IWRSP.1999.779035},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AchterenALPGBC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BazarganKS99,
author = {Kia Bazargan and
Ryan Kastner and
Majid Sarrafzadeh},
title = {3-D Floorplanning: Simulated Annealing and Greedy Placement Methods
for Reconfigurable Computing Systems},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {38},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779029},
doi = {10.1109/IWRSP.1999.779029},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BazarganKS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BredenfeldW99,
author = {Ansgar Bredenfeld and
J{\"{o}}rg Wilberg},
title = {Model Based Multi-Level Prototyping},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {190--195},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779052},
doi = {10.1109/IWRSP.1999.779052},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BredenfeldW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BringmannRMFSH99,
author = {Oliver Bringmann and
Wolfgang Rosenstiel and
Annette Muth and
Georg F{\"{a}}rber and
Frank Slomka and
Richard Hofmann},
title = {Mixed Abstraction Level Hardware Synthesis from {SDL} for Rapid Prototyping},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {114--119},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779040},
doi = {10.1109/IWRSP.1999.779040},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BringmannRMFSH99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BuchsB99,
author = {Didier Buchs and
Mathieu Buffo},
title = {Rapid Prototyping of Formally Modelled Distributed Systems},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {4--9},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779023},
doi = {10.1109/IWRSP.1999.779023},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BuchsB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BurstWKM99,
author = {Alexander Burst and
Michael Wolff and
Markus K{\"{u}}hl and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Scheduling Strategies and Estimations for Concept-Oriented Rapid Prototyping},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {140--145},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779044},
doi = {10.1109/IWRSP.1999.779044},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BurstWKM99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BuzzoniCGR99,
author = {Massimo Buzzoni and
Dario Cardini and
Roberto Gallino and
Roberto Romagnese},
title = {{ATM} Traffic Management Systems: {ASIC} Fast Prototyping},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {74--80},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779034},
doi = {10.1109/IWRSP.1999.779034},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BuzzoniCGR99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChathaV99,
author = {Karam S. Chatha and
Ranga Vemuri},
title = {An Iterative Algorithm for Partitioning and Scheduling of Area Constrained
{HW-SW} Systems},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779043},
doi = {10.1109/IWRSP.1999.779043},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChathaV99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CyreHGS99,
author = {Walling R. Cyre and
Jeffrey Hess and
Andreas Gunawan and
Ritesh Sojitra},
title = {A Rapid Modeling Tool for Virtual Prototypes},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {178--183},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779050},
doi = {10.1109/IWRSP.1999.779050},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CyreHGS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DenoLHB99,
author = {Scott Deno and
David L. Landis and
Paul T. Hulina and
Sanjay Balasubramanian},
title = {A Rapid Prototyping Methodology for Reverse Engineering of Legacy
Electronic Systems},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {222},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779057},
doi = {10.1109/IWRSP.1999.779057},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DenoLHB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DorfelSH99,
author = {Matthias D{\"{o}}rfel and
Frank Slomka and
Richard Hofmann},
title = {A Scalable Hardware Library for the Rapid Prototyping of {SDL} Specifications},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {120},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779041},
doi = {10.1109/IWRSP.1999.779041},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DorfelSH99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ErhardRS99,
author = {Werner Erhard and
Andreas Reinsch and
Torsten Schober},
title = {First Steps towards a Reconfigurable Asynchronous System},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {28--31},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779027},
doi = {10.1109/IWRSP.1999.779027},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ErhardRS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HabbasHSK99,
author = {Zineb Habbas and
Francine Herrmann and
Daniel Singer and
Micha{\"{e}}l Krajecki},
title = {A Methodological Approach to Implement {CSP} on {FPGA}},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {66},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779033},
doi = {10.1109/IWRSP.1999.779033},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HabbasHSK99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HarbichSBS99,
author = {Klaus Harbich and
J{\"{o}}rn Stohmann and
Erich Barke and
Ludwig Schwoerer},
title = {A Case Study: Logic Emulation - Pitfalls and Solutions},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {160},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779047},
doi = {10.1109/IWRSP.1999.779047},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HarbichSBS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HemaniODLF99,
author = {Ahmed Hemani and
Johnny {\"{O}}berg and
Abhijit K. Deb and
Dan Lindqvist and
Bj{\"{o}}rn Fjellborg},
title = {System Level Virtual Prototyping of {DSP} ASICs Using Grammar Based
Approach},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {166--171},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779048},
doi = {10.1109/IWRSP.1999.779048},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HemaniODLF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HendersonW99,
author = {Peter Henderson and
Robert John Walters},
title = {System Design Validation Using Formal Models},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {10--14},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779024},
doi = {10.1109/IWRSP.1999.779024},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HendersonW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HesselCLZDJ99,
author = {Fabiano Hessel and
Philippe Coste and
P. LeMarrec and
Nacer{-}Eddine Zergainoh and
Jean{-}Marc Daveau and
Ahmed Amine Jerraya},
title = {Communication Interface Synthesis for Multilanguage Specifications},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {15--20},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779025},
doi = {10.1109/IWRSP.1999.779025},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HesselCLZDJ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KimK99,
author = {Young Geol Kim and
Tag Gon Kim},
title = {A Design and Tool Reuse Methodology for Rapid Prototyping of Application
Specific Instruction Set Processors},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {46--51},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779030},
doi = {10.1109/IWRSP.1999.779030},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KimK99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KrupnovaRS99,
author = {Helena Krupnova and
Christian Rabedaoro and
Gabriele Saucier},
title = {{FPGA} Partitioning for Rapid Prototyping: {A} 1 Million Gate Design
Case Study},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779042},
doi = {10.1109/IWRSP.1999.779042},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KrupnovaRS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LandisGHC99,
author = {David L. Landis and
Praveen Guddeti and
Paul T. Hulina and
Lee D. Coraor},
title = {Language-Based Rapid Prototyping Methods for Legacy System Re-Engineering
and Re-Use},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {52},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779031},
doi = {10.1109/IWRSP.1999.779031},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LandisGHC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeuckerN99,
author = {Martin Leucker and
Thomas Noll},
title = {Rapid Prototyping of Specification Language Implementations},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {60--65},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779032},
doi = {10.1109/IWRSP.1999.779032},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LeuckerN99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OsterlingE99,
author = {Achim {\"{O}}sterling and
Rolf Ernst},
title = {Process Versions in Rapid Prototyping},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {94--99},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779037},
doi = {10.1109/IWRSP.1999.779037},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OsterlingE99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ParkCH99,
author = {Chanik Park and
JaeWoong Chung and
Soonhoi Ha},
title = {Extended Synchronous Dataflow for Efficient {DSP} System Prototyping},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {196},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779053},
doi = {10.1109/IWRSP.1999.779053},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ParkCH99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PashamMF99,
author = {Vikram Pasham and
Wilfrido Alejandro Moreno and
Fernando J. Falquez},
title = {Field Programmable Multi Chip Modules Using Programmable Laser Interconnects},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {210},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779055},
doi = {10.1109/IWRSP.1999.779055},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PashamMF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PettersMKHFF99,
author = {Stefan M. Petters and
Annette Muth and
Thomas Kolloch and
Thomas Hopfner and
Franz Fischer and
Georg F{\"{a}}rber},
title = {The {REAR} Framework for Emulation and Analysis of Embedded Hard Real-Time
Systems},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {100--107},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779038},
doi = {10.1109/IWRSP.1999.779038},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PettersMKHFF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PillementTRC99,
author = {S{\'{e}}bastien Pillement and
Lionel Torres and
Michel Robert and
Gaston Cambon},
title = {Fast Prototyping: {A} Case Study - The {JPEG} Compression Algorithm},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {87},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779036},
doi = {10.1109/IWRSP.1999.779036},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PillementTRC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RennerBG99,
author = {Frank{-}Michael Renner and
J{\"{u}}rgen Becker and
Manfred Glesner},
title = {Communication Performance Models for Architecture-Precise Prototyping
of Real-Time Embedded Systems},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {108--113},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779039},
doi = {10.1109/IWRSP.1999.779039},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RennerBG99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ShingLBSW99,
author = {Man{-}tak Shing and
Luqi and
Valdis Berzins and
Michael Saluto and
Julian Williams},
title = {Architectural Re-Engineering of Janus Using Object Modeling and Rapid
Prototyping},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {216--221},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779056},
doi = {10.1109/IWRSP.1999.779056},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ShingLBSW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ShrivastavaJ99,
author = {S. Shrivastava and
Vijay K. Jain},
title = {Rapid System Prototyping for High Performance Reconfigurable Computing},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {32--27},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779028},
doi = {10.1109/IWRSP.1999.779028},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ShrivastavaJ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SpitzerBWM99,
author = {Bernhard Spitzer and
Alexander Burst and
Michael Wolff and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Interface Technologies for Versatile Rapid-Prototyping Systems},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {204--209},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779054},
doi = {10.1109/IWRSP.1999.779054},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SpitzerBWM99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Tessier99,
author = {Russell Tessier},
title = {Incremental Compilation for Logic Emulation},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {236--241},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779059},
doi = {10.1109/IWRSP.1999.779059},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Tessier99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ThompsonH99,
author = {Jeffrey M. Thompson and
Mats Per Erik Heimdahl},
title = {An Integrated Development Environment for Prototyping Safety Critical
Systems},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {172--177},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779049},
doi = {10.1109/IWRSP.1999.779049},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ThompsonH99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Turner99,
author = {Ray Turner},
title = {System-Level Verification - {A} Comparison of Approaches},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {154--159},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779046},
doi = {10.1109/IWRSP.1999.779046},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Turner99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VasilliouGAMAN99,
author = {A. Vasilliou and
K. Gounaris and
Kostas Adaos and
D. Mitsainas and
George Alexiou and
Dimitris Nikolos},
title = {Development of a Reusable {E1} Transceiver Suitable for Rapid Prototyping},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {21},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779026},
doi = {10.1109/IWRSP.1999.779026},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VasilliouGAMAN99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WeissSR99,
author = {Karlheinz Wei{\ss} and
Thorsten Steckstor and
Wolfgang Rosenstiel},
title = {Performance Analysis of a {RTOS} by Emulation of an Embedded System},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {146},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779045},
doi = {10.1109/IWRSP.1999.779045},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WeissSR99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WelgeM99,
author = {R. Welge and
Christian M{\"{u}}ller{-}Schloer},
title = {Graphical Design of Embedded Control System Software Based on SDL/RealTime
with Special Support for Safety Critical Applications},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {184--189},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779051},
doi = {10.1109/IWRSP.1999.779051},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WelgeM99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1999,
title = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://ieeexplore.ieee.org/xpl/conhome/6324/proceeding},
isbn = {0-7695-0246-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1999.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AdaosAK98,
author = {Kostas Adaos and
George Alexiou and
Nick Kanopoulos},
title = {An Extensible, Low Cost Rapid Prototyping Environment Based on a Reconfigurable
Set of FPGAs},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {78--83},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676672},
doi = {10.1109/IWRSP.1998.676672},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AdaosAK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AlmsickDDM98,
author = {Werner van Almsick and
Thorsten Drabe and
Wilfried Daehn and
Christian M{\"{u}}ller{-}Schloer},
title = {An Open Simulation and Modeling Environment for Embedded Real-Time
Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {95--100},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676675},
doi = {10.1109/IWRSP.1998.676675},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AlmsickDDM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BeckerH98,
author = {J{\"{u}}rgen Becker and
Reiner W. Hartenstein},
title = {Real-Time Prototyping in Microprocessor/Accelerator Symbiosis},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {32--38},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676665},
doi = {10.1109/IWRSP.1998.676665},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BeckerH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BhatiaS98,
author = {Veena Bhatia and
Sofia Shtil},
title = {Rapid Prototyping Technology Accelerates Software Development for
Complex Network Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {113--115},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676678},
doi = {10.1109/IWRSP.1998.676678},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BhatiaS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Bredenfeld98,
author = {Ansgar Bredenfeld},
title = {{APICES} - Rapid Application Development with Graph Pattern},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {25},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676664},
doi = {10.1109/IWRSP.1998.676664},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Bredenfeld98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Buchenrieder98,
author = {Klaus Buchenrieder},
title = {Rapid Prototyping of Embedded Hardware/Software Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {2},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676660},
doi = {10.1109/IWRSP.1998.676660},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Buchenrieder98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BuchholzHKKR98,
author = {T. Buchholz and
Gunter Haug and
Udo Kebschull and
Gernot Koch and
Wolfgang Rosenstiel},
title = {Behavioral Emulation of Synthesized RT-Level Descriptions Using {VLIW}
Architectures},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {70},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676671},
doi = {10.1109/IWRSP.1998.676671},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BuchholzHKKR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BuchsDK98,
author = {Didier Buchs and
Alioune Diagne and
Fabrice Kordon},
title = {Testing Prototypes Validity to Enhance Code Reuse},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {6--12},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676661},
doi = {10.1109/IWRSP.1998.676661},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BuchsDK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BurstWKM98,
author = {Alexander Burst and
Michael Wolff and
Markus K{\"{u}}hl and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Using {CDIF} for Concept-Oriented Rapid Prototyping of Electronic
Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {182--187},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676689},
doi = {10.1109/IWRSP.1998.676689},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BurstWKM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChathaV98,
author = {Karam S. Chatha and
Ranga Vemuri},
title = {Performance Evaluation Tool for Rapid Prototyping of Hardware-Software
Codesigns},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {218--224},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676695},
doi = {10.1109/IWRSP.1998.676695},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChathaV98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Courtoy98,
author = {Michel Courtoy},
title = {Rapid System Prototyping for Real-Time Design Validation},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {108--112},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676677},
doi = {10.1109/IWRSP.1998.676677},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Courtoy98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DalcolmoLA98,
author = {J. Dalcolmo and
Rudy Lauwereins and
Marleen Ad{\'{e}}},
title = {Code Generation of Data Dominated {DSP} Applications for {FPGA} Targets},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {162},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676686},
doi = {10.1109/IWRSP.1998.676686},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DalcolmoLA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DavidL98,
author = {Jean{-}Pierre David and
Jean{-}Didier Legat},
title = {A Data-Flow Oriented Co-Design for Reconfigurable Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {207--211},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676693},
doi = {10.1109/IWRSP.1998.676693},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DavidL98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DinuCM98,
author = {Andrei Dinu and
Marcian N. Cirstea and
M. McCormick},
title = {Virtual Prototyping of a Digital Neural Current Controller},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {176--181},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676688},
doi = {10.1109/IWRSP.1998.676688},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DinuCM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DoncevLT98,
author = {Goran Doncev and
Miriam Leeser and
Shantanu Tarafdar},
title = {Truly Rapid Prototyping Requires High-Level Synthesis},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {101},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676676},
doi = {10.1109/IWRSP.1998.676676},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DoncevLT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DorfelH98,
author = {Matthias D{\"{o}}rfel and
Richard Hofmann},
title = {A Prototyping System for High Performance Communication Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {84--88},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676673},
doi = {10.1109/IWRSP.1998.676673},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DorfelH98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DozzaRBG98,
author = {D. Dozza and
Roberto Rambaldi and
Michele Borgatti and
Roberto Guerrieri},
title = {OMI-Compliant Model for Virtual Emulation},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {64--69},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676670},
doi = {10.1109/IWRSP.1998.676670},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DozzaRBG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HardtK98,
author = {Wolfram Hardt and
Bernd Kleinjohann},
title = {{FLYSIG:} Dataflow Oriented Delay-Insensitive Processor for Rapid
Prototyping of Signal Processing},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {136--141},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676682},
doi = {10.1109/IWRSP.1998.676682},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HardtK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ItoONKS98,
author = {Hideyuki Ito and
Kiyoshi Oguri and
Kouichi Nagami and
Ryusuke Konishi and
Tsunemichi Shiozawa},
title = {The Plastic Cell Architecture for Dynamic Reconfigurable Computing},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {39--44},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676666},
doi = {10.1109/IWRSP.1998.676666},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ItoONKS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KirschbaumBG98,
author = {Andreas Kirschbaum and
J{\"{u}}rgen Becker and
Manfred Glesner},
title = {Run-Time Monitoring of Communication Activities in a Rapid Prototyping
Environment},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {52--57},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676668},
doi = {10.1109/IWRSP.1998.676668},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KirschbaumBG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KirschbaumOG98,
author = {Andreas Kirschbaum and
Stefan Ortmann and
Manfred Glesner},
title = {Rapid Prototyping of a Co-Processor Based Engine Knock Detection System},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {124--129},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676680},
doi = {10.1109/IWRSP.1998.676680},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KirschbaumOG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KroppRP98,
author = {Holger Kropp and
Carsten Reuter and
Peter Pirsch},
title = {The Video and Image Processing Emulation System {VIPES}},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {170--175},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676687},
doi = {10.1109/IWRSP.1998.676687},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KroppRP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KrupnovaVSB98,
author = {Helena Krupnova and
Dinh Duc Anh Vu and
Gabriele Saucier and
Michel Boubal},
title = {Real Time Prototyping Method and a Case Study},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {13--18},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676662},
doi = {10.1109/IWRSP.1998.676662},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KrupnovaVSB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeMarrecVHJAC98,
author = {P. LeMarrec and
Carlos A. Valderrama and
Fabiano Hessel and
Ahmed Amine Jerraya and
M. Attia and
O. Cayrol},
title = {Hardware, Software and Mechanical Cosimulation for Automotive Applications},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {202--206},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676692},
doi = {10.1109/IWRSP.1998.676692},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LeMarrecVHJAC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LinSC98,
author = {Ta{-}Cheng Lin and
Sadiq M. Sait and
Walling R. Cyre},
title = {Performance and Interface Buffer Size Driven Behavioral Partitioning
for Embedded Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {116},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676679},
doi = {10.1109/IWRSP.1998.676679},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LinSC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Lisa-MingoC98,
author = {Ferran Lisa{-}Mingo and
Jordi Carrabina},
title = {A Library of Memory Controllers for an Image Processing Prototyping
System},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {188--193},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676690},
doi = {10.1109/IWRSP.1998.676690},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Lisa-MingoC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LuthNP98,
author = {Karsten L{\"{u}}th and
J{\"{u}}rgen Niehaus and
Thomas Peikenkamp},
title = {{HW/SW} Cosynthesis Using Statecharts and Symbolic Timing Diagrams},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {212--217},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676694},
doi = {10.1109/IWRSP.1998.676694},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LuthNP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MasudM98,
author = {Shahid Masud and
John V. McCanny},
title = {Rapid Design of Discrete Orthonormal Wavelet Transforms},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {142},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676683},
doi = {10.1109/IWRSP.1998.676683},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MasudM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MaziarzJ98,
author = {Bogdan M. Maziarz and
Vijay K. Jain},
title = {Rapid Prototyping of Parallel Processing Systems on {TESH} Network},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {19--24},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676663},
doi = {10.1109/IWRSP.1998.676663},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MaziarzJ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MoronRS98,
author = {C{\'{e}}lio Estevan Mor{\'{o}}n and
Jos{\'{e}} R. P. Ribeiro and
Nilton C. da Silva},
title = {Towards a Rapid Prototyping by Linking Design, Implementation, and
Debugging in Real-Time Parallel Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {194},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676691},
doi = {10.1109/IWRSP.1998.676691},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MoronRS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PlantecR98,
author = {Alain Plantec and
Vincent Ribaud},
title = {The {STEP} Standard as an Approach for Design and Prototyping},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {89--94},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676674},
doi = {10.1109/IWRSP.1998.676674},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PlantecR98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PurnaB98,
author = {Karthikeya M. Gajjala Purna and
Dinesh Bhatia},
title = {Emulating Large Designs on Small Reconfigurable Hardware},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {58--63},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676669},
doi = {10.1109/IWRSP.1998.676669},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PurnaB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SchaumontVWVEB98,
author = {Patrick Schaumont and
Geert Vanmeerbeeck and
E. Watzeels and
Serge Vernalde and
Marc Engels and
Ivo Bolsens},
title = {A Technique for Combined Virtual Prototyping and Hardware Design},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {156--161},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676685},
doi = {10.1109/IWRSP.1998.676685},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SchaumontVWVEB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VandaeleRM98,
author = {Piet Vandaele and
Geert Rombouts and
Marc Moonen},
title = {Implementation of an {RTLS} Blind Equalization Algorithm on {DSP}},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {150--155},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676684},
doi = {10.1109/IWRSP.1998.676684},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VandaeleRM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VasilkoL98,
author = {Milan Vasilko and
D. Long},
title = {{RIFLE-62:} {A} Flexible Environment for Prototyping Dynamically Reconfigurable
Systems},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {130--135},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676681},
doi = {10.1109/IWRSP.1998.676681},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VasilkoL98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/VorosMBBPB98,
author = {Nikos S. Voros and
Evaggelinos P. Mariatos and
Michael K. Birbas and
Alexios N. Birbas and
Nikos Petrellis and
Spyrogiannis Batistatos},
title = {Reusable Architecture Templates and Automatic Specification Mapping
for the Efficient Implementation of {ATM} Protocols},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {45--50},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676667},
doi = {10.1109/IWRSP.1998.676667},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/VorosMBBPB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1998,
title = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://ieeexplore.ieee.org/xpl/conhome/5571/proceeding},
isbn = {0-8186-8479-8},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1998.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BorgattiCRFFG97,
author = {Michele Borgatti and
E. Cevenini and
Roberto Rambaldi and
Marco Felici and
Alberto Ferrari and
Roberto Guerrieri},
title = {Fast board-level prototyping of a speech recognition system using
virtual emulation},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {20--25},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618820},
doi = {10.1109/IWRSP.1997.618820},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BorgattiCRFFG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarchioloMM97,
author = {Vincenza Carchiolo and
Michele Malgeri and
Giuseppe Mangioni},
title = {An algorithm for direct synthesis of formal specifications},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {28--38},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618821},
doi = {10.1109/IWRSP.1997.618821},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarchioloMM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChaouatGVM97,
author = {L. Chaouat and
S. Garin and
Alain Vachoux and
Daniel Mlynek},
title = {Rapid prototyping of hardware systems via model reuse},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {150--156},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618891},
doi = {10.1109/IWRSP.1997.618891},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChaouatGVM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChoiH97,
author = {Chabong Choi and
Soonhoi Ha},
title = {Software synthesis for dynamic data flow graph},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {72--79},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618841},
doi = {10.1109/IWRSP.1997.618841},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChoiH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CosterLP97,
author = {Luc De Coster and
Rudy Lauwereins and
J. A. Peperstraete},
title = {Data routing in dataflow graphs},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {100--106},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618851},
doi = {10.1109/IWRSP.1997.618851},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CosterLP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FreundDIR97,
author = {Laurent Freund and
Denis Dupont and
Michel Isra{\"{e}}l and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {Overview of the {ECOS} project},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {39--43},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618822},
doi = {10.1109/IWRSP.1997.618822},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FreundDIR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Hilger97,
author = {James E. Hilger},
title = {A process infrastructure for architecture analysis and embedded processor
development to support a technology insertion process},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {142--149},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618890},
doi = {10.1109/IWRSP.1997.618890},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Hilger97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HinesB97,
author = {Ken Hines and
Gaetano Borriello},
title = {Selective focus as a means of improving geographically distributed
embedded system co-simulation},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {58--62},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618825},
doi = {10.1109/IWRSP.1997.618825},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HinesB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KerttulaSH97,
author = {Mikko Kerttula and
Marko Salmela and
Marko Heikkinen},
title = {Virtual reality prototyping-a framework for the development of electronics
and telecommunication products},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {2--11},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618812},
doi = {10.1109/IWRSP.1997.618812},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KerttulaSH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KirschbaumG97,
author = {Andreas Kirschbaum and
Manfred Glesner},
title = {Rapid prototyping of communication architectures},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {136--141},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618889},
doi = {10.1109/IWRSP.1997.618889},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KirschbaumG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KordonM97,
author = {Fabrice Kordon and
Jean{-}Luc Mounier},
title = {FrameKit and the prototyping of {CASE} environments},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {91--97},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618846},
doi = {10.1109/IWRSP.1997.618846},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KordonM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KumarW97,
author = {Avi Kumar and
Brian Waldecker},
title = {Use of queueing network and trace-driven simulation techniques in
PowerPC processor and system performance trade-off studies},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618887},
doi = {10.1109/IWRSP.1997.618887},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KumarW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeRG97,
author = {Thuyen Le and
Frank{-}Michael Renner and
Manfred Glesner},
title = {Hardware in-the-loop simulation-a rapid prototyping approach for designing
mechatronics systems},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {116--121},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618886},
doi = {10.1109/IWRSP.1997.618886},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LeRG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MacielBR97,
author = {Paulo Romero Martins Maciel and
Edna Barros and
Wolfgang Rosenstiel},
title = {Computing communication cost by Petri nets for hardware/software codesign},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {44--56},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618823},
doi = {10.1109/IWRSP.1997.618823},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MacielBR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MalikRPD97,
author = {Nadeem Malik and
Steven Roberts and
Alan Pita and
Ryan Dobson},
title = {Automaton: an autonomous coverage-based multiprocessor system verification
environment},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {168--172},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618893},
doi = {10.1109/IWRSP.1997.618893},
timestamp = {Sat, 13 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/MalikRPD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/McCarleyV97,
author = {K. McCarley and
Sarma B. K. Vrudhula},
title = {Macro-instruction generation for dynamic logic caching},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {63--69},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618827},
doi = {10.1109/IWRSP.1997.618827},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/McCarleyV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Pauer97,
author = {Eric K. Pauer},
title = {Multiprocessor system development for high performance signal processing
applications},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {107--114},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618853},
doi = {10.1109/IWRSP.1997.618853},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Pauer97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RothTJN97,
author = {Charles Roth and
Jon Tyler and
Paul Jagodik and
Huy Nguyen},
title = {Divide and conquer approach to functional verification of PowerPC
\({}^{\mbox{TM}}\) microprocessors},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618888},
doi = {10.1109/IWRSP.1997.618888},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RothTJN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Sedaghat-MamanB97,
author = {Reza Sedaghat{-}Maman and
Erich Barke},
title = {A new approach to fault emulation},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {173--179},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618894},
doi = {10.1109/IWRSP.1997.618894},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Sedaghat-MamanB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SuC97,
author = {Stanley Y. W. Su and
R. Chatterjee},
title = {KBMS-based evolutionary prototyping of software systems},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {80--90},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618843},
doi = {10.1109/IWRSP.1997.618843},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SuC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TsunV97,
author = {E. Tsun and
Sarma B. K. Vrudhula},
title = {Rapid prototyping of networks of asynchronous multiple functional
units},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {157--166},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618892},
doi = {10.1109/IWRSP.1997.618892},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TsunV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WeilerKR97,
author = {Christoph Weiler and
Arno Kunzmann and
Wolfgang Rosenstiel},
title = {Performance analysis for a Java-based virtual prototype},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {12--19},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618815},
doi = {10.1109/IWRSP.1997.618815},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WeilerKR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1997,
title = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://ieeexplore.ieee.org/xpl/conhome/4885/proceeding},
isbn = {0-8186-8064-4},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1997.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AdeLP96,
author = {Marleen Ad{\'{e}} and
Rudy Lauwereins and
J. A. Peperstraete},
title = {Implementing {DSP} applications on heterogeneous targets using minimal
size data buffers},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {166--172},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506801},
doi = {10.1109/IWRSP.1996.506801},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AdeLP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BorgattiRGG96,
author = {Michele Borgatti and
Roberto Rambaldi and
G. Gori and
Roberto Guerrieri},
title = {A smoothly upgradable approach to virtual emulation of {HW/SW} systems},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {83--89},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506732},
doi = {10.1109/IWRSP.1996.506732},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BorgattiRGG96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Brasen96,
author = {Daniel R. Brasen},
title = {{ASIC} Prototyping with Reprogrammable Implementations of Large ASICs},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {127--132},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506739},
doi = {10.1109/IWRSP.1996.506739},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Brasen96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CalhaTT96,
author = {Mario Calha and
Jo{\~{a}}o Paulo Teixeira and
Isabel C. Teixeira},
title = {{HW/SW} specification using {OOM} techniques},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {96--101},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506734},
doi = {10.1109/IWRSP.1996.506734},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CalhaTT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CardelliCGJLS96,
author = {Stefano Cardelli and
Massimiliano Chiodo and
Paolo Giusto and
Attila Jurecska and
Luciano Lavagno and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Rapid-Prototyping of Embedded Systems via Reprogrammable Devices},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {133--139},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506740},
doi = {10.1109/IWRSP.1996.506740},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CardelliCGJLS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarothersLH96,
author = {Jo Dale Carothers and
Donghui Li and
Tom Hameenanttila},
title = {{MCG:} a correct-by-design multichip module router with crosstalk
avoidance},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {183--188},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506804},
doi = {10.1109/IWRSP.1996.506804},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarothersLH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarroPS96,
author = {Luigi Carro and
C. Pereira and
Altamiro A. Suzim},
title = {Prototyping and reengineering of microcontroller-based systems},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {178--182},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506803},
doi = {10.1109/IWRSP.1996.506803},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarroPS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DeltosoJCS96,
author = {Christophe Deltoso and
C. Joanblanq and
M. Cand and
P. Senn},
title = {Fast prototyping based on generic and synthesizable {VHDL} models.
{A} case study: punctured Viterbi decoders},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {158--165},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506800},
doi = {10.1109/IWRSP.1996.506800},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DeltosoJCS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DiagneK96,
author = {Alioune Diagne and
Fabrice Kordon},
title = {A multi formalisms prototyping approach from formal description to
implementation of distributed systems},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {102--107},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506735},
doi = {10.1109/IWRSP.1996.506735},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DiagneK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FoulonF96,
author = {Michel Foulon and
Bernard Foucault},
title = {New design and prototyping methods are neede in missile electronics
industry},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {116--121},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506737},
doi = {10.1109/IWRSP.1996.506737},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FoulonF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HayashiMSYIFO96,
author = {Kazuhiro Hayashi and
Toshiaki Miyazaki and
Kazuhiro Shirakawa and
Kazuhisa Yamada and
Takaki Ichimori and
Ken{-}nosuke Fukami and
Naohisa Ohta},
title = {A novel approach to real-time verification of transport system design
using {FPGA} based emulator},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {5--10},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506719},
doi = {10.1109/IWRSP.1996.506719},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HayashiMSYIFO96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IshikawaH96,
author = {Keiji Ishikawa and
Tamio Hoshino},
title = {Rapid protocol prototyping from message sequence chart based specification},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {61--65},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506728},
doi = {10.1109/IWRSP.1996.506728},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IshikawaH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KeereSV96,
author = {V. Vande Keere and
Bart Staelens and
Jan Vandewege},
title = {Rapid Prototyping of a {CATV} Network Termination for ATM-based Video-on-demand
Services},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {44--49},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506725},
doi = {10.1109/IWRSP.1996.506725},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KeereSV96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KimKSC96,
author = {Kyuseok Kim and
Yongjoo Kim and
Youngsoo Shin and
Kiyoung Choi},
title = {An integrated hardware-software cosimulation environment with automated
interface generation},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {66--71},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506729},
doi = {10.1109/IWRSP.1996.506729},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KimKSC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KirschbaumRWG96,
author = {Andreas Kirschbaum and
Frank{-}Michael Renner and
Alexander Wilmes and
Manfred Glesner},
title = {Rapid-Prototyping of a CAN-Bus Controller: {A} Case Study},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {146--151},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506742},
doi = {10.1109/IWRSP.1996.506742},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KirschbaumRWG96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Klein96,
author = {Russ Klein},
title = {Miami: a hardware software co-simulation environment},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {173--177},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506802},
doi = {10.1109/IWRSP.1996.506802},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Klein96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KnudsenM96,
author = {Peter Voigt Knudsen and
Jan Madsen},
title = {Aspects of system modelling in Hardware/Software partitioning},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {18--23},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506721},
doi = {10.1109/IWRSP.1996.506721},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KnudsenM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MacielB96,
author = {Paulo Romero Martins Maciel and
Edna Barros},
title = {Capturing Time Constraints by Using Petri-nets in the Context of Hardware/Software
Codesign},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {36--43},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506724},
doi = {10.1109/IWRSP.1996.506724},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MacielB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MariatosBBP96,
author = {Evaggelinos P. Mariatos and
Michael K. Birbas and
Alexios N. Birbas and
Nikos Petrellis},
title = {Object oriented prototyping at the system level: an image reconstruction
application example},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {90--95},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506733},
doi = {10.1109/IWRSP.1996.506733},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MariatosBBP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MartinO96,
author = {S. Martin and
Vincent Olive},
title = {Embedded test environment},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {50--54},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506726},
doi = {10.1109/IWRSP.1996.506726},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MartinO96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MatsumuraYYI96,
author = {Tsuneo Matsumura and
Naoaki Yamanaka and
Ryoichi Yamaguchi and
Keiji Ishikawa},
title = {Real-time Emulation Method for {ATM} Switching Systems in Broadband
{ISDN}},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {55--60},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506727},
doi = {10.1109/IWRSP.1996.506727},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MatsumuraYYI96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MetafasKB96,
author = {Dimitris Metafas and
H. C. Karathanasis and
Spyros Blionas},
title = {Industrial approach in design methodologies for mobile communications
systems},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {122--126},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506738},
doi = {10.1109/IWRSP.1996.506738},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MetafasKB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MosanyaPGRLS96,
author = {Emeka Mosanya and
Jean{-}Yves Perrier and
Maxime Goeke and
Flavio Rampogna and
Julien Linder and
Eduardo Sanchez},
title = {A platform for co-design and co-synthesis based on {FPGA}},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {11--17},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506720},
doi = {10.1109/IWRSP.1996.506720},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MosanyaPGRLS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NguyenT96,
author = {Huy Nam Nguyen and
Michel Thill},
title = {Design Verification based on Hardware Emulation},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {2--4},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506718},
doi = {10.1109/IWRSP.1996.506718},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NguyenT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OBrienM96,
author = {Kevin O'Brien and
Serge Maginot},
title = {Fast prototyping of memory models in {VHDL} for hardware emulation},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {108--115},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506736},
doi = {10.1109/IWRSP.1996.506736},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OBrienM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OberH96,
author = {Ulrike Ober and
Hans{-}J{\"{u}}rgen Herpel},
title = {Hierarchical Partitioning in a Rapid Prototyping Environment},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {30--35},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506723},
doi = {10.1109/IWRSP.1996.506723},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OberH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PetrellisBBMP96,
author = {Nikos Petrellis and
Alexios N. Birbas and
Michael K. Birbas and
Evaggelinos P. Mariatos and
George D. Papadopoulos},
title = {Simulating hardware, software and electromechanical parts using communicating
simulators},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {78--82},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506731},
doi = {10.1109/IWRSP.1996.506731},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PetrellisBBMP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RamanadinP96,
author = {Bernard Ramanadin and
Fran{\c{c}}ois Pogodalla},
title = {{CO:} the Chameleon 64-bit microprocessor {ASIC} prototype},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {140--145},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506741},
doi = {10.1109/IWRSP.1996.506741},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RamanadinP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ValderramaNPJ96,
author = {Carlos A. Valderrama and
Fran{\c{c}}ois Na{\c{c}}abal and
Pierre G. Paulin and
Ahmed Amine Jerraya},
title = {Automatic generation of interfaces for distributed {C-VHDL} cosimulation
of embedded systems: an industrial experience},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {72--77},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506730},
doi = {10.1109/IWRSP.1996.506730},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ValderramaNPJ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WinterBTM96,
author = {A. Winter and
D. Bittruf and
Yankin Tanurhan and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {Rapid prototyping of a communication controller for the {CAN} bus},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {152--157},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506743},
doi = {10.1109/IWRSP.1996.506743},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WinterBTM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/XiongGR96,
author = {Xun Xiong and
Peter Gutberlet and
Wolfgang Rosenstiel},
title = {Automatic generation of interprocess communication in the {PARAGON}
system},
booktitle = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
pages = {24--29},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IWRSP.1996.506722},
doi = {10.1109/IWRSP.1996.506722},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/XiongGR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1996,
title = {Seventh {IEEE} International Workshop on Rapid System Prototyping
{(RSP} '96), Thessaloniki, Greece, June 19-21, 1996},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://ieeexplore.ieee.org/xpl/conhome/3756/proceeding},
isbn = {0-8186-7603-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1996.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AdeLP95,
author = {Marleen Ad{\'{e}} and
Rudy Lauwereins and
J. A. Peperstraete},
title = {Hardware-software codesign with {GRAPE}},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {40--47},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518569},
doi = {10.1109/IWRSP.1995.518569},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AdeLP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AntonakopoulosAM95,
author = {Theodore Antonakopoulos and
K. Agavanakis and
Vassilios Makios},
title = {{CASE} tools evaluation: an automatic process based on fuzzy sets
theory},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {140--146},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518583},
doi = {10.1109/IWRSP.1995.518583},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AntonakopoulosAM95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BabcockD95,
author = {J. D. Sterling Babcock and
Apostolos Dollas},
title = {A case study of system synthesis with non-synthesizable components
using extended {VHDL}},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {168--173},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518587},
doi = {10.1109/IWRSP.1995.518587},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BabcockD95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Benders95,
author = {L. P. M. Benders},
title = {Analysis of real-time embedded systems for co-design},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {26--32},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518567},
doi = {10.1109/IWRSP.1995.518567},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Benders95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BennerEKSS95,
author = {Thomas Benner and
Rolf Ernst and
Ingo K{\"{o}}nenkamp and
P. Sch{\"{u}}ler and
H.{-}C. Schaub},
title = {A prototyping system for verification and evaluation in hardware-software
cosynthesis},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {54--61},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518571},
doi = {10.1109/IWRSP.1995.518571},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BennerEKSS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BhattacharyyaML95,
author = {Shuvra S. Bhattacharyya and
Praveen K. Murthy and
Edward A. Lee},
title = {Converting graphical {DSP} programs into memory constrained software
prototypes},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {194--200},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518591},
doi = {10.1109/IWRSP.1995.518591},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BhattacharyyaML95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChauKMHS95,
author = {Chak{-}Wai Chau and
Sam Kwong and
Kim{-}Fung Man and
Wolfgang A. Halang and
Alexander D. Stoyen},
title = {Development of a real-time motion image encoder using codesign methodology},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {110--117},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518579},
doi = {10.1109/IWRSP.1995.518579},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChauKMHS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FinkS95,
author = {Stefan Fink and
Eduardo Sanchez},
title = {Development and prototyping system far an 8-bit multitask micropower
processor},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {75--78},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518574},
doi = {10.1109/IWRSP.1995.518574},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FinkS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GrundJ95,
author = {Matthew Grund and
Mark Johnson},
title = {The {AMS} Operating System: a prototyping environment for real-time
signal processing algorithm development},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {182--186},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518589},
doi = {10.1109/IWRSP.1995.518589},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GrundJ95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HedbergJEJ95,
author = {Anders Hedberg and
Hans Jacobson and
Mats Einarsson and
Glenn Jennings},
title = {Imposing a unified design methodology on independent rapid prototyping
tools},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {217--222},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518594},
doi = {10.1109/IWRSP.1995.518594},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HedbergJEJ95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HeroldFWE95,
author = {David Herold and
Paul D. Fiore and
Eric Will and
Geoffrey Edelson},
title = {The application of rapid prototyping to underwater acoustic modem
research and development},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {68--74},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518573},
doi = {10.1109/IWRSP.1995.518573},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HeroldFWE95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HerpelGESGJ95,
author = {Hans{-}J{\"{u}}rgen Herpel and
Manfred Glesner and
Horst Eggert and
Wolfgang S{\"{u}}{\ss} and
Martina Gorges{-}Schleuter and
Wilfried Jakob},
title = {Rapid prototyping in microsystems development},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {48--53},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518570},
doi = {10.1109/IWRSP.1995.518570},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HerpelGESGJ95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JirachiefpattanaL95,
author = {Ajin Jirachiefpattana and
Richard Lai},
title = {A rapid protocol prototyping development system},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {118--124},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518580},
doi = {10.1109/IWRSP.1995.518580},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JirachiefpattanaL95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KalavadeL95,
author = {Asawaree Kalavade and
Edward A. Lee},
title = {The extended partitioning problem: hardware/software mapping and implementation-bin
selection},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {12--18},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518565},
doi = {10.1109/IWRSP.1995.518565},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KalavadeL95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KhanS95,
author = {Mohammad S. Khan and
Earl E. Swartzlander Jr.},
title = {Rapid prototyping fault-tolerant heterogeneous digital signal processing
systems},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {187--193},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518590},
doi = {10.1109/IWRSP.1995.518590},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KhanS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Kimmond95,
author = {R. M. Kimmond},
title = {Survey into the acceptance of prototyping in software development},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {147--153},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518584},
doi = {10.1109/IWRSP.1995.518584},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Kimmond95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KordonK95,
author = {Fabrice Kordon and
William El Kaim},
title = {{H-COSTAM:} a hierarchical communicating state-machine model for generic
prototyping},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {131--139},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518582},
doi = {10.1109/IWRSP.1995.518582},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KordonK95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KraljicQZ95,
author = {Ivan C. Kraljic and
Georges Qu{\'{e}}not and
Bertrand Y. Zavidovique},
title = {A methodology for rapid prototyping of real-time image processing
{VLSI} systems},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {97--103},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518577},
doi = {10.1109/IWRSP.1995.518577},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KraljicQZ95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KwiatDH95,
author = {Kevin A. Kwiat and
Warren H. Debany Jr. and
Salim Hariri},
title = {Modeling a versatile {FPGA} for prototyping adaptive systems},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {174--181},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518588},
doi = {10.1109/IWRSP.1995.518588},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KwiatDH95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MankuKK95,
author = {Gurmeet Singh Manku and
Anshul Kumar and
Shashi Kumar},
title = {Circuit partitioning with partial order for mixed simulation emulation
environment},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {201--209},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518592},
doi = {10.1109/IWRSP.1995.518592},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MankuKK95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Middelhoek95,
author = {Peter F. A. Middelhoek},
title = {Arbitrary hardware software trade-offs},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {19--25},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518566},
doi = {10.1109/IWRSP.1995.518566},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Middelhoek95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MohantyW95,
author = {Sidharta Mohanty and
Philip A. Wilsey},
title = {Rapid system prototyping, system modeling, and analysis in a hardware-software
codesign environment},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {154--160},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518585},
doi = {10.1109/IWRSP.1995.518585},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MohantyW95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NguyenGD95,
author = {Huy Nam Nguyen and
Yvon Gressus and
Michel D'Hoe},
title = {Application of synthesis to support hardware emulation},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {223--225},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518595},
doi = {10.1109/IWRSP.1995.518595},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NguyenGD95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/NoteLG95,
author = {Stefaan Note and
Piet van Lierop and
Johan Van Ginderdeuren},
title = {Rapid prototyping of {DSP} systems: requirements and solutions},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {88--96},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518576},
doi = {10.1109/IWRSP.1995.518576},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/NoteLG95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OlcozEB95,
author = {Seraf{\'{\i}}n Olcoz and
Luis Entrena and
Luis Berrojo},
title = {{VHDL} virtual prototyping},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {161--167},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518586},
doi = {10.1109/IWRSP.1995.518586},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OlcozEB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Pevtschin95,
author = {V. Pevtschin},
title = {The Open Microprocessor Systems Initiative: a strategy towards integrated
system design},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {2--11},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518564},
doi = {10.1109/IWRSP.1995.518564},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Pevtschin95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RasmontKSC95,
author = {O. Rasmont and
J. Koulischer and
Jan Schaumont and
R. Crappe},
title = {Testing and optimizing a scale reduction algorithm for a multi-screen
video wall application on the {META-100} {ASIC} emulator},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {104--109},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518578},
doi = {10.1109/IWRSP.1995.518578},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RasmontKSC95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RomdhaniJCSJ95,
author = {Mohamed Romdhani and
Alain Jeffroy and
Pierre de Chazelles and
Abd{-}El{-}Kader Sahraoui and
Ahmed Amine Jerraya},
title = {Modeling and rapid prototyping of avionics using {STATEMATE}},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {62--67},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518572},
doi = {10.1109/IWRSP.1995.518572},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RomdhaniJCSJ95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Rosenstiel95,
author = {Wolfgang Rosenstiel},
title = {System Validation by Source Level Emulation of Behavioral {VHDL} Specifications},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {210--216},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518593},
doi = {10.1109/IWRSP.1995.518593},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Rosenstiel95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RousseauBBI95,
author = {Fr{\'{e}}d{\'{e}}ric Rousseau and
Judith Benzakki and
J. M. Berg{\'{e}} and
Michel Isra{\"{e}}l},
title = {Adaptation of force-directed scheduling algorithm for hardware/software
partitioning},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {33--39},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518568},
doi = {10.1109/IWRSP.1995.518568},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RousseauBBI95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Rundquist95,
author = {Eric A. Rundquist Jr.},
title = {Virtual prototyping of a synthetic aperture radar processor and {RASSP}
benchmark 1},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {79--87},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518575},
doi = {10.1109/IWRSP.1995.518575},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Rundquist95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SidoranBMSB95,
author = {James L. Sidoran and
Carla L. Burns and
S. Maethner and
D. Spencer and
H. Bond},
title = {A case study on rapid systems prototyping and its impact on system
evolution},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {125--130},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518581},
doi = {10.1109/IWRSP.1995.518581},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SidoranBMSB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SimoesB95,
author = {Eduardo do Valle Sim{\~{o}}es and
Dante Augusto Couto Barone},
title = {A 145 MHz user-programmable gate array},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {226--232},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518596},
doi = {10.1109/IWRSP.1995.518596},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SimoesB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1995,
title = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://ieeexplore.ieee.org/xpl/conhome/3959/proceeding},
isbn = {0-8186-7100-9},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1995.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AdeLP94,
author = {Marleen Ad{\'{e}} and
Rudy Lauwereins and
J. A. Peperstraete},
title = {Buffer memory requirements in {DSP} applications},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {108--123},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315904},
doi = {10.1109/IWRSP.1994.315904},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AdeLP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AndrewsWWK94,
author = {David L. Andrews and
Andrew Wheeler and
Barry Wealand and
Cliff Kancler},
title = {Rapid prototype of an {SIMD} processor array (using FPGA's)},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {28--33},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315912},
doi = {10.1109/IWRSP.1994.315912},
timestamp = {Fri, 12 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/AndrewsWWK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AttouiS94,
author = {Ammar Attoui and
Michel Schneider},
title = {A formal approach based on the rewriting logic for prototyping distributed
information systems},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {184--19},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315894},
doi = {10.1109/IWRSP.1994.315894},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AttouiS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AzevedoAJ94,
author = {Glaucia D. F. Azevedo and
Helio Azevedo and
M{\'{a}}rio Jino},
title = {ProTR: a tool for real-time systems development},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {42--51},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315910},
doi = {10.1109/IWRSP.1994.315910},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AzevedoAJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BabcockD94,
author = {John Daniel Sterling Babcock and
Apostolos Dollas},
title = {Extended {VHDL} for the rapid prototyping of systems with synthesizable
and nonsynthesizable subsystems},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {146--152},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315900},
doi = {10.1109/IWRSP.1994.315900},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BabcockD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BrunelAHBR94,
author = {Jean{-}Yves Brunel and
Ivan Aug{\'{e}} and
Marc Hervieu and
Philippe Bourquin and
Philippe Renaud},
title = {Quantitative design of a scalable microsystem using {ALMA:} the example
of the dictionary machine},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {162--165},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315897},
doi = {10.1109/IWRSP.1994.315897},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BrunelAHBR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CarroS94,
author = {Luigi Carro and
Altamiro A. Suzim},
title = {Algorithms and architectures to computational systems implementation},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {196--204},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315893},
doi = {10.1109/IWRSP.1994.315893},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CarroS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Courtoy94,
author = {Michel Courtoy},
title = {Project Spinnaker: a new generation of rapid prototyping system},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {141--144},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315901},
doi = {10.1109/IWRSP.1994.315901},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Courtoy94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CrossE94,
author = {Stephen E. Cross and
Richard Estrada},
title = {{DART:} an example of accelerated evolutionary development},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {177--183},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315895},
doi = {10.1109/IWRSP.1994.315895},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CrossE94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DolevSW94,
author = {Danny Dolev and
Ray Strong and
Ed Wimmers},
title = {Experience with {RAPID} prototypes},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {62--72},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315908},
doi = {10.1109/IWRSP.1994.315908},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DolevSW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/EngelsM94,
author = {Marc Engels and
Teresa H. Meng},
title = {Rapid prototyping of a real-time video encoder},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {8--15},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315914},
doi = {10.1109/IWRSP.1994.315914},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/EngelsM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Fisher94,
author = {Gary E. Fisher},
title = {Rapid system prototyping in an open system environment},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {213--219},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315891},
doi = {10.1109/IWRSP.1994.315891},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Fisher94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IsmailAOJ94,
author = {Tarek Ben Ismail and
Mohamed Abid and
Kevin O'Brien and
Ahmed Amine Jerraya},
title = {An approach for hardware-software codesign},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {73--80},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315907},
doi = {10.1109/IWRSP.1994.315907},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IsmailAOJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KaimK94,
author = {William El Kaim and
Fabrice Kordon},
title = {An integrated framework for rapid system prototyping and automatic
code distribution},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {52--61},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315909},
doi = {10.1109/IWRSP.1994.315909},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KaimK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KissionDJ94,
author = {Polen Kission and
Hong Ding and
Ahmed Amine Jerraya},
title = {Accelerating the design process by using architectural synthesis},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {205--212},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315892},
doi = {10.1109/IWRSP.1994.315892},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KissionDJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LauwereinsWAP94,
author = {Rudy Lauwereins and
Piet Wauters and
Marleen Ad{\'{e}} and
J. A. Peperstraete},
title = {Geometric parallelism and cyclo-static data flow in {GRAPE-II}},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {90--107},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315905},
doi = {10.1109/IWRSP.1994.315905},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LauwereinsWAP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LavenierM94,
author = {Dominique Lavenier and
Roderick McConnell},
title = {From behavioral to {RTL} models: an approach},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {153--161},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315898},
doi = {10.1109/IWRSP.1994.315898},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LavenierM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LoCC94,
author = {W. Y. Lo and
Chiu{-}sing Choy and
Cheong{-}Fat Chan},
title = {Hardware emulation board based on FPGAs and programmable interconnections},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {126--130},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315903},
doi = {10.1109/IWRSP.1994.315903},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LoCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MariatosBB94,
author = {Evaggelinos P. Mariatos and
Michael K. Birbas and
Alexios N. Birbas},
title = {A reconfigurable {DSP} board based on {CORDIC} elements},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {22--25},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315899},
doi = {10.1109/IWRSP.1994.315899},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MariatosBB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MissikoffT94,
author = {Michele Missikoff and
Marco Toiati},
title = {Safe rapid prototyping of object-oriented database applications},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {168--176},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315896},
doi = {10.1109/IWRSP.1994.315896},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MissikoffT94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MyersFL94,
author = {Cory S. Myers and
Paul D. Fiore and
J. P. Letellier},
title = {Rapid development of signal processors and the {RASSP} program},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {82--89},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315906},
doi = {10.1109/IWRSP.1994.315906},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MyersFL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PapadopoulosMAM94,
author = {C. Papadopoulos and
Alex Maniatopoulos and
Theodore Antonakopoulos and
Vassilios Makios},
title = {A real-time test-bed for prototyping cell-based communication networks},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {34--39},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315911},
doi = {10.1109/IWRSP.1994.315911},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PapadopoulosMAM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Richards94,
author = {Mark A. Richards},
title = {The Rapid Prototyping of Application Specific Signal Processors {(RASSP)}
program: overview and status},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315915},
doi = {10.1109/IWRSP.1994.315915},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Richards94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SahaK94,
author = {Arindam Saha and
Rangasayee Krishnamurthy},
title = {Some design issues in multi-chip {FPGA} implementation of {DSP} algorithms},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {131--140},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315902},
doi = {10.1109/IWRSP.1994.315902},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SahaK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/WielerZM94,
author = {Richard W. Wieler and
Zaifu Zhang and
Robert D. McLeod},
title = {Using an {FPGA} based computer as a hardware emulator for built-in
self-test structures},
booktitle = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
pages = {16--21},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/IWRSP.1994.315913},
doi = {10.1109/IWRSP.1994.315913},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/WielerZM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1994,
title = {Proceedings of {IEEE} 5th International Workshop on Rapid System Prototyping,
{RSP} 1994, Grenoble, France, June 20-23, 1994},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://ieeexplore.ieee.org/xpl/conhome/984/proceeding},
isbn = {0-8186-5885-1},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1994.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AirstN93,
author = {Malcolm J. Airst and
Eric J. Norgren},
title = {Rapid prototyping using the VMEbus in an open systems architecture
real-time environment},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {89--99},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263192},
doi = {10.1109/IWRSP.1993.263192},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AirstN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AsurH93,
author = {Sujai Asur and
Steve Hufnagel},
title = {Taxonomy of rapid-prototyping methods and tools},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {42--56},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263196},
doi = {10.1109/IWRSP.1993.263196},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AsurH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BilsenELP93,
author = {Greet Bilsen and
Marc Engels and
Rudy Lauwereins and
Jean A. Peperstraete},
title = {Development of a load balancing tool for the {GRAPE} rapid prototyping
environment},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {2--16},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263199},
doi = {10.1109/IWRSP.1993.263199},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BilsenELP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BoutKT93,
author = {David E. van den Bout and
Opher Kahn and
Douglas Thomae},
title = {The 1993 AnyBoard rapid-prototyping environment},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {31--40},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263197},
doi = {10.1109/IWRSP.1993.263197},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BoutKT93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Burns93,
author = {Carla L. Burns},
title = {REE-a requirements engineering environment for analyzing and validating
software and system requirements},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {188--193},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263183},
doi = {10.1109/IWRSP.1993.263183},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Burns93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CaertsLP93,
author = {Chris Caerts and
Rudy Lauwereins and
Jean A. Peperstraete},
title = {{PDG:} a process-level debugger for concurrent programs in the {GRAPE}
rapid prototyping environment},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {17--30},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263198},
doi = {10.1109/IWRSP.1993.263198},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CaertsLP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DehkhodaC93,
author = {Abbas Dehkhoda and
Doris L. Carver},
title = {Prototyping distributed systems using an object-oriented specification
language},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {236--245},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263178},
doi = {10.1109/IWRSP.1993.263178},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DehkhodaC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DidicMAB93,
author = {Milena M. Didic and
Wojciech Molisz and
Theodore Arabatzis and
Nick Blackwell},
title = {A reusable rapid prototyping environment for monitoring in a discrete
part manufacturing and semi process industry},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {80--88},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263193},
doi = {10.1109/IWRSP.1993.263193},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DidicMAB93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Fleurkens93,
author = {Hans Fleurkens},
title = {Interactive system design in {ESCAPE}},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {108--113},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263190},
doi = {10.1109/IWRSP.1993.263190},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Fleurkens93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GassenC93,
author = {David W. Gassen and
Jo Dale Carothers},
title = {Development of neural network tools for rapid computer system design},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {210--223},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263180},
doi = {10.1109/IWRSP.1993.263180},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GassenC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KhanS93,
author = {Mohammad S. Khan and
Earl E. Swartzlander Jr.},
title = {Design and implementation of an interface control unit for rapid prototyping},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {141--148},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263186},
doi = {10.1109/IWRSP.1993.263186},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KhanS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Kordon93,
author = {Fabrice Kordon},
title = {A generic prototype model for distributed systems based on high level
object oriented specification},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {194--204},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263182},
doi = {10.1109/IWRSP.1993.263182},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Kordon93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LeeMHHW93,
author = {Rex Lee and
Wilfrido Moreno and
Orlando Hernandez and
Ed Harrold and
Denny Whittaker},
title = {Rapid prototyping using laser restructurable {VLSI} circuits},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {134--140},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263187},
doi = {10.1109/IWRSP.1993.263187},
timestamp = {Tue, 16 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/LeeMHHW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LombardiDZ93,
author = {Marc Lombardi and
S. Digonnet and
F. Zago},
title = {A constrained prototyping tool: RSP{\_}W},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {114--119},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263189},
doi = {10.1109/IWRSP.1993.263189},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LombardiDZ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LuqiSB93,
author = {Luqi and
M. Shing and
J. Brockett},
title = {Real-time scheduling for software prototyping},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {150--163},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263185},
doi = {10.1109/IWRSP.1993.263185},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LuqiSB93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Mulcare93,
author = {Dennis B. Mulcare},
title = {Stochastic statecharts and rapid prototype software architecture},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {68--77},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263194},
doi = {10.1109/IWRSP.1993.263194},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Mulcare93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OreskyH93,
author = {Darrell F. Oresky and
Christine Haapala},
title = {Verification and validation in an iterative software development environment},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {57--67},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263195},
doi = {10.1109/IWRSP.1993.263195},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OreskyH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Reston93,
author = {M. Reston},
title = {Mathematical foundation for the design of testing systems},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {224--235},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263179},
doi = {10.1109/IWRSP.1993.263179},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Reston93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RyanT93,
author = {Christopher A. Ryan and
Joseph G. Tront},
title = {Parallel switch level fault simulation algorithm/complexity verification
using compiled code {VHDL}},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {100--105},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263191},
doi = {10.1109/IWRSP.1993.263191},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RyanT93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Sidoran93,
author = {James L. Sidoran},
title = {Advanced requirements engineering workstation},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {205--208},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263181},
doi = {10.1109/IWRSP.1993.263181},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Sidoran93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/StephensB93,
author = {Mark Stephens and
Peter Bates},
title = {Controlling prototyping and evolutionary development},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {164--185},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263184},
doi = {10.1109/IWRSP.1993.263184},
timestamp = {Fri, 08 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/StephensB93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TanirAB93,
author = {Oryal Tanir and
Vinod K. Agarwal and
P. C. P. Bhatt},
title = {The design of a library support system for a telecommunication system
synthesis environment},
booktitle = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
pages = {120--131},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IWRSP.1993.263188},
doi = {10.1109/IWRSP.1993.263188},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TanirAB93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1993,
title = {Proceedings of the Fourth International Workshop on Rapid System Prototyping,
{RSP} 1993, Research Triangle Park, North Carolina, USA, June 28-30,
1993},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://ieeexplore.ieee.org/xpl/conhome/473/proceeding},
isbn = {0-8186-4300-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1993.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AkellaDS92,
author = {Janaki Akella and
Allen H. Dutoit and
Daniel P. Siewiorek},
title = {Concurrent engineering: a prototyping case study},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {138--160},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243911},
doi = {10.1109/IWRSP.1992.243911},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AkellaDS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Beetem92,
author = {John F. Beetem},
title = {Visualizing optimization algorithms via rapid prototyping of graphical
user interfaces},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {280--291},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243900},
doi = {10.1109/IWRSP.1992.243900},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Beetem92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BreidegardA92,
author = {Bj{\"{o}}rn Breidegard and
Per Andersson},
title = {BBDS-a design tool for architectural evaluation and rapid prototyping
of performance critical digital systems},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {19--23},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243920},
doi = {10.1109/IWRSP.1992.243920},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BreidegardA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BucciV92,
author = {Giacomo Bucci and
Enrico Vicario},
title = {Rapid prototyping through communicating Petri nets},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {58--75},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243916},
doi = {10.1109/IWRSP.1992.243916},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BucciV92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BuchsFR92,
author = {Didier Buchs and
Jacques Flumet and
Pascal Racloz},
title = {Producing prototypes from {CO-OPN} specifications},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {77--93},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243915},
doi = {10.1109/IWRSP.1992.243915},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BuchsFR92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ChenT92,
author = {Yuan{-}Tsong Chen and
Murat M. Tanik},
title = {An axiomatic approach of software functionality measure},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {181--187},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243908},
doi = {10.1109/IWRSP.1992.243908},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ChenT92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ConteH92,
author = {Thomas M. Conte and
Wen{-}mei W. Hwu},
title = {Systematic prototyping of superscalar computer architectures},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {161--170},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243910},
doi = {10.1109/IWRSP.1992.243910},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ConteH92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Didic92,
author = {Milena M. Didic},
title = {Rapid prototyping for {MAP/MMS} based {CIM-OSA} environments},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {221--233},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243904},
doi = {10.1109/IWRSP.1992.243904},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Didic92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DoberkatHFLGP92,
author = {Ernst{-}Erich Doberkat and
Wilhelm Hasselbring and
Wolfgang Franke and
Ulrich Lammers and
Ulrich Gutenbeil and
Claus Pahl},
title = {ProSet-a language for prototyping with sets},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {235--248},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243903},
doi = {10.1109/IWRSP.1992.243903},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/DoberkatHFLGP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DollasC92,
author = {Apostolos Dollas and
Scott L. Crutchfield},
title = {An evaluation of the Teamwork {CASE} environment for specifications
capture of hardware systems},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {38--48},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243918},
doi = {10.1109/IWRSP.1992.243918},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DollasC92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FaginC92,
author = {Barry S. Fagin and
Pichet Chintrakulchai},
title = {Prototyping the {DLX} microprocessor},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {127--137},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243912},
doi = {10.1109/IWRSP.1992.243912},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FaginC92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/IntratorR92,
author = {Yoav Intrator and
Shmuel Rotenstreich},
title = {Rapid prototyping with the {OR} model},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {212--220},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243905},
doi = {10.1109/IWRSP.1992.243905},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/IntratorR92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KhwajaU92,
author = {Amir A. Khwaja and
Joseph E. Urban},
title = {Adaptation and modification of Nassi-Shneiderman charts to represent
Descartes specifications visually},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {188--201},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243907},
doi = {10.1109/IWRSP.1992.243907},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KhwajaU92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LauwereinsEP92,
author = {Rudy Lauwereins and
Marc Engels and
J. A. Peperstraete},
title = {{GRAPE-II:} a tool for the rapid prototyping of multi-rate asynchronous
{DSP} applications on heterogeneous multiprocessors},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {24--37},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243919},
doi = {10.1109/IWRSP.1992.243919},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LauwereinsEP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Lindsey92,
author = {Michael K. Lindsey},
title = {Automatic test procedure generation from system specifications},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {301--310},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243898},
doi = {10.1109/IWRSP.1992.243898},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Lindsey92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Luqi92,
author = {Luqi},
title = {Computer aided system prototyping},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {50--57},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243917},
doi = {10.1109/IWRSP.1992.243917},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Luqi92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MacDonaldSWA92,
author = {Richard MacDonald and
Sanjay Srinivasan and
Ronald D. Williams and
James H. Aylor},
title = {A novel VHDL-based computer architecture design methodology},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {292--300},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243899},
doi = {10.1109/IWRSP.1992.243899},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MacDonaldSWA92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Mulcare92,
author = {Dennis B. Mulcare},
title = {Higher-level statecharts for prototyping architectural dynamics},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {203--211},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243906},
doi = {10.1109/IWRSP.1992.243906},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Mulcare92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SheaRD92,
author = {John G. Shea and
Rammohan K. Ragade and
Jeffrey W. Dunn},
title = {Rapid prototyping using object-oriented modeling and testbed simulation
for complex real-time systems},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {255--278},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243901},
doi = {10.1109/IWRSP.1992.243901},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SheaRD92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SrinivasanSWJ92,
author = {Sanjay Srinivasan and
Ambar Sarkar and
Ronald Waxman and
Barry Johnson},
title = {Integrating operational specification and performance modeling},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {249--254},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243902},
doi = {10.1109/IWRSP.1992.243902},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SrinivasanSWJ92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SuhTF92,
author = {Sang C. Suh and
Murat M. Tanik and
Dennis J. Frailey},
title = {Requirements specification for a real-time embedded expert system
for rapid prototyping},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {172--180},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243909},
doi = {10.1109/IWRSP.1992.243909},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SuhTF92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/TanirAB92,
author = {Oryal Tanir and
Vinod K. Agarwal and
P. C. P. Bhatt},
title = {A system level synthesis framework for computer architectures},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {94--111},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243914},
doi = {10.1109/IWRSP.1992.243914},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/TanirAB92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/White92,
author = {Stephanie M. White},
title = {A pragmatic formal method {(PFM)} for computer system definition and
execution},
booktitle = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
pages = {112--125},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IWRSP.1992.243913},
doi = {10.1109/IWRSP.1992.243913},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/White92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1992,
title = {Proceedings of the Third International Workshop on Rapid System Prototyping,
{RSP} 1992, Research Triangle Park, North Carolina, USA, June 23-15,
1992},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://ieeexplore.ieee.org/xpl/conhome/455/proceeding},
isbn = {0-8186-3520-7},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1992.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AlfordS91,
author = {Mack W. Alford and
Joseph Skipper},
title = {Application of requirements driven development to manufacturing system
design},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {177--178},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218613},
doi = {10.1109/IWRSP.1991.218613},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AlfordS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ArcherBFL91,
author = {Myla Archer and
James Bock and
Deborah A. Frincke and
Karl N. Levitt},
title = {Effectiveness of operating system prototyping from a template: application
to {MINIX}},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {55--66},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218623},
doi = {10.1109/IWRSP.1991.218623},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ArcherBFL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BarbacciL91,
author = {Mario Barbacci and
Randall W. Lichota},
title = {Durra: an integrated approach to software specification, modeling
and rapid prototyping},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {67--81},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218622},
doi = {10.1109/IWRSP.1991.218622},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BarbacciL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Beetem91,
author = {John F. Beetem},
title = {Rapid implementation of hierarchical integrated simulators using Galaxy},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {181--199},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218611},
doi = {10.1109/IWRSP.1991.218611},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Beetem91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BrunelART91,
author = {Jean{-}Yves Brunel and
Ivan Aug{\'{e}} and
Xavier Redon and
Philippe Tychon},
title = {System prototyping with {ALMA}},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {103--109},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218619},
doi = {10.1109/IWRSP.1991.218619},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BrunelART91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Burns91,
author = {Carla L. Burns},
title = {Parallel Proto-a prototyping tool for analyzing and validating sequential
and parallel processing software requirements},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {151--160},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218615},
doi = {10.1109/IWRSP.1991.218615},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Burns91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Cyre91,
author = {Walling R. Cyre},
title = {Integrating specification requirements for automated interpretation},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {161--173},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218614},
doi = {10.1109/IWRSP.1991.218614},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Cyre91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DebanyGMKDD91,
author = {Warren H. Debany Jr. and
Mark Gorniak and
Anthony R. Macera and
Kevin A. Kwiat and
Heather B. Dussault and
Daniel Daskiewich},
title = {Design verification using logic tests},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {17--24},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218627},
doi = {10.1109/IWRSP.1991.218627},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DebanyGMKDD91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Dollas91,
author = {Apostolos Dollas},
title = {Experimental results in rapid system prototyping with incomplete {CAD}
tools and inexperienced designers},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218628},
doi = {10.1109/IWRSP.1991.218628},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Dollas91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/FrinckeFAL91,
author = {Deborah A. Frincke and
Genc L. Fisher and
Myla Archer and
Karl N. Levitt},
title = {An application of template methodology: rapid prototyping of user
interface management systems},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {82--98},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218621},
doi = {10.1109/IWRSP.1991.218621},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/FrinckeFAL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HamiltonH91,
author = {Margaret H. Hamilton and
Ron Hackler},
title = {Prototyping distributed environments with 001},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {110--111},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218618},
doi = {10.1109/IWRSP.1991.218618},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HamiltonH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HerpelWG91,
author = {Hans{-}J{\"{u}}rgen Herpel and
Norbert Wehn and
Manfred Glesner},
title = {RAMSES-a rapid prototyping environment for embedded control applications},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {27--33},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218626},
doi = {10.1109/IWRSP.1991.218626},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HerpelWG91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HsiaA91,
author = {P. Hsia and
S. Asur},
title = {Scenario-based modelling},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {179--180},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218612},
doi = {10.1109/IWRSP.1991.218612},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HsiaA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KleinfelderMTT91,
author = {Walter Kleinfelder and
Leon I. Maissel and
C. J. Tan and
L. Travillyan},
title = {Hardware prototyping through programmable gate arrays},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {7--8},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218629},
doi = {10.1109/IWRSP.1991.218629},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KleinfelderMTT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KordonE91,
author = {Fabrice Kordon and
Pascal Estraillier},
title = {Complex system prototyping using environment abstraction},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {34--46},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218625},
doi = {10.1109/IWRSP.1991.218625},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KordonE91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Overmyer91,
author = {Scott P. Overmyer},
title = {Validating system and software requirements: extending the Davis-Jordan
requirements metamodel to the 'user's view'},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {149--150},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218616},
doi = {10.1109/IWRSP.1991.218616},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Overmyer91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Reston91,
author = {Mark Reston},
title = {Rapid prototyping and testing coverage based on decision tables},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {112--145},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218617},
doi = {10.1109/IWRSP.1991.218617},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Reston91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SheltonS91,
author = {Jerry H. Shelton and
James L. Sidoran},
title = {System concept modeling},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {47--52},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218624},
doi = {10.1109/IWRSP.1991.218624},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SheltonS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SrivastavaSB91,
author = {Mani B. Srivastava and
Jane S. Sun and
Robert W. Brodersen},
title = {Hardware and software prototyping for application-specific real-time
systems},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {101--102},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218620},
doi = {10.1109/IWRSP.1991.218620},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SrivastavaSB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Winkler91,
author = {Stanley Winkler},
title = {RSVP-rapid system visualization prototyping},
booktitle = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
pages = {3--6},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/IWRSP.1991.218630},
doi = {10.1109/IWRSP.1991.218630},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Winkler91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1991,
title = {Proceedings of the Second International Workshop on Rapid System Prototyping,
{RSP} 1991, Research Triangle Park, North Carolina, USA, June 11-13,
1991},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://ieeexplore.ieee.org/xpl/conhome/440/proceeding},
isbn = {0-8186-3040-X},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1991.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ArcherFL90,
author = {Myla Archer and
Deborah A. Frincke and
Karl N. Levitt},
title = {A template for rapid prototyping of operating systems},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {119--127},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144044},
doi = {10.1109/IWRSP.1990.144044},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ArcherFL90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ArmstrongB90,
author = {James R. Armstrong and
D. Burnette},
title = {Automated assists to the behavioral modeling process},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {187--195},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144058},
doi = {10.1109/IWRSP.1990.144058},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ArmstrongB90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/BeunderAHKKSWZ90,
author = {Michiel Beunder and
Uwe Apel and
Bernd Hoefflinger and
J{\"{u}}rgen Kernhof and
W. Klingler and
R. Springer and
M. Winkler and
T. Zimmermann},
title = {Cost effective rapid {VLSI} prototyping: semi-custom arrays and E-beam
direct-write},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {183--186},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144056},
doi = {10.1109/IWRSP.1990.144056},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/BeunderAHKKSWZ90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Browne90,
author = {James C. Browne},
title = {Exploration of design space for parallel programs},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {33},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144028},
doi = {10.1109/IWRSP.1990.144028},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Browne90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Bunza90,
author = {Geoffrey J. Bunza},
title = {Environmental management for rapid systems prototyping},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {3--22},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144025},
doi = {10.1109/IWRSP.1990.144025},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Bunza90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Burns90,
author = {Carla L. Burns},
title = {Proto-a software requirements specification, analysis and validation
tool},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {196--203},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144059},
doi = {10.1109/IWRSP.1990.144059},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Burns90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Camp90,
author = {Harold D. Camp},
title = {{SDIO} rapid prototyping},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {164--166},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144052},
doi = {10.1109/IWRSP.1990.144052},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Camp90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/CockburnCHK90,
author = {Alistair Cockburn and
Wayne Citrin and
Rainer Hauser and
J{\"{u}}rg von K{\"{a}}nel},
title = {Interactive prototyping of communication-intensive systems},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {34--37},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144029},
doi = {10.1109/IWRSP.1990.144029},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/CockburnCHK90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Cyre90,
author = {Walling R. Cyre},
title = {Rapid system prototyping from English specifications},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {176--182},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144055},
doi = {10.1109/IWRSP.1990.144055},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Cyre90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/DollasC90,
author = {Apostolos Dollas and
V. Chi},
title = {Rapid system prototyping in academic laboratories of the 1990s},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {38--45},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144031},
doi = {10.1109/IWRSP.1990.144031},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/DollasC90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/GoetschalckxMA90,
author = {Marc Goetschalckx and
Leon F. McGinnis and
K. R. Anderson},
title = {Toward rapid prototyping of manufacturing facilities},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {90},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144040},
doi = {10.1109/IWRSP.1990.144040},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/GoetschalckxMA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Hallenbeck90,
author = {Jill J. Hallenbeck},
title = {The Test Engineer's Assistant revisited-refinements on a prototype
software tool},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {158--163},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144051},
doi = {10.1109/IWRSP.1990.144051},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Hallenbeck90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HamiltonH90,
author = {Margaret H. Hamilton and
William R. Hackler},
title = {001: a rapid development approach for rapid prototyping based on a
system that supports its own life cycle},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {46--62},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144033},
doi = {10.1109/IWRSP.1990.144033},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HamiltonH90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HartleyWH90,
author = {Richard I. Hartley and
Kenneth Welles II and
Michael J. Hartman},
title = {A synthesis, test and debug environment for rapid prototyping of {DSP}
designs},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {205--214},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144061},
doi = {10.1109/IWRSP.1990.144061},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HartleyWH90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HartmanHWDC90,
author = {Michael J. Hartman and
Richard I. Hartley and
Kenneth Welles II and
Paul Delano and
Arani Chatterjee},
title = {Rapid prototyping of electronic systems},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {204},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144060},
doi = {10.1109/IWRSP.1990.144060},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HartmanHWDC90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/JuddVBS90,
author = {Robert P. Judd and
Raymond S. VanderBok and
Mark E. Brown and
John A. Sauter},
title = {Manufacturing system design methodology: execute the specification},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {97--115},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144042},
doi = {10.1109/IWRSP.1990.144042},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/JuddVBS90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KedemBK90,
author = {Gershon Kedem and
Franc Brglez and
Krzysztof Kozminski},
title = {{OASIS:} a silicon compiler for semi-custom design},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {75},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144036},
doi = {10.1109/IWRSP.1990.144036},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KedemBK90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LaPaughW90,
author = {Andrea S. LaPaugh and
Wayne H. Wolf},
title = {Issues in synthesis of board-level systems},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {157},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144050},
doi = {10.1109/IWRSP.1990.144050},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LaPaughW90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LauwereinsEP90,
author = {Rudy Lauwereins and
Marc Engels and
J. A. Peperstraete},
title = {Parallel processing enables the real-time emulation of {DSP} ASICs},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {65--74},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144035},
doi = {10.1109/IWRSP.1990.144035},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LauwereinsEP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/LintulampiP90,
author = {Raino Lintulampi and
Petri Pulli},
title = {Graphics based prototyping of real-time systems},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {128--137},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144045},
doi = {10.1109/IWRSP.1990.144045},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/LintulampiP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/MosseGA90,
author = {Daniel Moss{\'{e}} and
Olafur Gudmundsson and
Ashok K. Agrawala},
title = {Prototyping real time operating systems: a case study},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {144--154},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144048},
doi = {10.1109/IWRSP.1990.144048},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/MosseGA90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Ozawa90,
author = {H. Ozawa},
title = {The design of a prototyping system in a distributed environment},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {138},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144046},
doi = {10.1109/IWRSP.1990.144046},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Ozawa90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PangrleHOI90,
author = {Barry M. Pangrle and
Pao{-}Po Hou and
Robert Michael Owens and
Mary Jane Irwin},
title = {An integrated, multi-level synthesis system},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {167--175},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144054},
doi = {10.1109/IWRSP.1990.144054},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PangrleHOI90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/PetersenTB90,
author = {Thomas A. Petersen and
Douglas Thomae and
David E. van den Bout},
title = {The Anyboard: a rapid-prototyping system for use in teaching digital
circuit design},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {25--32},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144027},
doi = {10.1109/IWRSP.1990.144027},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/PetersenTB90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Reston90,
author = {Mark S. Reston},
title = {Testing of the rapidly developed prototypes},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {139--143},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144047},
doi = {10.1109/IWRSP.1990.144047},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Reston90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RoyalsMYK90,
author = {Mark Royals and
Tassos Markas and
Tianmaw Yang and
Nick Kanopoulos},
title = {Creating the {IC} palette {[ASIC} design]},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {76--86},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144037},
doi = {10.1109/IWRSP.1990.144037},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RoyalsMYK90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/SauterJV90,
author = {John A. Sauter and
Robert P. Judd and
Raymond S. VanderBok},
title = {XFaST: integrated tools for the design of manufacturing systems},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {91--96},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144041},
doi = {10.1109/IWRSP.1990.144041},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/SauterJV90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Tomsicek90,
author = {Michael Tomsicek},
title = {Rapid prototyping of manufacturing systems using an integrated tool
box},
booktitle = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
pages = {89},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/IWRSP.1990.144039},
doi = {10.1109/IWRSP.1990.144039},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Tomsicek90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rsp/1990,
title = {Proceedings of the First International Workshop on Rapid System Prototyping,
{RSP} 1990, Research Triangle Park, North Carolina, USA, June 4-7,
1990},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://ieeexplore.ieee.org/xpl/conhome/353/proceeding},
isbn = {0-8186-2175-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rsp/1990.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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