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@inproceedings{DBLP:conf/itsc/MaL22a,
  author       = {Ke Ma and
                  Xiaopeng Li},
  title        = {Empirical study of feedback delay in stability analysis for production
                  vehicles with different powertrains},
  booktitle    = {25th {IEEE} International Conference on Intelligent Transportation
                  Systems, {ITSC} 2022, Macau, China, October 8-12, 2022},
  pages        = {4196--4201},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ITSC55140.2022.9922215},
  doi          = {10.1109/ITSC55140.2022.9922215},
  timestamp    = {Thu, 10 Nov 2022 21:13:36 +0100},
  biburl       = {https://dblp.org/rec/conf/itsc/MaL22a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijcta/DP21,
  author       = {Baba Fayaz D and
                  Sreehari Rao Patri},
  title        = {Power-efficient voltage up level shifter with low power-delay product},
  journal      = {Int. J. Circuit Theory Appl.},
  volume       = {49},
  number       = {7},
  pages        = {2158--2169},
  year         = {2021},
  url          = {https://doi.org/10.1002/cta.2980},
  doi          = {10.1002/CTA.2980},
  timestamp    = {Thu, 12 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijcta/DP21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/PasandiMPN19,
  author       = {Ghasem Pasandi and
                  Raghav Mehta and
                  Massoud Pedram and
                  Shahin Nazarian},
  title        = {Hybrid Cell Assignment and Sizing for Power, Area, Delay-Product Optimization
                  of {SRAM} Arrays},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {66-II},
  number       = {12},
  pages        = {2047--2051},
  year         = {2019},
  url          = {https://doi.org/10.1109/TCSII.2019.2896794},
  doi          = {10.1109/TCSII.2019.2896794},
  timestamp    = {Wed, 27 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/PasandiMPN19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sac/SafaeiSSME19,
  author       = {Bardia Safaei and
                  Ali Asghar Mohammad Salehi and
                  Maryam Shirbeigi and
                  Amir Mahdi Hosseini Monazzah and
                  Alireza Ejlali},
  editor       = {Chih{-}Cheng Hung and
                  George A. Papadopoulos},
  title        = {{PEDAL:} power-delay product objective function for internet of things
                  applications},
  booktitle    = {Proceedings of the 34th {ACM/SIGAPP} Symposium on Applied Computing,
                  {SAC} 2019, Limassol, Cyprus, April 8-12, 2019},
  pages        = {892--895},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3297280.3297565},
  doi          = {10.1145/3297280.3297565},
  timestamp    = {Fri, 23 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/sac/SafaeiSSME19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1902-00484,
  author       = {Ghasem Pasandi and
                  Raghav Mehta and
                  Massoud Pedram and
                  Shahin Nazarian},
  title        = {Hybrid Cell Assignment and Sizing for Power, Area, Delay Product Optimization
                  of {SRAM} Arrays},
  journal      = {CoRR},
  volume       = {abs/1902.00484},
  year         = {2019},
  url          = {http://arxiv.org/abs/1902.00484},
  eprinttype    = {arXiv},
  eprint       = {1902.00484},
  timestamp    = {Tue, 21 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1902-00484.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/inis/Vo18,
  author       = {Huan Minh Vo},
  title        = {Comparative Study on Power Gating Techniques for Lower Power Delay
                  Product, Smaller Power Loss, Faster Wakeup Time},
  journal      = {{EAI} Endorsed Trans. Ind. Networks Intell. Syst.},
  volume       = {5},
  number       = {15},
  pages        = {e1},
  year         = {2018},
  url          = {https://doi.org/10.4108/eai.27-6-2018.155236},
  doi          = {10.4108/EAI.27-6-2018.155236},
  timestamp    = {Thu, 16 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/inis/Vo18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/LiuZLZJ17,
  author       = {Pei Liu and
                  Tian Zhao and
                  Feng Liang and
                  Jizhong Zhao and
                  Peilin Jiang},
  title        = {A power-delay-product efficient and SEU-tolerant latch design},
  journal      = {{IEICE} Electron. Express},
  volume       = {14},
  number       = {23},
  pages        = {20170972},
  year         = {2017},
  url          = {https://doi.org/10.1587/elex.14.20170972},
  doi          = {10.1587/ELEX.14.20170972},
  timestamp    = {Fri, 12 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ieiceee/LiuZLZJ17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/DuttS17,
  author       = {Shantanu Dutt and
                  Ouwen Shi},
  title        = {Power-delay product based resource library construction for effective
                  power optimization in {HLS}},
  booktitle    = {18th International Symposium on Quality Electronic Design, {ISQED}
                  2017, Santa Clara, CA, USA, March 14-15, 2017},
  pages        = {229--236},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISQED.2017.7918321},
  doi          = {10.1109/ISQED.2017.7918321},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/DuttS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icm2/ElgreatlySE15,
  author       = {Aimed Lutfi Elgreatly and
                  Aimed Ahmed Shaaban and
                  El{-}Sayed M. El{-}Rabaie},
  title        = {Enhancing Power Delay Product in DRAMs using resonant tunneling diode
                  buffer},
  booktitle    = {27th International Conference on Microelectronics, {ICM} 2015, Casablanca,
                  Morocco, December 20-23, 2015},
  pages        = {230--233},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ICM.2015.7438030},
  doi          = {10.1109/ICM.2015.7438030},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icm2/ElgreatlySE15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/WeyYWP14,
  author       = {I{-}Chyn Wey and
                  Yu{-}Sheng Yang and
                  Bing{-}Chen Wu and
                  Chien{-}Chang Peng},
  title        = {A low power-delay-product and robust Isolated-DICE based SEU-tolerant
                  latch circuit design},
  journal      = {Microelectron. J.},
  volume       = {45},
  number       = {1},
  pages        = {1--13},
  year         = {2014},
  url          = {https://doi.org/10.1016/j.mejo.2013.09.007},
  doi          = {10.1016/J.MEJO.2013.09.007},
  timestamp    = {Sat, 22 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/mj/WeyYWP14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icacci/MaheshwariPNG14,
  author       = {Sachin Maheshwari and
                  Jimit Patel and
                  Sumit K. Nirmalkar and
                  Anu Gupta},
  title        = {Logical effort based power-delay-product optimization},
  booktitle    = {2014 International Conference on Advances in Computing, Communications
                  and Informatics, {ICACCI} 2014, Delhi, India, September 24-27, 2014},
  pages        = {565--569},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ICACCI.2014.6968530},
  doi          = {10.1109/ICACCI.2014.6968530},
  timestamp    = {Wed, 16 Oct 2019 14:14:51 +0200},
  biburl       = {https://dblp.org/rec/conf/icacci/MaheshwariPNG14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/cj/AggarwalK12,
  author       = {Supriya Aggarwal and
                  Kavita Khare},
  title        = {Design Techniques Targeting Low-Area-Power-Delay Product in Hyperbolic
                  {CORDIC} Algorithm},
  journal      = {Comput. J.},
  volume       = {55},
  number       = {5},
  pages        = {616--628},
  year         = {2012},
  url          = {https://doi.org/10.1093/comjnl/bxr109},
  doi          = {10.1093/COMJNL/BXR109},
  timestamp    = {Wed, 14 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cj/AggarwalK12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/GhasemazarP11,
  author       = {Mohammad Ghasemazar and
                  Massoud Pedram},
  title        = {Optimizing the Power-Delay Product of a Linear Pipeline by Opportunistic
                  Time Borrowing},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {30},
  number       = {10},
  pages        = {1493--1506},
  year         = {2011},
  url          = {https://doi.org/10.1109/TCAD.2011.2159218},
  doi          = {10.1109/TCAD.2011.2159218},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/GhasemazarP11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jolpe/EkambavananGKN09,
  author       = {Sasidharan Ekambavanan and
                  Rajesh Garg and
                  Sunil P. Khatri and
                  Krishna R. Narayanan},
  title        = {Encoding Serial Graphical Data for Energy-Delay Product/Energy Minimization},
  journal      = {J. Low Power Electron.},
  volume       = {5},
  number       = {2},
  pages        = {157--172},
  year         = {2009},
  url          = {https://doi.org/10.1166/jolpe.2009.1017},
  doi          = {10.1166/JOLPE.2009.1017},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/EkambavananGKN09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jolpe/UzzamanKSIA09,
  author       = {Anis Uzzaman and
                  Brion L. Keller and
                  Thomas J. Snethen and
                  Kazuhiko Iwasaki and
                  Masayuki Arai},
  title        = {Automatic Handling of Programmable On-Product Clock Generation {(OPCG)}
                  Circuitry for Low Power Aware Delay Test},
  journal      = {J. Low Power Electron.},
  volume       = {5},
  number       = {4},
  pages        = {520--528},
  year         = {2009},
  url          = {https://doi.org/10.1166/jolpe.2009.1050},
  doi          = {10.1166/JOLPE.2009.1050},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jolpe/UzzamanKSIA09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/TajalliGLAB08,
  author       = {Armin Tajalli and
                  Frank K. G{\"{u}}rkaynak and
                  Yusuf Leblebici and
                  Massimo Alioto and
                  Elizabeth J. Brauer},
  title        = {Improving the power-delay product in {SCL} circuits using source follower
                  output stage},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
                  May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  pages        = {145--148},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISCAS.2008.4541375},
  doi          = {10.1109/ISCAS.2008.4541375},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TajalliGLAB08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/OhH05,
  author       = {Myeong{-}Hoon Oh and
                  Dong{-}Soo Har},
  title        = {Low Delay-Power Product Current-Mode Multiple Valued Logic for Delay-Insensitive
                  Data Transfer Mechanism},
  journal      = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
  volume       = {88-A},
  number       = {5},
  pages        = {1379--1383},
  year         = {2005},
  url          = {https://doi.org/10.1093/ietfec/e88-a.5.1379},
  doi          = {10.1093/IETFEC/E88-A.5.1379},
  timestamp    = {Sat, 11 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/OhH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/ZhangM05,
  author       = {Hui Zhang and
                  Pinaki Mazumder},
  title        = {Design of a new sense amplifier flip-flop with improved power-delay-product},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {1262--1265},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1464824},
  doi          = {10.1109/ISCAS.2005.1464824},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ZhangM05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/NeveS0F04,
  author       = {Amaury N{\`{e}}ve and
                  Helmut Schettler and
                  Thomas Ludwig and
                  Denis Flandre},
  title        = {Power-delay product minimization in high-performance 64-bit carry-select
                  adders},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {12},
  number       = {3},
  pages        = {235--244},
  year         = {2004},
  url          = {https://doi.org/10.1109/TVLSI.2004.824305},
  doi          = {10.1109/TVLSI.2004.824305},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/NeveS0F04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icassp/ZhuP04,
  author       = {Donglai Zhu and
                  Kuldip K. Paliwal},
  title        = {Product of power spectrum and group delay function for speech recognition},
  booktitle    = {2004 {IEEE} International Conference on Acoustics, Speech, and Signal
                  Processing, {ICASSP} 2004, Montreal, Quebec, Canada, May 17-21, 2004},
  pages        = {125--128},
  publisher    = {{IEEE}},
  year         = {2004},
  url          = {https://doi.org/10.1109/ICASSP.2004.1325938},
  doi          = {10.1109/ICASSP.2004.1325938},
  timestamp    = {Mon, 22 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icassp/ZhuP04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsid/TsaiLL03,
  author       = {Chi{-}Ming Tsai and
                  Guang{-}Wan Liao and
                  Rung{-}Bin Lin},
  title        = {A Low Power-Delay Product Page-Based Address Bus Coding Method},
  booktitle    = {16th International Conference on {VLSI} Design {(VLSI} Design 2003),
                  4-8 January 2003, New Delhi, India},
  pages        = {521--526},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/ICVD.2003.1183187},
  doi          = {10.1109/ICVD.2003.1183187},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/TsaiLL03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/TurgisAA96,
  author       = {S. Turgis and
                  Nadine Az{\'{e}}mard and
                  Daniel Auvergne},
  title        = {Design and selection of buffers for minimum power-delay product},
  booktitle    = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
                  France, March 11-14, 1996},
  pages        = {224--229},
  publisher    = {{IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/EDTC.1996.494153},
  doi          = {10.1109/EDTC.1996.494153},
  timestamp    = {Fri, 20 May 2022 15:52:30 +0200},
  biburl       = {https://dblp.org/rec/conf/date/TurgisAA96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/islped/Chren95,
  author       = {William A. Chren Jr.},
  editor       = {Massoud Pedram and
                  Robert W. Brodersen and
                  Kurt Keutzer},
  title        = {Low delay-power product {CMOS} design using one-hot residue coding},
  booktitle    = {Proceedings of the 1995 International Symposium on Low Power Design
                  1995, Dana Point, California, USA, April 23-26, 1995},
  pages        = {145--150},
  publisher    = {{ACM}},
  year         = {1995},
  url          = {https://doi.org/10.1145/224081.224107},
  doi          = {10.1145/224081.224107},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/islped/Chren95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/ChoiL94,
  author       = {Jso{-}Sun Choi and
                  Kwyro Lee},
  title        = {Design of {CMOS} tapered buffer for minimum power-delay product},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {29},
  number       = {9},
  pages        = {1142--1145},
  year         = {1994},
  url          = {https://doi.org/10.1109/4.309912},
  doi          = {10.1109/4.309912},
  timestamp    = {Wed, 03 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ChoiL94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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