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@article{DBLP:journals/cee/RC24,
author = {Mohanan P. R and
Mariamma Chacko},
title = {A multi objective {DB-RNN} based core prediction and resource allocation
scheme for multicore processors},
journal = {Comput. Electr. Eng.},
volume = {118},
pages = {109369},
year = {2024},
url = {https://doi.org/10.1016/j.compeleceng.2024.109369},
doi = {10.1016/J.COMPELECENG.2024.109369},
timestamp = {Mon, 22 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cee/RC24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/SamadiRPCQ24,
author = {Mohammad Samadi and
Sara Royuela and
Lu{\'{\i}}s Miguel Pinho and
Tiago Carvalho and
Eduardo Qui{\~{n}}ones},
title = {Time-predictable task-to-thread mapping in multi-core processors},
journal = {J. Syst. Archit.},
volume = {148},
pages = {103068},
year = {2024},
url = {https://doi.org/10.1016/j.sysarc.2024.103068},
doi = {10.1016/J.SYSARC.2024.103068},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/SamadiRPCQ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/neuromorphic/RichterWWKNQI24,
author = {Ole Richter and
Chenxi Wu and
Adrian M. Whatley and
German K{\"{o}}stinger and
Carsten Nielsen and
Ning Qiao and
Giacomo Indiveri},
title = {{DYNAP-SE2:} a scalable multi-core dynamic neuromorphic asynchronous
spiking neural network processor},
journal = {Neuromorph. Comput. Eng.},
volume = {4},
number = {1},
pages = {14003},
year = {2024},
url = {https://doi.org/10.1088/2634-4386/ad1cd7},
doi = {10.1088/2634-4386/AD1CD7},
timestamp = {Thu, 29 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/neuromorphic/RichterWWKNQI24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/paapp/NairPAPRP24,
author = {Arun S. Nair and
Geeta Patil and
Archit Agarwal and
Aboli Vijayan Pai and
Biju K. Raveendran and
Sasikumar Punnekkat},
title = {{CAMP:} a hierarchical cache architecture for multi-core mixed criticality
processors},
journal = {Int. J. Parallel Emergent Distributed Syst.},
volume = {39},
number = {3},
pages = {317--352},
year = {2024},
url = {https://doi.org/10.1080/17445760.2023.2293913},
doi = {10.1080/17445760.2023.2293913},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/paapp/NairPAPRP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PerottiCACB24,
author = {Matteo Perotti and
Matheus A. Cavalcante and
Renzo Andri and
Lukas Cavigelli and
Luca Benini},
title = {Ara2: Exploring Single- and Multi-Core Vector Processing With an Efficient
{RVV} 1.0 Compliant Open-Source Processor},
journal = {{IEEE} Trans. Computers},
volume = {73},
number = {7},
pages = {1822--1836},
year = {2024},
url = {https://doi.org/10.1109/TC.2024.3388896},
doi = {10.1109/TC.2024.3388896},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PerottiCACB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SuiSSWZG24,
author = {Bingcai Sui and
Junzhong Shen and
Caixia Sun and
Junhui Wang and
Zhong Zheng and
Wei Guo},
title = {{MACO:} Exploring {GEMM} Acceleration on a Loosely-Coupled Multi-Core
Processor},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2024, Valencia, Spain, March 25-27, 2024},
pages = {1--6},
publisher = {{IEEE}},
year = {2024},
url = {https://ieeexplore.ieee.org/document/10546765},
timestamp = {Mon, 17 Jun 2024 14:45:14 +0200},
biburl = {https://dblp.org/rec/conf/date/SuiSSWZG24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/HongWMLXL24,
author = {Chuhe Hong and
Qinglin Wang and
Runzhang Mao and
Yuechao Liang and
Rui Xia and
Jie Liu},
title = {SaSpGEMM: Sorting-Avoiding Sparse General Matrix-Matrix Multiplication
on Multi-Core Processors},
booktitle = {Proceedings of the 53rd International Conference on Parallel Processing,
{ICPP} 2024, Gotland, Sweden, August 12-15, 2024},
pages = {1166--1175},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3673038.3673054},
doi = {10.1145/3673038.3673054},
timestamp = {Mon, 26 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icpp/HongWMLXL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/LinCGJJP24,
author = {Yi{-}Chien Lin and
Yuyang Chen and
Sameh Gobriel and
Nilesh Jain and
Gopi Krishna Jha and
Viktor K. Prasanna},
title = {{ARGO:} An Auto-Tuning Runtime System for Scalable {GNN} Training
on Multi-Core Processor},
booktitle = {{IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2024, San Francisco, CA, USA, May 27-31, 2024},
pages = {361--372},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/IPDPS57955.2024.00039},
doi = {10.1109/IPDPS57955.2024.00039},
timestamp = {Wed, 17 Jul 2024 15:32:24 +0200},
biburl = {https://dblp.org/rec/conf/ipps/LinCGJJP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2402-03671,
author = {Yi{-}Chien Lin and
Yuyang Chen and
Sameh Gobriel and
Nilesh Jain and
Gopi Krishna Jha and
Viktor K. Prasanna},
title = {{ARGO:} An Auto-Tuning Runtime System for Scalable {GNN} Training
on Multi-Core Processor},
journal = {CoRR},
volume = {abs/2402.03671},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2402.03671},
doi = {10.48550/ARXIV.2402.03671},
eprinttype = {arXiv},
eprint = {2402.03671},
timestamp = {Mon, 12 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2402-03671.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2404-19180,
author = {Bingcai Sui and
Junzhong Shen and
Caixia Sun and
Junhui Wang and
Zhong Zheng and
Wei Guo},
title = {{MACO:} Exploring {GEMM} Acceleration on a Loosely-Coupled Multi-core
Processor},
journal = {CoRR},
volume = {abs/2404.19180},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2404.19180},
doi = {10.48550/ARXIV.2404.19180},
eprinttype = {arXiv},
eprint = {2404.19180},
timestamp = {Mon, 27 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2404-19180.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/AlomariAGAAABS23,
author = {Mohammad Ahmed Alomari and
Hazleen Aris and
Mukhtar Ghaleb and
Yahya Almurtadha and
Gamal Abdulnaser Alkawsi and
Ismail Ahmad Al{-}Qasem Al{-}Hadi and
Yahia Baashar and
Khairulmizam Samsudin},
title = {Embedded Devices Security: Design and Implementation of a Light {RDBMS}
Encryption Utilizing Multi-Core Processors},
journal = {{IEEE} Access},
volume = {11},
pages = {19836--19848},
year = {2023},
url = {https://doi.org/10.1109/ACCESS.2023.3248300},
doi = {10.1109/ACCESS.2023.3248300},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/AlomariAGAAABS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/ManninoPMB23,
author = {Mirco Mannino and
Biagio Peccerillo and
Andrea Mondelli and
Sandro Bartolini},
title = {Analysis and Optimization of Direct Convolution Execution on Multi-Core
Processors},
journal = {{IEEE} Access},
volume = {11},
pages = {57514--57528},
year = {2023},
url = {https://doi.org/10.1109/ACCESS.2023.3283312},
doi = {10.1109/ACCESS.2023.3283312},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/ManninoPMB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ccfthpc/LuoYLWWXCG23,
author = {Yongtao Luo and
Bo Yang and
Jie Liu and
Ruibo Wang and
Jinmin Wen and
Tiaojie Xiao and
Xuguang Chen and
Chunye Gong},
title = {MT-office: parallel password recovery program for office on domestic
heterogeneous multi-core processor},
journal = {{CCF} Trans. High Perform. Comput.},
volume = {5},
number = {3},
pages = {231--244},
year = {2023},
url = {https://doi.org/10.1007/s42514-023-00146-y},
doi = {10.1007/S42514-023-00146-Y},
timestamp = {Thu, 31 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ccfthpc/LuoYLWWXCG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cee/BarikoAKA23,
author = {Smail Bariko and
Assia Arsalane and
Abdessamad Klilou and
Abdelouahed Abounada},
title = {Efficient parallel implementation of Gaussian Mixture Model background
subtraction algorithm on an embedded multi-core Digital Signal Processor},
journal = {Comput. Electr. Eng.},
volume = {110},
pages = {108827},
year = {2023},
url = {https://doi.org/10.1016/j.compeleceng.2023.108827},
doi = {10.1016/J.COMPELECENG.2023.108827},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cee/BarikoAKA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/MaaroufGGG23,
author = {Aboul{-}Karim Mohamed El Maarouf and
Luc Giraud and
Abdou Guermouche and
Thomas Guignon},
title = {Combining reduction with synchronization barrier on multi-core processors},
journal = {Concurr. Comput. Pract. Exp.},
volume = {35},
number = {1},
year = {2023},
url = {https://doi.org/10.1002/cpe.7402},
doi = {10.1002/CPE.7402},
timestamp = {Fri, 10 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/concurrency/MaaroufGGG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cryptography/KhashanKAAAAA23,
author = {Osama Ahmed Khashan and
Nour Mahmoud Khafajah and
Waleed Alomoush and
Mohammad Alshinwan and
Sultan Alamri and
Samer Atawneh and
Mutasem K. Alsmadi},
title = {Dynamic Multimedia Encryption Using a Parallel File System Based on
Multi-Core Processors},
journal = {Cryptogr.},
volume = {7},
number = {1},
pages = {12},
year = {2023},
url = {https://doi.org/10.3390/cryptography7010012},
doi = {10.3390/CRYPTOGRAPHY7010012},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cryptography/KhashanKAAAAA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/itiis/KimLCKL23,
author = {HyungTae Kim and
Duk{-}Yeon Lee and
Dongwoon Choi and
Jaehyeon Kang and
Dong{-}Wook Lee},
title = {Parallel Implementations of Digital Focus Indices Based on Minimax
Search Using Multi-Core Processors},
journal = {{KSII} Trans. Internet Inf. Syst.},
volume = {17},
number = {2},
pages = {542--558},
year = {2023},
url = {https://doi.org/10.3837/tiis.2023.02.014},
doi = {10.3837/TIIS.2023.02.014},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/itiis/KimLCKL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/NagiRSLIM23,
author = {Sumeet Singh Nagi and
Uneeb Rathore and
Krutikesh Sahoo and
Tim Ling and
Subramanian S. Iyer and
Dejan Markovic},
title = {A 16-nm 784-Core Digital Signal Processor Array, Assembled as a 2
{\texttimes} 2 Dielet With 10-{\(\mu\)}m Pitch Interdielet {I/O} for
Runtime Multiprogram Reconfiguration},
journal = {{IEEE} J. Solid State Circuits},
volume = {58},
number = {1},
pages = {111--123},
year = {2023},
url = {https://doi.org/10.1109/JSSC.2022.3212685},
doi = {10.1109/JSSC.2022.3212685},
timestamp = {Sun, 15 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/NagiRSLIM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/UmaM23,
author = {V. Uma and
Ramalatha Marimuthu},
title = {D-wash - {A} dynamic workload aware adaptive cache coherance protocol
for multi-core processor system},
journal = {Microelectron. J.},
volume = {132},
pages = {105675},
year = {2023},
url = {https://doi.org/10.1016/j.mejo.2022.105675},
doi = {10.1016/J.MEJO.2022.105675},
timestamp = {Sat, 25 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/UmaM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZouMGLGZ23,
author = {An Zou and
Yehan Ma and
Karthik Garimella and
Benjamin Lee and
Christopher D. Gill and
Xuan Zhang},
title = {{F-LEMMA:} Fast Learning-Based Energy Management for Multi-/Many-Core
Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {42},
number = {2},
pages = {616--629},
year = {2023},
url = {https://doi.org/10.1109/TCAD.2022.3176219},
doi = {10.1109/TCAD.2022.3176219},
timestamp = {Fri, 10 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZouMGLGZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcps/ChenKTBCLMCS23,
author = {Jiyang Chen and
Tomasz Kloda and
Rohan Tabish and
Ayoosh Bansal and
Chien{-}Ying Chen and
Bo Liu and
Sibin Mohan and
Marco Caccamo and
Lui Sha},
title = {SchedGuard++: Protecting against Schedule Leaks Using Linux Containers
on Multi-Core Processors},
journal = {{ACM} Trans. Cyber Phys. Syst.},
volume = {7},
number = {1},
pages = {6:1--6:25},
year = {2023},
url = {https://doi.org/10.1145/3565974},
doi = {10.1145/3565974},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcps/ChenKTBCLMCS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/DolzMCAQ23,
author = {Manuel F. Dolz and
H{\'{e}}ctor Mart{\'{\i}}nez and
Adri{\'{a}}n Castell{\'{o}} and
Pedro Alonso{-}Jord{\'{a}} and
Enrique S. Quintana{-}Ort{\'{\i}}},
title = {Efficient and portable Winograd convolutions for multi-core processors},
journal = {J. Supercomput.},
volume = {79},
number = {10},
pages = {10589--10610},
year = {2023},
url = {https://doi.org/10.1007/s11227-023-05088-4},
doi = {10.1007/S11227-023-05088-4},
timestamp = {Wed, 11 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tjs/DolzMCAQ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/WangDKC23,
author = {Ziheng Wang and
Xiaoshe Dong and
Yan Kang and
Heng Chen},
title = {Parallel {SHA-256} on {SW26010} many-core processor for hashing of
multiple messages},
journal = {J. Supercomput.},
volume = {79},
number = {2},
pages = {2332--2355},
year = {2023},
url = {https://doi.org/10.1007/s11227-022-04750-7},
doi = {10.1007/S11227-022-04750-7},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tjs/WangDKC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsusc/AbdiS23,
author = {Athena Abdi and
Armin Salimi{-}Badr},
title = {{ENF-S:} An Evolutionary-Neuro-Fuzzy Multi-Objective Task Scheduler
for Heterogeneous Multi-Core Processors},
journal = {{IEEE} Trans. Sustain. Comput.},
volume = {8},
number = {3},
pages = {479--491},
year = {2023},
url = {https://doi.org/10.1109/TSUSC.2023.3244081},
doi = {10.1109/TSUSC.2023.3244081},
timestamp = {Sun, 24 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsusc/AbdiS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ChangMCCMG23,
author = {Hung{-}Yang Chang and
Seyyed Hasan Mozafari and
Cheng Chen and
James J. Clark and
Brett H. Meyer and
Warren J. Gross},
title = {PipeBERT: High-throughput {BERT} Inference for {ARM} Big.LITTLE Multi-core
Processors},
journal = {J. Signal Process. Syst.},
volume = {95},
number = {7},
pages = {877--894},
year = {2023},
url = {https://doi.org/10.1007/s11265-022-01814-y},
doi = {10.1007/S11265-022-01814-Y},
timestamp = {Sat, 14 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/ChangMCCMG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/ChenL23,
author = {Guang Chen and
Binglong Li},
title = {Design and Implementation of High-speed Reconfigurable Multi-core
Network Security Protocol Analyse Processor},
booktitle = {15th {IEEE} International Conference on ASIC, {ASICON} 2023, Nanjing,
China, October 24-27, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASICON58565.2023.10396112},
doi = {10.1109/ASICON58565.2023.10396112},
timestamp = {Fri, 16 Feb 2024 14:02:58 +0100},
biburl = {https://dblp.org/rec/conf/asicon/ChenL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/ZhangOLWZWZOSWX23,
author = {Zhongcheng Zhang and
Yan Ou and
Ying Liu and
Chenxi Wang and
Yongbin Zhou and
Xiaoyu Wang and
Yuyang Zhang and
Yucheng Ouyang and
Jiahao Shan and
Ying Wang and
Jingling Xue and
Huimin Cui and
Xiaobing Feng},
editor = {Tor M. Aamodt and
Natalie D. Enright Jerger and
Michael M. Swift},
title = {Occamy: Elastically Sharing a {SIMD} Co-processor across Multiple
{CPU} Cores},
booktitle = {Proceedings of the 28th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 3,
{ASPLOS} 2023, Vancouver, BC, Canada, March 25-29, 2023},
pages = {483--497},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3582016.3582046},
doi = {10.1145/3582016.3582046},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/ZhangOLWZWZOSWX23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/async/SuHTI23,
author = {Zhe Su and
Hyunjung Hwang and
Tristan Torchet and
Giacomo Indiveri},
title = {Core Interface Optimization for Multi-core Neuromorphic Processors},
booktitle = {28th {IEEE} International Symposium on Asynchronous Circuits and Systems,
{ASYNC} 2023, Beijing, China, July 16-19, 2023},
pages = {89--98},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASYNC58294.2023.10239574},
doi = {10.1109/ASYNC58294.2023.10239574},
timestamp = {Fri, 15 Sep 2023 10:05:30 +0200},
biburl = {https://dblp.org/rec/conf/async/SuHTI23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsrt/KimPL23,
author = {Sunho Kim and
Hayeon Park and
Chang{-}Gun Lee},
title = {Optimizing the Response Time for {ROS} Tasks in Multi-Core Processors},
booktitle = {27th {IEEE/ACM} International Symposium on Distributed Simulation
and Real Time Applications, {DS-RT} 2023, Singapore, October 4-5,
2023},
pages = {10--19},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DS-RT58998.2023.00011},
doi = {10.1109/DS-RT58998.2023.00011},
timestamp = {Tue, 21 Nov 2023 12:38:06 +0100},
biburl = {https://dblp.org/rec/conf/dsrt/KimPL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icaice/ZhouQC23,
author = {Yibo Zhou and
Huabiao Qin and
Guancheng Chen},
title = {Intelligent Task Scheduling for Multi-Core Processors Based on Graph
Neural Networks and Deep Reinforcement Learning},
booktitle = {Proceedings of the 4th International Conference on Artificial Intelligence
and Computer Engineering, {ICAICE} 2023, Dalian, China, November 17-19,
2023},
pages = {875--880},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3652628.3652774},
doi = {10.1145/3652628.3652774},
timestamp = {Fri, 31 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icaice/ZhouQC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icaiic/HongP23,
author = {Sunghoon Hong and
Daejin Park},
title = {Differential Image-based Fast and Compatible Convolutional Layers
for Multi-core Processors},
booktitle = {International Conference on Artificial Intelligence in Information
and Communication, {ICAIIC} 2023, Bali, Indonesia, February 20-23,
2023},
pages = {86--90},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ICAIIC57133.2023.10066972},
doi = {10.1109/ICAIIC57133.2023.10066972},
timestamp = {Fri, 31 Mar 2023 17:22:31 +0200},
biburl = {https://dblp.org/rec/conf/icaiic/HongP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/WasalaNPGP23,
author = {Sudam Maduranga Wasala and
Sobhan Niknam and
Anuj Pathania and
Clemens Grelck and
Andy D. Pimentel},
title = {Lifetime Estimation for Core-Failure Resilient Multi-Core Processors},
booktitle = {16th {IEEE} International Symposium on Embedded Multicore/Many-core
Systems-on-Chip, MCSoC 2023, Singapore, December 18-21, 2023},
pages = {293--300},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MCSoC60832.2023.00050},
doi = {10.1109/MCSOC60832.2023.00050},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mcsoc/WasalaNPGP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/meco/KempfB23,
author = {Fabian Kempf and
J{\"{u}}rgen Becker},
title = {Leveraging Adaptive Redundancy in Multi-Core Processors for Realizing
Adaptive Fault Tolerance in Mixed-Criticality Systems},
booktitle = {12th Mediterranean Conference on Embedded Computing, {MECO} 2023,
Budva, Montenegro, June 6-10, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MECO58584.2023.10154986},
doi = {10.1109/MECO58584.2023.10154986},
timestamp = {Tue, 11 Jul 2023 11:55:29 +0200},
biburl = {https://dblp.org/rec/conf/meco/KempfB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/EscofetRRAAA23,
author = {Pau Escofet and
Sahar Ben Rached and
Santiago Rodrigo and
Carmen G. Almud{\'{e}}ver and
Eduard Alarc{\'{o}}n and
Sergi Abadal},
title = {Interconnect Fabrics for Multi-Core Quantum Processors: {A} Context
Analysis},
booktitle = {Proceedings of the 16th International Workshop on Network on Chip
Architectures, NoCArc 2023, Toronto, ON, Canada, 28 October 2023},
pages = {34--39},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3610396.3623267},
doi = {10.1145/3610396.3623267},
timestamp = {Thu, 09 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/EscofetRRAAA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SGPGV23,
author = {Sajin S and
Shubham Sunil Garag and
Anuj Phegade and
Deepshikha Gusain and
Kuruvilla Varghese},
title = {Design of a Multi-Core Compatible Linux Bootable 64-bit Out-of-Order
{RISC-V} Processor Core},
booktitle = {36th International Conference on {VLSI} Design and 2023 22nd International
Conference on Embedded Systems, {VLSID} 2023, Hyderabad, India, January
8-12, 2023},
pages = {42--47},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/VLSID57277.2023.00023},
doi = {10.1109/VLSID57277.2023.00023},
timestamp = {Sat, 22 Apr 2023 17:02:07 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/SGPGV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2304-05442,
author = {Murali Dadi and
Shubhang Pandey and
Aparna Behera and
T. G. Venkatesh},
title = {Performance Study of Partitioned Caches in Asymmetric Multi-Core Processors},
journal = {CoRR},
volume = {abs/2304.05442},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2304.05442},
doi = {10.48550/ARXIV.2304.05442},
eprinttype = {arXiv},
eprint = {2304.05442},
timestamp = {Wed, 19 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2304-05442.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2308-04171,
author = {Zhe Su and
Hyunjung Hwang and
Tristan Torchet and
Giacomo Indiveri},
title = {Core interface optimization for multi-core neuromorphic processors},
journal = {CoRR},
volume = {abs/2308.04171},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2308.04171},
doi = {10.48550/ARXIV.2308.04171},
eprinttype = {arXiv},
eprint = {2308.04171},
timestamp = {Tue, 22 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2308-04171.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2309-07313,
author = {Pau Escofet and
Sahar Ben Rached and
Santiago Rodrigo and
Carmen G. Almud{\'{e}}ver and
Eduard Alarc{\'{o}}n and
Sergi Abadal},
title = {Interconnect Fabrics for Multi-Core Quantum Processors: {A} Context
Analysis},
journal = {CoRR},
volume = {abs/2309.07313},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2309.07313},
doi = {10.48550/ARXIV.2309.07313},
eprinttype = {arXiv},
eprint = {2309.07313},
timestamp = {Wed, 20 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2309-07313.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2310-00564,
author = {Ole Richter and
Chenxi Wu and
Adrian M. Whatley and
German K{\"{o}}stinger and
Carsten Nielsen and
Ning Qiao and
Giacomo Indiveri},
title = {{DYNAP-SE2:} a scalable multi-core dynamic neuromorphic asynchronous
spiking neural network processor},
journal = {CoRR},
volume = {abs/2310.00564},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2310.00564},
doi = {10.48550/ARXIV.2310.00564},
eprinttype = {arXiv},
eprint = {2310.00564},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2310-00564.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2311-07493,
author = {Matteo Perotti and
Matheus A. Cavalcante and
Renzo Andri and
Lukas Cavigelli and
Luca Benini},
title = {Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient
{RVV1.0} Compliant Open-Source Processor},
journal = {CoRR},
volume = {abs/2311.07493},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2311.07493},
doi = {10.48550/ARXIV.2311.07493},
eprinttype = {arXiv},
eprint = {2311.07493},
timestamp = {Wed, 15 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2311-07493.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cee/XiaoSHHZ22,
author = {Feng Xiao and
Chen Shushan and
Xingxing Han and
Shujuan Huang and
Wenjuan Zhang},
title = {A new direct acyclic graph task scheduling method for heterogeneous
Multi-Core processors},
journal = {Comput. Electr. Eng.},
volume = {104},
number = {Part},
pages = {108464},
year = {2022},
url = {https://doi.org/10.1016/j.compeleceng.2022.108464},
doi = {10.1016/J.COMPELECENG.2022.108464},
timestamp = {Tue, 27 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cee/XiaoSHHZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iotj/Ibrahim22,
author = {Atef Ibrahim},
title = {Systolic Processor Core for Finite-Field Multiplication and Squaring
in Cryptographic Processors of IoT Edge Devices},
journal = {{IEEE} Internet Things J.},
volume = {9},
number = {2},
pages = {1354--1360},
year = {2022},
url = {https://doi.org/10.1109/JIOT.2021.3087274},
doi = {10.1109/JIOT.2021.3087274},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iotj/Ibrahim22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/isci/HanQLZ22,
author = {Zijun Han and
Guangzhi Qu and
Bo Liu and
Feng Zhang},
title = {Exploit the data level parallelism and schedule dependent tasks on
the multi-core processors},
journal = {Inf. Sci.},
volume = {585},
pages = {382--394},
year = {2022},
url = {https://doi.org/10.1016/j.ins.2021.10.072},
doi = {10.1016/J.INS.2021.10.072},
timestamp = {Tue, 22 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/isci/HanQLZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcphy/LongFLLFGY22,
author = {Sifan Long and
Xiaokang Fan and
Chao Li and
Yi Liu and
Sijiang Fan and
Xiaowei Guo and
Canqun Yang},
title = {VecDualSPHysics: {A} vectorized implementation of Smoothed Particle
Hydrodynamics method for simulating fluid flows on multi-core processors},
journal = {J. Comput. Phys.},
volume = {463},
pages = {111234},
year = {2022},
url = {https://doi.org/10.1016/j.jcp.2022.111234},
doi = {10.1016/J.JCP.2022.111234},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcphy/LongFLLFGY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/ChangSHDG22,
author = {Shuangshuang Chang and
Jinghao Sun and
Zhixiong Hao and
Qingxu Deng and
Nan Guan},
title = {Computing exact {WCRT} for typed {DAG} tasks on heterogeneous multi-core
processors},
journal = {J. Syst. Archit.},
volume = {124},
pages = {102385},
year = {2022},
url = {https://doi.org/10.1016/j.sysarc.2021.102385},
doi = {10.1016/J.SYSARC.2021.102385},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/ChangSHDG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/TabbassumTK22,
author = {Kavita Tabbassum and
Shahnawaz Talpur and
Shahnawaz Farhan Khahro},
title = {An interactive and dynamic scratchpad memory management strategy for
multi-core processors},
journal = {Microprocess. Microsystems},
volume = {92},
pages = {104565},
year = {2022},
url = {https://doi.org/10.1016/j.micpro.2022.104565},
doi = {10.1016/J.MICPRO.2022.104565},
timestamp = {Sat, 13 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/TabbassumTK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/WangYXTLFKZC22,
author = {Hao Wang and
Ce Yu and
Jian Xiao and
Shanjiang Tang and
Yu Lu and
Hao Fu and
Bo Kang and
Gang Zheng and
Chenzhou Cui},
title = {A method for efficient radio astronomical data gridding on multi-core
vector processor},
journal = {Parallel Comput.},
volume = {113},
pages = {102972},
year = {2022},
url = {https://doi.org/10.1016/j.parco.2022.102972},
doi = {10.1016/J.PARCO.2022.102972},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pc/WangYXTLFKZC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/AvilesLB0LC22,
author = {Pablo M. Aviles and
Diego Lloria and
Jose A. Belloch and
Sandra Roger and
Almudena Lindoso and
Maximo Cobos},
title = {Performance analysis of a millimeter wave {MIMO} channel estimation
method in an embedded multi-core processor},
journal = {J. Supercomput.},
volume = {78},
number = {12},
pages = {14756--14767},
year = {2022},
url = {https://doi.org/10.1007/s11227-022-04479-3},
doi = {10.1007/S11227-022-04479-3},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tjs/AvilesLB0LC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/BazFNB22,
author = {Didier El Baz and
Bilal Fakih and
Romeo Sanchez Nigenda and
Vincent Boyer},
title = {Parallel best-first search algorithms for planning problems on multi-core
processors},
journal = {J. Supercomput.},
volume = {78},
number = {3},
pages = {3122--3151},
year = {2022},
url = {https://doi.org/10.1007/s11227-021-03986-z},
doi = {10.1007/S11227-021-03986-Z},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tjs/BazFNB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aciids/NguyenL22,
author = {Hong{-}Phat Nguyen and
Bac Le},
editor = {Edward Szczerbicki and
Krystian Wojtkiewicz and
Sinh Van Nguyen and
Marcin Pietranik and
Marek Kr{\'{o}}tkiewicz},
title = {P-FCloHUS: {A} Parallel Approach for Mining Frequent Closed High-Utility
Sequences on Multi-core Processors},
booktitle = {Recent Challenges in Intelligent Information and Database Systems
- 14th Asian Conference, {ACIIDS} 2022, Ho Chi Minh City, Vietnam,
November 28-30, 2022, Proceedings},
series = {Communications in Computer and Information Science},
volume = {1716},
pages = {396--408},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-981-19-8234-7\_31},
doi = {10.1007/978-981-19-8234-7\_31},
timestamp = {Tue, 06 Dec 2022 10:36:48 +0100},
biburl = {https://dblp.org/rec/conf/aciids/NguyenL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/biocas/LeiteSWI22,
author = {Vanessa R. C. Leite and
Zhe Su and
Adrian M. Whatley and
Giacomo Indiveri},
title = {Cortical-inspired placement and routing: minimizing the memory resources
in multi-core neuromorphic processors},
booktitle = {{IEEE} Biomedical Circuits and Systems Conference, BioCAS 2022, Taipei,
Taiwan, October 13-15, 2022},
pages = {364--368},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/BioCAS54905.2022.9948653},
doi = {10.1109/BIOCAS54905.2022.9948653},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/biocas/LeiteSWI22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cluster/HoshinoIH22,
author = {Tetsuya Hoshino and
Akihiro Ida and
Toshihiro Hanawa},
title = {Optimizations of H-matrix-vector Multiplication for Modern Multi-core
Processors},
booktitle = {{IEEE} International Conference on Cluster Computing, {CLUSTER} 2022,
Heidelberg, Germany, September 5-8, 2022},
pages = {462--472},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CLUSTER51413.2022.00056},
doi = {10.1109/CLUSTER51413.2022.00056},
timestamp = {Wed, 26 Oct 2022 19:40:32 +0200},
biburl = {https://dblp.org/rec/conf/cluster/HoshinoIH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/etfa/GharajehRPCQ22,
author = {Mohammad Samadi Gharajeh and
Sara Royuela and
Lu{\'{\i}}s Miguel Pinho and
Tiago Carvalho and
Eduardo Qui{\~{n}}ones},
title = {Heuristic-based Task-to-Thread Mapping in Multi-Core Processors},
booktitle = {27th {IEEE} International Conference on Emerging Technologies and
Factory Automation, {ETFA} 2022, Stuttgart, Germany, September 6-9,
2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ETFA52439.2022.9921453},
doi = {10.1109/ETFA52439.2022.9921453},
timestamp = {Wed, 24 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/etfa/GharajehRPCQ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hp3c/LiuSDW22,
author = {Chaorun Liu and
Huayou Su and
Yong Dou and
Qinglin Wang},
title = {Optimize {DGL} Operations on x86-64 Multi-Core Processors},
booktitle = {{HP3C} 2022: 6th International Conference on High Performance Compilation,
Computing and Communications, Virtual Event, China, June 23-25, 2022},
pages = {117--123},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3546000.3546018},
doi = {10.1145/3546000.3546018},
timestamp = {Fri, 17 Nov 2023 16:04:51 +0100},
biburl = {https://dblp.org/rec/conf/hp3c/LiuSDW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/LiuSDCS22,
author = {Chaorun Liu and
Huayou Su and
Yong Dou and
Kangkang Chen and
Yanjie Sun},
title = {Optimizing {GNN} on {ARM} Multi-Core Processors},
booktitle = {24th {IEEE} Int Conf on High Performance Computing {\&} Communications;
8th Int Conf on Data Science {\&} Systems; 20th Int Conf on Smart
City; 8th Int Conf on Dependability in Sensor, Cloud {\&} Big
Data Systems {\&} Application, HPCC/DSS/SmartCity/DependSys 2022,
Hainan, China, December 18-20, 2022},
pages = {1320--1327},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/HPCC-DSS-SmartCity-DependSys57074.2022.00206},
doi = {10.1109/HPCC-DSS-SMARTCITY-DEPENDSYS57074.2022.00206},
timestamp = {Thu, 06 Apr 2023 11:34:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/LiuSDCS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/indin/GharajehCP22,
author = {Mohammad Samadi Gharajeh and
Tiago Carvalho and
Lu{\'{\i}}s Miguel Pinho},
title = {Configuration of Parallel Real-Time Applications on Multi-Core Processors},
booktitle = {20th {IEEE} International Conference on Industrial Informatics, {INDIN}
2022, Perth, Australia, July 25-28, 2022},
pages = {67--73},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/INDIN51773.2022.9976163},
doi = {10.1109/INDIN51773.2022.9976163},
timestamp = {Wed, 24 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/indin/GharajehCP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/RathoreNIM22,
author = {Uneeb Rathore and
Sumeet Singh Nagi and
Subramanian S. Iyer and
Dejan Markovic},
title = {A 16nm 785GMACs/J 784-Core Digital Signal Processor Array With a Multilayer
Switch Box Interconnect, Assembled as a 2{\texttimes}2 Dielet with
10{\(\mu\)}m-Pitch Inter-Dielet {I/O} for Runtime Multi-Program Reconfiguration},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
San Francisco, CA, USA, February 20-26, 2022},
pages = {52--54},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISSCC42614.2022.9731582},
doi = {10.1109/ISSCC42614.2022.9731582},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/RathoreNIM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/AbdelgawadMCMG22,
author = {M. Abdelgawad and
Seyyed Hasan Mozafari and
James J. Clark and
Brett H. Meyer and
Warren J. Gross},
title = {BERTPerf: Inference Latency Predictor for {BERT} on {ARM} big.LITTLE
Multi-Core Processors},
booktitle = {{IEEE} Workshop on Signal Processing Systems, SiPS 2022, Rennes, France,
November 2-4, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/SiPS55645.2022.9919203},
doi = {10.1109/SIPS55645.2022.9919203},
timestamp = {Mon, 07 Nov 2022 17:39:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/AbdelgawadMCMG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/KempfHKHHB22,
author = {Fabian Kempf and
Julian H{\"{o}}fer and
Fabian Kre{\ss} and
Tim Hotfilter and
Tanja Harbaum and
J{\"{u}}rgen Becker},
editor = {Sakir Sezer and
Thomas B{\"{u}}chner and
J{\"{u}}rgen Becker and
Andrew Marshall and
Fahad Siddiqui and
Tanja Harbaum and
Kieran McLaughlin},
title = {Runtime Adaptive Cache Checkpointing for {RISC} Multi-Core Processors},
booktitle = {35th {IEEE} International System-on-Chip Conference, {SOCC} 2022,
Belfast, United Kingdom, September 5-8, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/SOCC56010.2022.9908110},
doi = {10.1109/SOCC56010.2022.9908110},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/socc/KempfHKHHB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-00655,
author = {Vanessa R. C. Leite and
Zhe Su and
Adrian M. Whatley and
Giacomo Indiveri},
title = {A hardware-software co-design approach to minimize the use of memory
resources in multi-core neuromorphic processors},
journal = {CoRR},
volume = {abs/2203.00655},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2203.00655},
doi = {10.48550/ARXIV.2203.00655},
eprinttype = {arXiv},
eprint = {2203.00655},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2203-00655.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2208-13587,
author = {Vanessa R. C. Leite and
Zhe Su and
Adrian M. Whatley and
Giacomo Indiveri},
title = {Cortical-inspired placement and routing: minimizing the memory resources
in multi-core neuromorphic processors},
journal = {CoRR},
volume = {abs/2208.13587},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2208.13587},
doi = {10.48550/ARXIV.2208.13587},
eprinttype = {arXiv},
eprint = {2208.13587},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2208-13587.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Jacobs21,
author = {Michael Jacobs},
title = {Design and Implementation of {WCET} Analyses: Including a Case Study
on Multi-Core Processors with Shared Buses},
school = {Saarland University, Saarbr{\"{u}}cken, Germany},
year = {2021},
url = {http://www.epubli.de/shop/isbn/9783754164501},
urn = {urn:nbn:de:101:1-2021091723070621476110},
timestamp = {Tue, 21 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/dnb/Jacobs21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/us/Tabish21,
author = {Rohan Tabish},
title = {Next-generation safety-critical systems using {COTS} based homogeneous
multi-core processors and heterogeneous MPSoCS},
school = {University of Illinois Urbana-Champaign, {USA}},
year = {2021},
url = {https://hdl.handle.net/2142/113134},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/us/Tabish21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/WuHYWLWLYCW21,
author = {Jiajun Wu and
Xuan Huang and
Le Yang and
Jipeng Wang and
Bingqiang Liu and
Ziyuan Wen and
Juhui Li and
Guoyi Yu and
Kwen{-}Siong Chong and
Chao Wang},
title = {An Energy-Efficient Deep Belief Network Processor Based on Heterogeneous
Multi-Core Architecture With Transposable Memory and On-Chip Learning},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {11},
number = {4},
pages = {725--738},
year = {2021},
url = {https://doi.org/10.1109/JETCAS.2021.3114396},
doi = {10.1109/JETCAS.2021.3114396},
timestamp = {Thu, 24 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/WuHYWLWLYCW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/AbbasHZ21,
author = {Haider Muhi Abbas and
Basel Halak and
Mark Zwolinski},
title = {Learning-based {BTI} stress estimation and mitigation in multi-core
processor systems},
journal = {Microprocess. Microsystems},
volume = {81},
pages = {103713},
year = {2021},
url = {https://doi.org/10.1016/j.micpro.2020.103713},
doi = {10.1016/J.MICPRO.2020.103713},
timestamp = {Fri, 04 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/AbbasHZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/LiuZ21a,
author = {Yisi Liu and
Gaowei Zhao},
title = {Simulation of swimming sports image recognition based on multi-core
processor and dynamic image sampling},
journal = {Microprocess. Microsystems},
volume = {81},
pages = {103753},
year = {2021},
url = {https://doi.org/10.1016/j.micpro.2020.103753},
doi = {10.1016/J.MICPRO.2020.103753},
timestamp = {Fri, 21 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/LiuZ21a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/WangLS21,
author = {Xu Wang and
Chengbao Li and
Jeho Song},
title = {Motion image processing system based on multi core {FPGA} processor
and convolutional neural Network},
journal = {Microprocess. Microsystems},
volume = {82},
pages = {103923},
year = {2021},
url = {https://doi.org/10.1016/j.micpro.2021.103923},
doi = {10.1016/J.MICPRO.2021.103923},
timestamp = {Tue, 25 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/WangLS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MedinaBP21,
author = {Roberto Medina and
Etienne Borde and
Laurent Pautet},
title = {Generalized Mixed-Criticality Static Scheduling for Periodic Directed
Acyclic Graphs on Multi-Core Processors},
journal = {{IEEE} Trans. Computers},
volume = {70},
number = {3},
pages = {457--470},
year = {2021},
url = {https://doi.org/10.1109/TC.2020.2990229},
doi = {10.1109/TC.2020.2990229},
timestamp = {Thu, 18 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/MedinaBP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/SalamiNN21,
author = {Bagher Salami and
Hamid Noori and
Mahmoud Naghibzadeh},
title = {Fairness-Aware Energy Efficient Scheduling on Heterogeneous Multi-Core
Processors},
journal = {{IEEE} Trans. Computers},
volume = {70},
number = {1},
pages = {72--82},
year = {2021},
url = {https://doi.org/10.1109/TC.2020.2984607},
doi = {10.1109/TC.2020.2984607},
timestamp = {Thu, 11 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/SalamiNN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/HeYWS21,
author = {Weijia He and
Ming{-}Lin Yang and
Wu Wang and
Xin{-}Qing Sheng},
title = {Efficient parallelization of multilevel fast multipole algorithm for
electromagnetic simulation on many-core {SW26010} processor},
journal = {J. Supercomput.},
volume = {77},
number = {2},
pages = {1502--1516},
year = {2021},
url = {https://doi.org/10.1007/s11227-020-03308-9},
doi = {10.1007/S11227-020-03308-9},
timestamp = {Thu, 11 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tjs/HeYWS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/MaghsoudNM21,
author = {Zeinab Maghsoud and
Hamid Noori and
Saadat Pour Mozaffari},
title = {{PEPS:} predictive energy-efficient parallel scheduler for multi-core
processors},
journal = {J. Supercomput.},
volume = {77},
number = {7},
pages = {6566--6585},
year = {2021},
url = {https://doi.org/10.1007/s11227-020-03562-x},
doi = {10.1007/S11227-020-03562-X},
timestamp = {Tue, 13 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tjs/MaghsoudNM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SagiRKZFDWHH21,
author = {Mark Sagi and
Martin Rapp and
Heba Khdr and
Yizhe Zhang and
Nael Fasfous and
Nguyen Anh Vu Doan and
Thomas Wild and
J{\"{o}}rg Henkel and
Andreas Herkersdorf},
title = {Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core
Processors},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {1685--1690},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474028},
doi = {10.23919/DATE51398.2021.9474028},
timestamp = {Fri, 24 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SagiRKZFDWHH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ebimcs/LiWSZ21,
author = {Ming Li and
Suyang Wei and
Wentao Sun and
He Zhang},
title = {Multi-core processor partitioned task scheduling algorithm design
based on {ARINC653}},
booktitle = {{EBIMCS} 2021: 4th International Conference on E-Business, Information
Management and Computer Science, Hong Kong, SAR, China, December 29
- 31, 2021},
pages = {484--488},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3511716.3511789},
doi = {10.1145/3511716.3511789},
timestamp = {Thu, 08 Feb 2024 11:11:13 +0100},
biburl = {https://dblp.org/rec/conf/ebimcs/LiWSZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccae/XiaoKMY21,
author = {He Xiao and
Monodeep Kar and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {VDPred: Predicting Voltage Droop for Power-Effient 3D Multi-core Processor
Design},
booktitle = {13th International Conference on Computer and Automation Engineering,
{ICCAE} 2021, Melbourne, Australia, March 20-22, 2021},
pages = {83--88},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICCAE51876.2021.9426107},
doi = {10.1109/ICCAE51876.2021.9426107},
timestamp = {Mon, 17 May 2021 14:57:00 +0200},
biburl = {https://dblp.org/rec/conf/iccae/XiaoKMY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/NiknamPP21,
author = {Sobhan Niknam and
Anuj Pathania and
Andy D. Pimentel},
title = {{T-TSP:} Transient-Temperature Based Safe Power Budgeting in Multi-/Many-Core
Processors},
booktitle = {39th {IEEE} International Conference on Computer Design, {ICCD} 2021,
Storrs, CT, USA, October 24-27, 2021},
pages = {500--508},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICCD53106.2021.00083},
doi = {10.1109/ICCD53106.2021.00083},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/NiknamPP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecc/PandyaPP21,
author = {Samvid Bhargav Pandya and
Rikikumar Hasmukhbhai Patel and
Abhijit Sudhir Pandya},
title = {Evaluation of Power Consumption of Entry-Level and Mid-Range Multi-Core
Mobile Processor},
booktitle = {{ICECC} 2021: The 4th International Conference on Electronics, Communications
and Control Engineering, Seoul, Republic of Korea, April 9 - 11, 2021},
pages = {32--39},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3462676.3462682},
doi = {10.1145/3462676.3462682},
timestamp = {Wed, 27 Sep 2023 12:07:33 +0200},
biburl = {https://dblp.org/rec/conf/icecc/PandyaPP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icsai/ZhouYDCW021,
author = {Junsheng Zhou and
Wangdong Yang and
Minlu Dai and
Qinyun Cai and
Haotian Wang and
Kenli Li},
editor = {Jianxi Yang and
Kenli Li and
Wanqing Tu and
Zheng Xiao and
Libo Wang},
title = {Parallel Sparse {LU} Factorization With Machine-Learning Method on
Multi-core Processors},
booktitle = {7th International Conference on Systems and Informatics, {ICSAI} 2021,
Chongqing, China, November 13-15, 2021},
pages = {1--11},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICSAI53574.2021.9664163},
doi = {10.1109/ICSAI53574.2021.9664163},
timestamp = {Wed, 24 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icsai/ZhouYDCW021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icycsee/KongNZXH21,
author = {Jinying Kong and
Kai Nie and
Qinglei Zhou and
Jinlong Xu and
Lin Han},
editor = {Jianchao Zeng and
Pinle Qin and
Weipeng Jing and
Xianhua Song and
Zeguang Lu},
title = {Thread Private Variable Access Optimization Technique for Sunway High-Performance
Multi-core Processors},
booktitle = {Data Science - 7th International Conference of Pioneering Computer
Scientists, Engineers and Educators, {ICPCSEE} 2021, Taiyuan, China,
September 17-20, 2021, Proceedings, Part {I}},
series = {Communications in Computer and Information Science},
volume = {1451},
pages = {180--189},
publisher = {Springer},
year = {2021},
url = {https://doi.org/10.1007/978-981-16-5940-9\_14},
doi = {10.1007/978-981-16-5940-9\_14},
timestamp = {Tue, 20 Aug 2024 07:54:43 +0200},
biburl = {https://dblp.org/rec/conf/icycsee/KongNZXH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icycsee/NieZQPXL21,
author = {Kai Nie and
Qinglei Zhou and
Hong Qian and
Jianmin Pang and
Jinlong Xu and
Yapeng Li},
editor = {Jianchao Zeng and
Pinle Qin and
Weipeng Jing and
Xianhua Song and
Zeguang Lu},
title = {Parallel Region Reconstruction Technique for Sunway High-Performance
Multi-core Processors},
booktitle = {Data Science - 7th International Conference of Pioneering Computer
Scientists, Engineers and Educators, {ICPCSEE} 2021, Taiyuan, China,
September 17-20, 2021, Proceedings, Part {I}},
series = {Communications in Computer and Information Science},
volume = {1451},
pages = {163--179},
publisher = {Springer},
year = {2021},
url = {https://doi.org/10.1007/978-981-16-5940-9\_13},
doi = {10.1007/978-981-16-5940-9\_13},
timestamp = {Fri, 21 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icycsee/NieZQPXL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcci/SM21,
author = {Pratik S. and
Abhishek Mishra},
editor = {Thomas B{\"{a}}ck and
Christian Wagner and
Jonathan M. Garibaldi and
H. K. Lam and
Marie Cottrell and
Juan Juli{\'{a}}n Merelo and
Kevin Warwick},
title = {A Simulated Annealing based Energy Efficient Task Scheduling Algorithm
for Multi-core Processors},
booktitle = {Proceedings of the 13th International Joint Conference on Computational
Intelligence, {IJCCI} 2021, Online Streaming, October 25-27, 2021},
pages = {81--87},
publisher = {{SCITEPRESS}},
year = {2021},
url = {https://doi.org/10.5220/0010625900003063},
doi = {10.5220/0010625900003063},
timestamp = {Tue, 06 Jun 2023 14:58:01 +0200},
biburl = {https://dblp.org/rec/conf/ijcci/SM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NakayamaI21,
author = {Ryohei Nakayama and
Makoto Ikeda},
title = {{BN-254} Based Multi-Core, Multi-Pairing Crypto-Processor for Functional
Encryption},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401283},
doi = {10.1109/ISCAS51556.2021.9401283},
timestamp = {Fri, 02 Jul 2021 12:26:54 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NakayamaI21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/Hosseinimotlagh21,
author = {Seyedmehdi Hosseinimotlagh and
Daniel Enright and
Christian R. Shelton and
Hyoseung Kim},
title = {Data-Driven Structured Thermal Modeling for {COTS} Multi-core Processors},
booktitle = {42nd {IEEE} Real-Time Systems Symposium, {RTSS} 2021, Dortmund, Germany,
December 7-10, 2021},
pages = {201--213},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RTSS52674.2021.00028},
doi = {10.1109/RTSS52674.2021.00028},
timestamp = {Mon, 29 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rtss/Hosseinimotlagh21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/MaityGDPC21,
author = {Srijeeta Maity and
Anirban Ghose and
Soumyajit Dey and
Sangyoung Park and
Samarjit Chakraborty},
title = {Work-in-Progress: Cooling by Core-Idling: Thermal-Aware Thread Scheduling
for Mobile Multicore Processors},
booktitle = {42nd {IEEE} Real-Time Systems Symposium, {RTSS} 2021, Dortmund, Germany,
December 7-10, 2021},
pages = {520--523},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/RTSS52674.2021.00055},
doi = {10.1109/RTSS52674.2021.00055},
timestamp = {Mon, 25 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rtss/MaityGDPC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MandalGDH21,
author = {Sudipa Mandal and
Krushna Gaurkar and
Pallab Dasgupta and
Aritra Hazra},
title = {An {RL} based Approach for Thermal-Aware Energy Optimized Task Scheduling
in Multi-core Processors},
booktitle = {34th International Conference on {VLSI} Design and 20th International
Conference on Embedded Systems, {VLSID} 2021, Guwahati, India, February
20-24, 2021},
pages = {181--186},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/VLSID51830.2021.00036},
doi = {10.1109/VLSID51830.2021.00036},
timestamp = {Mon, 14 Nov 2022 15:28:08 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MandalGDH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/Li21g,
title = {Big data public art design based on multi core processor and computer
vision},
journal = {Microprocess. Microsystems},
volume = {81},
pages = {103777},
year = {2021},
note = {Withdrawn.},
url = {https://doi.org/10.1016/j.micpro.2020.103777},
doi = {10.1016/J.MICPRO.2020.103777},
timestamp = {Thu, 13 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/Li21g.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Kang20,
author = {Suk Chan Kang},
title = {Optimizing high locality memory references in cache coherent shared
memory multi-core processors},
school = {Georgia Institute of Technology, Atlanta, GA, {USA}},
year = {2020},
url = {https://hdl.handle.net/1853/62641},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Kang20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/BenAmor20,
author = {Slim Ben{-}Amor},
title = {Scheduling of Dependent Tasks with Probabilistic Execution Times on
Multi-core Processors. (Ordonnancement des T{\^{a}}ches avec des D{\'{e}}pendances
et des Temps d'Ex{\'{e}}cution Probabilistes sur Processeur Multi-c{\oe}urs)},
school = {Paris-Sorbonne University, France},
year = {2020},
url = {https://tel.archives-ouvertes.fr/tel-03119187},
timestamp = {Wed, 05 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/hal/BenAmor20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/WangTF20,
author = {Junchang Wang and
Yangfeng Tian and
Xiong Fu},
title = {EQueue: Elastic Lock-Free {FIFO} Queue for Core-to-Core Communication
on Multi-Core Processors},
journal = {{IEEE} Access},
volume = {8},
pages = {98729--98741},
year = {2020},
url = {https://doi.org/10.1109/ACCESS.2020.2997071},
doi = {10.1109/ACCESS.2020.2997071},
timestamp = {Tue, 16 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/WangTF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/WuLCXA20,
author = {Zheng Wu and
Mingfan Li and
Mengxian Chi and
Le Xu and
Hong An},
title = {Runtime Adaptive Matrix Multiplication for the {SW26010} Many-Core
Processor},
journal = {{IEEE} Access},
volume = {8},
pages = {156915--156928},
year = {2020},
url = {https://doi.org/10.1109/ACCESS.2020.3019302},
doi = {10.1109/ACCESS.2020.3019302},
timestamp = {Sat, 19 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/WuLCXA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cluster/YouW20,
author = {Guohua You and
Xuejing Wang},
title = {A server-side accelerator framework for multi-core CPUs and Intel
Xeon Phi co-processor systems},
journal = {Clust. Comput.},
volume = {23},
number = {4},
pages = {2591--2608},
year = {2020},
url = {https://doi.org/10.1007/s10586-019-03030-z},
doi = {10.1007/S10586-019-03030-Z},
timestamp = {Tue, 03 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cluster/YouW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/ImanY20,
author = {Mohammad Reza Heidari Iman and
Pejman Yaghmaie},
title = {A software control flow checking technique in multi-core processors},
journal = {Int. J. Embed. Syst.},
volume = {13},
number = {2},
pages = {136--147},
year = {2020},
url = {https://doi.org/10.1504/IJES.2020.108861},
doi = {10.1504/IJES.2020.108861},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijes/ImanY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/HuoMCG20,
author = {Zenan Huo and
Gang Mei and
Giampaolo Casolla and
Fabio Giampaolo},
title = {Designing an efficient parallel spectral clustering algorithm on multi-core
processors in Julia},
journal = {J. Parallel Distributed Comput.},
volume = {138},
pages = {211--221},
year = {2020},
url = {https://doi.org/10.1016/j.jpdc.2020.01.003},
doi = {10.1016/J.JPDC.2020.01.003},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/HuoMCG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/JiangYM20,
author = {Lijuan Jiang and
Chao Yang and
Wenjing Ma},
title = {Enabling Highly Efficient Batched Matrix Multiplications on {SW26010}
Many-core Processor},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {17},
number = {1},
pages = {3:1--3:23},
year = {2020},
url = {https://doi.org/10.1145/3378176},
doi = {10.1145/3378176},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/JiangYM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/KimKKC20,
author = {Young Geun Kim and
Minyong Kim and
Joonho Kong and
Sung Woo Chung},
title = {An Adaptive Thermal Management Framework for Heterogeneous Multi-Core
Processors},
journal = {{IEEE} Trans. Computers},
volume = {69},
number = {6},
pages = {894--906},
year = {2020},
url = {https://doi.org/10.1109/TC.2020.2970062},
doi = {10.1109/TC.2020.2970062},
timestamp = {Tue, 16 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/KimKKC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apsys/ReifHHHS20,
author = {Stefan Reif and
Benedict Herzog and
Fabian H{\"{u}}gel and
Timo H{\"{o}}nig and
Wolfgang Schr{\"{o}}der{-}Preikschat},
editor = {Taesoo Kim and
Patrick P. C. Lee},
title = {Nearly symmetric multi-core processors},
booktitle = {APSys '20: 11th {ACM} {SIGOPS} Asia-Pacific Workshop on Systems, Tsukuba,
Japan, August 24-25, 2020},
pages = {42--49},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3409963.3410486},
doi = {10.1145/3409963.3410486},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apsys/ReifHHHS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/WuHYWWLCLW20,
author = {Jiajun Wu and
Xuan Huang and
Le Yang and
Liang Wang and
Jipeng Wang and
Zuozhu Liu and
Kwen{-}Siong Chong and
Shaowei Lin and
Chao Wang},
title = {An Energy-efficient Multi-core Restricted Boltzmann Machine Processor
with On-chip Bio-plausible Learning and Reconfigurable Sparsity},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2020, Virtual
Event, Japan, November 9-11, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/A-SSCC48613.2020.9336135},
doi = {10.1109/A-SSCC48613.2020.9336135},
timestamp = {Thu, 24 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/WuHYWWLCLW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/IsmailS20,
author = {Mohamed Ismail and
G. Edward Suh},
title = {Efficient nursery sizing for managed languages on multi-core processors
with shared caches},
booktitle = {{CGO} '20: 18th {ACM/IEEE} International Symposium on Code Generation
and Optimization, San Diego, CA, USA, February, 2020},
pages = {1--15},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3368826.3377908},
doi = {10.1145/3368826.3377908},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cgo/IsmailS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cisim/JablonskaC20,
author = {Klaudia Jablonska and
Pawel Czarnul},
editor = {Khalid Saeed and
Jir{\'{\i}} Dvorsk{\'{y}}},
title = {Benchmarking Deep Neural Network Training Using Multi- and Many-Core
Processors},
booktitle = {Computer Information Systems and Industrial Management - 19th International
Conference, {CISIM} 2020, Bialystok, Poland, October 16-18, 2020,
Proceedings},
series = {Lecture Notes in Computer Science},
volume = {12133},
pages = {230--242},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-47679-3\_20},
doi = {10.1007/978-3-030-47679-3\_20},
timestamp = {Tue, 16 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cisim/JablonskaC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsa/NiuHD20,
author = {Yueyao Niu and
Wei Han and
Xiaodi Dai},
title = {Load Balancing Evaluation of Multi-core Processors based on {BMP}
Architecture},
booktitle = {7th International Conference on Dependable Systems and Their Applications,
{DSA} 2020, Xi'an, China, November 28-29, 2020},
pages = {330},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DSA51864.2020.00059},
doi = {10.1109/DSA51864.2020.00059},
timestamp = {Tue, 02 Feb 2021 11:27:32 +0100},
biburl = {https://dblp.org/rec/conf/dsa/NiuHD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsrt/IgarashiIHKA20,
author = {Shingo Igarashi and
Tasuku Ishigooka and
Tatsuya Horiguchi and
Ryotaro Koike and
Takuya Azumi},
editor = {Dusan Maga and
Jiri Hajek},
title = {Heuristic Contention-Free Scheduling Algorithm for Multi-core Processor
using {LET} Model},
booktitle = {24th {IEEE/ACM} International Symposium on Distributed Simulation
and Real Time Applications, {DS-RT} 2020, Prague, Czech Republic,
September 14-16, 2020},
pages = {1--10},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DS-RT50469.2020.9213582},
doi = {10.1109/DS-RT50469.2020.9213582},
timestamp = {Tue, 13 Oct 2020 17:01:37 +0200},
biburl = {https://dblp.org/rec/conf/dsrt/IgarashiIHKA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icccs/GautamUS20,
author = {Savita Gautam and
M. Sarosh Umar and
Abdus Samad},
title = {Multi-fold Scheduling Algorithm for Multi-core Multi-Processor Systems},
booktitle = {5th International Conference on Computing, Communication and Security,
{ICCCS} 2020, Patna, India, October 14-16, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICCCS49678.2020.9276749},
doi = {10.1109/ICCCS49678.2020.9276749},
timestamp = {Mon, 14 Dec 2020 11:00:36 +0100},
biburl = {https://dblp.org/rec/conf/icccs/GautamUS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AugustineRJM20,
author = {Joe Augustine and
Kanakagiri Raghavendra and
John Jose and
Madhu Mutyam},
title = {Router Buffer Caching for Managing Shared Cache Blocks in Tiled Multi-Core
Processors},
booktitle = {38th {IEEE} International Conference on Computer Design, {ICCD} 2020,
Hartford, CT, USA, October 18-21, 2020},
pages = {239--246},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICCD50377.2020.00050},
doi = {10.1109/ICCD50377.2020.00050},
timestamp = {Mon, 11 Jan 2021 13:35:27 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AugustineRJM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccse2/YanJTLLQY20,
author = {Jinli Yan and
Chunbo Jia and
Lu Tang and
Tao Li and
Gaofeng Lv and
Wei Quan and
Hui Yang},
title = {Network Programming Interface in General-Purpose Multi-core Processor:
{A} Survey},
booktitle = {15th International Conference on Computer Science {\&} Education,
{ICCSE} 2020, Delft, The Netherlands, August 18-22, 2020},
pages = {675--680},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICCSE49874.2020.9201704},
doi = {10.1109/ICCSE49874.2020.9201704},
timestamp = {Thu, 16 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccse2/YanJTLLQY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChenXLSGLLHLCLP20,
author = {Chen Chen and
Xiaoyan Xiang and
Chang Liu and
Yunhai Shang and
Ren Guo and
Dongqi Liu and
Yimin Lu and
Ziyi Hao and
Jiahui Luo and
Zhijian Chen and
Chunqiang Li and
Yu Pu and
Jianyi Meng and
Xiaolang Yan and
Yuan Xie and
Xiaoning Qi},
title = {Xuantie-910: {A} Commercial Multi-Core 12-Stage Pipeline Out-of-Order
64-bit High Performance {RISC-V} Processor with Vector Extension :
Industrial Product},
booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020},
pages = {52--64},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCA45697.2020.00016},
doi = {10.1109/ISCA45697.2020.00016},
timestamp = {Tue, 13 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/ChenXLSGLLHLCLP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ithings/MinamiNKF20,
author = {Daichi Minami and
Yukikazu Nakamoto and
Yoshitaka Koga and
Koji Fukuoka},
title = {Simulation environment of embedded control system for multi-core processor
with faster {CPU} simulator},
booktitle = {2020 International Conferences on Internet of Things (iThings) and
{IEEE} Green Computing and Communications (GreenCom) and {IEEE} Cyber,
Physical and Social Computing (CPSCom) and {IEEE} Smart Data (SmartData)
and {IEEE} Congress on Cybermatics (Cybermatics), iThings/GreenCom/CPSCom/SmartData/Cybermatics
2020, Rhodes Island, Greece, November 2-6, 2020},
pages = {405--410},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/iThings-GreenCom-CPSCom-SmartData-Cybermatics50389.2020.00078},
doi = {10.1109/ITHINGS-GREENCOM-CPSCOM-SMARTDATA-CYBERMATICS50389.2020.00078},
timestamp = {Thu, 28 Jan 2021 15:35:58 +0100},
biburl = {https://dblp.org/rec/conf/ithings/MinamiNKF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/meco/TabishWP0YCS20,
author = {Rohan Tabish and
Jen{-}Yang Wen and
Rodolfo Pellizzoni and
Renato Mancuso and
Heechul Yun and
Marco Caccamo and
Lui Sha},
title = {SCE-Comm: {A} Real-Time Inter-Core Communication Framework for Strictly
Partitioned Multi-core Processors},
booktitle = {9th Mediterranean Conference on Embedded Computing, {MECO} 2020, Budva,
Montenegro, June 8-11, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/MECO49872.2020.9134178},
doi = {10.1109/MECO49872.2020.9134178},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/meco/TabishWP0YCS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mlcad/ZouGLG020,
author = {An Zou and
Karthik Garimella and
Benjamin Lee and
Christopher D. Gill and
Xuan Zhang},
editor = {Ulf Schlichtmann and
Raviv Gal and
Hussam Amrouch and
Hai (Helen) Li},
title = {{F-LEMMA:} Fast Learning-based Energy Management for Multi-/Many-core
Processors},
booktitle = {{MLCAD} '20: 2020 {ACM/IEEE} Workshop on Machine Learning for CAD,
Virtual Event, Iceland, November 16-20, 2020},
pages = {43--48},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3380446.3430630},
doi = {10.1145/3380446.3430630},
timestamp = {Mon, 03 May 2021 16:42:27 +0200},
biburl = {https://dblp.org/rec/conf/mlcad/ZouGLG020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/OehlertWF20,
author = {Dominic Oehlert and
Edward Uma{\~{n}}a Williams and
Heiko Falk},
title = {Work-In-Progress: Fine-Grained On-Chip Energy Measurement of a Real-Time
Multi-Core Processor},
booktitle = {41st {IEEE} Real-Time Systems Symposium, {RTSS} 2020, Houston, TX,
USA, December 1-4, 2020},
pages = {383--386},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RTSS49844.2020.00044},
doi = {10.1109/RTSS49844.2020.00044},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rtss/OehlertWF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/Perez-Rodriguez20,
author = {Javier P{\'{e}}rez{-}Rodr{\'{\i}}guez and
Patrick Meumeu Yomsi},
title = {Work-in-Progress: Towards a fine-grain thermal model for uniform multi-core
processors},
booktitle = {41st {IEEE} Real-Time Systems Symposium, {RTSS} 2020, Houston, TX,
USA, December 1-4, 2020},
pages = {403--406},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RTSS49844.2020.00049},
doi = {10.1109/RTSS49844.2020.00049},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtss/Perez-Rodriguez20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sensys/WangWL0JZ20,
author = {Jie Wang and
Yuewu Wang and
Lingguang Lei and
Kun Sun and
Jiwu Jing and
Quan Zhou},
editor = {Jin Nakazawa and
Polly Huang},
title = {TrustICT: an efficient trusted interaction interface between isolated
execution domains on {ARM} multi-core processors},
booktitle = {SenSys '20: The 18th {ACM} Conference on Embedded Networked Sensor
Systems, Virtual Event, Japan, November 16-19, 2020},
pages = {271--284},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3384419.3430718},
doi = {10.1145/3384419.3430718},
timestamp = {Wed, 04 May 2022 13:03:25 +0200},
biburl = {https://dblp.org/rec/conf/sensys/WangWL0JZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigmod/TheodorakisKPP20,
author = {Georgios Theodorakis and
Alexandros Koliousis and
Peter R. Pietzuch and
Holger Pirk},
editor = {David Maier and
Rachel Pottinger and
AnHai Doan and
Wang{-}Chiew Tan and
Abdussalam Alawini and
Hung Q. Ngo},
title = {LightSaber: Efficient Window Aggregation on Multi-core Processors},
booktitle = {Proceedings of the 2020 International Conference on Management of
Data, {SIGMOD} Conference 2020, online conference [Portland, OR, USA],
June 14-19, 2020},
pages = {2505--2521},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3318464.3389753},
doi = {10.1145/3318464.3389753},
timestamp = {Wed, 04 May 2022 13:02:28 +0200},
biburl = {https://dblp.org/rec/conf/sigmod/TheodorakisKPP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShamsaKTPCRL20,
author = {Elham Shamsa and
Anil Kanduri and
Nima Taherinejad and
Alma Pr{\"{o}}bstl and
Samarjit Chakraborty and
Amir M. Rahmani and
Pasi Liljeberg},
title = {User-centric Resource Management for Embedded Multi-core Processors},
booktitle = {33rd International Conference on {VLSI} Design and 19th International
Conference on Embedded Systems, {VLSID} 2020, Bangalore, India, January
4-8, 2020},
pages = {43--48},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSID49098.2020.00025},
doi = {10.1109/VLSID49098.2020.00025},
timestamp = {Mon, 14 Nov 2022 15:28:08 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShamsaKTPCRL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2008-10037,
author = {Suryanarayana Murthy Durbhakula},
title = {{ILP} Aware Scheduling on Multithreaded Multi-core Processors},
journal = {CoRR},
volume = {abs/2008.10037},
year = {2020},
url = {https://arxiv.org/abs/2008.10037},
eprinttype = {arXiv},
eprint = {2008.10037},
timestamp = {Fri, 28 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2008-10037.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2010-16058,
author = {Anton V. Eremeev and
Anton A. Malakhov and
Maxim A. Sakhno and
Maria Yu. Sosnovskaya},
title = {Multi-Core Processor Scheduling with Respect to Data Bus Bandwidth},
journal = {CoRR},
volume = {abs/2010.16058},
year = {2020},
url = {https://arxiv.org/abs/2010.16058},
eprinttype = {arXiv},
eprint = {2010.16058},
timestamp = {Thu, 18 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2010-16058.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dk/Strom19,
author = {T{\'{o}}rur Biskopst{\o} Str{\o}m},
title = {Real-Time Synchronization on Multi-Core Processors},
school = {Technical University of Denmark},
year = {2019},
url = {https://orbit.dtu.dk/en/publications/9f036721-eaba-4fa4-9353-930f559ab8b9},
timestamp = {Mon, 07 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/dk/Strom19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Haas19a,
author = {Florian Haas},
title = {Fault-tolerant Execution of Parallel Applications on x86 Multi-core
Processors with Hardware Transactional Memory},
school = {University of Augsburg, Germany},
year = {2019},
url = {https://opus.bibliothek.uni-augsburg.de/opus4/frontdoor/index/index/docId/59566},
urn = {urn:nbn:de:bvb:384-opus4-595668},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/dnb/Haas19a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Hofmann19,
author = {Johannes Hofmann},
title = {A First-Principles Approach to Performance, Power, and Energy Models
for Contemporary Multi- and Many-Core Processors},
school = {University of Erlangen-Nuremberg, Germany},
year = {2019},
url = {https://d-nb.info/1202373054},
isbn = {978-3-8439-4187-7},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/dnb/Hofmann19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/ParkKPJ19,
author = {Junmo Park and
Yongin Kwon and
Yongjun Park and
Dongsuk Jeon},
title = {Microarchitecture-Aware Code Generation for Deep Learning on Single-ISA
Heterogeneous Multi-Core Mobile Processors},
journal = {{IEEE} Access},
volume = {7},
pages = {52371--52378},
year = {2019},
url = {https://doi.org/10.1109/ACCESS.2019.2910559},
doi = {10.1109/ACCESS.2019.2910559},
timestamp = {Mon, 07 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/ParkKPJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/Valero-LaraASLF19,
author = {Pedro Valero{-}Lara and
Diego Andrade and
Ra{\"{u}}l Sirvent and
Jes{\'{u}}s Labarta and
Basilio B. Fraguela and
Ramon Doallo},
title = {A Fast Solver for Large Tridiagonal Systems on Multi-Core Processors
(Lass Library)},
journal = {{IEEE} Access},
volume = {7},
pages = {23365--23378},
year = {2019},
url = {https://doi.org/10.1109/ACCESS.2019.2900122},
doi = {10.1109/ACCESS.2019.2900122},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/Valero-LaraASLF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/XingLXCL19,
author = {Yuxuan Xing and
Fang Liu and
Nong Xiao and
Zhiguang Chen and
Yutong Lu},
title = {Capability for Multi-Core and Many-Core Memory Systems: {A} Case-Study
With Xeon Processors},
journal = {{IEEE} Access},
volume = {7},
pages = {47655--47662},
year = {2019},
url = {https://doi.org/10.1109/ACCESS.2018.2881460},
doi = {10.1109/ACCESS.2018.2881460},
timestamp = {Fri, 31 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/XingLXCL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cem/KimNP19,
author = {Junha Kim and
Yeomin Nam and
Moonju Park},
title = {Energy-Aware Core Switching for Mobile Devices with a Heterogeneous
Multicore Processor},
journal = {{IEEE} Consumer Electron. Mag.},
volume = {8},
number = {6},
pages = {68--75},
year = {2019},
url = {https://doi.org/10.1109/MCE.2019.2941352},
doi = {10.1109/MCE.2019.2941352},
timestamp = {Thu, 18 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cem/KimNP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cluster/XieW19,
author = {Ying Xie and
Jinzhao Wu},
title = {Multi-objective constraint task scheduling algorithm for multi-core
processors},
journal = {Clust. Comput.},
volume = {22},
number = {3},
pages = {953--964},
year = {2019},
url = {https://doi.org/10.1007/s10586-018-2884-6},
doi = {10.1007/S10586-018-2884-6},
timestamp = {Tue, 29 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cluster/XieW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/YountDT19,
author = {Charles Yount and
Alejandro Duran and
Josh Tobin},
title = {Multi-level spatial and temporal tiling for efficient {HPC} stencil
computation on many-core processors with large shared caches},
journal = {Future Gener. Comput. Syst.},
volume = {92},
pages = {903--919},
year = {2019},
url = {https://doi.org/10.1016/j.future.2017.10.041},
doi = {10.1016/J.FUTURE.2017.10.041},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fgcs/YountDT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijcse/LokhandeA19,
author = {Mahesh Lokhande and
Mohammad Atique},
title = {Assessment of nested-parallel task model under real-time scheduling
on multi-core processors},
journal = {Int. J. Comput. Sci. Eng.},
volume = {20},
number = {3},
pages = {299--316},
year = {2019},
url = {https://doi.org/10.1504/IJCSE.2019.103956},
doi = {10.1504/IJCSE.2019.103956},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijcse/LokhandeA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/ChronakiMCRBAV19,
author = {Kallia Chronaki and
Miquel Moret{\'{o}} and
Marc Casas and
Alejandro Rico and
Rosa M. Badia and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {On the maturity of parallel applications for asymmetric multi-core
processors},
journal = {J. Parallel Distributed Comput.},
volume = {127},
pages = {105--115},
year = {2019},
url = {https://doi.org/10.1016/j.jpdc.2019.01.007},
doi = {10.1016/J.JPDC.2019.01.007},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/ChronakiMCRBAV19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/SoniHRM19,
author = {V. Soni and
Abdellah Hadjadj and
Olivier Roussel and
G. Moebs},
title = {Parallel multi-core and multi-processor methods on point-value multiresolution
algorithms for hyperbolic conservation laws},
journal = {J. Parallel Distributed Comput.},
volume = {123},
pages = {192--203},
year = {2019},
url = {https://doi.org/10.1016/j.jpdc.2018.09.016},
doi = {10.1016/J.JPDC.2018.09.016},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/SoniHRM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/MorenG19,
author = {Konrad Moren and
Diana G{\"{o}}hringer},
title = {A framework for accelerating local feature extraction with OpenCL
on multi-core CPUs and co-processors},
journal = {J. Real Time Image Process.},
volume = {16},
number = {4},
pages = {901--918},
year = {2019},
url = {https://doi.org/10.1007/s11554-016-0576-0},
doi = {10.1007/S11554-016-0576-0},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jrtip/MorenG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/DuZGY19,
author = {He Du and
Wei Zhang and
Nan Guan and
Wang Yi},
title = {Scope-aware data cache analysis for OpenMP programs on multi-core
processors},
journal = {J. Syst. Archit.},
volume = {98},
pages = {443--452},
year = {2019},
url = {https://doi.org/10.1016/j.sysarc.2019.04.001},
doi = {10.1016/J.SYSARC.2019.04.001},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/DuZGY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/ChakrabortyB19,
author = {Anirban Chakraborty and
Ayan Banerjee},
title = {Modular and parallel {VLSI} architecture of multi-dimensional quad-core
{GA} co-processor for real time image/video processing},
journal = {Microprocess. Microsystems},
volume = {65},
pages = {180--195},
year = {2019},
url = {https://doi.org/10.1016/j.micpro.2019.02.002},
doi = {10.1016/J.MICPRO.2019.02.002},
timestamp = {Mon, 21 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/ChakrabortyB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/NagasakaMAB19,
author = {Yusuke Nagasaka and
Satoshi Matsuoka and
Ariful Azad and
Aydin Bulu{\c{c}}},
title = {Performance optimization, modeling and analysis of sparse matrix-matrix
products on multi-core and many-core processors},
journal = {Parallel Comput.},
volume = {90},
year = {2019},
url = {https://doi.org/10.1016/j.parco.2019.102545},
doi = {10.1016/J.PARCO.2019.102545},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pc/NagasakaMAB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/superfri/Takayashiki0KK19,
author = {Hikaru Takayashiki and
Masayuki Sato and
Kazuhiko Komatsu and
Hiroaki Kobayashi},
title = {A Skewed Multi-banked Cache for Many-core Vector Processors},
journal = {Supercomput. Front. Innov.},
volume = {6},
number = {3},
pages = {86--101},
year = {2019},
url = {https://doi.org/10.14529/jsfi190305},
doi = {10.14529/JSFI190305},
timestamp = {Fri, 11 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/superfri/Takayashiki0KK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/suscom/ChengCLZKH19,
author = {Long Cheng and
Gang Chen and
Jieling Li and
Zhihao Zhao and
Alois C. Knoll and
Kai Huang},
title = {McFTP: {A} framework for fast thermal managements prototyping on real
multi-core processors},
journal = {Sustain. Comput. Informatics Syst.},
volume = {22},
pages = {191--205},
year = {2019},
url = {https://doi.org/10.1016/j.suscom.2018.08.003},
doi = {10.1016/J.SUSCOM.2018.08.003},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/suscom/ChengCLZKH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/adma/Phan19,
author = {Huan Phan},
editor = {Jianxin Li and
Sen Wang and
Shaowen Qin and
Xue Li and
Shuliang Wang},
title = {An Efficient Mining Algorithm of Closed Frequent Itemsets on Multi-core
Processor},
booktitle = {Advanced Data Mining and Applications - 15th International Conference,
{ADMA} 2019, Dalian, China, November 21-23, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11888},
pages = {107--118},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-35231-8\_8},
doi = {10.1007/978-3-030-35231-8\_8},
timestamp = {Wed, 21 Aug 2024 07:35:24 +0200},
biburl = {https://dblp.org/rec/conf/adma/Phan19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/FishB19,
author = {Jonathan Fish and
Alfred Bognar},
editor = {Martin Schoeberl and
Christian Hochberger and
Sascha Uhrig and
J{\"{u}}rgen Brehm and
Thilo Pionteck},
title = {Investigation of L2-Cache Interferences in a {NXP} QorIQ {T4240} Multi-core
Processor},
booktitle = {Architecture of Computing Systems - {ARCS} 2019 - 32nd International
Conference, Copenhagen, Denmark, May 20-23, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11479},
pages = {183--194},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-18656-2\_14},
doi = {10.1007/978-3-030-18656-2\_14},
timestamp = {Fri, 31 Jan 2020 21:32:25 +0100},
biburl = {https://dblp.org/rec/conf/arcs/FishB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/csit/MochuradB19,
author = {Lesia I. Mochurad and
Nataliya Boyko},
editor = {Natalya Shakhovska and
Mykola O. Medykovskyy},
title = {Solving Systems of Nonlinear Equations on Multi-core Processors},
booktitle = {Advances in Intelligent Systems and Computing {IV} - Selected Papers
from the International Conference on Computer Science and Information
Technologies, {CSIT} 2019, September 17-20, 2019, Lviv, Ukraine},
series = {Advances in Intelligent Systems and Computing},
volume = {1080},
pages = {90--106},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-33695-0\_8},
doi = {10.1007/978-3-030-33695-0\_8},
timestamp = {Thu, 11 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/csit/MochuradB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SadiqbatchaZAHT19,
author = {Sheriff Sadiqbatcha and
Hengyang Zhao and
Hussam Amrouch and
J{\"{o}}rg Henkel and
Sheldon X.{-}D. Tan},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Hot Spot Identification and System Parameterized Thermal Modeling
for Multi-Core Processors Through Infrared Thermal Imaging},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {48--53},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8714918},
doi = {10.23919/DATE.2019.8714918},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SadiqbatchaZAHT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/HaghiKGG19,
author = {Mojtaba Haghi and
Martijn Koedam and
Dip Goswami and
Kees Goossens},
title = {Model-Based Processor-in-the-Loop Framework for Composable Multi-core
Platforms},
booktitle = {22nd Euromicro Conference on Digital System Design, {DSD} 2019, Kallithea,
Greece, August 28-30, 2019},
pages = {592--596},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DSD.2019.00090},
doi = {10.1109/DSD.2019.00090},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/HaghiKGG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsn/WanS0Z019,
author = {Shengye Wan and
Jianhua Sun and
Kun Sun and
Ning Zhang and
Qi Li},
title = {{SATIN:} {A} Secure and Trustworthy Asynchronous Introspection on
Multi-Core {ARM} Processors},
booktitle = {49th Annual {IEEE/IFIP} International Conference on Dependable Systems
and Networks, {DSN} 2019, Portland, OR, USA, June 24-27, 2019},
pages = {289--301},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DSN.2019.00040},
doi = {10.1109/DSN.2019.00040},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/dsn/WanS0Z019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsrt/IgarashiKIHA19,
author = {Shingo Igarashi and
Yuto Kitagawa and
Tasuku Ishigooka and
Tatsuya Horiguchi and
Takuya Azumi},
editor = {Floriano De Rango and
Carlos T. Calafate and
Miroslav Vozn{\'{a}}k and
Alfredo Garro and
Mauro Tropea},
title = {Multi-rate {DAG} Scheduling Considering Communication Contention for
NoC-based Embedded Many-core Processor},
booktitle = {23rd {IEEE/ACM} International Symposium on Distributed Simulation
and Real Time Applications {DS-RT} 2019, Cosenza, Italy, October 7-9,
2019},
pages = {1--10},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DS-RT47707.2019.8958696},
doi = {10.1109/DS-RT47707.2019.8958696},
timestamp = {Fri, 31 Jan 2020 16:11:39 +0100},
biburl = {https://dblp.org/rec/conf/dsrt/IgarashiKIHA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eit/AbegazK19,
author = {Brook W. Abegaz and
J. Kueber},
title = {Voltage Regulator Thermal Matrix based Thread Allocation Optimization
for a Multi-Core Processor},
booktitle = {2019 {IEEE} International Conference on Electro Information Technology,
{EIT} 2019, Brookings, SD, USA, May 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/EIT.2019.8833756},
doi = {10.1109/EIT.2019.8833756},
timestamp = {Tue, 08 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eit/AbegazK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/XuZL19,
author = {Ke Xu and
Dafang Zhang and
Yanbiao Li},
editor = {Zheng Xiao and
Laurence T. Yang and
Pavan Balaji and
Tao Li and
Keqin Li and
Albert Y. Zomaya},
title = {Longest Name Prefix Match on Multi-Core Processor},
booktitle = {21st {IEEE} International Conference on High Performance Computing
and Communications; 17th {IEEE} International Conference on Smart
City; 5th {IEEE} International Conference on Data Science and Systems,
HPCC/SmartCity/DSS 2019, Zhangjiajie, China, August 10-12, 2019},
pages = {1035--1042},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCC/SmartCity/DSS.2019.00148},
doi = {10.1109/HPCC/SMARTCITY/DSS.2019.00148},
timestamp = {Wed, 18 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/XuZL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icdsci/WangZZX019,
author = {Canshuai Wang and
Wenjun Zhu and
Haocheng Zhou and
Zhuang Xu and
Peng Li},
editor = {Jing He and
Philip S. Yu and
Yong Shi and
Xingsen Li and
Zhijun Xie and
Guangyan Huang and
Jie Cao and
Fu Xiao},
title = {Multi-core Processor Performance Evaluation Model Based on {DPDK}
Affinity Setting},
booktitle = {Data Science - 6th International Conference, {ICDS} 2019, Ningbo,
China, May 15-20, 2019, Revised Selected Papers},
series = {Communications in Computer and Information Science},
volume = {1179},
pages = {652--662},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-981-15-2810-1\_60},
doi = {10.1007/978-981-15-2810-1\_60},
timestamp = {Fri, 04 Feb 2022 08:01:41 +0100},
biburl = {https://dblp.org/rec/conf/icdsci/WangZZX019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iciip/ChengX19,
author = {Xiaohui Cheng and
Rui Xu},
title = {Research on Task Scheduling of Heterogeneous Multi-core Processor
based on Replication Genetic algorithm},
booktitle = {{ICIIP} 2019: 4th International Conference on Intelligent Information
Processing, Guilin, China, November 16-17, 2019},
pages = {454--460},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3378065.3378151},
doi = {10.1145/3378065.3378151},
timestamp = {Wed, 03 Nov 2021 15:07:04 +0100},
biburl = {https://dblp.org/rec/conf/iciip/ChengX19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpads/WangGYL19,
author = {Guangmin Wang and
Jiancong Ge and
Yunhao Yan and
Ming Ling},
title = {A Data-Sharing Aware and Scalable Cache Miss Rates Model for Multi-Core
Processors with Multi-Level Cache Hierarchies},
booktitle = {25th {IEEE} International Conference on Parallel and Distributed Systems,
{ICPADS} 2019, Tianjin, China, December 4-6, 2019},
pages = {267--274},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ICPADS47876.2019.00046},
doi = {10.1109/ICPADS47876.2019.00046},
timestamp = {Tue, 04 Feb 2020 13:36:54 +0100},
biburl = {https://dblp.org/rec/conf/icpads/WangGYL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iecon/0042LOL0D19,
author = {Xin Li and
Zhi Li and
Xingtao Ou and
Ying Liu and
Wei Zhou and
Zhemin Duan},
title = {High-Resolution Thermal Maps Extraction of Multi-Core Processors Based
on Convolutional Neural Networks},
booktitle = {{IECON} 2019 - 45th Annual Conference of the {IEEE} Industrial Electronics
Society, Lisbon, Portugal, October 14-17, 2019},
pages = {3075--3080},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IECON.2019.8926982},
doi = {10.1109/IECON.2019.8926982},
timestamp = {Wed, 01 Jan 2020 14:47:53 +0100},
biburl = {https://dblp.org/rec/conf/iecon/0042LOL0D19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/AthavaleMP19,
author = {Jyotika Athavale and
Riccardo Mariani and
Michael Paulitsch},
editor = {Dimitris Gizopoulos and
Dan Alexandrescu and
Panagiota Papavramidou and
Michail Maniatakos},
title = {Flight Safety Certification Implications for Complex Multi-Core Processor
based Avionics Systems},
booktitle = {25th {IEEE} International Symposium on On-Line Testing and Robust
System Design, {IOLTS} 2019, Rhodes, Greece, July 1-3, 2019},
pages = {38--39},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IOLTS.2019.8854415},
doi = {10.1109/IOLTS.2019.8854415},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/iolts/AthavaleMP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/irps/AthavaleMP19,
author = {Jyotika Athavale and
Riccardo Mariani and
Michael Paulitsch},
title = {Flight Safety Certification Implications for Complex Multi-Core Processor
Based Avionics Systems},
booktitle = {{IEEE} International Reliability Physics Symposium, {IRPS} 2019, Monterey,
CA, USA, March 31 - April 4, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IRPS.2019.8720422},
doi = {10.1109/IRPS.2019.8720422},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/irps/AthavaleMP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issac/CovanovMMW19,
author = {Svyatoslav Covanov and
Davood Mohajerani and
Marc Moreno Maza and
Lin{-}Xiao Wang},
editor = {James H. Davenport and
Dongming Wang and
Manuel Kauers and
Russell J. Bradford},
title = {Big Prime Field {FFT} on Multi-core Processors},
booktitle = {Proceedings of the 2019 on International Symposium on Symbolic and
Algebraic Computation, {ISSAC} 2019, Beijing, China, July 15-18, 2019},
pages = {106--113},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3326229.3326273},
doi = {10.1145/3326229.3326273},
timestamp = {Wed, 31 Jan 2024 21:56:28 +0100},
biburl = {https://dblp.org/rec/conf/issac/CovanovMMW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/Serrano-CasesRC19,
author = {Alejandro Serrano{-}Cases and
Felipe Restrepo{-}Calle and
Sergio Cuenca{-}Asensi and
Antonio Mart{\'{\i}}nez{-}{\'{A}}lvarez},
title = {Softerror mitigation for multi-core processors based on thread replication},
booktitle = {{IEEE} Latin American Test Symposium, {LATS} 2019, Santiago, Chile,
March 11-13, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/LATW.2019.8704614},
doi = {10.1109/LATW.2019.8704614},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/latw/Serrano-CasesRC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/MoraisSG0BFA19,
author = {Lucas Morais and
Vitor Silva and
Alfredo Goldman and
Carlos {\'{A}}lvarez and
Jaume Bosch and
Michael Frank and
Guido Araujo},
title = {Adding Tightly-Integrated Task Scheduling Acceleration to a {RISC-V}
Multi-core Processor},
booktitle = {Proceedings of the 52nd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2019, Columbus, OH, USA, October 12-16,
2019},
pages = {861--872},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3352460.3358271},
doi = {10.1145/3352460.3358271},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/MoraisSG0BFA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/VenkataramaniPM19,
author = {Vanchinathan Venkataramani and
Anuj Pathania and
Tulika Mitra},
editor = {Dionisios N. Pnevmatikatos and
Maxime Pelcat and
Matthias Jung},
title = {Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core
Processors},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 19th International Conference, {SAMOS} 2019, Samos, Greece, July
7-11, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11733},
pages = {127--141},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-27562-4\_9},
doi = {10.1007/978-3-030-27562-4\_9},
timestamp = {Wed, 21 Aug 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/VenkataramaniPM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smacd/SunZT19,
author = {Zeyu Sun and
Han Zhou and
Sheldon X.{-}D. Tan},
title = {Dynamic Reliability Management for Multi-Core Processor Based on Deep
Reinforcement Learning},
booktitle = {16th International Conference on Synthesis, Modeling, Analysis and
Simulation Methods and Applications to Circuit Design, {SMACD} 2019,
Lausanne, Switzerland, July 15-18, 2019},
pages = {217--220},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/SMACD.2019.8795268},
doi = {10.1109/SMACD.2019.8795268},
timestamp = {Wed, 28 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/smacd/SunZT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1903-00191,
author = {Ahmad Ahmadi and
Reza Faghih Mirzaee},
title = {MIPS-Core Application Specific Instruction-Set Processor for {IDEA}
Cryptography - Comparison between Single-Cycle and Multi-Cycle Architectures},
journal = {CoRR},
volume = {abs/1903.00191},
year = {2019},
url = {http://arxiv.org/abs/1903.00191},
eprinttype = {arXiv},
eprint = {1903.00191},
timestamp = {Sat, 30 Mar 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1903-00191.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1903-05898,
author = {Siqi Wang and
Gayathri Ananthanarayanan and
Yifan Zeng and
Neeraj Goel and
Anuj Pathania and
Tulika Mitra},
title = {High-Throughput {CNN} Inference on Embedded {ARM} big.LITTLE Multi-Core
Processors},
journal = {CoRR},
volume = {abs/1903.05898},
year = {2019},
url = {http://arxiv.org/abs/1903.05898},
eprinttype = {arXiv},
eprint = {1903.05898},
timestamp = {Sun, 31 Mar 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1903-05898.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1909-11644,
title = {An Improvement Over Threads Communications on Multi-Core Processors},
journal = {CoRR},
volume = {abs/1909.11644},
year = {2019},
note = {Withdrawn.},
url = {http://arxiv.org/abs/1909.11644},
eprinttype = {arXiv},
eprint = {1909.11644},
timestamp = {Tue, 15 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1909-11644.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Hasib18,
author = {Abdullah Al Hasib},
title = {Energy Efficient Computing on Multi-core Processors: Vectorization
and Compression Techniques},
school = {Norwegian University of Science and Technology, Trondheim, Norway},
year = {2018},
url = {http://hdl.handle.net/11250/2501604},
timestamp = {Sat, 17 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Hasib18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Lutsyk18,
author = {Petro Lutsyk},
title = {Correctness of multi-core processors with operating system support},
school = {Saarland University, Saarbr{\"{u}}cken, Germany},
year = {2018},
url = {https://publikationen.sulb.uni-saarland.de/handle/20.500.11880/27182},
urn = {urn:nbn:de:bsz:291-scidok-ds-273830},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/dnb/Lutsyk18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/es/Pallares18,
author = {Sandra Catal{\'{a}}n},
title = {Multithreaded Dense Linear Algebra on Asymmetric Multi-core Processors},
school = {Jaume {I} University, Spain},
year = {2018},
url = {http://hdl.handle.net/10803/461918},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/es/Pallares18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Graillat18,
author = {Amaury Graillat},
title = {G{\'{e}}n{\'{e}}ration de code pour un many-core avec des
contraintes temps r{\'{e}}el fortes. (Code Generation for Multi-Core
Processor with Hard Real-Time Constraints)},
school = {Grenoble Alpes University, France},
year = {2018},
url = {https://tel.archives-ouvertes.fr/tel-02069346},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Graillat18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Saidi18,
author = {Salah Eddine Saidi},
title = {Automatic Parallelization and Scheduling Approches for Co-simulation
of Numerical Models on Multi-core Processors. (Approches de Parall{\'{e}}lisation
Automatique et d'Ordonnancement pour la Co-simulation de Mod{\`{e}}les
Num{\'{e}}riques sur Processeurs Multi-coeurs)},
school = {Sorbonne University, Paris, France},
year = {2018},
url = {https://tel.archives-ouvertes.fr/tel-01895280},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Saidi18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/CafaroPEA18,
author = {Massimo Cafaro and
Marco Pulimeno and
Italo Epicoco and
Giovanni Aloisio},
title = {Parallel space saving on multi- and many-core processors},
journal = {Concurr. Comput. Pract. Exp.},
volume = {30},
number = {7},
year = {2018},
url = {https://doi.org/10.1002/cpe.4160},
doi = {10.1002/CPE.4160},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/concurrency/CafaroPEA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijcse/KnoopGSSNWSKRK18,
author = {Helge Knoop and
Tobias Gronemeier and
Matthias S{\"{u}}hring and
Peter Steinbach and
Matthias Noack and
Florian Wende and
Thomas Steinke and
Christoph Knigge and
Siegfried Raasch and
Klaus Ketelsen},
title = {Porting the MPI-parallelised {LES} model {PALM} to multi-GPU systems
and many integrated core processors - an experience report},
journal = {Int. J. Comput. Sci. Eng.},
volume = {17},
number = {3},
pages = {297--309},
year = {2018},
url = {https://doi.org/10.1504/IJCSE.2018.095850},
doi = {10.1504/IJCSE.2018.095850},
timestamp = {Sun, 14 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijcse/KnoopGSSNWSKRK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/RadPF18,
author = {Mina Hosseini Rad and
Ahmad Patooghy and
Mahdi Fazeli},
title = {An Efficient Programming Skeleton for Clusters of Multi-Core Processors},
journal = {Int. J. Parallel Program.},
volume = {46},
number = {6},
pages = {1094--1109},
year = {2018},
url = {https://doi.org/10.1007/s10766-017-0517-y},
doi = {10.1007/S10766-017-0517-Y},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/RadPF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/information/PaznikovS18,
author = {Alexey A. Paznikov and
Yulia A. Shichkina},
title = {Algorithms for Optimization of Processor and Memory Affinity for Remote
Core Locking Synchronization in Multithreaded Applications},
journal = {Inf.},
volume = {9},
number = {1},
pages = {21},
year = {2018},
url = {https://doi.org/10.3390/info9010021},
doi = {10.3390/INFO9010021},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/information/PaznikovS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcp/Jennings18,
author = {Earle Jennings},
title = {Simultaneous Multi-processor Cores for Efficient Embedded Applications},
journal = {J. Comput.},
volume = {13},
number = {4},
pages = {371--382},
year = {2018},
url = {https://doi.org/10.17706/jcp.13.4.371-382},
doi = {10.17706/JCP.13.4.371-382},
timestamp = {Thu, 25 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcp/Jennings18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/CabaretLE18,
author = {Laurent Cabaret and
Lionel Lacassagne and
Daniel Etiemble},
title = {Parallel Light Speed Labeling: an efficient connected component algorithm
for labeling and analysis on multi-core processors},
journal = {J. Real Time Image Process.},
volume = {15},
number = {1},
pages = {173--196},
year = {2018},
url = {https://doi.org/10.1007/s11554-016-0574-2},
doi = {10.1007/S11554-016-0574-2},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jrtip/CabaretLE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsjkx/LuoZZ18,
author = {Shuyan Luo and
Yian Zhu and
Cheng Zeng},
title = {{\unicode{23884}}{\unicode{20837}}{\unicode{24335}}{\unicode{24322}}{\unicode{26500}}{\unicode{22810}}{\unicode{26680}}{\unicode{22788}}{\unicode{29702}}{\unicode{22120}}{\unicode{26680}}{\unicode{38388}}{\unicode{30340}}{\unicode{36890}}{\unicode{20449}}{\unicode{24615}}{\unicode{33021}}{\unicode{35780}}{\unicode{20272}}{\unicode{19982}}{\unicode{20248}}{\unicode{21270}}
(Performance Evaluation and Optimization of Inter-cores Communication
for Heterogeneous Multi-core Processor Unit)},
journal = {{\unicode{35745}}{\unicode{31639}}{\unicode{26426}}{\unicode{31185}}{\unicode{23398}}},
volume = {45},
number = {6A},
pages = {262--265},
year = {2018},
url = {http://www.jsjkx.com/CN/Y2018/V45/I6A/262},
doi = {Y2018/V45/I6A/262},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jsjkx/LuoZZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/ShinLLLY18,
author = {Dongjoo Shin and
Jinmook Lee and
Jinsu Lee and
Juhyoung Lee and
Hoi{-}Jun Yoo},
title = {{DNPU:} An Energy-Efficient Deep-Learning Processor with Heterogeneous
Multi-Core Architecture},
journal = {{IEEE} Micro},
volume = {38},
number = {5},
pages = {85--93},
year = {2018},
url = {https://doi.org/10.1109/MM.2018.053631145},
doi = {10.1109/MM.2018.053631145},
timestamp = {Fri, 12 Oct 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/ShinLLLY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/MushtaqKAYMKK18,
author = {Hassan Mushtaq and
Sajid Gul Khawaja and
Muhammad Usman Akram and
Amanullah Yasin and
Muhammad Muzammal and
Shehzad Khalid and
Shoab Ahmad Khan},
title = {A Parallel Architecture for the Partitioning around Medoids {(PAM)}
Algorithm for Scalable Multi-Core Processor Implementation with Applications
in Healthcare},
journal = {Sensors},
volume = {18},
number = {12},
pages = {4129},
year = {2018},
url = {https://doi.org/10.3390/s18124129},
doi = {10.3390/S18124129},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/sensors/MushtaqKAYMKK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/JongeriusADMVC18,
author = {Rik Jongerius and
Andreea Anghel and
Gero Dittmann and
Giovanni Mariani and
Erik Vermij and
Henk Corporaal},
title = {Analytic Multi-Core Processor Model for Fast Design-Space Exploration},
journal = {{IEEE} Trans. Computers},
volume = {67},
number = {6},
pages = {755--770},
year = {2018},
url = {https://doi.org/10.1109/TC.2017.2780239},
doi = {10.1109/TC.2017.2780239},
timestamp = {Fri, 01 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/JongeriusADMVC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RenTLXS18,
author = {Shiru Ren and
Le Tan and
Chunqi Li and
Zhen Xiao and
Weijia Song},
title = {Leveraging Hardware-Assisted Virtualization for Deterministic Replay
on Commodity Multi-Core Processors},
journal = {{IEEE} Trans. Computers},
volume = {67},
number = {1},
pages = {45--58},
year = {2018},
url = {https://doi.org/10.1109/TC.2017.2727492},
doi = {10.1109/TC.2017.2727492},
timestamp = {Thu, 25 Jan 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/RenTLXS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tetc/MozafariM18,
author = {Seyyed Hasan Mozafari and
Brett H. Meyer},
title = {Efficient Performance Evaluation of Multi-Core {SIMT} Processors with
Hot Redundancy},
journal = {{IEEE} Trans. Emerg. Top. Comput.},
volume = {6},
number = {4},
pages = {498--510},
year = {2018},
url = {https://doi.org/10.1109/TETC.2016.2594957},
doi = {10.1109/TETC.2016.2594957},
timestamp = {Fri, 15 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tetc/MozafariM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/SalamiBGP18,
author = {Esther Salam{\'{\i}} and
Cristina Barrado and
Antonia Gallardo and
Enric Pastor},
title = {General queuing model for optimal seamless delivery of payload processing
in multi-core processors},
journal = {J. Supercomput.},
volume = {74},
number = {1},
pages = {87--104},
year = {2018},
url = {https://doi.org/10.1007/s11227-017-2109-4},
doi = {10.1007/S11227-017-2109-4},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tjs/SalamiBGP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/ShaWRQ18,
author = {Shi Sha and
Wujie Wen and
Shaolei Ren and
Gang Quan},
title = {M-Oscillating: Performance Maximization on Temperature-Constrained
Multi-Core Processors},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {29},
number = {11},
pages = {2528--2539},
year = {2018},
url = {https://doi.org/10.1109/TPDS.2018.2835474},
doi = {10.1109/TPDS.2018.2835474},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/ShaWRQ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KimY18,
author = {Byung{-}Su Kim and
Joon{-}Sung Yang},
editor = {Youngsoo Shin},
title = {System level performance analysis and optimization for the adaptive
clocking based multi-core processor},
booktitle = {23rd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2018, Jeju, Korea (South), January 22-25, 2018},
pages = {458--463},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ASPDAC.2018.8297366},
doi = {10.1109/ASPDAC.2018.8297366},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KimY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/BarsamianCHM18,
author = {Yann Barsamian and
Arthur Chargu{\'{e}}raud and
Sever A. Hirstoaga and
Michel Mehrenberger},
editor = {Marco Aldinucci and
Luca Padovani and
Massimo Torquati},
title = {Efficient Strict-Binning Particle-in-Cell Algorithm for Multi-core
{SIMD} Processors},
booktitle = {Euro-Par 2018: Parallel Processing - 24th International Conference
on Parallel and Distributed Computing, Turin, Italy, August 27-31,
2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11014},
pages = {749--763},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-96983-1\_53},
doi = {10.1007/978-3-319-96983-1\_53},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/BarsamianCHM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fedcsis/KrzywaniakPC18,
author = {Adam Krzywaniak and
Jerzy Proficz and
Pawel Czarnul},
editor = {Maria Ganzha and
Leszek A. Maciaszek and
Marcin Paprzycki},
title = {Analyzing energy/performance trade-offs with power capping for parallel
applications on modern multi and many core processors},
booktitle = {Proceedings of the 2018 Federated Conference on Computer Science and
Information Systems, FedCSIS 2018, Pozna{\'{n}}, Poland, September
9-12, 2018},
series = {Annals of Computer Science and Information Systems},
volume = {15},
pages = {339--346},
year = {2018},
url = {https://doi.org/10.15439/2018F177},
doi = {10.15439/2018F177},
timestamp = {Tue, 23 Apr 2024 10:05:32 +0200},
biburl = {https://dblp.org/rec/conf/fedcsis/KrzywaniakPC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/WuRB18,
author = {Hancheng Wu and
John Ravi and
Michela Becchi},
title = {Compiling {SIMT} Programs on Multi- and Many-Core Processors with
Wide Vector Units: {A} Case Study with {CUDA}},
booktitle = {25th {IEEE} International Conference on High Performance Computing,
HiPC 2018, Bengaluru, India, December 17-20, 2018},
pages = {123--132},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/HiPC.2018.00022},
doi = {10.1109/HIPC.2018.00022},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/hipc/WuRB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icacci/DigalwarGM18,
author = {Mayuri Digalwar and
Praveen Gahukar and
Sudeept Mohan},
title = {Energy Efficient Real Time Scheduling on Multi-core Processor with
Voltage Islands},
booktitle = {2018 International Conference on Advances in Computing, Communications
and Informatics, {ICACCI} 2018, Bangalore, India, September 19-22,
2018},
pages = {1245--1251},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ICACCI.2018.8554680},
doi = {10.1109/ICACCI.2018.8554680},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/icacci/DigalwarGM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icacs2/WeiST18,
author = {Xiaohui Wei and
Lishuang Su and
Jingweijia Tan},
title = {Multi-Core Processor Scheduling Algorithm under The Influence Of Process
Variation},
booktitle = {Proceedings of the 2018 2nd International Conference on Algorithms,
Computing and Systems, {ICACS} 2018, Beijing, China, July 27-29, 2018},
pages = {7--13},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3242840.3242847},
doi = {10.1145/3242840.3242847},
timestamp = {Fri, 02 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icacs2/WeiST18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccns/Man0L18,
author = {Dapeng Man and
Wu Yang and
Zeya Lu},
title = {Research on Task Scheduling Model for Multi-core Processor},
booktitle = {Proceedings of the 8th International Conference on Communication and
Network Security, {ICCNS} 2018, Qingdao, China, November 02-04, 2018},
pages = {129--133},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3290480.3290483},
doi = {10.1145/3290480.3290483},
timestamp = {Thu, 22 Apr 2021 18:47:33 +0200},
biburl = {https://dblp.org/rec/conf/iccns/Man0L18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iciip/DengZC18a,
author = {Yun Deng and
Yan Zhu and
Xiaohui Cheng},
title = {The Design of Microkernel Memory Management Mechanism Based on Heterogeneous
Multi-core Processor},
booktitle = {Proceedings of the 3rd International Conference on Intelligent Information
Processing, {ICIIP} 2018, Guilin, China, May 19-20, 2018},
pages = {120--126},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3232116.3232136},
doi = {10.1145/3232116.3232136},
timestamp = {Thu, 04 Nov 2021 12:03:22 +0100},
biburl = {https://dblp.org/rec/conf/iciip/DengZC18a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icppw/ShakerBSY18,
author = {Alfred Shaker and
Johnnie W. Baker and
Gokarna Sharma and
Mike Yuan},
title = {Performance Comparison of {NVIDIA} accelerators with SIMD, Associative,
and Multi-core Processors for Air Traffic Management},
booktitle = {The 47th International Conference on Parallel Processing, {ICPP} 2018,
Workshop Proceedings, Eugene, OR, USA, August 13-16, 2018},
pages = {46:1--46:10},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3229710.3229757},
doi = {10.1145/3229710.3229757},
timestamp = {Mon, 14 Jan 2019 13:55:42 +0100},
biburl = {https://dblp.org/rec/conf/icppw/ShakerBSY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/infocom/PanQHYEL18,
author = {Tian Pan and
Weite Qin and
Tao Huang and
Fan Yang and
Xinhua E and
Hao Li},
title = {Towards power-aware network function virtualization on multi-core
processors},
booktitle = {{IEEE} {INFOCOM} 2018 - {IEEE} Conference on Computer Communications
Workshops, {INFOCOM} Workshops 2018, Honolulu, HI, USA, April 15-19,
2018},
pages = {1--2},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/INFCOMW.2018.8406858},
doi = {10.1109/INFCOMW.2018.8406858},
timestamp = {Sat, 27 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/infocom/PanQHYEL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CulauMWO18,
author = {Eduardo C. Culau and
Gr{\'{e}}gory C. Marchesan and
Nelson R. Weirich and
Leonardo Londero de Oliveira},
title = {An Efficient Single Core Flexible Processor Architecture for 4096-bit
Montgomery Modular Multiplication and Exponentiation},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351190},
doi = {10.1109/ISCAS.2018.8351190},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/CulauMWO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ithings/NakamotoMSKF18,
author = {Yukikazu Nakamoto and
Daichi Minami and
Shota Shiba and
Yoshitaka Koga and
Koji Fukuoka},
title = {A Simulation Environment of Embedded Control Systems for Multi-Core
Processors (WiP Report)},
booktitle = {{IEEE} International Conference on Internet of Things (iThings) and
{IEEE} Green Computing and Communications (GreenCom) and {IEEE} Cyber,
Physical and Social Computing (CPSCom) and {IEEE} Smart Data (SmartData),
iThings/GreenCom/CPSCom/SmartData 2018, Halifax, NS, Canada, July
30 - August 3, 2018},
pages = {178--182},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/Cybermatics\_2018.2018.00060},
doi = {10.1109/CYBERMATICS\_2018.2018.00060},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/ithings/NakamotoMSKF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/NguyenTDL18,
author = {Phuc{-}Vinh Nguyen and
Thi{-}Thu{-}Trang Tran and
Phuoc{-}Loc Diep and
Duc{-}Hung Le},
title = {A Low-Power {ASIC} Implementation of Multi-Core OpenSPARC {T1} Processor
on 90nm {CMOS} Process},
booktitle = {12th {IEEE} International Symposium on Embedded Multicore/Many-core
Systems-on-Chip, MCSoC 2018, Hanoi, Vietnam, September 12-14, 2018},
pages = {95--100},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MCSoC2018.2018.00027},
doi = {10.1109/MCSOC2018.2018.00027},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mcsoc/NguyenTDL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/UrbinaO18,
author = {Mois{\'{e}}s Urbina and
Roman Obermaisser},
title = {Evaluation of Performance and Fault Containment in {AUTOSAR} Micro-ECUs
on a Multi-Core Processor},
booktitle = {12th {IEEE} International Symposium on Embedded Multicore/Many-core
Systems-on-Chip, MCSoC 2018, Hanoi, Vietnam, September 12-14, 2018},
pages = {192--200},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MCSoC2018.2018.00040},
doi = {10.1109/MCSOC2018.2018.00040},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mcsoc/UrbinaO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/meco/SkvortsovFB18,
author = {Sergey Vladimirovich Skvortsov and
Tatiana Anatolievna Fetisova and
Aleksandr Valerievich Bakulev},
title = {Scheduling multithreaded processes by criterion of minimum of number
data exchanges between processor cores},
booktitle = {7th Mediterranean Conference on Embedded Computing, {MECO} 2018, Budva,
Montenegro, June 10-14, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/MECO.2018.8406009},
doi = {10.1109/MECO.2018.8406009},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/meco/SkvortsovFB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/JangJLK18,
author = {Hanhwi Jang and
Jae{-}Eon Jo and
Jaewon Lee and
Jangwoo Kim},
title = {RpStacks-MT: {A} High-Throughput Design Evaluation Methodology for
Multi-Core Processors},
booktitle = {51st Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2018, Fukuoka, Japan, October 20-24, 2018},
pages = {586--599},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/MICRO.2018.00054},
doi = {10.1109/MICRO.2018.00054},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/JangJLK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/PetersenRAS18,
author = {Morten B. Petersen and
Anthon V. Riber and
Simon T. Andersen and
Martin Schoeberl},
editor = {Jari Nurmi and
Peeter Ellervee and
Juri Mihhailov and
Maksim Jenihhin and
Kalle Tammem{\"{a}}e},
title = {Time-Predictable Distributed Shared Memory for Multi-Core Processors},
booktitle = {2018 {IEEE} Nordic Circuits and Systems Conference, {NORCAS} 2018:
{NORCHIP} and International Symposium of System-on-Chip (SoC), Tallinn,
Estonia, October 30-31, 2018},
pages = {1--7},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/NORCHIP.2018.8573463},
doi = {10.1109/NORCHIP.2018.8573463},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/norchip/PetersenRAS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scisisis/YoonS18,
author = {Seungyong Yoon and
Hirohisa Seki},
title = {Efficient Mining of Recurrent Rules from a Sequence Database Using
Multi-Core Processors},
booktitle = {2018 Joint 10th International Conference on Soft Computing and Intelligent
Systems {(SCIS)} and 19th International Symposium on Advanced Intelligent
Systems (ISIS), Toyama, Japan, December 5-8, 2018},
pages = {1442--1447},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/SCIS-ISIS.2018.00226},
doi = {10.1109/SCIS-ISIS.2018.00226},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/scisisis/YoonS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/springsim/Della-GiustinaB18,
author = {James Della{-}Giustina and
Carlos Barajas and
Matthias K. Gobbert and
Dennis S. Mackin and
Jerimy Polf},
editor = {Layne T. Watson and
Masha Sosonkina and
William I. Thacker and
Josef Weinbub},
title = {Hybrid MPI+OpenMP parallelization of image reconstruction in proton
beam therapy on multi-core and many-core processors},
booktitle = {Proceedings of the High Performance Computing Symposium, SpringSim
{(HPC)} 2018, Baltimore, MD, USA, April 15-18, 2018},
pages = {11:1--11:11},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3213080},
timestamp = {Tue, 22 May 2018 08:13:07 +0200},
biburl = {https://dblp.org/rec/conf/springsim/Della-GiustinaB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/supercomputer/SeiferthAKR18,
author = {Johannes Seiferth and
Christie L. Alappat and
Matthias Korch and
Thomas Rauber},
editor = {Rio Yokota and
Mich{\`{e}}le Weiland and
David E. Keyes and
Carsten Trinitis},
title = {Applicability of the {ECM} Performance Model to Explicit {ODE} Methods
on Current Multi-core Processors},
booktitle = {High Performance Computing - 33rd International Conference, {ISC}
High Performance 2018, Frankfurt, Germany, June 24-28, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10876},
pages = {163--183},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-92040-5\_9},
doi = {10.1007/978-3-319-92040-5\_9},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/supercomputer/SeiferthAKR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ukrprog/GerasimovaN18,
author = {Tetyana Gerasimova and
Alla Nesterenko},
editor = {Ivan Sergienko and
Philip Andon},
title = {{\cyrchar\CYRP}{\cyrchar\cyra}{\cyrchar\cyrr}{\cyrchar\cyra}{\cyrchar\cyrl}{\cyrchar\cyre}{\cyrchar\cyrl}{\cyrchar\cyrsftsn}{\cyrchar\cyrn}{\cyrchar\cyrii}
{\cyrchar\cyra}{\cyrchar\cyrl}{\cyrchar\cyrg}{\cyrchar\cyro}{\cyrchar\cyrr}{\cyrchar\cyri}{\cyrchar\cyrt}{\cyrchar\cyrm}{\cyrchar\cyri}
{\cyrchar\cyrr}{\cyrchar\cyro}{\cyrchar\cyrz}{\cyrchar\cyrv}'{\cyrchar\cyrya}{\cyrchar\cyrz}{\cyrchar\cyru}{\cyrchar\cyrv}{\cyrchar\cyra}{\cyrchar\cyrn}{\cyrchar\cyrn}{\cyrchar\cyrya}
{\cyrchar\cyrs}{\cyrchar\cyri}{\cyrchar\cyrs}{\cyrchar\cyrt}{\cyrchar\cyre}{\cyrchar\cyrm}
{\cyrchar\cyrn}{\cyrchar\cyre}{\cyrchar\cyrl}{\cyrchar\cyrii}{\cyrchar\cyrn}{\cyrchar\cyrii}{\cyrchar\cyrishrt}{\cyrchar\cyrn}{\cyrchar\cyri}{\cyrchar\cyrh}
{\cyrchar\cyrr}{\cyrchar\cyrii}{\cyrchar\cyrv}{\cyrchar\cyrn}{\cyrchar\cyrya}{\cyrchar\cyrn}{\cyrchar\cyrsftsn}
{\cyrchar\cyrt}{\cyrchar\cyra} {\cyrchar\cyrz}{\cyrchar\cyra}{\cyrchar\cyrd}{\cyrchar\cyra}{\cyrchar\cyrch}
{\cyrchar\CYRK}{\cyrchar\cyro}{\cyrchar\cyrsh}{\cyrchar\cyrii} {\cyrchar\cyrd}{\cyrchar\cyrl}{\cyrchar\cyrya}
{\cyrchar\cyrs}{\cyrchar\cyri}{\cyrchar\cyrs}{\cyrchar\cyrt}{\cyrchar\cyre}{\cyrchar\cyrm}
{\cyrchar\cyrz}{\cyrchar\cyrv}{\cyrchar\cyri}{\cyrchar\cyrch}{\cyrchar\cyra}{\cyrchar\cyrishrt}{\cyrchar\cyrn}{\cyrchar\cyri}{\cyrchar\cyrh}
{\cyrchar\cyrd}{\cyrchar\cyri}{\cyrchar\cyrf}{\cyrchar\cyre}{\cyrchar\cyrr}{\cyrchar\cyre}{\cyrchar\cyrn}{\cyrchar\cyrc}{\cyrchar\cyrii}{\cyrchar\cyra}{\cyrchar\cyrl}{\cyrchar\cyrsftsn}{\cyrchar\cyrn}{\cyrchar\cyri}{\cyrchar\cyrh}
{\cyrchar\cyrr}{\cyrchar\cyrii}{\cyrchar\cyrv}{\cyrchar\cyrn}{\cyrchar\cyrya}{\cyrchar\cyrn}{\cyrchar\cyrsftsn}
{\cyrchar\cyrn}{\cyrchar\cyra} {\cyrchar\cyrb}{\cyrchar\cyra}{\cyrchar\cyrg}{\cyrchar\cyra}{\cyrchar\cyrt}{\cyrchar\cyro}{\cyrchar\cyrya}{\cyrchar\cyrd}{\cyrchar\cyre}{\cyrchar\cyrr}{\cyrchar\cyrn}{\cyrchar\cyri}{\cyrchar\cyrh}
{\cyrchar\cyrk}{\cyrchar\cyro}{\cyrchar\cyrm}{\cyrchar\cyrp}'{\cyrchar\cyryu}{\cyrchar\cyrt}{\cyrchar\cyre}{\cyrchar\cyrr}{\cyrchar\cyra}{\cyrchar\cyrh}
{\cyrchar\cyrz} {\cyrchar\cyrp}{\cyrchar\cyrr}{\cyrchar\cyro}{\cyrchar\cyrc}{\cyrchar\cyre}{\cyrchar\cyrs}{\cyrchar\cyro}{\cyrchar\cyrr}{\cyrchar\cyra}{\cyrchar\cyrm}{\cyrchar\cyri}
Intel Xeon Phi Parallel algorithms for the solving both of non-linear
systems and initial-value problems for systems of ordinary differential
equations on multi-core computers with processors Intel Xeon Phi},
booktitle = {Proceedings of the 11th International Conference of Programming UkrPROG
2018, Kyiv, Ukraine, May 22-24, 2018},
series = {{CEUR} Workshop Proceedings},
volume = {2139},
pages = {54--60},
publisher = {CEUR-WS.org},
year = {2018},
url = {http://ceur-ws.org/Vol-2139/54-60.pdf},
timestamp = {Fri, 08 Dec 2023 14:24:28 +0100},
biburl = {https://dblp.org/rec/conf/ukrprog/GerasimovaN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/FleischerSZSOSC18,
author = {Bruce M. Fleischer and
Sunil Shukla and
Matthew M. Ziegler and
Joel Silberman and
Jinwook Oh and
Vijayalakshmi Srinivasan and
Jungwook Choi and
Silvia M. Mueller and
Ankur Agrawal and
Tina Babinsky and
Nianzheng Cao and
Chia{-}Yu Chen and
Pierce Chuang and
Thomas W. Fox and
George Gristede and
Michael Guillorn and
Howard Haynie and
Michael J. Klaiber and
Dongsoo Lee and
Shih{-}Hsien Lo and
Gary W. Maier and
Michael Scheuermann and
Swagath Venkataramani and
Christos Vezyrtzis and
Naigang Wang and
Fanchieh Yee and
Ching Zhou and
Pong{-}Fei Lu and
Brian W. Curran and
Leland Chang and
Kailash Gopalakrishnan},
title = {A Scalable Multi- TeraOPS Deep Learning Processor Core for {AI} Trainina
and Inference},
booktitle = {2018 {IEEE} Symposium on {VLSI} Circuits, Honolulu, HI, USA, June
18-22, 2018},
pages = {35--36},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/VLSIC.2018.8502276},
doi = {10.1109/VLSIC.2018.8502276},
timestamp = {Tue, 22 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/FleischerSZSOSC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vtc/LopacinskiEPBHK18,
author = {Lukasz Lopacinski and
Mohamed Hussein Eissa and
Goran Panic and
Marcin Brzozowski and
Alireza Hasani and
Rolf Kraemer},
title = {Implementation of a Multi-Core Data Link Layer Processor for THz Communication},
booktitle = {87th {IEEE} Vehicular Technology Conference, {VTC} Spring 2018, Porto,
Portugal, June 3-6, 2018},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/VTCSpring.2018.8417522},
doi = {10.1109/VTCSPRING.2018.8417522},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/vtc/LopacinskiEPBHK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Blin17,
author = {Antoine Blin},
title = {Vers une utilisation efficace des processeurs multi-coeurs dans des
syst{\`{e}}mes embarqu{\'{e}}s {\`{a}} criticit{\'{e}}s
multiples. (Towards an efficient use of multi-core processors in mixed
criticality embedded systems)},
school = {Pierre and Marie Curie University, Paris, France},
year = {2017},
url = {https://tel.archives-ouvertes.fr/tel-01624259},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Blin17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Gratia17,
author = {Romain Gratia},
title = {Versatile and efficient mixed-criticality scheduling for multi-core
processors. (Une approche efficace et polyvalente pour l'ordonnancement
de syst{\`{e}}mes {\`{a}} criticit{\'{e}} mixte sur processeur
multi-coeurs)},
school = {T{\'{e}}l{\'{e}}com ParisTech, France},
year = {2017},
url = {https://tel.archives-ouvertes.fr/tel-01844389},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Gratia17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/ChenCLWCT17,
author = {Yi{-}Jung Chen and
Wen{-}Wei Chang and
Chia{-}Yin Liu and
Cheng{-}En Wu and
Bo{-}Yuan Chen and
Ming{-}Ying Tsai},
title = {Processors Allocation for MPSoCs With Single {ISA} Heterogeneous Multi-Core
Architecture},
journal = {{IEEE} Access},
volume = {5},
pages = {4028--4036},
year = {2017},
url = {https://doi.org/10.1109/ACCESS.2017.2688699},
doi = {10.1109/ACCESS.2017.2688699},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/ChenCLWCT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/FuLHS17,
author = {Hongya Fu and
Jiankang Liu and
Zhenyu Han and
Zhongxi Shao},
title = {A Heuristic Task Periods Selection Algorithm for Real-Time Control
Systems on a Multi-Core Processor},
journal = {{IEEE} Access},
volume = {5},
pages = {24819--24829},
year = {2017},
url = {https://doi.org/10.1109/ACCESS.2017.2768559},
doi = {10.1109/ACCESS.2017.2768559},
timestamp = {Wed, 04 Jul 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/FuLHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/algorithms/LeeY17,
author = {Chun{-}Liang Lee and
Tzu{-}Hao Yang},
title = {A Flexible Pattern-Matching Algorithm for Network Intrusion Detection
Systems Using Multi-Core Processors},
journal = {Algorithms},
volume = {10},
number = {2},
pages = {58},
year = {2017},
url = {https://doi.org/10.3390/a10020058},
doi = {10.3390/A10020058},
timestamp = {Tue, 14 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/algorithms/LeeY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/apin/HuynhVS17,
author = {Bao Huynh and
Bay Vo and
V{\'{a}}clav Sn{\'{a}}sel},
title = {An efficient method for mining frequent sequential patterns using
multi-Core processors},
journal = {Appl. Intell.},
volume = {46},
number = {3},
pages = {703--716},
year = {2017},
url = {https://doi.org/10.1007/s10489-016-0859-y},
doi = {10.1007/S10489-016-0859-Y},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/apin/HuynhVS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/HofmannFREHW17,
author = {Johannes Hofmann and
Dietmar Fey and
Michael Riedmann and
Jan Eitzinger and
Georg Hager and
Gerhard Wellein},
title = {Performance analysis of the Kahan-enhanced scalar product on current
multi-core and many-core processors},
journal = {Concurr. Comput. Pract. Exp.},
volume = {29},
number = {9},
year = {2017},
url = {https://doi.org/10.1002/cpe.3921},
doi = {10.1002/CPE.3921},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/concurrency/HofmannFREHW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/ZhuZLLX17,
author = {Haoyang Zhu and
Peidong Zhu and
Xiaoyong Li and
Qiang Liu and
Peng Xun},
title = {Parallelization of group-based skyline computation for multi-core
processors},
journal = {Concurr. Comput. Pract. Exp.},
volume = {29},
number = {18},
year = {2017},
url = {https://doi.org/10.1002/cpe.4195},
doi = {10.1002/CPE.4195},
timestamp = {Mon, 29 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/concurrency/ZhuZLLX17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/LiaoW17,
author = {Chien{-}Hui Liao and
Charles H.{-}P. Wen},
title = {An Online Thermal-Pattern-Aware Task Scheduler in 3D Multi-Core Processors},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {100-A},
number = {12},
pages = {2901--2910},
year = {2017},
url = {https://doi.org/10.1587/transfun.E100.A.2901},
doi = {10.1587/TRANSFUN.E100.A.2901},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/LiaoW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/DigalwarGRM17,
author = {Mayuri Digalwar and
Praveen Gahukar and
Biju K. Raveendran and
Sudeept Mohan},
title = {Energy efficient real-time scheduling algorithm for mixed task set
on multi-core processors},
journal = {Int. J. Embed. Syst.},
volume = {9},
number = {6},
pages = {523--534},
year = {2017},
url = {https://doi.org/10.1504/IJES.2017.10008945},
doi = {10.1504/IJES.2017.10008945},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijes/DigalwarGRM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpcn/SriramanV17,
author = {Harini Sriraman and
Pattabiraman Venkatasubbu},
title = {On the field design bug tolerance on a multi-core processor using
{FPGA}},
journal = {Int. J. High Perform. Comput. Netw.},
volume = {10},
number = {1/2},
pages = {34--43},
year = {2017},
url = {https://doi.org/10.1504/IJHPCN.2017.10003761},
doi = {10.1504/IJHPCN.2017.10003761},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijhpcn/SriramanV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/LuZ17,
author = {Yaojie Lu and
Sotirios G. Ziavras},
title = {Instruction Fusion for Multiscalar and Many-Core Processors},
journal = {Int. J. Parallel Program.},
volume = {45},
number = {1},
pages = {67--78},
year = {2017},
url = {https://doi.org/10.1007/s10766-015-0386-1},
doi = {10.1007/S10766-015-0386-1},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/LuZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jocs/TyagiJFM17,
author = {Sumarga Kumar Sah Tyagi and
Deepak Kumar Jain and
Steven Lawrence Fernandes and
Pranab K. Muhuri},
title = {Thermal-aware power-efficient deadline based task allocation in multi-core
processor},
journal = {J. Comput. Sci.},
volume = {19},
pages = {112--120},
year = {2017},
url = {https://doi.org/10.1016/j.jocs.2016.11.012},
doi = {10.1016/J.JOCS.2016.11.012},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jocs/TyagiJFM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/Akgun17,
author = {Devrim Akg{\"{u}}n},
title = {A practical parallel implementation for {TDLMS} image filter on multi-core
processor},
journal = {J. Real Time Image Process.},
volume = {13},
number = {2},
pages = {249--260},
year = {2017},
url = {https://doi.org/10.1007/s11554-014-0397-y},
doi = {10.1007/S11554-014-0397-Y},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jrtip/Akgun17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/suscom/DigalwarRM17,
author = {Mayuri Digalwar and
Biju K. Raveendran and
Sudeept Mohan},
title = {{LAMCS:} {A} leakage aware {DVFS} based mixed task set scheduler for
multi-core processors},
journal = {Sustain. Comput. Informatics Syst.},
volume = {15},
pages = {63--81},
year = {2017},
url = {https://doi.org/10.1016/j.suscom.2017.06.001},
doi = {10.1016/J.SUSCOM.2017.06.001},
timestamp = {Tue, 25 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/suscom/DigalwarRM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/KimKC17,
author = {Young Geun Kim and
Minyong Kim and
Sung Woo Chung},
title = {Enhancing Energy Efficiency of Multimedia Applications in Heterogeneous
Mobile Multi-Core Processors},
journal = {{IEEE} Trans. Computers},
volume = {66},
number = {11},
pages = {1878--1889},
year = {2017},
url = {https://doi.org/10.1109/TC.2017.2710317},
doi = {10.1109/TC.2017.2710317},
timestamp = {Wed, 18 Oct 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/KimKC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ProcterHGBA17,
author = {Adam M. Procter and
William L. Harrison and
Ian Graves and
Michela Becchi and
Gerard Allwein},
title = {A Principled Approach to Secure Multi-core Processor Design with ReWire},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {2},
pages = {33:1--33:25},
year = {2017},
url = {https://doi.org/10.1145/2967497},
doi = {10.1145/2967497},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ProcterHGBA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RaiC17,
author = {Siddharth Rai and
Mainak Chaudhuri},
title = {Using Criticality of {GPU} Accesses in Memory Management for {CPU-GPU}
Heterogeneous Multi-Core Processors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {133:1--133:23},
year = {2017},
url = {https://doi.org/10.1145/3126540},
doi = {10.1145/3126540},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RaiC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tmscs/LuYHL17,
author = {Hang Lu and
Guihai Yan and
Yinhe Han and
Xiaowei Li},
title = {PowerTrader: Enforcing Autonomous Power Management for Future Large-Scale
Many-Core Processors},
journal = {{IEEE} Trans. Multi Scale Comput. Syst.},
volume = {3},
number = {4},
pages = {283--295},
year = {2017},
url = {https://doi.org/10.1109/TMSCS.2017.2701795},
doi = {10.1109/TMSCS.2017.2701795},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tmscs/LuYHL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/AzadFMM17,
author = {Zahra Azad and
Hamed Farbeh and
Amir Mahdi Hosseini Monazzah and
Seyed Ghassem Miremadi},
title = {An Efficient Protection Technique for Last Level {STT-RAM} Caches
in Multi-Core Processors},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {28},
number = {6},
pages = {1564--1577},
year = {2017},
url = {https://doi.org/10.1109/TPDS.2016.2628742},
doi = {10.1109/TPDS.2016.2628742},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/AzadFMM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dica/MenantNMP17,
author = {Judica{\"{e}}l Menant and
Jean{-}Fran{\c{c}}ois Nezan and
Luce Morin and
Muriel Pressigout},
editor = {William Puech and
Robert Sitnik},
title = {A comparison of stereo matching algorithms on multi-core Digital Signal
Processor platform},
booktitle = {3D Image Processing, Measurement (3DIPM), and Applications 2017, Burlingame,
CA, USA, January 29 - February 2, 2017},
pages = {49--54},
publisher = {Society for Imaging Science and Technology},
year = {2017},
url = {https://doi.org/10.2352/ISSN.2470-1173.2017.20.3DIPM-007},
doi = {10.2352/ISSN.2470-1173.2017.20.3DIPM-007},
timestamp = {Wed, 19 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/3dica/MenantNMP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ACISicis/AmarKB17,
author = {Mohamed Abdellahi Amar and
Walid Khaznaji and
Monia Bellalouna},
editor = {Guobin Zhu and
Shaowen Yao and
Xiaohui Cui and
Simon Xu},
title = {A parallel hybrid heuristic based on Karp's partitioning for {PTSP}
on multi-core processors},
booktitle = {16th {IEEE/ACIS} International Conference on Computer and Information
Science, {ICIS} 2017, Wuhan, China, May 24-26, 2017},
pages = {465--470},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICIS.2017.7960037},
doi = {10.1109/ICIS.2017.7960037},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ACISicis/AmarKB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/HaasWUPW17,
author = {Florian Haas and
Sebastian Weis and
Theo Ungerer and
Gilles Pokam and
Youfeng Wu},
editor = {Jens Knoop and
Wolfgang Karl and
Martin Schulz and
Koji Inoue and
Thilo Pionteck},
title = {Fault-Tolerant Execution on {COTS} Multi-core Processors with Hardware
Transactional Memory Support},
booktitle = {Architecture of Computing Systems - {ARCS} 2017 - 30th International
Conference, Vienna, Austria, April 3-6, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10172},
pages = {16--30},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-54999-6\_2},
doi = {10.1007/978-3-319-54999-6\_2},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/HaasWUPW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bigmm/Rodriguez-Sanchez17,
author = {Rafael Rodr{\'{\i}}guez{-}S{\'{a}}nchez and
Enrique S. Quintana{-}Ort{\'{\i}}},
title = {Tiles-and WPP-based {HEVC} Decoding on Asymmetric Multi-core Processors},
booktitle = {Third {IEEE} International Conference on Multimedia Big Data, BigMM
2017, Laguna Hills, CA, USA, April 19-21, 2017},
pages = {299--302},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/BigMM.2017.20},
doi = {10.1109/BIGMM.2017.20},
timestamp = {Fri, 09 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/bigmm/Rodriguez-Sanchez17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/OrtizSAL17,
author = {Gabriel Ortiz and
Lars J. Svensson and
Erik Alveflo and
Per Larsson{-}Edefors},
title = {Instruction level energy model for the Adapteva Epiphany multi-core
processor},
booktitle = {Proceedings of the Computing Frontiers Conference, CF'17, Siena, Italy,
May 15-17, 2017},
pages = {380--384},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3075564.3078892},
doi = {10.1145/3075564.3078892},
timestamp = {Tue, 06 Nov 2018 11:07:32 +0100},
biburl = {https://dblp.org/rec/conf/cf/OrtizSAL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codit/BelmabroukM17,
author = {Mounira Belmabrouk and
Mounir Marrakchi},
title = {Comparison of parallel scheduling for triangular system resolution
on multi-core processors},
booktitle = {4th International Conference on Control, Decision and Information
Technologies, CoDIT 2017, Barcelona, Spain, April 5-7, 2017},
pages = {651--656},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/CoDIT.2017.8102668},
doi = {10.1109/CODIT.2017.8102668},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/codit/BelmabroukM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/coolchips/ShinLLLY17,
author = {Dongjoo Shin and
Jinmook Lee and
Jinsu Lee and
Juhyoung Lee and
Hoi{-}Jun Yoo},
title = {An energy-efficient deep learning processor with heterogeneous multi-core
architecture for convolutional neural networks and recurrent neural
networks},
booktitle = {2017 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} Chips
2017, Yokohama, Japan, April 19-21, 2017},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/CoolChips.2017.7946376},
doi = {10.1109/COOLCHIPS.2017.7946376},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/coolchips/ShinLLLY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/YangSLS17,
author = {Zhiyuan Yang and
Caleb Serafy and
Tiantao Lu and
Ankur Srivastava},
title = {Phase-driven Learning-based Dynamic Reliability Management For Multi-core
Processors},
booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
2017, Austin, TX, USA, June 18-22, 2017},
pages = {46:1--46:6},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3061639.3062301},
doi = {10.1145/3061639.3062301},
timestamp = {Thu, 17 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/YangSLS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BagherzadehB17,
author = {Javad Bagherzadeh and
Valeria Bertacco},
editor = {David Atienza and
Giorgio Di Natale},
title = {3DFAR: {A} three-dimensional fabric for reliable multi-core processors},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {310--313},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927006},
doi = {10.23919/DATE.2017.7927006},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/BagherzadehB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HoAKP17,
author = {Nam Ho and
Ishraq Ibne Ashraf and
Paul Kaufmann and
Marco Platzner},
editor = {David Atienza and
Giorgio Di Natale},
title = {Accurate private/shared classification of memory accesses: {A} run-time
analysis system for the {LEON3} multi-core processor},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {788--793},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927096},
doi = {10.23919/DATE.2017.7927096},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HoAKP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/NguyenHP17,
author = {Viet Anh Nguyen and
Damien Hardy and
Isabelle Puaut},
editor = {Marko Bertogna},
title = {Cache-Conscious Offline Real-Time Task Scheduling for Multi-Core Processors},
booktitle = {29th Euromicro Conference on Real-Time Systems, {ECRTS} 2017, June
27-30, 2017, Dubrovnik, Croatia},
series = {LIPIcs},
volume = {76},
pages = {14:1--14:22},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2017},
url = {https://doi.org/10.4230/LIPIcs.ECRTS.2017.14},
doi = {10.4230/LIPICS.ECRTS.2017.14},
timestamp = {Tue, 11 Feb 2020 15:52:14 +0100},
biburl = {https://dblp.org/rec/conf/ecrts/NguyenHP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/HoKP17,
author = {Nam Ho and
Paul Kaufmann and
Marco Platzner},
title = {Evolvable caches: Optimization of reconfigurable cache mappings for
a LEON3/Linux-based multi-core processor},
booktitle = {International Conference on Field Programmable Technology, {FPT} 2017,
Melbourne, Australia, December 11-13, 2017},
pages = {215--218},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/FPT.2017.8280144},
doi = {10.1109/FPT.2017.8280144},
timestamp = {Mon, 17 Feb 2020 13:32:07 +0100},
biburl = {https://dblp.org/rec/conf/fpt/HoKP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hicss/KarsinCL17,
author = {Benjamin Karsin and
Henri Casanova and
Lipyeow Lim},
editor = {Tung Bui},
title = {Low-latency XPath Query Evaluation on Multi-Core Processors},
booktitle = {50th Hawaii International Conference on System Sciences, {HICSS} 2017,
Hilton Waikoloa Village, Hawaii, USA, January 4-7, 2017},
pages = {1--10},
publisher = {ScholarSpace / {AIS} Electronic Library (AISeL)},
year = {2017},
url = {https://hdl.handle.net/10125/41916},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hicss/KarsinCL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SrinivasanCFWZS17,
author = {Vinesh Srinivasan and
Rangeen Basu Roy Chowdhury and
Elliott Forbes and
Randy Widialaksono and
Zhenqian Zhang and
Joshua Schabel and
Sungkwan Ku and
Steve Lipa and
Eric Rotenberg and
W. Rhett Davis and
Paul D. Franzon},
title = {{H3} (Heterogeneity in 3D): {A} Logic-on-Logic 3D-Stacked Heterogeneous
Multi-Core Processor},
booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017,
Boston, MA, USA, November 5-8, 2017},
pages = {145--152},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICCD.2017.30},
doi = {10.1109/ICCD.2017.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SrinivasanCFWZS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icde/ZhangHDZH17,
author = {Shuhao Zhang and
Bingsheng He and
Daniel Dahlmeier and
Amelie Chi Zhou and
Thomas Heinze},
title = {Revisiting the Design of Data Stream Processing Systems on Multi-Core
Processors},
booktitle = {33rd {IEEE} International Conference on Data Engineering, {ICDE} 2017,
San Diego, CA, USA, April 19-22, 2017},
pages = {659--670},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICDE.2017.119},
doi = {10.1109/ICDE.2017.119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icde/ZhangHDZH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ElafrouGK17,
author = {Athena Elafrou and
Georgios I. Goumas and
Nectarios Koziris},
title = {Performance Analysis and Optimization of Sparse Matrix-Vector Multiplication
on Modern Multi- and Many-Core Processors},
booktitle = {46th International Conference on Parallel Processing, {ICPP} 2017,
Bristol, United Kingdom, August 14-17, 2017},
pages = {292--301},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICPP.2017.38},
doi = {10.1109/ICPP.2017.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/ElafrouGK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/HouFC17,
author = {Kaixi Hou and
Wu{-}chun Feng and
Shuai Che},
title = {Auto-Tuning Strategies for Parallelizing Sparse Matrix-Vector (SpMV)
Multiplication on Multi- and Many-Core Processors},
booktitle = {2017 {IEEE} International Parallel and Distributed Processing Symposium
Workshops, {IPDPS} Workshops 2017, Orlando / Buena Vista, FL, USA,
May 29 - June 2, 2017},
pages = {713--722},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/IPDPSW.2017.155},
doi = {10.1109/IPDPSW.2017.155},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/HouFC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/MathuriyaLBSK17,
author = {Amrita Mathuriya and
Ye Luo and
Anouar Benali and
Luke Shulenburger and
Jeongnim Kim},
title = {Optimization and Parallelization of B-Spline Based Orbital Evaluations
in {QMC} on Multi/Many-Core Shared Memory Processors},
booktitle = {2017 {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2017, Orlando, FL, USA, May 29 - June 2, 2017},
pages = {213--223},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/IPDPS.2017.33},
doi = {10.1109/IPDPS.2017.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/MathuriyaLBSK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/LernerT17,
author = {Scott Lerner and
Baris Taskin},
title = {Workload-aware {ASIC} flow for lifetime improvement of multi-core
IoT processors},
booktitle = {18th International Symposium on Quality Electronic Design, {ISQED}
2017, Santa Clara, CA, USA, March 14-15, 2017},
pages = {379--384},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISQED.2017.7918345},
doi = {10.1109/ISQED.2017.7918345},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/LernerT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ngcas/OlivieriCCMM17,
author = {Mauro Olivieri and
Abdallah Cheikh and
Gianmarco Cerutti and
Antonio Mastrandrea and
Francesco Menichelli},
title = {Investigation on the Optimal Pipeline Organization in {RISC-V} Multi-threaded
Soft Processor Cores},
booktitle = {New Generation of CAS, {NGCAS} 2017, Genova, Italy, September 6-9,
2017},
pages = {45--48},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NGCAS.2017.61},
doi = {10.1109/NGCAS.2017.61},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ngcas/OlivieriCCMM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/SapraA17,
author = {Dolly Sapra and
Sebastian Altmeyer},
title = {Work-in-Progress: Design-Space Exploration of Multi-Core Processors
for Safety-Critical Real-Time Systems},
booktitle = {2017 {IEEE} Real-Time Systems Symposium, {RTSS} 2017, Paris, France,
December 5-8, 2017},
pages = {360--362},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/RTSS.2017.00040},
doi = {10.1109/RTSS.2017.00040},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtss/SapraA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/trustcom/ChengZHCK17,
author = {Long Cheng and
Zhihao Zhao and
Kai Huang and
Gang Chen and
Alois C. Knoll},
title = {McFTP: {A} Framework to Explore and Prototype Multi-core Thermal Managements
on Real Processors},
booktitle = {2017 {IEEE} Trustcom/BigDataSE/ICESS, Sydney, Australia, August 1-4,
2017},
pages = {806--814},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/Trustcom/BigDataSE/ICESS.2017.316},
doi = {10.1109/TRUSTCOM/BIGDATASE/ICESS.2017.316},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/trustcom/ChengZHCK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/David17,
author = {Alan David},
title = {Scheduling Algorithms for Asymmetric Multi-core Processors},
journal = {CoRR},
volume = {abs/1702.04028},
year = {2017},
url = {http://arxiv.org/abs/1702.04028},
eprinttype = {arXiv},
eprint = {1702.04028},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/David17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1708-04198,
author = {Saber Moradi and
Qiao Ning and
Fabio Stefanini and
Giacomo Indiveri},
title = {A scalable multi-core architecture with heterogeneous memory structures
for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)},
journal = {CoRR},
volume = {abs/1708.04198},
year = {2017},
url = {http://arxiv.org/abs/1708.04198},
eprinttype = {arXiv},
eprint = {1708.04198},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1708-04198.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1711-05487,
author = {Athena Elafrou and
Georgios I. Goumas and
Nectarios Koziris},
title = {Performance Analysis and Optimization of Sparse Matrix-Vector Multiplication
on Modern Multi- and Many-Core Processors},
journal = {CoRR},
volume = {abs/1711.05487},
year = {2017},
url = {http://arxiv.org/abs/1711.05487},
eprinttype = {arXiv},
eprint = {1711.05487},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1711-05487.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Bohm16,
author = {Niko B{\"{o}}hm},
title = {Methoden zur Adaption und Bewertung bestehender Automobil-Systemsoftware
an Mehrkernprozessoren (Methods for the adaptation and evaluation
of existing automotive system software to multi-core processors)},
school = {University of Erlangen-Nuremberg, Germany},
year = {2016},
url = {https://opus4.kobv.de/opus4-fau/frontdoor/index/index/docId/7915},
urn = {urn:nbn:de:bvb:29-opus4-79158},
timestamp = {Fri, 02 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/basesearch/Bohm16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Godfrey16,
author = {Scott William Godfrey},
title = {Cross-System Runtime Prediction of Parallel Applications on Multi-Core
Processors},
school = {University of California, Irvine, {USA}},
year = {2016},
url = {http://www.escholarship.org/uc/item/22g7d998},
timestamp = {Mon, 15 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Godfrey16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/sg/Cui16,
author = {Yingnan Cui},
title = {Thermal management for large-scale multi-core processors},
school = {Nanyang Technological University, Singapore},
year = {2016},
url = {https://hdl.handle.net/10356/69037},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/sg/Cui16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cee/Tu16,
author = {Jih{-}Fu Tu},
title = {A novel memory management method for multi-core processors},
journal = {Comput. Electr. Eng.},
volume = {51},
pages = {184--194},
year = {2016},
url = {https://doi.org/10.1016/j.compeleceng.2015.10.009},
doi = {10.1016/J.COMPELECENG.2015.10.009},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cee/Tu16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/DixonLZ16,
author = {Matthew Dixon and
J{\"{o}}rg Lotze and
Mohammad Zubair},
title = {A portable, extensible and fast stochastic volatility model calibration
using multi and many-core processors},
journal = {Concurr. Comput. Pract. Exp.},
volume = {28},
number = {3},
pages = {866--877},
year = {2016},
url = {https://doi.org/10.1002/cpe.3727},
doi = {10.1002/CPE.3727},
timestamp = {Mon, 02 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/concurrency/DixonLZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/MagoulesBC16,
author = {Fr{\'{e}}d{\'{e}}ric Magoul{\`{e}}s and
Guillaume Gbikpi{-}Benissan and
Patrick Callet},
title = {Ray-tracing domain decomposition methods for real-time simulation
on multi-core and multi-processor systems},
journal = {Concurr. Comput. Pract. Exp.},
volume = {28},
number = {16},
pages = {4352--4364},
year = {2016},
url = {https://doi.org/10.1002/cpe.3696},
doi = {10.1002/CPE.3696},
timestamp = {Thu, 25 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/concurrency/MagoulesBC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/digearth/LiuFXGSP16,
author = {Jia Liu and
Dustin Feld and
Yong Xue and
Jochen Garcke and
Thomas Soddemann and
Peiyuan Pan},
title = {An efficient geosciences workflow on multi-core processors and GPUs:
a case study for aerosol optical depth retrieval from {MODIS} satellite
data},
journal = {Int. J. Digit. Earth},
volume = {9},
number = {8},
pages = {748--765},
year = {2016},
url = {https://doi.org/10.1080/17538947.2015.1130087},
doi = {10.1080/17538947.2015.1130087},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/digearth/LiuFXGSP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/disopt/ChenY16,
author = {Xufeng Chen and
Deshi Ye},
title = {Approximation algorithms for scheduling on multi-core processor with
shared speedup resources},
journal = {Discret. Optim.},
volume = {20},
pages = {11--22},
year = {2016},
url = {https://doi.org/10.1016/j.disopt.2016.02.002},
doi = {10.1016/J.DISOPT.2016.02.002},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/disopt/ChenY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/LiuG16,
author = {Jun Liu and
Jinhua Guo},
title = {Energy efficient scheduling of real-time tasks on multi-core processors
with voltage islands},
journal = {Future Gener. Comput. Syst.},
volume = {56},
pages = {202--210},
year = {2016},
url = {https://doi.org/10.1016/j.future.2015.06.003},
doi = {10.1016/J.FUTURE.2015.06.003},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fgcs/LiuG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/WeiSHCGTS16,
author = {Hongxing Wei and
Zhenzhou Shao and
Zhen Huang and
Renhai Chen and
Yong Guan and
Jindong Tan and
Zili Shao},
title = {{RT-ROS:} {A} real-time {ROS} architecture on multi-core processors},
journal = {Future Gener. Comput. Syst.},
volume = {56},
pages = {171--178},
year = {2016},
url = {https://doi.org/10.1016/j.future.2015.05.008},
doi = {10.1016/J.FUTURE.2015.05.008},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fgcs/WeiSHCGTS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpca/ParkSVHKPPDLRMD16,
author = {Jongsoo Park and
Mikhail Smelyanskiy and
Karthikeyan Vaidyanathan and
Alexander Heinecke and
Dhiraj D. Kalamkar and
Md. Mostofa Ali Patwary and
Vadim O. Pirogov and
Pradeep Dubey and
Xing Liu and
Carlos Rosales and
Cyril Mazauric and
Christopher S. Daley},
title = {Optimizations in a high-performance conjugate gradient benchmark for
IA-based multi- and many-core processors},
journal = {Int. J. High Perform. Comput. Appl.},
volume = {30},
number = {1},
pages = {11--27},
year = {2016},
url = {https://doi.org/10.1177/1094342015593157},
doi = {10.1177/1094342015593157},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijhpca/ParkSVHKPPDLRMD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/SalamiNMB16,
author = {Bagher Salami and
Hamid Noori and
Farhad Mehdipour and
Mohammadreza Baharani},
title = {Physical-aware predictive dynamic thermal management of multi-core
processors},
journal = {J. Parallel Distributed Comput.},
volume = {95},
pages = {42--56},
year = {2016},
url = {https://doi.org/10.1016/j.jpdc.2016.03.008},
doi = {10.1016/J.JPDC.2016.03.008},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/SalamiNMB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/GuoMYZ16,
author = {Jun Guo and
Anxiang Ma and
Yongming Yan and
Bin Zhang},
title = {Application performance prediction method based on cross-core performance
interference on multi-core processor},
journal = {Microprocess. Microsystems},
volume = {47},
pages = {112--120},
year = {2016},
url = {https://doi.org/10.1016/j.micpro.2016.05.006},
doi = {10.1016/J.MICPRO.2016.05.006},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/GuoMYZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/PaulCG16,
author = {Rourab Paul and
Amlan Chakrabarti and
Ranjan Ghosh},
title = {Multi core {SSL/TLS} security processor architecture and its {FPGA}
prototype design with automated preferential algorithm},
journal = {Microprocess. Microsystems},
volume = {40},
pages = {124--136},
year = {2016},
url = {https://doi.org/10.1016/j.micpro.2015.08.003},
doi = {10.1016/J.MICPRO.2015.08.003},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/PaulCG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/XieZLLL16,
author = {Guoqi Xie and
Gang Zeng and
Liangjiao Liu and
Renfa Li and
Keqin Li},
title = {Mixed real-time scheduling of multiple DAGs-based applications on
heterogeneous multi-core processors},
journal = {Microprocess. Microsystems},
volume = {47},
pages = {93--103},
year = {2016},
url = {https://doi.org/10.1016/j.micpro.2016.04.007},
doi = {10.1016/J.MICPRO.2016.04.007},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/XieZLLL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/ZhangCG16,
author = {Weizhe Zhang and
Albert M. K. Cheng and
Marc Geilen},
title = {Special Issue on Real-Time Scheduling on Heterogeneous Multi-core
Processors},
journal = {Microprocess. Microsystems},
volume = {47},
pages = {90--92},
year = {2016},
url = {https://doi.org/10.1016/j.micpro.2016.11.005},
doi = {10.1016/J.MICPRO.2016.11.005},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/ZhangCG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/BeanatoCML16,
author = {Giulia Beanato and
Alessandro Cevrero and
Giovanni De Micheli and
Yusuf Leblebici},
title = {Impact of data serialization over TSVs on routing congestion in 3D-stacked
multi-core processors},
journal = {Microelectron. J.},
volume = {51},
pages = {38--45},
year = {2016},
url = {https://doi.org/10.1016/j.mejo.2015.12.004},
doi = {10.1016/J.MEJO.2015.12.004},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/BeanatoCML16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigbed/RhoAOSN16,
author = {Jaeyong Rho and
Takuya Azumi and
Hiroshi Oyama and
Kenya Sato and
Nobuhiko Nishio},
title = {Distributed processing for automotive data stream management system
on mixed single- and multi-core processors},
journal = {{SIGBED} Rev.},
volume = {13},
number = {3},
pages = {15--22},
year = {2016},
url = {https://doi.org/10.1145/2983185.2983187},
doi = {10.1145/2983185.2983187},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigbed/RhoAOSN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/suscom/LuPS16,
author = {Teng Lu and
Partha Pratim Pande and
Behrooz A. Shirazi},
title = {A dynamic, compiler guided {DVFS} mechanism to achieve energy-efficiency
in multi-core processors},
journal = {Sustain. Comput. Informatics Syst.},
volume = {12},
pages = {1--9},
year = {2016},
url = {https://doi.org/10.1016/j.suscom.2016.04.003},
doi = {10.1016/J.SUSCOM.2016.04.003},
timestamp = {Tue, 25 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/suscom/LuPS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/IqbalHRVJ16,
author = {Muhammad Faisal Iqbal and
Jim Holt and
Jee Ho Ryoo and
Gustavo de Veciana and
Lizy K. John},
title = {Dynamic Core Allocation and Packet Scheduling in Multicore Network
Processors},
journal = {{IEEE} Trans. Computers},
volume = {65},
number = {12},
pages = {3646--3660},
year = {2016},
url = {https://doi.org/10.1109/TC.2016.2560838},
doi = {10.1109/TC.2016.2560838},
timestamp = {Thu, 27 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/IqbalHRVJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LeeKH16,
author = {Junghoon Lee and
Taehoon Kim and
Jaehyuk Huh},
title = {Reducing the Memory Bandwidth Overheads of Hardware Security Support
for Multi-Core Processors},
journal = {{IEEE} Trans. Computers},
volume = {65},
number = {11},
pages = {3384--3397},
year = {2016},
url = {https://doi.org/10.1109/TC.2016.2538218},
doi = {10.1109/TC.2016.2538218},
timestamp = {Thu, 02 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LeeKH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/GalJ16,
author = {Bertrand Le Gal and
Christophe J{\'{e}}go},
title = {High-Throughput Multi-Core {LDPC} Decoders Based on x86 Processor},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {27},
number = {5},
pages = {1373--1386},
year = {2016},
url = {https://doi.org/10.1109/TPDS.2015.2435787},
doi = {10.1109/TPDS.2015.2435787},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/GalJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/KarsavuranAA16,
author = {M. Ozan Karsavuran and
Kadir Akbudak and
Cevdet Aykanat},
title = {Locality-Aware Parallel Sparse Matrix-Vector and Matrix-Transpose-Vector
Multiplication on Many-Core Processors},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {27},
number = {6},
pages = {1713--1726},
year = {2016},
url = {https://doi.org/10.1109/TPDS.2015.2453970},
doi = {10.1109/TPDS.2015.2453970},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/KarsavuranAA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/SheikhAF16,
author = {Hafiz Fahad Sheikh and
Ishfaq Ahmad and
Dongrui Fan},
title = {An Evolutionary Technique for Performance-Energy-Temperature Optimized
Scheduling of Parallel Tasks on Multi-Core Processors},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {27},
number = {3},
pages = {668--681},
year = {2016},
url = {https://doi.org/10.1109/TPDS.2015.2421352},
doi = {10.1109/TPDS.2015.2421352},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/SheikhAF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/ShpinerKC16,
author = {Alexander Shpiner and
Isaac Keslassy and
Rami Cohen},
title = {Scaling Multi-Core Network Processors without the Reordering Bottleneck},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {27},
number = {3},
pages = {900--912},
year = {2016},
url = {https://doi.org/10.1109/TPDS.2015.2421449},
doi = {10.1109/TPDS.2015.2421449},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/ShpinerKC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/ZhaoCXF16,
author = {Jiacheng Zhao and
Huimin Cui and
Jingling Xue and
Xiaobing Feng},
title = {Predicting Cross-Core Performance Interference on Multicore Processors
with Regression Analysis},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {27},
number = {5},
pages = {1443--1456},
year = {2016},
url = {https://doi.org/10.1109/TPDS.2015.2442983},
doi = {10.1109/TPDS.2015.2442983},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/ZhaoCXF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ColinKR16,
author = {Alexei Colin and
Arvind Kandhalu and
Ragunathan Rajkumar},
title = {Energy-Efficient Allocation of Real-Time Applications onto Single-ISA
Heterogeneous Multi-Core Processors},
journal = {J. Signal Process. Syst.},
volume = {84},
number = {1},
pages = {91--110},
year = {2016},
url = {https://doi.org/10.1007/s11265-015-0987-3},
doi = {10.1007/S11265-015-0987-3},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/ColinKR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/WidialaksonoCZS16,
author = {Randy Widialaksono and
Rangeen Basu Roy Chowdhury and
Zhenqian Zhang and
Joshua Schabel and
Steve Lipa and
Eric Rotenberg and
W. Rhett Davis and
Paul D. Franzon},
title = {Physical design of a 3D-stacked heterogeneous multi-core processor},
booktitle = {2016 {IEEE} International 3D Systems Integration Conference, 3DIC
2016, San Francisco, CA, USA, November 8-11, 2016},
pages = {1--5},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/3DIC.2016.7970036},
doi = {10.1109/3DIC.2016.7970036},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/3dic/WidialaksonoCZS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/ChronakiMCRBALV16,
author = {Kallia Chronaki and
Miquel Moret{\'{o}} and
Marc Casas and
Alejandro Rico and
Rosa M. Badia and
Eduard Ayguad{\'{e}} and
Jes{\'{u}}s Labarta and
Mateo Valero},
editor = {Ayal Zaks and
Bilha Mendelson and
Lawrence Rauchwerger and
Wen{-}mei W. Hwu},
title = {{POSTER:} Exploiting Asymmetric Multi-Core Processors with Flexible
System Sofware},
booktitle = {Proceedings of the 2016 International Conference on Parallel Architectures
and Compilation, {PACT} 2016, Haifa, Israel, September 11-15, 2016},
pages = {415--417},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2967938.2976038},
doi = {10.1145/2967938.2976038},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/ChronakiMCRBALV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/HaasWUPW16,
author = {Florian Haas and
Sebastian Weis and
Theo Ungerer and
Gilles Pokam and
Youfeng Wu},
editor = {Ayal Zaks and
Bilha Mendelson and
Lawrence Rauchwerger and
Wen{-}mei W. Hwu},
title = {{POSTER:} Fault-tolerant Execution on {COTS} Multi-core Processors
with Hardware Transactional Memory Support},
booktitle = {Proceedings of the 2016 International Conference on Parallel Architectures
and Compilation, {PACT} 2016, Haifa, Israel, September 11-15, 2016},
pages = {421--422},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2967938.2974051},
doi = {10.1145/2967938.2974051},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/HaasWUPW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/amc/KeinertLV16,
author = {Matthias Keinert and
Armin Lechler and
Alexander Verl},
title = {Concept of a computerized numerical control kernel for execution on
multi-core processors},
booktitle = {{IEEE} 14th International Workshop on Advanced Motion Control, {AMC}
2016, Auckland, New Zealand, April 22-24, 2016},
pages = {581--586},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/AMC.2016.7496412},
doi = {10.1109/AMC.2016.7496412},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/amc/KeinertLV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/amcc/CartagenaPR16,
author = {Daniel G. Cartagena and
Karan Puttannaiah and
Armando A. Rodriguez},
title = {Modeling of a multi-core processor thermal dynamics for development
of Dynamic Thermal Management controllers},
booktitle = {2016 American Control Conference, {ACC} 2016, Boston, MA, USA, July
6-8, 2016},
pages = {6917--6922},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ACC.2016.7526762},
doi = {10.1109/ACC.2016.7526762},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/amcc/CartagenaPR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccgrid/SunYWLL16,
author = {Qiao Sun and
Chao Yang and
Changmao Wu and
Leisheng Li and
Fangfang Liu},
title = {Fast Parallel Stream Compaction for IA-Based Multi/many-core Processors},
booktitle = {{IEEE/ACM} 16th International Symposium on Cluster, Cloud and Grid
Computing, CCGrid 2016, Cartagena, Colombia, May 16-19, 2016},
pages = {736--745},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/CCGrid.2016.112},
doi = {10.1109/CCGRID.2016.112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ccgrid/SunYWLL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cec/ChennupatiAR16,
author = {Gopinath Chennupati and
R. Muhammad Atif Azad and
Conor Ryan},
title = {Automatic lock-free parallel programming on multi-core processors},
booktitle = {{IEEE} Congress on Evolutionary Computation, {CEC} 2016, Vancouver,
BC, Canada, July 24-29, 2016},
pages = {4143--4150},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/CEC.2016.7744316},
doi = {10.1109/CEC.2016.7744316},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cec/ChennupatiAR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/clei/JuniorS16,
author = {Francisco Carlos Silva Junior and
Ivan Saraiva Silva},
title = {Proposal and validation of an adaptable array for multi-core processors},
booktitle = {{XLII} Latin American Computing Conference, {CLEI} 2016, Valpara{\'{\i}}so,
Chile, October 10-14, 2016},
pages = {1--7},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/CLEI.2016.7833364},
doi = {10.1109/CLEI.2016.7833364},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/clei/JuniorS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codit/GawaliR16,
author = {Shubhangi K. Gawali and
Biju K. Raveendran},
title = {{DPS:} {A} dynamic procrastination scheduler for multi-core/multi-processor
hard real time systems},
booktitle = {International Conference on Control, Decision and Information Technologies,
CoDIT 2016, Saint Julian's, Malta, April 6-8, 2016},
pages = {286--291},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/CoDIT.2016.7593575},
doi = {10.1109/CODIT.2016.7593575},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/codit/GawaliR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/coolchips/LeeBKPY16,
author = {Kyuho Jason Lee and
Kyeongryeol Bong and
Changhyeon Kim and
Junyoung Park and
Hoi{-}Jun Yoo},
title = {An energy-efficient parallel multi-core {ADAS} processor with robust
visual attention and workload-prediction {DVFS} for real-time {HD}
stereo stream},
booktitle = {2016 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS}
XIX, Yokohama, Japan, April 20-22, 2016},
pages = {1--3},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/CoolChips.2016.7503672},
doi = {10.1109/COOLCHIPS.2016.7503672},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/coolchips/LeeBKPY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/00020H16,
author = {Michael Jacobs and
Sebastian Hahn and
Sebastian Hack},
title = {A Framework for the Derivation of {WCET} Analyses for Multi-core Processors},
booktitle = {28th Euromicro Conference on Real-Time Systems, {ECRTS} 2016, Toulouse,
France, July 5-8, 2016},
pages = {141--151},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ECRTS.2016.19},
doi = {10.1109/ECRTS.2016.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecrts/00020H16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/DSouzaBR16,
author = {Sandeep D'Souza and
Anand Bhat and
Ragunathan Rajkumar},
title = {Sleep Scheduling for Energy-Savings in Multi-core Processors},
booktitle = {28th Euromicro Conference on Real-Time Systems, {ECRTS} 2016, Toulouse,
France, July 5-8, 2016},
pages = {226--236},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ECRTS.2016.16},
doi = {10.1109/ECRTS.2016.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecrts/DSouzaBR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic-nc/KayamuroSFK16,
author = {Kouki Kayamuro and
Takahiro Sasaki and
Yuki Fukazawa and
Toshio Kondo},
title = {A Rapid Verification Framework for Developing Multi-core Processor},
booktitle = {Fourth International Symposium on Computing and Networking, {CANDAR}
2016, Hiroshima, Japan, November 22-25, 2016},
pages = {388--394},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/CANDAR.2016.0074},
doi = {10.1109/CANDAR.2016.0074},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ic-nc/KayamuroSFK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ForbesR16,
author = {Elliott Forbes and
Eric Rotenberg},
title = {Fast register consolidation and migration for heterogeneous multi-core
processors},
booktitle = {34th {IEEE} International Conference on Computer Design, {ICCD} 2016,
Scottsdale, AZ, USA, October 2-5, 2016},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ICCD.2016.7753254},
doi = {10.1109/ICCD.2016.7753254},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ForbesR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icess/IshibashiYYY16,
author = {Kota Ishibashi and
Kotaro Yokoyama and
Myungryun Yoo and
Takanori Yokoyama},
title = {A Real-Time Operating System with Location-Transparent Shared Resource
Management for Multi-core Processors},
booktitle = {13th International Conference on Embedded Software and Systems, {ICESS}
2016, Chengdu, China, August 13-14, 2016},
pages = {93--98},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ICESS.2016.25},
doi = {10.1109/ICESS.2016.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icess/IshibashiYYY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icnc/LiuLZC16,
author = {Yan Liu and
Yongwei Li and
Yihong Zhao and
Xiaoming Chen},
title = {A scheduling algorithm in the randomly heterogeneous multi-core processor},
booktitle = {12th International Conference on Natural Computation, Fuzzy Systems
and Knowledge Discovery, {ICNC-FSKD} 2016, Changsha, China, August
13-15, 2016},
pages = {2140--2146},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/FSKD.2016.7603512},
doi = {10.1109/FSKD.2016.7603512},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icnc/LiuLZC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpads/LiNZAL16,
author = {Ying Li and
Jianwei Niu and
Jiong Zhang and
Mohammed Atiquzzaman and
Xiang Long},
title = {An Optimized {RM} Algorithm by Task Affinity on Multi-Core Processor},
booktitle = {22nd {IEEE} International Conference on Parallel and Distributed Systems,
{ICPADS} 2016, Wuhan, China, December 13-16, 2016},
pages = {286--293},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ICPADS.2016.0046},
doi = {10.1109/ICPADS.2016.0046},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpads/LiNZAL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ShaWFRQ16,
author = {Shi Sha and
Wujie Wen and
Ming Fan and
Shaolei Ren and
Gang Quan},
title = {Performance Maximization via Frequency Oscillation on Temperature
Constrained Multi-core Processors},
booktitle = {45th International Conference on Parallel Processing, {ICPP} 2016,
Philadelphia, PA, USA, August 16-19, 2016},
pages = {526--535},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ICPP.2016.67},
doi = {10.1109/ICPP.2016.67},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/ShaWFRQ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/igarss/ZhengXGL16,
author = {Xiao Zheng and
Yong Xue and
Jie Guang and
Jia Liu},
title = {Remote sensing data processing acceleration based on multi-core processors},
booktitle = {2016 {IEEE} International Geoscience and Remote Sensing Symposium,
{IGARSS} 2016, Beijing, China, July 10-15, 2016},
pages = {641--644},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/IGARSS.2016.7729161},
doi = {10.1109/IGARSS.2016.7729161},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/igarss/ZhengXGL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/indin/UrbinaAO16,
author = {Mois{\'{e}}s Urbina and
Hamidreza Ahmadian and
Roman Obermaisser},
title = {Co-simulation framework for {AUTOSAR} multi-core processors with message-based
Network-on-Chips},
booktitle = {14th {IEEE} International Conference on Industrial Informatics, {INDIN}
2016, Poitiers, France, July 19-21, 2016},
pages = {1140--1147},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/INDIN.2016.7819338},
doi = {10.1109/INDIN.2016.7819338},
timestamp = {Tue, 23 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/indin/UrbinaAO16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/Hou0F16,
author = {Kaixi Hou and
Hao Wang and
Wu{-}chun Feng},
title = {AAlign: {A} {SIMD} Framework for Pairwise Sequence Alignment on x86-Based
Multi-and Many-Core Processors},
booktitle = {2016 {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2016, Chicago, IL, USA, May 23-27, 2016},
pages = {780--789},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/IPDPS.2016.115},
doi = {10.1109/IPDPS.2016.115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/Hou0F16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isorc/FranzmannKUDSSS16,
author = {Florian Franzmann and
Tobias Klaus and
Peter Ulbrich and
Patrick Deinhardt and
Benjamin Steffes and
Fabian Scheler and
Wolfgang Schr{\"{o}}der{-}Preikschat},
title = {From Intent to Effect: Tool-Based Generation of Time-Triggered Real-Time
Systems on Multi-core Processors},
booktitle = {19th {IEEE} International Symposium on Real-Time Distributed Computing,
{ISORC} 2016, York, United Kingdom, May 17-20, 2016},
pages = {134--141},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISORC.2016.27},
doi = {10.1109/ISORC.2016.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isorc/FranzmannKUDSSS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/SalcicNPT16,
author = {Zoran A. Salcic and
Muhammad Nadeem and
HeeJong Park and
J{\"{u}}rgen Teich},
title = {Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous
Multi-core Processor},
booktitle = {10th {IEEE} International Symposium on Embedded Multicore/Many-core
Systems-on-Chip, {MCSOC} 2016, Lyon, France, September 21-23, 2016},
pages = {233--240},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MCSoC.2016.34},
doi = {10.1109/MCSOC.2016.34},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mcsoc/SalcicNPT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/meco/MoriH16,
author = {Jones Yudi Mori and
Michael H{\"{u}}bner},
title = {Multi-level parallelism analysis and system-level simulation for many-core
Vision processor design},
booktitle = {5th Mediterranean Conference on Embedded Computing, {MECO} 2016, Bar,
Montenegro, June 12-16, 2016},
pages = {90--95},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/MECO.2016.7525710},
doi = {10.1109/MECO.2016.7525710},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/meco/MoriH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/KarnE16,
author = {Rupesh Raj Karn and
Ibrahim Abe M. Elfadel},
title = {Autoscaling of cores in multicore processors using power and thermal
workload signatures},
booktitle = {{IEEE} 59th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2016, Abu Dhabi, United Arab Emirates, October 16-19, 2016},
pages = {1--4},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/MWSCAS.2016.7870120},
doi = {10.1109/MWSCAS.2016.7870120},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/KarnE16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nccet/ZhangWZW16,
author = {Chengyi Zhang and
Jiming Wang and
Minxuan Zhang and
Xiangdi Wu},
editor = {Weixia Xu and
Liquan Xiao and
Jinwen Li and
Chengyi Zhang and
Zhenzhen Zhu},
title = {A New {DVFS} Algorithm Design for Multi-core Processor Chip},
booktitle = {Computer Engineering and Technology - 20th {CCF} Conference, {NCCET}
2016, Xi'an, China, August 10-12, 2016, Revised Selected Papers},
series = {Communications in Computer and Information Science},
volume = {666},
pages = {40--51},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-981-10-3159-5\_5},
doi = {10.1007/978-981-10-3159-5\_5},
timestamp = {Wed, 18 Jul 2018 14:01:44 +0200},
biburl = {https://dblp.org/rec/conf/nccet/ZhangWZW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scube/PulliniMMB16,
author = {Antonio Pullini and
Stefan Mach and
Michele Magno and
Luca Benini},
editor = {Michele Magno and
Fabien Ferrero and
Vedran Bilas},
title = {A Dual Processor Energy-Efficient Platform with Multi-core Accelerator
for Smart Sensing},
booktitle = {Sensor Systems and Software - 7th International Conference, S-Cube
2016, Sophia Antipolis, Nice, France, December 1-2, 2016, Revised
Selected Papers},
series = {Lecture Notes of the Institute for Computer Sciences, Social Informatics
and Telecommunications Engineering},
volume = {205},
pages = {29--40},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-61563-9\_3},
doi = {10.1007/978-3-319-61563-9\_3},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/scube/PulliniMMB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wea/KotsireasPPS16,
author = {Ilias S. Kotsireas and
Panos M. Pardalos and
Konstantinos E. Parsopoulos and
Dimitris Souravlias},
editor = {Andrew V. Goldberg and
Alexander S. Kulikov},
title = {On the Solution of Circulant Weighing Matrices Problems Using Algorithm
Portfolios on Multi-core Processors},
booktitle = {Experimental Algorithms - 15th International Symposium, {SEA} 2016,
St. Petersburg, Russia, June 5-8, 2016, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9685},
pages = {184--200},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-38851-9\_13},
doi = {10.1007/978-3-319-38851-9\_13},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/wea/KotsireasPPS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/CafaroPEA16a,
author = {Massimo Cafaro and
Marco Pulimeno and
Italo Epicoco and
Giovanni Aloisio},
title = {Parallel Space Saving on Multi and Many-Core Processors},
journal = {CoRR},
volume = {abs/1606.04669},
year = {2016},
url = {http://arxiv.org/abs/1606.04669},
eprinttype = {arXiv},
eprint = {1606.04669},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/CafaroPEA16a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/MathuriyaLBSK16,
author = {Amrita Mathuriya and
Ye Luo and
Anouar Benali and
Luke Shulenburger and
Jeongnim Kim},
title = {Optimization and parallelization of B-spline based orbital evaluations
in {QMC} on multi/many-core shared memory processors},
journal = {CoRR},
volume = {abs/1611.02665},
year = {2016},
url = {http://arxiv.org/abs/1611.02665},
eprinttype = {arXiv},
eprint = {1611.02665},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/MathuriyaLBSK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Grudnitsky15,
author = {Artjom Grudnitsky},
title = {A Reconfigurable Processor for Heterogeneous Multi-Core Architectures},
school = {Karlsruhe Institute of Technology, Germany},
year = {2015},
url = {http://digbib.ubka.uni-karlsruhe.de/volltexte/1000062002},
urn = {urn:nbn:de:swb:90-620029},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/dnb/Grudnitsky15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Aminot15,
author = {Alexandre Aminot},
title = {Placement de t{\^{a}}ches dynamique et flexible sur processeur multicoeur
asym{\'{e}}trique en fonctionnalit{\'{e}}s. (Dynamic and
flexible task mapping on functionally asymmetric multi-core processor)},
school = {Grenoble Alpes University, France},
year = {2015},
url = {https://tel.archives-ouvertes.fr/tel-01288227},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Aminot15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Jean15,
author = {Xavier Jean},
title = {Ma{\^{\i}}trise de la couche hyperviseur sur les architectures multi-coeurs
{COTS} dans un contexte avionique. (Hypervisor control of {COTS} multi-cores
processors in order to enforce determinism for future avionics equipment)},
school = {T{\'{e}}l{\'{e}}com ParisTech, France},
year = {2015},
url = {https://tel.archives-ouvertes.fr/tel-01341758},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Jean15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Leroy15,
author = {Rudi Leroy},
title = {Parallel Branch-and-Bound revisited for solving permutation combinatorial
optimization problems on multi-core processors and coprocessors. (Algorithmes
Branch-and-Bound parall{\`{e}}les revisit{\'{e}}s pour la r{\'{e}}solution
de probl{\`{e}}mes d'optimisation combinatoire de permutation sur
processeurs multi-c{\oe}urs et coprocesseurs)},
school = {Lille University of Science and Technology, France},
year = {2015},
url = {https://tel.archives-ouvertes.fr/tel-01248563},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Leroy15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/aes/BorinDVS15,
author = {Edson Borin and
Philippe R. B. Devloo and
Gilvan S. Vieira and
Nathan Shauer},
title = {Accelerating engineering software on modern multi-core processors},
journal = {Adv. Eng. Softw.},
volume = {84},
pages = {77--84},
year = {2015},
url = {https://doi.org/10.1016/j.advengsoft.2014.12.003},
doi = {10.1016/J.ADVENGSOFT.2014.12.003},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/aes/BorinDVS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cee/AkhtarMS15,
author = {M. Nishat Akhtar and
Junita Mohamad{-}Saleh and
Othman Sidek},
title = {Design and simulation of a parallel adaptive arbiter for maximum {CPU}
utilization using multi-core processors},
journal = {Comput. Electr. Eng.},
volume = {47},
pages = {51--68},
year = {2015},
url = {https://doi.org/10.1016/j.compeleceng.2015.08.004},
doi = {10.1016/J.COMPELECENG.2015.08.004},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cee/AkhtarMS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/PanN15,
author = {Chenyun Pan and
Azad Naeemi},
title = {A Fast System-Level Design Methodology for Heterogeneous Multi-Core
Processors Using Emerging Technologies},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {5},
number = {1},
pages = {75--87},
year = {2015},
url = {https://doi.org/10.1109/JETCAS.2015.2398218},
doi = {10.1109/JETCAS.2015.2398218},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/PanN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/GuoZLY15,
author = {Wei Guo and
Minxuan Zhang and
Peng Li and
Chaoyun Yao},
title = {Floorplanner for multi-core micro-processors in 3D ICs with interlayer
cooling system},
journal = {{IEICE} Electron. Express},
volume = {12},
number = {16},
pages = {20150489},
year = {2015},
url = {https://doi.org/10.1587/elex.12.20150489},
doi = {10.1587/ELEX.12.20150489},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/GuoZLY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/Yoo15,
author = {Seehwan Yoo},
title = {An empirical validation of power-performance scaling: {DVFS} vs. multi-core
scaling in big.LITTLE processor},
journal = {{IEICE} Electron. Express},
volume = {12},
number = {8},
pages = {20150236},
year = {2015},
url = {https://doi.org/10.1587/elex.12.20150236},
doi = {10.1587/ELEX.12.20150236},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/Yoo15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/QuZP15,
author = {Yun Rock Qu and
Shijie Zhou and
Viktor K. Prasanna},
title = {A Decomposition-Based Approach for Scalable Many-Field Packet Classification
on Multi-core Processors},
journal = {Int. J. Parallel Program.},
volume = {43},
number = {6},
pages = {965--987},
year = {2015},
url = {https://doi.org/10.1007/s10766-014-0325-6},
doi = {10.1007/S10766-014-0325-6},
timestamp = {Wed, 02 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijpp/QuZP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcp/ZhuXZL15,
author = {Chang Zhu and
Jianguo Xu and
Yanqin Zhu and
Lingzhi Li},
title = {Semi-progressive Network Coding Algorithm on Multi-core Processor},
journal = {J. Comput.},
volume = {10},
number = {1},
pages = {24--33},
year = {2015},
url = {https://doi.org/10.17706/jcp.10.1.24-33},
doi = {10.17706/JCP.10.1.24-33},
timestamp = {Tue, 24 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcp/ZhuXZL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/SakthivelMA15,
author = {Erulappan Sakthivel and
Veluchamy Malathi and
Muruganantham Arunraja},
title = {A New Simulator Based on Multi Core Processor with Improved Sense
Amplifier},
journal = {J. Circuits Syst. Comput.},
volume = {24},
number = {9},
pages = {1550141:1--1550141:18},
year = {2015},
url = {https://doi.org/10.1142/S0218126615501418},
doi = {10.1142/S0218126615501418},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/SakthivelMA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jdwm/DehneZ15,
author = {Frank Dehne and
Hamidreza Zaboli},
title = {Parallel Real-Time {OLAP} on Multi-Core Processors},
journal = {Int. J. Data Warehous. Min.},
volume = {11},
number = {1},
pages = {23--44},
year = {2015},
url = {https://doi.org/10.4018/ijdwm.2015010102},
doi = {10.4018/IJDWM.2015010102},
timestamp = {Thu, 20 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jdwm/DehneZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/EratneNJ15,
author = {Savithra Eratne and
Pradeep S. Nair and
Eugene John},
title = {A Thermal-Aware Scheduling Algorithm for Core Migration in Multicore
Processors},
journal = {J. Low Power Electron.},
volume = {11},
number = {2},
pages = {103--111},
year = {2015},
url = {https://doi.org/10.1166/jolpe.2015.1373},
doi = {10.1166/JOLPE.2015.1373},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/EratneNJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsjkx/WangWL18b,
author = {Kete Wang and
Lisheng Wang and
Xinkao Liao},
title = {{\unicode{22522}}{\unicode{20110}}{\unicode{22810}}{\unicode{26680}}{\unicode{22788}}{\unicode{29702}}{\unicode{22120}}{\unicode{30340}}K{\unicode{32447}}{\unicode{31243}}{\unicode{20302}}{\unicode{33021}}{\unicode{32791}}{\unicode{30340}}{\unicode{20219}}{\unicode{21153}}{\unicode{35843}}{\unicode{24230}}{\unicode{20248}}{\unicode{21270}}{\unicode{31639}}{\unicode{27861}}
(K-threaded Low Energy-consuming Task Scheduling Optimization Algorithm
Based on Multi-core Processors)},
journal = {{\unicode{35745}}{\unicode{31639}}{\unicode{26426}}{\unicode{31185}}{\unicode{23398}}},
volume = {42},
number = {2},
pages = {18--23},
year = {2015},
url = {https://doi.org/10.11896/j.issn.1002-137X.2015.02.004},
doi = {10.11896/J.ISSN.1002-137X.2015.02.004},
timestamp = {Mon, 27 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsjkx/WangWL18b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsjkx/YangZXX18,
author = {Juan Yang and
Miaoxiang Zeng and
Jing Xu and
Wei Xu},
title = {{\unicode{22522}}{\unicode{20110}}{\unicode{20247}}{\unicode{26680}}{\unicode{22788}}{\unicode{29702}}{\unicode{22120}}{\unicode{21644}}GPU{\unicode{30340}}{\unicode{35270}}{\unicode{39057}}{\unicode{24555}}{\unicode{36895}}{\unicode{26816}}{\unicode{27979}}{\unicode{26041}}{\unicode{26696}}
(Fast Video Detection Scheme Based on Multi-core Processor and {GPU)}},
journal = {{\unicode{35745}}{\unicode{31639}}{\unicode{26426}}{\unicode{31185}}{\unicode{23398}}},
volume = {42},
number = {3},
pages = {266--270},
year = {2015},
url = {https://doi.org/10.11896/j.issn.1002-137X.2015.03.055},
doi = {10.11896/J.ISSN.1002-137X.2015.03.055},
timestamp = {Mon, 27 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsjkx/YangZXX18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/IgarashiUMKNTWSFFNKH15,
author = {Mitsuhiko Igarashi and
Toshifumi Uemura and
Ryo Mori and
Hiroshi Kishibe and
Midori Nagayama and
Masaaki Taniguchi and
Kohei Wakahara and
Toshiharu Saito and
Masaki Fujigaya and
Kazuki Fukuoka and
Koji Nii and
Takeshi Kataoka and
Toshihiro Hattori},
title = {A 28 nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor
With 2 GHz Cores and Low-Power 1 GHz Cores},
journal = {{IEEE} J. Solid State Circuits},
volume = {50},
number = {1},
pages = {92--101},
year = {2015},
url = {https://doi.org/10.1109/JSSC.2014.2347353},
doi = {10.1109/JSSC.2014.2347353},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/IgarashiUMKNTWSFFNKH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jzusc/ChenLCWZ15,
author = {Zhixiang Chen and
Zhaolin Li and
Shan Cao and
Fang Wang and
Jie Zhou},
title = {Schedule refinement for homogeneous multi-core processors in the presence
of manufacturing-caused heterogeneity},
journal = {Frontiers Inf. Technol. Electron. Eng.},
volume = {16},
number = {12},
pages = {1018--1033},
year = {2015},
url = {https://doi.org/10.1631/FITEE.1500035},
doi = {10.1631/FITEE.1500035},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jzusc/ChenLCWZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/BarrosSVS15,
author = {Carlos Avelino de Barros and
Luiz Felipe Q. Silveira and
Carlos Valderrama and
Samuel Xavier de Souza},
title = {Optimal processor dynamic-energy reduction for parallel workloads
on heterogeneous multi-core architectures},
journal = {Microprocess. Microsystems},
volume = {39},
number = {6},
pages = {418--425},
year = {2015},
url = {https://doi.org/10.1016/j.micpro.2015.05.009},
doi = {10.1016/J.MICPRO.2015.05.009},
timestamp = {Mon, 06 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/BarrosSVS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/Wang15,
author = {Xiaofang (Maggie) Wang},
title = {Energy-Constrained Multiplication of Non-square Matrices on FPGA-Based
{SIMD-MIMD} Hybrid Multi-core Processors},
journal = {J. Signal Process. Syst.},
volume = {80},
number = {2},
pages = {209--224},
year = {2015},
url = {https://doi.org/10.1007/s11265-013-0867-7},
doi = {10.1007/S11265-013-0867-7},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/Wang15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3pgcic/IshigamiKN15,
author = {Hiroyuki Ishigami and
Kinji Kimura and
Yoshimasa Nakamura},
editor = {Fatos Xhafa and
Leonard Barolli and
Fabrizio Messina and
Marek R. Ogiela},
title = {A New Parallel Symmetric Tridiagonal Eigensolver Based on Bisection
and Inverse Iteration Algorithms for Shared-Memory Multi-core Processors},
booktitle = {10th International Conference on P2P, Parallel, Grid, Cloud and Internet
Computing, 3PGCIC 2015, Krakow, Poland, November 4-6, 2015},
pages = {216--223},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/3PGCIC.2015.26},
doi = {10.1109/3PGCIC.2015.26},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/3pgcic/IshigamiKN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcit/UrbinaOO15,
author = {Mois{\'{e}}s Urbina and
Zaher Owda and
Roman Obermaisser},
editor = {Yulei Wu and
Geyong Min and
Nektarios Georgalas and
Jia Hu and
Luigi Atzori and
Xiaolong Jin and
Stephen A. Jarvis and
Lei (Chris) Liu and
Ram{\'{o}}n Ag{\"{u}}ero Calvo},
title = {Simulation Environment Based on SystemC and {VEOS} for Multi-core
Processors with Virtual {AUTOSAR} ECUs},
booktitle = {15th {IEEE} International Conference on Computer and Information Technology,
{CIT} 2015; 14th {IEEE} International Conference on Ubiquitous Computing
and Communications, {IUCC} 2015; 13th {IEEE} International Conference
on Dependable, Autonomic and Secure Computing, {DASC} 2015; 13th {IEEE}
International Conference on Pervasive Intelligence and Computing,
PICom 2015, Liverpool, United Kingdom, October 26-28, 2015},
pages = {1843--1852},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CIT/IUCC/DASC/PICOM.2015.275},
doi = {10.1109/CIT/IUCC/DASC/PICOM.2015.275},
timestamp = {Tue, 23 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcit/UrbinaOO15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/QuZZP15,
author = {Yun Rock Qu and
Hao H. Zhang and
Shijie Zhou and
Viktor K. Prasanna},
editor = {Gordon J. Brebner and
Alex Bachmutsky and
Chita R. Das},
title = {Optimizing Many-field Packet Classification on FPGA, Multi-core General
Purpose Processor, and {GPU}},
booktitle = {Proceedings of the Eleventh {ACM/IEEE} Symposium on Architectures
for networking and communications systems, {ANCS} 2015, Oakland, CA,
USA, May 7-8, 2015},
pages = {87--98},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ANCS.2015.7110123},
doi = {10.1109/ANCS.2015.7110123},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ancs/QuZZP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/appt/WangLLZXW15,
author = {Lei Wang and
Shaoli Liu and
Chao Lu and
Longbing Zhang and
Junhua Xiao and
Jian Wang},
editor = {Yunji Chen and
Paolo Ienne and
Qing Ji},
title = {Stable Matching Scheduler for Single-ISA Heterogeneous Multi-core
Processors},
booktitle = {Advanced Parallel Processing Technologies - 11th International Symposium,
{APPT} 2015, Jinan, China, August 20-21, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9231},
pages = {45--59},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-23216-4\_4},
doi = {10.1007/978-3-319-23216-4\_4},
timestamp = {Tue, 14 May 2019 10:00:50 +0200},
biburl = {https://dblp.org/rec/conf/appt/WangLLZXW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/WangD15,
author = {Zhou Chuang Wang and
Zi Bin Dai},
title = {High-speed realization of trivium based on multi-core cryptographic
processor},
booktitle = {2015 {IEEE} 11th International Conference on ASIC, {ASICON} 2015,
Chengdu, China, November 3-6, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ASICON.2015.7517000},
doi = {10.1109/ASICON.2015.7517000},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/asicon/WangD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cis/LiY15,
author = {Wei Li and
Xiufen Yu},
title = {An Online Flow-Level Packet Classification Method on Multi-core Network
Processor},
booktitle = {11th International Conference on Computational Intelligence and Security,
{CIS} 2015, Shenzhen, China, December 19-20, 2015},
pages = {407--411},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/CIS.2015.104},
doi = {10.1109/CIS.2015.104},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cis/LiY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FuZLX15,
author = {Chenchen Fu and
Yingchao Zhao and
Minming Li and
Chun Jason Xue},
editor = {Wolfgang Nebel and
David Atienza},
title = {Maximizing common idle time on multi-core processors with shared memory},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {900--903},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2757021},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/FuZLX15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KimKKC15,
author = {Young Geun Kim and
Minyong Kim and
Jae Min Kim and
Sung Woo Chung},
editor = {Wolfgang Nebel and
David Atienza},
title = {{M-DTM:} migration-based dynamic thermal management for heterogeneous
mobile multi-core processors},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {1533--1538},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2757165},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KimKKC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LiaoWC15,
author = {Chien{-}Hui Liao and
Charles H.{-}P. Wen and
Krishnendu Chakrabarty},
editor = {Wolfgang Nebel and
David Atienza},
title = {An online thermal-constrained task scheduler for 3D multi-core processors},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {351--356},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755833},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LiaoWC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MunchPHH15,
author = {Daniel M{\"{u}}nch and
Michael Paulitsch and
Oliver Hanka and
Andreas Herkersdorf},
editor = {Wolfgang Nebel and
David Atienza},
title = {{MPIOV:} scaling hardware-based {I/O} virtualization for mixed-criticality
embedded real-time systems using non transparent bridges to (multi-core)
multi-processor systems},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {579--584},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755883},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MunchPHH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/ChienYCCCCWLLLL15,
author = {Meng{-}Wei Chien and
Wen{-}Hau Yang and
Ying{-}Wei Chou and
Hsin{-}Chieh Chen and
Wei{-}Chung Chen and
Ke{-}Horng Chen and
Chin{-}Long Wey and
Shin{-}Chi Lai and
Ying{-}Hsi Lin and
Chao{-}Cheng Lee and
Jian{-}Ru Lin and
Tsung{-}Yen Tsai and
Hsin{-}Yu Luo},
editor = {Wolfgang Pribyl and
Franz Dielacher and
Gernot Hueber},
title = {Suppressing output overshoot voltage technique with 47.1mW/{\(\mu\)}s
power-recycling rate and 93{\%} peak efficiency {DC-DC} converter
for multi-core processors},
booktitle = {{ESSCIRC} Conference 2015 - 41\({}^{\mbox{st}}\) European Solid-State
Circuits Conference, Graz, Austria, September 14-18, 2015},
pages = {188--191},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ESSCIRC.2015.7313860},
doi = {10.1109/ESSCIRC.2015.7313860},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/ChienYCCCCWLLLL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gecco/TsutsuiF15,
author = {Shigeyoshi Tsutsui and
Noriyuki Fujimoto},
editor = {Sara Silva and
Anna Isabel Esparcia{-}Alc{\'{a}}zar},
title = {A Comparative Study of Synchronization of Parallel {ACO} on Multi-core
Processor},
booktitle = {Genetic and Evolutionary Computation Conference, {GECCO} 2015, Madrid,
Spain, July 11-15, 2015, Companion Material Proceedings},
pages = {777--778},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2739482.2764895},
doi = {10.1145/2739482.2764895},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/gecco/TsutsuiF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AkbariPNM15,
author = {Ali Akbari and
Saadat Pour{-}Mozafari and
Hamid Noori and
Farhad Mehdipour},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Dynamic Task Priority Scaling for Thermal Management of Multi-core
Processors with Heavy Workload},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {373--378},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742101},
doi = {10.1145/2742060.2742101},
timestamp = {Tue, 23 Jul 2019 15:03:09 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AkbariPNM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BejestanWRXBP15,
author = {Alireza Shafaei Bejestan and
Yanzhi Wang and
Srikanth Ramadurgam and
Yuankun Xue and
Paul Bogdan and
Massoud Pedram},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Analyzing the Dark Silicon Phenomenon in a Many-Core Chip Multi-Processor
under Deeply-Scaled Process Technologies},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {127--132},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742096},
doi = {10.1145/2742060.2742096},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BejestanWRXBP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/ForbesZWDCSLRDF15,
author = {Elliott Forbes and
Zhenqian Zhang and
Randy Widialaksono and
Brandon H. Dwiel and
Rangeen Basu Roy Chowdhury and
Vinesh Srinivasan and
Steve Lipa and
Eric Rotenberg and
W. Rhett Davis and
Paul D. Franzon},
title = {Under 100-cycle thread migration latency in a single-ISA heterogeneous
multi-core processor},
booktitle = {2015 {IEEE} Hot Chips 27 Symposium (HCS), Cupertino, CA, USA, August
22-25, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2015.7477478},
doi = {10.1109/HOTCHIPS.2015.7477478},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/ForbesZWDCSLRDF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hvc/RayGDBBG15,
author = {Rajarshi Ray and
Amit Gurung and
Binayak Das and
Ezio Bartocci and
Sergiy Bogomolov and
Radu Grosu},
editor = {Nir Piterman},
title = {XSpeed: Accelerating Reachability Analysis on Multi-core Processors},
booktitle = {Hardware and Software: Verification and Testing - 11th International
Haifa Verification Conference, {HVC} 2015, Haifa, Israel, November
17-19, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9434},
pages = {3--18},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-26287-1\_1},
doi = {10.1007/978-3-319-26287-1\_1},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hvc/RayGDBBG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ica3pp/LiDL15,
author = {Chunjiang Li and
Yushan Dong and
Kuan Li},
editor = {Guojun Wang and
Albert Y. Zomaya and
Gregorio Mart{\'{\i}}nez P{\'{e}}rez and
Kenli Li},
title = {Stencil Computations on HPC-oriented ARMv8 64-Bit Multi-Core Processor},
booktitle = {Algorithms and Architectures for Parallel Processing - 15th International
Conference, {ICA3PP} 2015, Zhangjiajie, China, November 18-20, 2015.
Proceedings, Part {III}},
series = {Lecture Notes in Computer Science},
volume = {9530},
pages = {30--43},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-27137-8\_3},
doi = {10.1007/978-3-319-27137-8\_3},
timestamp = {Sat, 06 Aug 2022 22:05:44 +0200},
biburl = {https://dblp.org/rec/conf/ica3pp/LiDL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icde/ChesterSAB15,
author = {Sean Chester and
Darius Sidlauskas and
Ira Assent and
Kenneth S. B{\o}gh},
editor = {Johannes Gehrke and
Wolfgang Lehner and
Kyuseok Shim and
Sang Kyun Cha and
Guy M. Lohman},
title = {Scalable parallelization of skyline computation for multi-core processors},
booktitle = {31st {IEEE} International Conference on Data Engineering, {ICDE} 2015,
Seoul, South Korea, April 13-17, 2015},
pages = {1083--1094},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICDE.2015.7113358},
doi = {10.1109/ICDE.2015.7113358},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icde/ChesterSAB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iciis/WepathanaAU15,
author = {Y. M. R. D. Wepathana and
Gehan Anthonys and
L. S. K. Udugama},
title = {Compiler for a simplified programming language aiming on Multi Core
Students' Experimental Processor},
booktitle = {10th {IEEE} International Conference on Industrial and Information
Systems, {ICIIS} 2015, Peradeniya, Sri Lanka, December 18-20, 2015},
pages = {284--289},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ICIINFS.2015.7399025},
doi = {10.1109/ICIINFS.2015.7399025},
timestamp = {Fri, 09 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iciis/WepathanaAU15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/CabaretLE15,
author = {Laurent Cabaret and
Lionel Lacassagne and
Daniel Etiemble},
title = {Parallel light speed labeling: An efficient connected component labeling
algorithm for multi-core processors},
booktitle = {2015 {IEEE} International Conference on Image Processing, {ICIP} 2015,
Quebec City, QC, Canada, September 27-30, 2015},
pages = {3486--3489},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ICIP.2015.7351452},
doi = {10.1109/ICIP.2015.7351452},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icip/CabaretLE15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpads/JiangWLYZH15,
author = {Hao Jiang and
Feng Wang and
Kuan Li and
Canqun Yang and
Kejia Zhao and
Chun Huang},
title = {Implementation of an Accurate and Efficient Compensated {DGEMM} for
64-bit ARMv8 Multi-Core Processors},
booktitle = {21st {IEEE} International Conference on Parallel and Distributed Systems,
{ICPADS} 2015, Melbourne, Australia, December 14-17, 2015},
pages = {491--498},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICPADS.2015.68},
doi = {10.1109/ICPADS.2015.68},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpads/JiangWLYZH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/WangJZSXY15,
author = {Feng Wang and
Hao Jiang and
Ke Zuo and
Xing Su and
Jingling Xue and
Canqun Yang},
title = {Design and Implementation of a Highly Efficient {DGEMM} for 64-Bit
ARMv8 Multi-core Processors},
booktitle = {44th International Conference on Parallel Processing, {ICPP} 2015,
Beijing, China, September 1-4, 2015},
pages = {200--209},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICPP.2015.29},
doi = {10.1109/ICPP.2015.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/WangJZSXY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/indin/MurshedOAK15,
author = {Ayman Murshed and
Roman Obermaisser and
Hamidreza Ahmadian and
Al{\'{a}} F. Khalifeh},
title = {Scheduling and allocation of time-triggered and event-triggered services
for multi-core processors with networks-on-a-chip},
booktitle = {13th {IEEE} International Conference on Industrial Informatics, {INDIN}
2015, Cambridge, United Kingdom, July 22-24, 2015},
pages = {1424--1431},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/INDIN.2015.7281942},
doi = {10.1109/INDIN.2015.7281942},
timestamp = {Thu, 25 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/indin/MurshedOAK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/AhmadHHDK15,
author = {Masab Ahmad and
Syed Kamran Haider and
Farrukh Hijaz and
Marten van Dijk and
Omer Khan},
editor = {Ruby B. Lee and
Weidong Shi and
Jakub Szefer},
title = {Exploring the performance implications of memory safety primitives
in many-core processors executing multi-threaded workloads},
booktitle = {Proceedings of the Fourth Workshop on Hardware and Architectural Support
for Security and Privacy, HASP@ISCA 2015, Portland, OR, USA, June
14, 2015},
pages = {6:1--6:8},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2768566.2768572},
doi = {10.1145/2768566.2768572},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/AhmadHHDK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/KoizumiIH15,
author = {Kenichi Koizumi and
Mary Inaba and
Kei Hiraki},
title = {Efficient implementation of continuous skyline computation on a multi-core
processor},
booktitle = {13. {ACM/IEEE} International Conference on Formal Methods and Models
for Codesign, {MEMOCODE} 2015, Austin, TX, USA, September 21-23, 2015},
pages = {52--55},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/MEMCOD.2015.7340468},
doi = {10.1109/MEMCOD.2015.7340468},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/memocode/KoizumiIH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/MontahaieGRGBZJ15,
author = {Ehsan Montahaie and
Milad Ghafouri and
Saied Rahmani and
Hanie Ghasemi and
Farzad Sharif Bakhtiar and
Rashid Zamanshoar and
Kianoush Jafari and
Mohsen Gavahi and
Reza Mirzaei and
Armin Ahmadzadeh and
Saeid Gorgin},
title = {Efficient continuous skyline computation on multi-core processors
based on Manhattan distance},
booktitle = {13. {ACM/IEEE} International Conference on Formal Methods and Models
for Codesign, {MEMOCODE} 2015, Austin, TX, USA, September 21-23, 2015},
pages = {56--59},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/MEMCOD.2015.7340469},
doi = {10.1109/MEMCOD.2015.7340469},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memocode/MontahaieGRGBZJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KannanJL15,
author = {Ajaykumar Kannan and
Natalie D. Enright Jerger and
Gabriel H. Loh},
editor = {Milos Prvulovic},
title = {Enabling interposer-based disintegration of multi-core processors},
booktitle = {Proceedings of the 48th International Symposium on Microarchitecture,
{MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
pages = {546--558},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2830772.2830808},
doi = {10.1145/2830772.2830808},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KannanJL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mixdes/SondejTR15,
author = {Tadeusz Sondej and
Damian Tomaszewski and
Krzysztof R{\'{o}}zanowski},
title = {Implementation of an algorithm for heart rate measurement in a specialized
multi-core processor},
booktitle = {22nd International Conference Mixed Design of Integrated Circuits
{\&} Systems, {MIXDES} 2015, Torun, Poland, June 25-27, 2015},
pages = {74--78},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/MIXDES.2015.7208484},
doi = {10.1109/MIXDES.2015.7208484},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mixdes/SondejTR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtns/JacobsHH15,
author = {Michael Jacobs and
Sebastian Hahn and
Sebastian Hack},
editor = {Julien Forget},
title = {{WCET} analysis for multi-core processors with shared buses and event-driven
bus arbitration},
booktitle = {Proceedings of the 23rd International Conference on Real Time Networks
and Systems, {RTNS} 2015, Lille, France, November 4-6, 2015},
pages = {193--202},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2834848.2834872},
doi = {10.1145/2834848.2834872},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtns/JacobsHH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/KoivulaVVHF15,
author = {Ari Koivula and
Marko Viitanen and
Jarno Vanne and
Timo D. H{\"{a}}m{\"{a}}l{\"{a}}inen and
Laurent Fasnacht},
title = {Parallelization of Kvazaar {HEVC} intra encoder for multi-core processors},
booktitle = {2015 {IEEE} Workshop on Signal Processing Systems, SiPS 2015, Hangzhou,
China, October 14-16, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/SiPS.2015.7345015},
doi = {10.1109/SIPS.2015.7345015},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/KoivulaVVHF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ssci/TsutsuiF15,
author = {Shigeyoshi Tsutsui and
Noriyuki Fujimoto},
title = {A Comparative Study for Efficient Synchronization of Parallel {ACO}
on Multi-core Processors in Solving QAPs},
booktitle = {{IEEE} Symposium Series on Computational Intelligence, {SSCI} 2015,
Cape Town, South Africa, December 7-10, 2015},
pages = {1118--1125},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/SSCI.2015.160},
doi = {10.1109/SSCI.2015.160},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/ssci/TsutsuiF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/trustcom/MirsoleimaniPHV15,
author = {Sayyed Ali Mirsoleimani and
Aske Plaat and
H. Jaap van den Herik and
Jos Vermaseren},
title = {Parallel Monte Carlo Tree Search from Multi-core to Many-core Processors},
booktitle = {2015 {IEEE} TrustCom/BigDataSE/ISPA, Helsinki, Finland, August 20-22,
2015, Volume 3},
pages = {77--83},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/Trustcom.2015.615},
doi = {10.1109/TRUSTCOM.2015.615},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/trustcom/MirsoleimaniPHV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/LiaoLW15,
author = {Chien{-}Hui Liao and
Yu{-}Ze Lin and
Charles H.{-}P. Wen},
title = {Dynamic voltage assignment for thermal-constrained task scheduler
on 3D multi-core processors},
booktitle = {{VLSI} Design, Automation and Test, {VLSI-DAT} 2015, Hsinchu, Taiwan,
April 27-29, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/VLSI-DAT.2015.7114495},
doi = {10.1109/VLSI-DAT.2015.7114495},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/LiaoLW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/FanZZG15a,
author = {Miao Fan and
Qiang Zhou and
Thomas Fang Zheng and
Ralph Grishman},
title = {Parallel Knowledge Embedding with MapReduce on a Multi-core Processor},
journal = {CoRR},
volume = {abs/1509.01183},
year = {2015},
url = {http://arxiv.org/abs/1509.01183},
eprinttype = {arXiv},
eprint = {1509.01183},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/FanZZG15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/HollerRIMK15,
author = {Andrea H{\"{o}}ller and
Tobias Rauter and
Johannes Iber and
Georg Macher and
Christian Kreiner},
title = {Software-Based Fault Recovery via Adaptive Diversity for {COTS} Multi-Core
Processors},
journal = {CoRR},
volume = {abs/1511.03528},
year = {2015},
url = {http://arxiv.org/abs/1511.03528},
eprinttype = {arXiv},
eprint = {1511.03528},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/HollerRIMK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Balkesen14,
author = {Cagri Balkesen},
title = {In-memory parallel join processing on multi-core processors},
school = {{ETH} Zurich, Z{\"{u}}rich, Switzerland},
year = {2014},
url = {https://hdl.handle.net/20.500.11850/85088},
doi = {10.3929/ETHZ-A-010168223},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/basesearch/Balkesen14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Nowotsch14,
author = {Jan Nowotsch},
title = {Interference-sensitive Worst-case Execution Time Analysis for Multi-core
Processors},
school = {University of Augsburg},
year = {2014},
url = {http://opus.bibliothek.uni-augsburg.de/opus4/frontdoor/index/index/docId/2840},
urn = {urn:nbn:de:bvb:384-opus4-28406},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/dnb/Nowotsch14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Tendulkar14,
author = {Pranav Tendulkar},
title = {Mapping and Scheduling on Multi-core Processors using {SMT} Solvers.
(placement et ordonnancement sur les processeurs multi-core en utilisant
un solveur {SMT)}},
school = {Joseph Fourier University, Grenoble, France},
year = {2014},
url = {https://tel.archives-ouvertes.fr/tel-01087271},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Tendulkar14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Theveny14,
author = {Philippe Th{\'{e}}veny},
title = {Numerical Quality and High Performance In Interval Linear Algebra
on Multi-Core Processors. (Alg{\`{e}}bre lin{\'{e}}aire d'intervalles
- Qualit{\'{e}} Num{\'{e}}rique et Hautes Performances sur
Processeurs Multi-C{\oe}urs)},
school = {{\'{E}}cole normale sup{\'{e}}rieure de Lyon, France},
year = {2014},
url = {https://tel.archives-ouvertes.fr/tel-01126973},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Theveny14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cit/ArourB14,
author = {Khedija Arour and
Amani Belkahla},
title = {Frequent Pattern-growth Algorithm on Multi-core {CPU} and {GPU} Processors},
journal = {J. Comput. Inf. Technol.},
volume = {22},
number = {3},
pages = {159--169},
year = {2014},
url = {https://doi.org/10.2498/cit.1002361},
doi = {10.2498/CIT.1002361},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cit/ArourB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/csse/IsmailMA14,
author = {Muhammad Ali Ismail and
Shahid H. Mirza and
Talat Altaf},
title = {"LogN+1" and "LogN" model: a binary tree based multi-level cache system
for multi-core processors},
journal = {Comput. Syst. Sci. Eng.},
volume = {29},
number = {2},
year = {2014},
timestamp = {Wed, 06 Aug 2014 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/csse/IsmailMA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/JeongKLR14,
author = {Won Seob Jeong and
Seung{-}Hun Kim and
Sang{-}Min Lee and
Won Woo Ro},
title = {Swarm Processor System: hardware process scheduler based energy efficient
multi-core system},
journal = {{IEICE} Electron. Express},
volume = {11},
number = {14},
pages = {20140424},
year = {2014},
url = {https://doi.org/10.1587/elex.11.20140424},
doi = {10.1587/ELEX.11.20140424},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/JeongKLR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ChenHX14,
author = {Xi Chen and
Jiang Hu and
Ning Xu},
title = {Regularity-constrained floorplanning for multi-core processors},
journal = {Integr.},
volume = {47},
number = {1},
pages = {86--95},
year = {2014},
url = {https://doi.org/10.1016/j.vlsi.2013.05.002},
doi = {10.1016/J.VLSI.2013.05.002},
timestamp = {Tue, 02 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/ChenHX14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/itiis/LiaoZZ14,
author = {Kaiyang Liao and
Fan Zhao and
Mingzhu Zhang},
title = {Parallel Implementation Strategy for Content Based Video Copy Detection
Using a Multi-core Processor},
journal = {{KSII} Trans. Internet Inf. Syst.},
volume = {8},
number = {10},
pages = {3520--3537},
year = {2014},
url = {https://doi.org/10.3837/tiis.2014.10.014},
doi = {10.3837/TIIS.2014.10.014},
timestamp = {Mon, 16 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/itiis/LiaoZZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/El-MoursyS14,
author = {Ali El{-}Moursy and
Fadi N. Sibai},
title = {V-Set Cache: an Efficient Adaptive Shared Cache for Multi-Core Processors},
journal = {J. Circuits Syst. Comput.},
volume = {23},
number = {7},
year = {2014},
url = {https://doi.org/10.1142/S0218126614500959},
doi = {10.1142/S0218126614500959},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/El-MoursyS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jnw/WangWLA14,
author = {Kete Wang and
Lisheng Wang and
Xinkao Liao and
George Albert},
title = {An Auto-Matching Model with Pattern Recognition Using Bayesian Classifier
for Parallel Programming on {A} Multi-Core Processor},
journal = {J. Networks},
volume = {9},
number = {9},
pages = {2556--2566},
year = {2014},
url = {https://doi.org/10.4304/jnw.9.9.2556-2566},
doi = {10.4304/JNW.9.9.2556-2566},
timestamp = {Tue, 15 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jnw/WangWLA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/ZhangXB14,
author = {Yuanming Zhang and
Gang Xiao and
Takanobu Baba},
title = {Accelerating sequential programs on commodity multi-core processors},
journal = {J. Parallel Distributed Comput.},
volume = {74},
number = {4},
pages = {2257--2265},
year = {2014},
url = {https://doi.org/10.1016/j.jpdc.2013.12.009},
doi = {10.1016/J.JPDC.2013.12.009},
timestamp = {Tue, 09 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/ZhangXB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/Wang14,
author = {Xiaofang (Maggie) Wang},
title = {Hardware-software optimizations of reconfigurable multi-core processors
for floating-point computations of large sparse matrices},
journal = {J. Real Time Image Process.},
volume = {9},
number = {1},
pages = {187--204},
year = {2014},
url = {https://doi.org/10.1007/s11554-012-0277-2},
doi = {10.1007/S11554-012-0277-2},
timestamp = {Sat, 09 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jrtip/Wang14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigbed/AsbergNK14,
author = {Mikael {\AA}sberg and
Thomas Nolte and
Shinpei Kato},
title = {Towards partitioned hierarchical real-time scheduling on multi-core
processors},
journal = {{SIGBED} Rev.},
volume = {11},
number = {2},
pages = {13--18},
year = {2014},
url = {https://doi.org/10.1145/2668138.2668140},
doi = {10.1145/2668138.2668140},
timestamp = {Sun, 21 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigbed/AsbergNK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigbed/BenmoussaBSAB14,
author = {Yahia Benmoussa and
Jalil Boukhobza and
Eric Senn and
Yassine Hadjadj Aoul and
Djamel Benazzouz},
title = {DyPS: dynamic processor switching for energy-aware video decoding
on multi-core SoCs},
journal = {{SIGBED} Rev.},
volume = {11},
number = {1},
pages = {56--61},
year = {2014},
url = {https://doi.org/10.1145/2597457.2597465},
doi = {10.1145/2597457.2597465},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigbed/BenmoussaBSAB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tce/HongAKC14,
author = {Jung{-}Hyun Hong and
Youngho Ahn and
Byungjin Kim and
Ki{-}Seok Chung},
title = {Design of OpenCL framework for embedded multi-core processors},
journal = {{IEEE} Trans. Consumer Electron.},
volume = {60},
number = {2},
pages = {233--241},
year = {2014},
url = {https://doi.org/10.1109/TCE.2014.6851999},
doi = {10.1109/TCE.2014.6851999},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tce/HongAKC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/telsys/YanWWZC14,
author = {Like Yan and
Binbin Wu and
Yuan Wen and
Shaobin Zhang and
Tianzhou Chen},
title = {A reconfigurable processor architecture combining multi-core and reconfigurable
processing units},
journal = {Telecommun. Syst.},
volume = {55},
number = {3},
pages = {333--344},
year = {2014},
url = {https://doi.org/10.1007/s11235-013-9791-1},
doi = {10.1007/S11235-013-9791-1},
timestamp = {Thu, 13 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/telsys/YanWWZC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/SalamiBN14,
author = {Bagher Salami and
Mohammadreza Baharani and
Hamid Noori},
title = {Proactive task migration with a self-adjusting migration threshold
for dynamic thermal management of multi-core processors},
journal = {J. Supercomput.},
volume = {68},
number = {3},
pages = {1068--1087},
year = {2014},
url = {https://doi.org/10.1007/s11227-014-1140-y},
doi = {10.1007/S11227-014-1140-Y},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tjs/SalamiBN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/SaravananAKWO14,
author = {Vijayalakshmi Saravanan and
Alagan Anpalagan and
Dwarkadas Pralhaddas Kothari and
Isaac Woungang and
Mohammad S. Obaidat},
title = {An analytical study of resource division and its impact on power and
performance of multi-core processors},
journal = {J. Supercomput.},
volume = {68},
number = {3},
pages = {1265--1279},
year = {2014},
url = {https://doi.org/10.1007/s11227-014-1086-0},
doi = {10.1007/S11227-014-1086-0},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tjs/SaravananAKWO14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/0003PSGG14,
author = {Yi Wang and
Linfeng Pan and
Zili Shao and
Yong Guan and
Minyi Guo},
title = {Loop Transforming for Reducing Data Alignment on Multi-Core {SIMD}
Processors},
journal = {J. Signal Process. Syst.},
volume = {74},
number = {2},
pages = {137--150},
year = {2014},
url = {https://doi.org/10.1007/s11265-013-0754-2},
doi = {10.1007/S11265-013-0754-2},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/0003PSGG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/SchneiderMGO14,
author = {Tobias Schneider and
Ingo von Maurich and
Tim G{\"{u}}neysu and
David F. Oswald},
title = {Cryptographic Algorithms on the {GA144} Asynchronous Multi-Core Processor
- Implementation and Side-Channel Analysis},
journal = {J. Signal Process. Syst.},
volume = {77},
number = {1-2},
pages = {151--167},
year = {2014},
url = {https://doi.org/10.1007/s11265-014-0872-5},
doi = {10.1007/S11265-014-0872-5},
timestamp = {Thu, 07 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/SchneiderMGO14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcloud/YanCZS14,
author = {Feng Yan and
Ludmila Cherkasova and
Zhuoyao Zhang and
Evgenia Smirni},
title = {Optimizing Power and Performance Trade-offs of MapReduce Job Processing
with Heterogeneous Multi-core Processors},
booktitle = {2014 {IEEE} 7th International Conference on Cloud Computing, Anchorage,
AK, USA, June 27 - July 2, 2014},
pages = {240--247},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/CLOUD.2014.41},
doi = {10.1109/CLOUD.2014.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcloud/YanCZS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/GhasemiK14,
author = {Hamid Reza Ghasemi and
Nam Sung Kim},
editor = {Jos{\'{e}} Nelson Amaral and
Josep Torrellas},
title = {{RCS:} runtime resource and core scaling for power-constrained multi-core
processors},
booktitle = {International Conference on Parallel Architectures and Compilation,
{PACT} '14, Edmonton, AB, Canada, August 24-27, 2014},
pages = {251--262},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2628071.2628095},
doi = {10.1145/2628071.2628095},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/GhasemiK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acs2/KrolRT14,
author = {Tomasz Kr{\'{o}}l and
Leonard Rozenberg and
Michal Twardochleb},
editor = {Antoni Wilinski and
Imed El Fray and
Jerzy Pejas},
title = {The Jitter Use to Reduce {EMI} on the Power Lines for Multi-core Processors},
booktitle = {Soft Computing in Computer and Information Science, Revised Papers
from the International Conference on Advanced Computer Systems, {ACS}
2014, Mie{\c }dzyzdroje, Poland, 22-24 October 2014},
series = {Advances in Intelligent Systems and Computing},
volume = {342},
pages = {171--180},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-15147-2\_15},
doi = {10.1007/978-3-319-15147-2\_15},
timestamp = {Sat, 19 Oct 2019 20:27:15 +0200},
biburl = {https://dblp.org/rec/conf/acs2/KrolRT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SalamiBNM14,
author = {Bagher Salami and
Mohammadreza Baharani and
Hamid Noori and
Farhad Mehdipour},
title = {Physical-aware task migration algorithm for dynamic thermal management
of {SMT} multi-core processors},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {292--297},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742905},
doi = {10.1109/ASPDAC.2014.6742905},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SalamiBNM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/AliYYHI14,
author = {Yussuf Ali and
Yuta Yamato and
Tomokazu Yoneda and
Kazumi Hatayama and
Michiko Inoue},
title = {Parallel Path Delay Fault Simulation for Multi/Many-Core Processors
with {SIMD} Units},
booktitle = {23rd {IEEE} Asian Test Symposium, {ATS} 2014, Hangzhou, China, November
16-19, 2014},
pages = {292--297},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ATS.2014.61},
doi = {10.1109/ATS.2014.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/AliYYHI14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bigdataconf/DasariRZ14,
author = {Naga Shailaja Dasari and
Desh Ranjan and
Mohammad Zubair},
editor = {Jimmy Lin and
Jian Pei and
Xiaohua Hu and
Wo Chang and
Raghunath Nambiar and
Charu C. Aggarwal and
Nick Cercone and
Vasant G. Honavar and
Jun Huan and
Bamshad Mobasher and
Saumyadipta Pyne},
title = {ParK: An efficient algorithm for k-core decomposition on multicore
processors},
booktitle = {2014 {IEEE} International Conference on Big Data {(IEEE} BigData 2014),
Washington, DC, USA, October 27-30, 2014},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/BigData.2014.7004366},
doi = {10.1109/BIGDATA.2014.7004366},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/bigdataconf/DasariRZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/AbadSNSM14,
author = {Javad Mohebbi Najm Abad and
Bagher Salami and
Hamid Noori and
Ali Soleimani and
Farhad Mehdipour},
editor = {Pedro Trancoso and
Diana Franklin and
Sally A. McKee},
title = {A neuro-fuzzy fan speed controller for dynamic thermal management
of multi-core processors},
booktitle = {Computing Frontiers Conference, CF'14, Cagliari, Italy - May 20 -
22, 2014},
pages = {29:1--29:2},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2597917.2597958},
doi = {10.1145/2597917.2597958},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cf/AbadSNSM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dasip/BortolottiMBRSB14,
author = {Daniele Bortolotti and
Mauro Mangia and
Andrea Bartolini and
Riccardo Rovatti and
Gianluca Setti and
Luca Benini},
editor = {Eduardo de la Torre and
S{\'{e}}bastien Pillement},
title = {Rakeness-based compressed sensing on ultra-low power multi-core biomedicai
processors},
booktitle = {Proceedings of the 2014 Conference on Design and Architectures for
Signal and Image Processing, {DASIP} 2014, Madrid, Spain, October
8-10, 2014},
pages = {1--8},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/DASIP.2014.7115599},
doi = {10.1109/DASIP.2014.7115599},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dasip/BortolottiMBRSB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BortolottiBWRB14,
author = {Daniele Bortolotti and
Andrea Bartolini and
Christian Weis and
Davide Rossi and
Luca Benini},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Hybrid memory architecture for voltage scaling in ultra-low power
multi-core biomedical processors},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.182},
doi = {10.7873/DATE.2014.182},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/BortolottiBWRB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/YasinSE14,
author = {Muhammad Yasin and
Anas Shahrour and
Ibrahim Abe M. Elfadel},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Unified, ultra compact, quadratic power proxies for multi-core processors},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--4},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.347},
doi = {10.7873/DATE.2014.347},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/YasinSE14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/etfa/GroesbrinkA14,
author = {Stefan Groesbrink and
Lu{\'{\i}}s Almeida},
editor = {Antoni Grau and
Herminio Mart{\'{\i}}nez},
title = {A criticality-aware mapping of real-time virtual machines to multi-core
processors},
booktitle = {Proceedings of the 2014 {IEEE} Emerging Technology and Factory Automation,
{ETFA} 2014, Barcelona, Spain, September 16-19, 2014},
pages = {1--9},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ETFA.2014.7005238},
doi = {10.1109/ETFA.2014.7005238},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/etfa/GroesbrinkA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/GrassRCMR14,
author = {Thomas Grass and
Alejandro Rico and
Marc Casas and
Miquel Moret{\'{o}} and
Alex Ram{\'{\i}}rez},
editor = {Lu{\'{\i}}s M. B. Lopes and
Julius Zilinskas and
Alexandru Costan and
Roberto G. Cascella and
Gabor Kecskemeti and
Emmanuel Jeannot and
Mario Cannataro and
Laura Ricci and
Siegfried Benkner and
Salvador Petit and
Vittorio Scarano and
Jos{\'{e}} Gracia and
Sascha Hunold and
Stephen L. Scott and
Stefan Lankes and
Christian Lengauer and
Jes{\'{u}}s Carretero and
Jens Breitbart and
Michael Alexander},
title = {Evaluating Execution Time Predictability of Task-Based Programs on
Multi-Core Processors},
booktitle = {Euro-Par 2014: Parallel Processing Workshops - Euro-Par 2014 International
Workshops, Porto, Portugal, August 25-26, 2014, Revised Selected Papers,
Part {II}},
series = {Lecture Notes in Computer Science},
volume = {8806},
pages = {218--229},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-14313-2\_19},
doi = {10.1007/978-3-319-14313-2\_19},
timestamp = {Sun, 12 Nov 2023 02:07:45 +0100},
biburl = {https://dblp.org/rec/conf/europar/GrassRCMR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/SheikhA14,
author = {Hafiz Fahad Sheikh and
Ishfaq Ahmad},
title = {Efficient heuristics for joint optimization of performance, energy,
and temperature in allocating tasks to multi-core processors},
booktitle = {International Green Computing Conference, {IGCC} 2014, Dallas, TX,
USA, November 3-5, 2014},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/IGCC.2014.7039178},
doi = {10.1109/IGCC.2014.7039178},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/green/SheikhA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/NiuLFPS14,
author = {Qingpeng Niu and
Pai{-}Wei Lai and
S. M. Faisal and
Srinivasan Parthasarathy and
P. Sadayappan},
title = {A fast implementation of {MLR-MCL} algorithm on multi-core processors},
booktitle = {21st International Conference on High Performance Computing, HiPC
2014, Goa, India, December 17-20, 2014},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/HiPC.2014.7116888},
doi = {10.1109/HIPC.2014.7116888},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/NiuLFPS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/SunY14,
author = {Qiao Sun and
Chao Yang},
title = {Optimization of scan algorithms on multi- and many-core processors},
booktitle = {21st International Conference on High Performance Computing, HiPC
2014, Goa, India, December 17-20, 2014},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/HiPC.2014.7116883},
doi = {10.1109/HIPC.2014.7116883},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/SunY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/SzydzikFOM14,
author = {Tomasz Szydzik and
Marius Farcas and
Valeriu Ohan and
David Moloney},
title = {Level-3 {BLAS} on myriad multi-core media-processor SoC},
booktitle = {2014 {IEEE} Hot Chips 26 Symposium (HCS), Cupertino, CA, USA, August
10-12, 2014},
pages = {1},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HOTCHIPS.2014.7478835},
doi = {10.1109/HOTCHIPS.2014.7478835},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/hotchips/SzydzikFOM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/LiuG14,
author = {Jun Liu and
Jinhua Guo},
title = {Voltage Island Aware Energy Efficient Scheduling of Real-Time Tasks
on Multi-core Processors},
booktitle = {2014 {IEEE} International Conference on High Performance Computing
and Communications, 6th {IEEE} International Symposium on Cyberspace
Safety and Security, 11th {IEEE} International Conference on Embedded
Software and Systems, {HPCC/CSS/ICESS} 2014, Paris, France, August
20-22, 2014},
pages = {645--652},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPCC.2014.94},
doi = {10.1109/HPCC.2014.94},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/LiuG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/ZhouDDYZS14,
author = {Hongwei Zhou and
Rangyu Deng and
Zefu Dai and
Xiaobo Yan and
Ying Zhang and
Caixia Sun},
title = {The Virtual Open Page Buffer for Multi-core and Multi-thread Processors},
booktitle = {2014 {IEEE} International Conference on High Performance Computing
and Communications, 6th {IEEE} International Symposium on Cyberspace
Safety and Security, 11th {IEEE} International Conference on Embedded
Software and Systems, {HPCC/CSS/ICESS} 2014, Paris, France, August
20-22, 2014},
pages = {290--297},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPCC.2014.52},
doi = {10.1109/HPCC.2014.52},
timestamp = {Tue, 07 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/ZhouDDYZS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcs/KreschW14,
author = {Edward Kresch and
Xiaofang Wang},
title = {An area-efficient hexagonal interconnection network for multi-core
processors},
booktitle = {International Conference on High Performance Computing {\&} Simulation,
{HPCS} 2014, Bologna, Italy, 21-25 July, 2014},
pages = {39--46},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPCSim.2014.6903667},
doi = {10.1109/HPCSIM.2014.6903667},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/hpcs/KreschW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpsr/QuZP14,
author = {Yun Rock Qu and
Shijie Zhou and
Viktor K. Prasanna},
title = {Performance modeling and optimizations for decomposition-based large-scale
packet classification on multi-core processors},
booktitle = {{IEEE} 15th International Conference on High Performance Switching
and Routing, {HPSR} 2014, Vancouver, BC, Canada, July 1-4, 2014},
pages = {154--161},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPSR.2014.6900896},
doi = {10.1109/HPSR.2014.6900896},
timestamp = {Wed, 02 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpsr/QuZP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpsr/ShpinerKC14,
author = {Alexander Shpiner and
Isaac Keslassy and
Rami Cohen},
title = {Scaling multi-core network processors without the reordering bottleneck},
booktitle = {{IEEE} 15th International Conference on High Performance Switching
and Routing, {HPSR} 2014, Vancouver, BC, Canada, July 1-4, 2014},
pages = {146--153},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPSR.2014.6900895},
doi = {10.1109/HPSR.2014.6900895},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpsr/ShpinerKC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpsr/TongQP14,
author = {Da Tong and
Yun Rock Qu and
Viktor K. Prasanna},
title = {High-throughput traffic classification on multi-core processors},
booktitle = {{IEEE} 15th International Conference on High Performance Switching
and Routing, {HPSR} 2014, Vancouver, BC, Canada, July 1-4, 2014},
pages = {138--145},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPSR.2014.6900894},
doi = {10.1109/HPSR.2014.6900894},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpsr/TongQP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic3/DigalwarGM14,
author = {Mayuri Digalwar and
Pravin Gahukar and
Sudeept Mohan},
editor = {Manish Parashar and
Umesh Bellur and
S. D. Madhu Kumar and
Priya Chandran and
Murali Krishnan and
Kamesh Madduri and
Sushil K. Prasad and
C. Chandra Sekhar and
Nanjangud C. Narendra and
Carlos Valera and
Sanjay Chaudhary and
Kavi Arya and
Xiaolin Li},
title = {Design and development of a real time scheduling algorithm for mixed
task set on multi-core processors},
booktitle = {Seventh International Conference on Contemporary Computing, {IC3}
2014, Noida, India, August 7-9, 2014},
pages = {265--269},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/IC3.2014.6897184},
doi = {10.1109/IC3.2014.6897184},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ic3/DigalwarGM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icacci/JaeckleS14,
author = {Daniel Jaeckle and
Axel Sikora},
title = {Thermal modeling of homogeneous embedded multi-core processors},
booktitle = {2014 International Conference on Advances in Computing, Communications
and Informatics, {ICACCI} 2014, Delhi, India, September 24-27, 2014},
pages = {588--593},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ICACCI.2014.6968448},
doi = {10.1109/ICACCI.2014.6968448},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/icacci/JaeckleS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccS/CaloreST14,
author = {Enrico Calore and
Sebastiano Fabio Schifano and
Raffaele Tripiccione},
editor = {David Abramson and
Michael Lees and
Valeria V. Krzhizhanovskaya and
Jack J. Dongarra and
Peter M. A. Sloot},
title = {A Portable OpenCL Lattice Boltzmann Code for Multi- and Many-core
Processor Architectures},
booktitle = {Proceedings of the International Conference on Computational Science,
{ICCS} 2014, Cairns, Queensland, Australia, 10-12 June, 2014},
series = {Procedia Computer Science},
volume = {29},
pages = {40--49},
publisher = {Elsevier},
year = {2014},
url = {https://doi.org/10.1016/j.procs.2014.05.004},
doi = {10.1016/J.PROCS.2014.05.004},
timestamp = {Tue, 20 Jun 2023 16:27:45 +0200},
biburl = {https://dblp.org/rec/conf/iccS/CaloreST14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MurarkaGPK14,
author = {Yogesh Murarka and
Pankaj Shailendra Gode and
Sirish Kumar Pasupuleti and
Soma Kohli},
title = {Software pipelining of dataflow programs with dynamic constructs on
multi-core processor},
booktitle = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014,
Seoul, South Korea, October 19-22, 2014},
pages = {340--347},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ICCD.2014.6974703},
doi = {10.1109/ICCD.2014.6974703},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MurarkaGPK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/Li014,
author = {Dawei Li and
Jie Wu},
title = {Energy-Aware Scheduling for Aperiodic Tasks on Multi-core Processors},
booktitle = {43rd International Conference on Parallel Processing, {ICPP} 2014,
Minneapolis, MN, USA, September 9-12, 2014},
pages = {361--370},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ICPP.2014.45},
doi = {10.1109/ICPP.2014.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/Li014.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icra/WeiHYLGT14,
author = {Hongxing Wei and
Zhen Huang and
Qiang Yu and
Miao Liu and
Yong Guan and
Jindong Tan},
title = {{RGMP-ROS:} {A} real-time {ROS} architecture of hybrid {RTOS} and
{GPOS} on multi-core processor},
booktitle = {2014 {IEEE} International Conference on Robotics and Automation, {ICRA}
2014, Hong Kong, China, May 31 - June 7, 2014},
pages = {2482--2487},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ICRA.2014.6907205},
doi = {10.1109/ICRA.2014.6907205},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/icra/WeiHYLGT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icseng/ShuklaMC14a,
author = {Surendra Kumar Shukla and
CNS Murthy and
P. K. Chande},
editor = {Henry Selvaraj and
Dawid Zydek and
Grzegorz Chmaj},
title = {A Survey of Approaches used in Parallel Architectures and Multi-core
Processors, For Performance Improvement},
booktitle = {Progress in Systems Engineering - Proceedings of the Twenty-Third
International Conference on Systems Engineering, ICSEng 2014, Las
Vegas, NV, USA, August 19-21, 2014},
series = {Advances in Intelligent Systems and Computing},
volume = {366},
pages = {537--545},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-08422-0\_77},
doi = {10.1007/978-3-319-08422-0\_77},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icseng/ShuklaMC14a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/infoseccd/LabudiongA14,
author = {Carlo Labudiong and
Wasim A. Al{-}Hamdani},
editor = {Michael E. Whitman and
Humayun Zafar},
title = {Network risk assessment base on multi-core processor architecture},
booktitle = {Proceedings of the 2014 Information Security Curriculum Development
Conference, InfoSecCD 2014, Kennesaw, GA, USA, October 11, 2014},
pages = {4:1},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2670739.2670741},
doi = {10.1145/2670739.2670741},
timestamp = {Thu, 14 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/infoseccd/LabudiongA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipccc/XuXWP14,
author = {Jinbo Xu and
Weixia Xu and
Kefei Wang and
Zhengbin Pang},
title = {Low-latency last-level cache structure based on grouped cores in Chip
Multi-Processor},
booktitle = {{IEEE} 33rd International Performance Computing and Communications
Conference, {IPCCC} 2014, Austin, TX, USA, December 5-7, 2014},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/PCCC.2014.7017021},
doi = {10.1109/PCCC.2014.7017021},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipccc/XuXWP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChenHZPAIS14,
author = {Shaoming Chen and
Yue Hu and
Ying Zhang and
Lu Peng and
Jesse Ardonne and
Samuel Irving and
Ashok Srivastava},
title = {Increasing off-chip bandwidth in multi-core processors with switchable
pins},
booktitle = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
{ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
pages = {385--396},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISCA.2014.6853220},
doi = {10.1109/ISCA.2014.6853220},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChenHZPAIS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscc/TanR14,
author = {Hengxing Tan and
Sanjay Ranka},
title = {Thermal-aware scheduling for data parallel workloads on multi-core
processors},
booktitle = {{IEEE} Symposium on Computers and Communications, {ISCC} 2014, Funchal,
Madeira, Portugal, June 23-26, 2014},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISCC.2014.6912515},
doi = {10.1109/ISCC.2014.6912515},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscc/TanR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isctcs/ZhuWLQZC14,
author = {Danfeng Zhu and
Rui Wang and
Zhongzhi Luan and
Depei Qian and
Han Zhang and
Jihong Cai},
editor = {Yueming Lu and
Xu Wu and
Xi Zhang},
title = {Memory Centric Hardware Prefetching in Multi-core Processors},
booktitle = {Trustworthy Computing and Services - International Conference, {ISCTCS}
2014, Beijing, China, November 28-29, 2014, Revised Selected Papers},
series = {Communications in Computer and Information Science},
volume = {520},
pages = {311--321},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-662-47401-3\_41},
doi = {10.1007/978-3-662-47401-3\_41},
timestamp = {Fri, 18 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isctcs/ZhuWLQZC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/BortolottiMBASAVB14,
author = {Daniele Bortolotti and
Hossein Mamaghanian and
Andrea Bartolini and
Maryam Ashouei and
Jan Stuijt and
David Atienza and
Pierre Vandergheynst and
Luca Benini},
editor = {Yuan Xie and
Tanay Karnik and
Muhammad M. Khellah and
Renu Mehra},
title = {Approximate compressed sensing: ultra-low power biosignal processing
via aggressive voltage scaling on a hybrid memory multi-core processor},
booktitle = {International Symposium on Low Power Electronics and Design, ISLPED'14,
La Jolla, CA, {USA} - August 11 - 13, 2014},
pages = {45--50},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2627369.2627629},
doi = {10.1145/2627369.2627629},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/BortolottiMBASAVB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/PanMN14,
author = {Chenyun Pan and
Saibal Mukhopadhyay and
Azad Naeemi},
title = {An analytical approach to system-level variation analysis and optimization
for multi-core processor},
booktitle = {Fifteenth International Symposium on Quality Electronic Design, {ISQED}
2014, Santa Clara, CA, USA, March 3-5, 2014},
pages = {99--106},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISQED.2014.6783312},
doi = {10.1109/ISQED.2014.6783312},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/PanMN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/IgarashiUMMKNTW14,
author = {Mitsuhiko Igarashi and
Toshifumi Uemura and
Ryo Mori and
Noriaki Maeda and
Hiroshi Kishibe and
Midori Nagayama and
Masaaki Taniguchi and
Kohei Wakahara and
Toshiharu Saito and
Masaki Fujigaya and
Kazuki Fukuoka and
Koji Nii and
Takeshi Kataoka and
Toshihiro Hattori},
title = {10.2 {A} 28nm {HPM} heterogeneous multi-core mobile application processor
with 2GHz cores and low-power 1GHz cores},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {178--179},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757389},
doi = {10.1109/ISSCC.2014.6757389},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/IgarashiUMMKNTW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KimKLPHBSCOY14,
author = {Gyeonghoon Kim and
Youchang Kim and
Kyuho Jason Lee and
Seongwook Park and
Injoon Hong and
Kyeongryeol Bong and
Dongjoo Shin and
Sungpill Choi and
Jinwook Oh and
Hoi{-}Jun Yoo},
title = {10.4 {A} 1.22TOPS and 1.52mW/MHz augmented reality multi-core processor
with neural network NoC for {HMD} applications},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {182--183},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757391},
doi = {10.1109/ISSCC.2014.6757391},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/KimKLPHBSCOY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WangLOHWCCHTTTL14,
author = {Alice Wang and
Tsung{-}Yao Lin and
Shichin Ouyang and
Wei{-}Hung Huang and
Jidong Wang and
Shu{-}Hsin Chang and
Sheng{-}Ping Chen and
Chun{-}Hsiung Hu and
J. C. Tai and
Koan{-}Sin Tan and
Meng{-}Nan Tsou and
Ming{-}Hsien Lee and
Gordon Gammie and
Chi{-}Wei Yang and
Chih{-}Chieh Yang and
Yeh{-}Chi Chou and
Shih{-}Hung Lin and
Wuan Kuo and
Chi{-}Jui Chung and
Lee{-}Kee Yong and
Chia{-}Wei Wang and
Kin Hooi Dia and
Cheng{-}Hsing Chien and
You{-}Ming Tsao and
N. K. Singh and
Rolf Lagerquist and
Chih{-}Cheng Chen and
Uming Ko},
title = {10.3 heterogeneous multi-processing quad-core {CPU} and dual-GPU design
for optimal performance, power, and thermal tradeoffs in a 28nm mobile
application processor},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {180--181},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757390},
doi = {10.1109/ISSCC.2014.6757390},
timestamp = {Mon, 10 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/WangLOHWCCHTTTL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ZhaoLBT14,
author = {Jia Zhao and
Shiting (Justin) Lu and
Wayne P. Burleson and
Russell Tessier},
title = {A Broadcast-Enabled Sensing System for Embedded Multi-core Processors},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa,
FL, USA, July 9-11, 2014},
pages = {190--195},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISVLSI.2014.18},
doi = {10.1109/ISVLSI.2014.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ZhaoLBT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/El-Moursy14,
author = {Ali A. El{-}Moursy},
title = {Adaptive V-Set Cache for Multi-core Processors},
booktitle = {{IEEE} 8th International Symposium on Embedded Multicore/Manycore
SoCs, MCSoC 2014, Aizu-Wakamatsu, Japan, September 23-25, 2014},
pages = {297--302},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/MCSoC.2014.48},
doi = {10.1109/MCSOC.2014.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mcsoc/El-Moursy14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/AhmadzadehMMSSG14,
author = {Armin Ahmadzadeh and
Reza Mirzaei and
Hatef Madani and
Mohammad Shobeiri and
Mahsa Sadeghi and
Mohsen Gavahi and
Kianoush Jafari and
Mohsen Mahmoudi Aznaveh and
Saeid Gorgin},
title = {Cost-efficient implementation of k-NN algorithm on multi-core processors},
booktitle = {Twelfth {ACM/IEEE} International Conference on Formal Methods and
Models for Codesign, {MEMOCODE} 2014, Lausanne, Switzerland, October
19-21, 2014},
pages = {205--208},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/MEMCOD.2014.6961863},
doi = {10.1109/MEMCOD.2014.6961863},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memocode/AhmadzadehMMSSG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/BertranBBSSCRS14,
author = {Ramon Bertran and
Alper Buyuktosunoglu and
Pradip Bose and
Timothy J. Slegel and
Gerard Salem and
Sean M. Carey and
Richard F. Rizzolo and
Thomas Strach},
title = {Voltage Noise in Multi-Core Processors: Empirical Characterization
and Optimization Opportunities},
booktitle = {47th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2014, Cambridge, United Kingdom, December 13-17, 2014},
pages = {368--380},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/MICRO.2014.12},
doi = {10.1109/MICRO.2014.12},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/BertranBBSSCRS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/UnluHMALDBZDPGPDQRB14,
author = {Eren Unlu and
Mohamad Hamieh and
Christophe Moy and
Myriam Ariaudo and
Yves Lou{\"{e}}t and
Frederic Drillet and
Alexandre Briere and
Lounis Zerioul and
Julien Denoulet and
Andr{\'{e}}a Pinna and
Bertrand Granado and
Fran{\c{c}}ois P{\^{e}}cheux and
Cedric Duperrier and
S{\'{e}}bastien Quintanel and
Olivier Romain and
Emmanuelle Bourdel},
editor = {Davide Bertozzi and
Luca Benini and
Sudhakar Yalamanchili and
J{\"{o}}rg Henkel},
title = {An {OFDMA} based {RF} interconnect for massive multi-core processors},
booktitle = {Eighth {IEEE/ACM} International Symposium on Networks-on-Chip, NoCS
2014, Ferrara, Italy, September 17-19, 2014},
pages = {182--183},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/NOCS.2014.7008784},
doi = {10.1109/NOCS.2014.7008784},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nocs/UnluHMALDBZDPGPDQRB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/MoriH14,
author = {Jones Yudi Mori and
Michael H{\"{u}}bner},
title = {A high-level analysis of a multi-core vision processor using SystemC
and {TLM2.0}},
booktitle = {2014 International Conference on ReConFigurable Computing and FPGAs,
ReConFig14, Cancun, Mexico, December 8-10, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ReConFig.2014.7032491},
doi = {10.1109/RECONFIG.2014.7032491},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/MoriH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/MaZLZB14,
author = {Ning Ma and
Zhuo Zou and
Zhonghai Lu and
Li{-}Rong Zheng and
Stefan Blixt},
title = {A hierarchical reconfigurable micro-coded multi-core processor for
IoT applications},
booktitle = {9th International Symposium on Reconfigurable and Communication-Centric
Systems-on-Chip, ReCoSoC 2014, Montpellier, France, May 26-28, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ReCoSoC.2014.6861360},
doi = {10.1109/RECOSOC.2014.6861360},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/MaZLZB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/QuP14,
author = {Yun Rock Qu and
Viktor K. Prasanna},
title = {Compact Hash Tables for High-Performance Traffic Classification on
Multi-core Processors},
booktitle = {26th {IEEE} International Symposium on Computer Architecture and High
Performance Computing, {SBAC-PAD} 2014, Paris, France, October 22-24,
2014},
pages = {17--24},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/SBAC-PAD.2014.32},
doi = {10.1109/SBAC-PAD.2014.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbac-pad/QuP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/DixonLZ14,
author = {Matthew Dixon and
J{\"{o}}rg Lotze and
Mohammad Zubair},
editor = {David Daly and
Matthew Dixon and
Jos{\'{e}} E. Moreira},
title = {A portable and fast stochastic volatility model calibration using
multi and many-core processors},
booktitle = {Proceedings of the 7th Workshop on High Performance Computational
Finance, {WHPCF} '14, New Orleans, Louisiana, USA, November 16-21,
2014},
pages = {23--28},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/WHPCF.2014.12},
doi = {10.1109/WHPCF.2014.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/DixonLZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/L14a,
author = {Aashiha Priyadarshni L.},
title = {Heterogeneous Multi core processors for improving the efficiency of
Market basket analysis algorithm in data mining},
journal = {CoRR},
volume = {abs/1409.6679},
year = {2014},
url = {http://arxiv.org/abs/1409.6679},
eprinttype = {arXiv},
eprint = {1409.6679},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/L14a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/PaulCG14b,
author = {Rourab Paul and
Amlan Chakrabarti and
Ranjan Ghosh},
title = {Multi Core {SSL/TLS} Security Processor Architecture Prototype Design
with automated Preferential Algorithm in {FPGA}},
journal = {CoRR},
volume = {abs/1410.7560},
year = {2014},
url = {http://arxiv.org/abs/1410.7560},
eprinttype = {arXiv},
eprint = {1410.7560},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/PaulCG14b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/Petschow14,
author = {Matthias Petschow},
title = {MRRR-based Eigensolvers for Multi-core Processors and Supercomputers},
journal = {CoRR},
volume = {abs/1401.4950},
year = {2014},
url = {http://arxiv.org/abs/1401.4950},
eprinttype = {arXiv},
eprint = {1401.4950},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/Petschow14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ZhangY14,
author = {Jianting Zhang and
Simin You},
title = {Large-Scale Geospatial Processing on Multi-Core and Many-Core Processors:
Evaluations on CPUs, GPUs and MICs},
journal = {CoRR},
volume = {abs/1403.0802},
year = {2014},
url = {http://arxiv.org/abs/1403.0802},
eprinttype = {arXiv},
eprint = {1403.0802},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/ZhangY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Petschow14,
author = {Matthias Petschow},
title = {MRRR-based eigensolvers for multi-core processors and supercomputers},
school = {{RWTH} Aachen University},
year = {2013},
url = {http://darwin.bth.rwth-aachen.de/opus3/volltexte/2014/4908},
urn = {urn:nbn:de:hbz:82-opus-49084},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/dnb/Petschow14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Chadwick13,
author = {Gregory A. Chadwick},
title = {Communication centric, multi-core, fine-grained processor architecture},
school = {University of Cambridge, {UK}},
year = {2013},
url = {https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.607988},
timestamp = {Tue, 05 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/Chadwick13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Luff13,
author = {William Meredydd Frank Luff},
title = {Communication for programmability and performance on multi-core processors},
school = {University of Cambridge, {UK}},
year = {2013},
url = {https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.607704},
timestamp = {Tue, 05 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/Luff13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/ThucanakkenpalayamSundararajan13,
author = {Karthik Thucanakkenpalayam Sundararajan},
title = {Energy efficient cache architectures for single, multi and many core
processors},
school = {University of Edinburgh, {UK}},
year = {2013},
url = {https://hdl.handle.net/1842/9916},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/ThucanakkenpalayamSundararajan13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/aghcs/WojcikD13,
author = {Wojciech W{\'{o}}jcik and
Jacek Dlugopolski},
title = {Fpga-Based Multi-Core Processor},
journal = {Comput. Sci.},
volume = {14},
number = {3},
pages = {459--474},
year = {2013},
url = {https://doi.org/10.7494/csci.2013.14.3.459},
doi = {10.7494/CSCI.2013.14.3.459},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/aghcs/WojcikD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cluster/AlonsoDMQ13,
author = {Pedro Alonso and
Manuel F. Dolz and
Rafael Mayo and
Enrique S. Quintana{-}Ort{\'{\i}}},
title = {Energy-efficient execution of dense linear algebra algorithms on multi-core
processors},
journal = {Clust. Comput.},
volume = {16},
number = {3},
pages = {497--509},
year = {2013},
url = {https://doi.org/10.1007/s10586-012-0215-x},
doi = {10.1007/S10586-012-0215-X},
timestamp = {Thu, 24 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cluster/AlonsoDMQ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computing/CebrianSAK13,
author = {Juan M. Cebrian and
Daniel S{\'{a}}nchez and
Juan L. Arag{\'{o}}n and
Stefanos Kaxiras},
title = {Efficient inter-core power and thermal balancing for multicore processors},
journal = {Computing},
volume = {95},
number = {7},
pages = {537--566},
year = {2013},
url = {https://doi.org/10.1007/s00607-012-0236-6},
doi = {10.1007/S00607-012-0236-6},
timestamp = {Thu, 06 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computing/CebrianSAK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijndc/ChenC13,
author = {Kuo{-}Yi Chen and
Fuh{-}Gwo Chen},
title = {The Smart Energy Management of Multithreaded Java Applications on
Multi-Core Processors},
journal = {Int. J. Networked Distributed Comput.},
volume = {1},
number = {1},
pages = {53--60},
year = {2013},
url = {https://doi.org/10.2991/ijndc.2013.1.1.7},
doi = {10.2991/IJNDC.2013.1.1.7},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijndc/ChenC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcp/JiangZ13a,
author = {Jianchun Jiang and
Suhua Zeng},
title = {A Novel Task Partitioning Method for Multi-core Processor Based-on
Cohesion and Coupling},
journal = {J. Comput.},
volume = {8},
number = {5},
pages = {1247--1254},
year = {2013},
url = {http://www.jcomputers.us/index.php?m=content\&c=index\&a=show\&catid=71\&id=968},
doi = {10.4304/JCP.8.5.1247-1254},
timestamp = {Thu, 25 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcp/JiangZ13a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcp/XiaQYW13,
author = {Bingbing Xia and
Fei Qiao and
Huazhong Yang and
Hui Wang},
title = {Design Methodology of the Heterogeneous Multi-core Processor With
the Combination of Parallelized Multi-core Simulator and Common Register
File-Based Instruction Set Extension Architecture},
journal = {J. Comput.},
volume = {8},
number = {2},
pages = {356--364},
year = {2013},
url = {http://www.jcomputers.us/index.php?m=content\&c=index\&a=show\&catid=52\&id=602},
doi = {10.4304/JCP.8.2.356-364},
timestamp = {Thu, 25 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcp/XiaQYW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsci/MaroosiM13,
author = {Ali Maroosi and
Ravie Chandren Muniyandi},
title = {Membrane Computing Inspired Genetic Algorithm on Multi-Core Processors},
journal = {J. Comput. Sci.},
volume = {9},
number = {2},
pages = {264--270},
year = {2013},
url = {https://doi.org/10.3844/jcssp.2013.264.270},
doi = {10.3844/JCSSP.2013.264.270},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsci/MaroosiM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcst/ZhaoY13,
author = {Lei Zhao and
Jiwen Yang},
title = {Resources Snapshot Model for Concurrent Transactions in Multi-Core
Processors},
journal = {J. Comput. Sci. Technol.},
volume = {28},
number = {1},
pages = {106--118},
year = {2013},
url = {https://doi.org/10.1007/s11390-013-1315-7},
doi = {10.1007/S11390-013-1315-7},
timestamp = {Fri, 16 Mar 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcst/ZhaoY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jfi/WangL13,
author = {Jianfei Wang and
Steven Liu},
title = {Modeling and control for thermal balancing of multi-core processors},
journal = {J. Frankl. Inst.},
volume = {350},
number = {7},
pages = {1836--1847},
year = {2013},
url = {https://doi.org/10.1016/j.jfranklin.2013.05.003},
doi = {10.1016/J.JFRANKLIN.2013.05.003},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jfi/WangL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/PichelR13,
author = {Juan Carlos Pichel and
Francisco F. Rivera},
title = {Sparse matrix-vector multiplication on the Single-Chip Cloud Computer
many-core processor},
journal = {J. Parallel Distributed Comput.},
volume = {73},
number = {12},
pages = {1539--1550},
year = {2013},
url = {https://doi.org/10.1016/j.jpdc.2013.07.017},
doi = {10.1016/J.JPDC.2013.07.017},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/PichelR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/SolimanA13,
author = {Mostafa I. Soliman and
Abdulmajid Farea Al{-}Juniad},
title = {A shared matrix unit for a chip multi-core processor},
journal = {J. Parallel Distributed Comput.},
volume = {73},
number = {8},
pages = {1146--1156},
year = {2013},
url = {https://doi.org/10.1016/j.jpdc.2013.03.004},
doi = {10.1016/J.JPDC.2013.03.004},
timestamp = {Thu, 28 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/SolimanA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jzusc/NiuWLZC13,
author = {Yun Niu and
Liji Wu and
Yang Liu and
Xiangmin Zhang and
Hong Yi Chen},
title = {A 10 Gbps in-line network security processor based on configurable
hetero-multi-cores},
journal = {J. Zhejiang Univ. Sci. {C}},
volume = {14},
number = {8},
pages = {642--651},
year = {2013},
url = {https://doi.org/10.1631/jzus.C1200370},
doi = {10.1631/JZUS.C1200370},
timestamp = {Wed, 13 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jzusc/NiuWLZC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/SalloumEHIW13,
author = {Christian El Salloum and
Martin Elshuber and
Oliver H{\"{o}}ftberger and
Haris Isakovic and
Armin Wasicek},
title = {The {ACROSS} MPSoC - {A} new generation of multi-core processors designed
for safety-critical embedded systems},
journal = {Microprocess. Microsystems},
volume = {37},
number = {8-C},
pages = {1020--1032},
year = {2013},
url = {https://doi.org/10.1016/j.micpro.2013.08.002},
doi = {10.1016/J.MICPRO.2013.08.002},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/SalloumEHIW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SzafarynMS13,
author = {Lukasz G. Szafaryn and
Brett H. Meyer and
Kevin Skadron},
title = {Evaluating Overheads of Multibit Soft-Error Protection in the Processor
Core},
journal = {{IEEE} Micro},
volume = {33},
number = {4},
pages = {56--65},
year = {2013},
url = {https://doi.org/10.1109/MM.2013.68},
doi = {10.1109/MM.2013.68},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/SzafarynMS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/SzermerZKMPJN13,
author = {Michal Szermer and
Piotr Zajac and
Lukasz Kotynia and
Cezary Maj and
Piotr Pietrzak and
Marcin Janicki and
Andrzej Napieralski},
title = {New methodology for thermal analysis of multi-core processors based
on dedicated {ASIC}},
journal = {Microelectron. J.},
volume = {44},
number = {7},
pages = {623--630},
year = {2013},
url = {https://doi.org/10.1016/j.mejo.2013.02.006},
doi = {10.1016/J.MEJO.2013.02.006},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/SzermerZKMPJN13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mta/ParkRJK13,
author = {Jin{-}Hyung Park and
Seungmin Rho and
Chang{-}Sung Jeong and
Jongik Kim},
title = {Multiple 3D object position estimation and tracking using double filtering
on multi-core processor},
journal = {Multim. Tools Appl.},
volume = {63},
number = {1},
pages = {161--180},
year = {2013},
url = {https://doi.org/10.1007/s11042-012-1029-9},
doi = {10.1007/S11042-012-1029-9},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mta/ParkRJK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/nc/EmenekerA13,
author = {Wesley Emeneker and
Amy W. Apon},
title = {On modeling contention for shared caches in multi-core processors
with techniques from ecology},
journal = {Nat. Comput.},
volume = {12},
number = {3},
pages = {411--428},
year = {2013},
url = {https://doi.org/10.1007/s11047-012-9348-3},
doi = {10.1007/S11047-012-9348-3},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/nc/EmenekerA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/staeors/BernabeSPLBS13,
author = {Sergio Bernab{\'{e}} and
Sergio S{\'{a}}nchez and
Antonio Plaza and
Sebasti{\'{a}}n L{\'{o}}pez and
J{\'{o}}n Atli Benediktsson and
Roberto Sarmiento},
title = {Hyperspectral Unmixing on GPUs and Multi-Core Processors: {A} Comparison},
journal = {{IEEE} J. Sel. Top. Appl. Earth Obs. Remote. Sens.},
volume = {6},
number = {3},
pages = {1386--1398},
year = {2013},
url = {https://doi.org/10.1109/JSTARS.2013.2254470},
doi = {10.1109/JSTARS.2013.2254470},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/staeors/BernabeSPLBS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PaolieriMMGQUUC13,
author = {Marco Paolieri and
J{\"{o}}rg Mische and
Stefan Metzlaff and
Mike Gerdes and
Eduardo Qui{\~{n}}ones and
Sascha Uhrig and
Theo Ungerer and
Francisco J. Cazorla},
title = {A hard real-time capable multi-core {SMT} processor},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {12},
number = {3},
pages = {79:1--79:26},
year = {2013},
url = {https://doi.org/10.1145/2442116.2442129},
doi = {10.1145/2442116.2442129},
timestamp = {Fri, 03 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/PaolieriMMGQUUC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/HuangZQYW13,
author = {Tian Huang and
Yongxin Zhu and
Meikang Qiu and
Xiaojing Yin and
Xu Wang},
title = {Extending Amdahl's law and Gustafson's law by evaluating interconnections
on multi-core processors},
journal = {J. Supercomput.},
volume = {66},
number = {1},
pages = {305--319},
year = {2013},
url = {https://doi.org/10.1007/s11227-013-0908-9},
doi = {10.1007/S11227-013-0908-9},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tjs/HuangZQYW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/ZhaoFCYXY13,
author = {Jiacheng Zhao and
Xiaobing Feng and
Huimin Cui and
Youliang Yan and
Jingling Xue and
Wensen Yang},
editor = {Christian Fensch and
Michael F. P. O'Boyle and
Andr{\'{e}} Seznec and
Fran{\c{c}}ois Bodin},
title = {An empirical model for predicting cross-core performance interference
on multicore processors},
booktitle = {Proceedings of the 22nd International Conference on Parallel Architectures
and Compilation Techniques, Edinburgh, United Kingdom, September 7-11,
2013},
pages = {201--212},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/PACT.2013.6618817},
doi = {10.1109/PACT.2013.6618817},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/ZhaoFCYXY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEscc/ParkWJLKMYKP13,
author = {Junhee Park and
Qingyang Wang and
Deepal Jayasinghe and
Jack Li and
Yasuhiko Kanemasa and
Masazumi Matsubara and
Daisaku Yokoyama and
Masaru Kitsuregawa and
Calton Pu},
title = {Variations in Performance Measurements of Multi-core Processors: {A}
Study of n-Tier Applications},
booktitle = {2013 {IEEE} International Conference on Services Computing, Santa
Clara, CA, USA, June 28 - July 3, 2013},
pages = {336--343},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/SCC.2013.116},
doi = {10.1109/SCC.2013.116},
timestamp = {Wed, 29 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEscc/ParkWJLKMYKP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/adcons/MohantyTS13,
author = {Ram Prasad Mohanty and
Ashok Kumar Turuk and
Bibhudatta Sahoo},
title = {Performance Evaluation of Multi-core Processors with Varied Interconnect
Networks},
booktitle = {2013 2nd International Conference on Advanced Computing, Networking
and Security, Mangalore, India, December 15-17, 2013},
pages = {7--11},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ADCONS.2013.40},
doi = {10.1109/ADCONS.2013.40},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/adcons/MohantyTS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/HerberRRH13,
author = {Christian Herber and
Andre Oliver Richter and
Holm Rauchfuss and
Andreas Herkersdorf},
editor = {Hana Kub{\'{a}}tov{\'{a}} and
Christian Hochberger and
Martin Danek and
Bernhard Sick},
title = {Self-virtualized {CAN} Controller for Multi-core Processors in Real-Time
Applications},
booktitle = {Architecture of Computing Systems - {ARCS} 2013 - 26th International
Conference, Prague, Czech Republic, February 19-22, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7767},
pages = {244--255},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-36424-2\_21},
doi = {10.1007/978-3-642-36424-2\_21},
timestamp = {Wed, 01 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/HerberRRH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/GiorgiII13,
author = {Pascal Giorgi and
Laurent Imbert and
Thomas Izard},
editor = {Alberto Nannarelli and
Peter{-}Michael Seidel and
Ping Tak Peter Tang},
title = {Parallel Modular Multiplication on Multi-core Processors},
booktitle = {21st {IEEE} Symposium on Computer Arithmetic, {ARITH} 2013, Austin,
TX, USA, April 7-10, 2013},
pages = {135--142},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ARITH.2013.20},
doi = {10.1109/ARITH.2013.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/GiorgiII13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/JiangWLW13,
author = {Guoyue Jiang and
Fang Wang and
Zhaolin Li and
Shaojun Wei},
title = {A power-efficient network-on-chip for multi-core stream processors},
booktitle = {{IEEE} 10th International Conference on ASIC, {ASICON} 2013, Shenzhen,
China, October 28-31, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASICON.2013.6811833},
doi = {10.1109/ASICON.2013.6811833},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/asicon/JiangWLW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/ZhangYYZ13,
author = {Qing Zhang and
Xueqiu Yu and
Zhiyi Yu and
Xiaoyang Zeng},
title = {A turbo decoder implementation for {LTE} downlink mapped on a multi-core
processor platform},
booktitle = {{IEEE} 10th International Conference on ASIC, {ASICON} 2013, Shenzhen,
China, October 28-31, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASICON.2013.6811992},
doi = {10.1109/ASICON.2013.6811992},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asicon/ZhangYYZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cadgraphics/WuWTS13,
author = {Fuhui Wu and
Qingbo Wu and
Yusong Tan and
Xiaoli Sun},
title = {Speeding Up {SIFT} Algorithm by Multi-core Processor Supporting {SIMD}
Instruction Sets},
booktitle = {2013 International Conference on Computer-Aided Design and Computer
Graphics, CAD/Graphics 2013, Guangzhou, China, November 16-18, 2013},
pages = {451--452},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CADGraphics.2013.92},
doi = {10.1109/CADGRAPHICS.2013.92},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cadgraphics/WuWTS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgc/BasmadjianRM13,
author = {Robert Basmadjian and
Sebastian Rainer and
Hermann de Meer},
title = {A Generic Methodology to Derive Empirical Power Consumption Prediction
Models for Multi-Core Processors},
booktitle = {2013 International Conference on Cloud and Green Computing, Karlsruhe,
Germany, September 30 - October 2, 2013},
pages = {167--174},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CGC.2013.32},
doi = {10.1109/CGC.2013.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cgc/BasmadjianRM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compute/BhatiaKMG13,
author = {Munish Bhatia and
D. C. Kiran and
Janardan Prasad Misra and
S. Gurunarayanan},
editor = {R. K. Shyamasundar and
Lokendra Shastri and
D. Janakiram and
Srinivas Padmanabhuni},
title = {Fine grain thread scheduling on multicore processors: cores with multiple
functional units},
booktitle = {Proceedings of the 6th {ACM} India Computing Convention, {COMPUTE}
2013, Vellore, Tamil Nadu, India, August 22 - 24, 2013},
pages = {20:1--20:6},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2522548.2523137},
doi = {10.1145/2522548.2523137},
timestamp = {Wed, 17 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/compute/BhatiaKMG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/coolchips/KanehagiUHKK13,
author = {Yohei Kanehagi and
Dan Umeda and
Akihiro Hayashi and
Keiji Kimura and
Hironori Kasahara},
title = {Parallelization of automotive engine control software on embedded
multi-core processor using {OSCAR} compiler},
booktitle = {2013 {IEEE} Symposium on Low-Power and High-Speed Chips, {COOL} Chips
XVI, Yokohama, Japan, April 17-19, 2013},
pages = {1--3},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CoolChips.2013.6547921},
doi = {10.1109/COOLCHIPS.2013.6547921},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/coolchips/KanehagiUHKK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/coolchips/MiuraKSTMKASNUK13,
author = {Noriyuki Miura and
Yusuke Koizumi and
Eiichi Sasaki and
Yasuhiro Take and
Hiroki Matsutani and
Tadahiro Kuroda and
Hideharu Amano and
Ryuichi Sakamoto and
Mitaro Namiki and
Kimiyoshi Usami and
Masaaki Kondo and
Hiroshi Nakamura},
title = {A scalable 3D heterogeneous multi-core processor with inductive-coupling
thruchip interface},
booktitle = {2013 {IEEE} Symposium on Low-Power and High-Speed Chips, {COOL} Chips
XVI, Yokohama, Japan, April 17-19, 2013},
pages = {1--3},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CoolChips.2013.6547916},
doi = {10.1109/COOLCHIPS.2013.6547916},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/coolchips/MiuraKSTMKASNUK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CoppolaFGK13,
author = {Marcello Coppola and
Babak Falsafi and
John Goodacre and
George Kornaros},
editor = {Enrico Macii},
title = {From embedded multi-core SoCs to scale-out processors},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {947--951},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.199},
doi = {10.7873/DATE.2013.199},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/CoppolaFGK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ElfadelMA13,
author = {Ibrahim M. Elfadel and
Radu Marculescu and
David Atienza},
editor = {Enrico Macii},
title = {Closed-loop control for power and thermal management in multi-core
processors: formal methods and industrial practice},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1879--1881},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.374},
doi = {10.7873/DATE.2013.374},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ElfadelMA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/VenugopalS13,
author = {Vivek Venugopal and
Devu Manikantan Shila},
editor = {Brad L. Hutchings and
Vaughn Betz},
title = {Hardware acceleration of {TEA} and {XTEA} algorithms on FPGA, {GPU}
and multi-core processors (abstract only)},
booktitle = {The 2013 {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} '13, Monterey, CA, USA, February 11-13, 2013},
pages = {270},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2435264.2435326},
doi = {10.1145/2435264.2435326},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/VenugopalS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KoizumiMTMKASNUKN13,
author = {Yusuke Koizumi and
Noriyuki Miura and
Yasuhiro Take and
Hiroki Matsutani and
Tadahiro Kuroda and
Hideharu Amano and
Ryuichi Sakamoto and
Mitaro Namiki and
Kimiyoshi Usami and
Masaaki Kondo and
Hiroshi Nakamura},
title = {Demonstration of a heterogeneous multi-core processor with 3-D inductive
coupling links},
booktitle = {23rd International Conference on Field programmable Logic and Applications,
{FPL} 2013, Porto, Portugal, September 2-4, 2013},
pages = {1},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPL.2013.6645628},
doi = {10.1109/FPL.2013.6645628},
timestamp = {Thu, 21 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KoizumiMTMKASNUKN13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fsfma/PaunMB13,
author = {Vladimir{-}Alexandru Paun and
Bruno Monsuez and
Philippe Baufreton},
editor = {Christine Choppy and
Jun Sun},
title = {On the Determinism of Multi-core Processors},
booktitle = {1st French Singaporean Workshop on Formal Methods and Applications,
{FSFMA} 2013, July 15-16, 2013, Singapore},
series = {OASIcs},
volume = {31},
pages = {32--46},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2013},
url = {https://doi.org/10.4230/OASIcs.FSFMA.2013.32},
doi = {10.4230/OASICS.FSFMA.2013.32},
timestamp = {Tue, 15 Feb 2022 09:40:03 +0100},
biburl = {https://dblp.org/rec/conf/fsfma/PaunMB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gi/HerkersdorfPPSWWZ13,
author = {Andreas Herkersdorf and
Johny Paul and
Ravi Kumar Pujari and
Walter Stechele and
Stefan Wallentowitz and
Thomas Wild and
Aurang Zaib},
editor = {Matthias Horbach},
title = {Potentials and Challenges for Multi-Core Processors in Robotic Applications},
booktitle = {43. Jahrestagung der Gesellschaft f{\"{u}}r Informatik, Informatik
angepasst an Mensch, Organisation und Umwelt, {INFORMATIK} 2013, Koblenz,
Germany, September 16-20, 2013},
series = {{LNI}},
volume = {{P-220}},
pages = {2749--2764},
publisher = {{GI}},
year = {2013},
url = {https://dl.gi.de/handle/20.500.12116/20694},
timestamp = {Tue, 04 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/gi/HerkersdorfPPSWWZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/greencom/CaoZ13a,
author = {Xiangrong Cao and
Xiaolin Zhang},
title = {An Energy Efficient Cache Design for Multi-core Processors},
booktitle = {2013 {IEEE} International Conference on Green Computing and Communications
(GreenCom) and {IEEE} Internet of Things (iThings) and {IEEE} Cyber,
Physical and Social Computing (CPSCom), Beijing, China, August 20-23,
2013},
pages = {1392--1396},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/GreenCom-iThings-CPSCom.2013.243},
doi = {10.1109/GREENCOM-ITHINGS-CPSCOM.2013.243},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/greencom/CaoZ13a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/MiuraKSTMKASNUK13,
author = {Noriyuki Miura and
Yusuke Koizumi and
Eiichi Sasaki and
Yasuhiro Take and
Hiroki Matsutani and
Tadahiro Kuroda and
Hideharu Amano and
Ryuichi Sakamoto and
Mitaro Namiki and
Kimiyoshi Usami and
Masaaki Kondo and
Hiroshi Nakamura},
title = {A scalable 3D heterogeneous multi-core processor with inductive-coupling
thruchip interface},
booktitle = {2013 {IEEE} Hot Chips 25 Symposium (HCS), Stanford University, CA,
USA, August 25-27, 2013},
pages = {1},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2013.7478328},
doi = {10.1109/HOTCHIPS.2013.7478328},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hotchips/MiuraKSTMKASNUK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/SongZMYZFL13,
author = {Fenglong Song and
Yasong Zheng and
Futao Miao and
Xiaochun Ye and
Hao Zhang and
Dongrui Fan and
Zhiyong Liu},
title = {Low Execution Efficiency: When General Multi-core Processor Meets
Wireless Communication Protocol},
booktitle = {10th {IEEE} International Conference on High Performance Computing
and Communications {\&} 2013 {IEEE} International Conference on
Embedded and Ubiquitous Computing, {HPCC/EUC} 2013, Zhangjiajie, China,
November 13-15, 2013},
pages = {906--913},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/HPCC.and.EUC.2013.129},
doi = {10.1109/HPCC.AND.EUC.2013.129},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/SongZMYZFL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpdc/Rao13,
author = {Nageswara S. V. Rao},
editor = {Nathan DeBardeleben and
Jon Stearley and
Franck Cappello},
title = {Fault detection in multi-core processors using chaotic maps},
booktitle = {Proceedings of the 3rd Workshop on Fault-tolerance for {HPC} at extreme
scale, jointly held with the 22nd International Symposium on High-Performance
Parallel and Distributed Computing, HPDC'13, New York, NY, USA, June
18, 2013},
pages = {27--32},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2465813.2465818},
doi = {10.1145/2465813.2465818},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpdc/Rao13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic-nc/OkamotoNSK13,
author = {Takaki Okamoto and
Tomoyuki Nakabayashi and
Takahiro Sasaki and
Toshio Kondo},
editor = {Juan E. Guerrero},
title = {FabCache: Cache Design Automation for Heterogeneous Multi-core Processors},
booktitle = {The First International Symposium on Computing and Networking - Across
Practical Development and Theoretical Research, Dogo {SPA} Resort,
Matsuyama, Japan, December 4-6, 2013},
pages = {602--606},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CANDAR.2013.108},
doi = {10.1109/CANDAR.2013.108},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ic-nc/OkamotoNSK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccS/VikranthWR13,
author = {B. Vikranth and
Rajeev Wankar and
C. Raghavendra Rao},
editor = {Vassil Alexandrov and
Michael Lees and
Valeria V. Krzhizhanovskaya and
Jack J. Dongarra and
Peter M. A. Sloot},
title = {Topology Aware Task stealing for on-Chip {NUMA} Multi-Core Processors},
booktitle = {Proceedings of the International Conference on Computational Science,
{ICCS} 2013, Barcelona, Spain, 5-7 June, 2013},
series = {Procedia Computer Science},
volume = {18},
pages = {379--388},
publisher = {Elsevier},
year = {2013},
url = {https://doi.org/10.1016/j.procs.2013.05.201},
doi = {10.1016/J.PROCS.2013.05.201},
timestamp = {Wed, 12 Jul 2023 15:16:18 +0200},
biburl = {https://dblp.org/rec/conf/iccS/VikranthWR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RotenbergDFZWCTLDF13,
author = {Eric Rotenberg and
Brandon H. Dwiel and
Elliott Forbes and
Zhenqian Zhang and
Randy Widialaksono and
Rangeen Basu Roy Chowdhury and
Nyunyi M. Tshibangu and
Steve Lipa and
W. Rhett Davis and
Paul D. Franzon},
title = {Rationale for a 3D heterogeneous multi-core processor},
booktitle = {2013 {IEEE} 31st International Conference on Computer Design, {ICCD}
2013, Asheville, NC, USA, October 6-9, 2013},
pages = {154--168},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ICCD.2013.6657038},
doi = {10.1109/ICCD.2013.6657038},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RotenbergDFZWCTLDF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccsa/JinKF13,
author = {Shichao Jin and
Okhee Kim and
Wenya Feng},
editor = {Beniamino Murgante and
Sanjay Misra and
Maurizio Carlini and
Carmelo Maria Torre and
Hong{-}Quang Nguyen and
David Taniar and
Bernady O. Apduhan and
Osvaldo Gervasi},
title = {Accelerating Metric Space Similarity Joins with Multi-core and Many-core
Processors},
booktitle = {Computational Science and Its Applications - {ICCSA} 2013 - 13th International
Conference, Ho Chi Minh City, Vietnam, June 24-27, 2013, Proceedings,
Part {V}},
series = {Lecture Notes in Computer Science},
volume = {7975},
pages = {166--180},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-39640-3\_12},
doi = {10.1007/978-3-642-39640-3\_12},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/iccsa/JinKF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/YasinSE13,
author = {Muhammad Yasin and
Anas Shahrour and
Ibrahim Abe M. Elfadel},
title = {Ultra compact, quadratic power proxies for multi-core processors},
booktitle = {20th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2013, Abu Dhabi, UAE, December 8-11, 2013},
pages = {954--957},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ICECS.2013.6815570},
doi = {10.1109/ICECS.2013.6815570},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/YasinSE13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/LiuSCD13,
author = {Xing Liu and
Mikhail Smelyanskiy and
Edmond Chow and
Pradeep Dubey},
editor = {Allen D. Malony and
Mario Nemirovsky and
Samuel P. Midkiff},
title = {Efficient sparse matrix-vector multiplication on x86-based many-core
processors},
booktitle = {International Conference on Supercomputing, ICS'13, Eugene, OR, {USA}
- June 10 - 14, 2013},
pages = {273--282},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2464996.2465013},
doi = {10.1145/2464996.2465013},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/LiuSCD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeehpcs/SaravananAK13,
author = {Vijayalakshmi Saravanan and
Alagan Anpalagan and
Dwarkadas Pralhaddas Kothari},
title = {Power-performance of multi-threaded multi-core processor: Analysis,
optimization and simulation},
booktitle = {International Conference on High Performance Computing {\&} Simulation,
{HPCS} 2013, Helsinki, Finland, July 1-5, 2013},
pages = {674--677},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/HPCSim.2013.6641492},
doi = {10.1109/HPCSIM.2013.6641492},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ieeehpcs/SaravananAK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/DevNR13,
author = {Kapil Dev and
Abdullah Nazma Nowroz and
Sherief Reda},
editor = {Pai H. Chou and
Ru Huang and
Yuan Xie and
Tanay Karnik},
title = {Power mapping and modeling of multi-core processors},
booktitle = {International Symposium on Low Power Electronics and Design (ISLPED),
Beijing, China, September 4-6, 2013},
pages = {39--44},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISLPED.2013.6629264},
doi = {10.1109/ISLPED.2013.6629264},
timestamp = {Thu, 06 Jun 2024 10:53:08 +0200},
biburl = {https://dblp.org/rec/conf/islped/DevNR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ZhangTKLWB13,
author = {Xuan Zhang and
Tao Tong and
Svilen Kanev and
Sae Kyu Lee and
Gu{-}Yeon Wei and
David M. Brooks},
editor = {Pai H. Chou and
Ru Huang and
Yuan Xie and
Tanay Karnik},
title = {Characterizing and evaluating voltage noise in multi-core near-threshold
processors},
booktitle = {International Symposium on Low Power Electronics and Design (ISLPED),
Beijing, China, September 4-6, 2013},
pages = {82--87},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISLPED.2013.6629271},
doi = {10.1109/ISLPED.2013.6629271},
timestamp = {Mon, 16 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/ZhangTKLWB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/HuCPSC13,
author = {Yue Hu and
Shaoming Chen and
Lu Peng and
Edward Song and
Jin{-}Woo Choi},
title = {Effective thermal control techniques for liquid-cooled 3D multi-core
processors},
booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013,
Santa Clara, CA, USA, March 4-6, 2013},
pages = {8--15},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISQED.2013.6523583},
doi = {10.1109/ISQED.2013.6523583},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/HuCPSC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ParkHKKLPBY13,
author = {Junyoung Park and
Injoon Hong and
Gyeonghoon Kim and
Youchang Kim and
Kyuho Jason Lee and
Seongwook Park and
Kyeongryeol Bong and
Hoi{-}Jun Yoo},
title = {A 646GOPS/W multi-classifier many-core processor with cortex-like
architecture for super-resolution recognition},
booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest
of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
17-21, 2013},
pages = {168--169},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISSCC.2013.6487685},
doi = {10.1109/ISSCC.2013.6487685},
timestamp = {Fri, 13 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/ParkHKKLPBY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itst/Tsai13,
author = {Hsiao{-}Chien Tsai},
title = {Safety view management for augmented reality based on MapReduce strategy
on multi-core processors},
booktitle = {13th International Conference on {ITS} Telecommunications, {ITST}
2013, Tampere, Finland, November 5-7, 2013},
pages = {151--156},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ITST.2013.6685537},
doi = {10.1109/ITST.2013.6685537},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/itst/Tsai13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtv/BrierVRATM13,
author = {David Brier and
Rama Venkatasubramanian and
Sowmya Rangarajan and
Abhishek Arun and
David Thompson and
Neelima Muralidharan},
title = {Verification Methodology of Heterogeneous {DSP+ARM} Multicore Processors
for Multi-core System on Chip},
booktitle = {14th International Workshop on Microprocessor Test and Verification,
{MTV} 2013, Austin, TX, USA, December 11-13, 2013},
pages = {112--117},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/MTV.2013.32},
doi = {10.1109/MTV.2013.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtv/BrierVRATM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nas/MengGYZZH13,
author = {Xiaofu Meng and
Xiang Gao and
Qian Yu and
Shuangshuang Zhang and
Xiaochun Zhang and
Jing Huang},
title = {Luminance and Chrominance Parallelization of {H.264/AVC} Decoding
on a Multi-core Processor},
booktitle = {{IEEE} Eighth International Conference on Networking, Architecture
and Storage, {NAS} 2013, Xi'an, Shaanxi, China, July 17-19, 2013},
pages = {252--256},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/NAS.2013.39},
doi = {10.1109/NAS.2013.39},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nas/MengGYZZH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdcat/YaoGD13,
author = {Xuanxia Yao and
Peng Geng and
Xiaojiang Du},
editor = {Shi{-}Jinn Horng},
title = {A Task Scheduling Algorithm for Multi-core Processors},
booktitle = {International Conference on Parallel and Distributed Computing, Applications
and Technologies, {PDCAT} 2013, Taipei, Taiwan, December 16-18, 2013},
pages = {259--264},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/PDCAT.2013.47},
doi = {10.1109/PDCAT.2013.47},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/pdcat/YaoGD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/PuffitschNP13,
author = {Wolfgang Puffitsch and
Eric Noulard and
Claire Pagetti},
title = {Mapping a multi-rate synchronous language to a many-core processor},
booktitle = {19th {IEEE} Real-Time and Embedded Technology and Applications Symposium,
{RTAS} 2013, Philadelphia, PA, USA, April 9-11, 2013},
pages = {293--302},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/RTAS.2013.6531101},
doi = {10.1109/RTAS.2013.6531101},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/PuffitschNP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtns/NowotschP13,
author = {Jan Nowotsch and
Michael Paulitsch},
editor = {Michel Auguin and
Robert de Simone and
Robert I. Davis and
Emmanuel Grolleau},
title = {Quality of service capabilities for hard real-time applications on
multi-core processors},
booktitle = {21st International Conference on Real-Time Networks and Systems, {RTNS}
2013, Sophia Antipolis, France, October 17-18, 2013},
pages = {151--160},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2516821.2516826},
doi = {10.1145/2516821.2516826},
timestamp = {Tue, 30 Aug 2022 08:51:38 +0200},
biburl = {https://dblp.org/rec/conf/rtns/NowotschP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/QuZP13,
author = {Yun Qu and
Shijie Zhou and
Viktor K. Prasanna},
title = {Scalable Many-Field Packet Classification on Multi-core Processors},
booktitle = {25th International Symposium on Computer Architecture and High Performance
Computing, {SBAC-PAD} 2013, Porto de Galinhas, Pernambuco, Brazil,
October 23-26, 2013},
pages = {33--40},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/SBAC-PAD.2013.29},
doi = {10.1109/SBAC-PAD.2013.29},
timestamp = {Thu, 08 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbac-pad/QuZP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/XiaochenRS13,
author = {Tian Xiaochen and
Kamil Rocki and
Reiji Suda},
editor = {Antonino Tumeo and
John Feo and
Oreste Villa and
Simone Secchi},
title = {Register level sort algorithm on multi-core {SIMD} processors},
booktitle = {Proceedings of the 3rd Workshop on Irregular Applications - Architectures
and Algorithms, IA\({}^{\mbox{3}}\) 2013, Denver, Colorado, USA, November
17-22, 2013},
pages = {9:1--9:8},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2535753.2535762},
doi = {10.1145/2535753.2535762},
timestamp = {Tue, 06 Nov 2018 16:59:29 +0100},
biburl = {https://dblp.org/rec/conf/sc/XiaochenRS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wads/HassidimKT13,
author = {Avinatan Hassidim and
Haim Kaplan and
Omry Tuval},
editor = {Frank Dehne and
Roberto Solis{-}Oba and
J{\"{o}}rg{-}R{\"{u}}diger Sack},
title = {Joint Cache Partition and Job Assignment on Multi-core Processors},
booktitle = {Algorithms and Data Structures - 13th International Symposium, {WADS}
2013, London, ON, Canada, August 12-14, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8037},
pages = {378--389},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-40104-6\_33},
doi = {10.1007/978-3-642-40104-6\_33},
timestamp = {Tue, 14 May 2019 10:00:50 +0200},
biburl = {https://dblp.org/rec/conf/wads/HassidimKT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcnc/ShangZCG13,
author = {Qiuli Shang and
Wu Zhang and
Xiao Chen and
Xiuyan Guo},
title = {Storage performance evaluation of media server based on multi-core
network processors},
booktitle = {2013 {IEEE} Wireless Communications and Networking Conference Workshops,
{WCNC} Workshops, Shanghai, China, April 7-10, 2013},
pages = {76--79},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/WCNCW.2013.6533319},
doi = {10.1109/WCNCW.2013.6533319},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/wcnc/ShangZCG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/BenmoussaBSBA13,
author = {Yahia Benmoussa and
Jalil Boukhobza and
Eric Senn and
Djamel Benazzouz and
Yassine Hadjadj Aoul},
title = {DyPS: Dynamic Processor Switching for Energy-Aware Video Decoding
on Multi-core SoCs},
journal = {CoRR},
volume = {abs/1309.2387},
year = {2013},
url = {http://arxiv.org/abs/1309.2387},
eprinttype = {arXiv},
eprint = {1309.2387},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/BenmoussaBSBA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/SenanayakePR13,
author = {Upul Senanayake and
Rahal Prabuddha and
Roshan G. Ragel},
title = {High Throughput Virtual Screening with Data Level Parallelism in Multi-core
Processors},
journal = {CoRR},
volume = {abs/1312.1003},
year = {2013},
url = {http://arxiv.org/abs/1312.1003},
eprinttype = {arXiv},
eprint = {1312.1003},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/SenanayakePR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1302-1390,
author = {Mike Lankamp and
Raphael 'kena' Poss and
Qiang Yang and
Jian Fu and
Muhammad Irfan Uddin and
Chris R. Jesshope},
title = {MGSim - Simulation tools for multi-core processor architectures},
journal = {CoRR},
volume = {abs/1302.1390},
year = {2013},
url = {http://arxiv.org/abs/1302.1390},
eprinttype = {arXiv},
eprint = {1302.1390},
timestamp = {Mon, 11 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1302-1390.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/us/DeOrio12,
author = {Andrew DeOrio},
title = {Correct Communication in Multi-core Processors},
school = {University of Michigan, {USA}},
year = {2012},
url = {https://hdl.handle.net/2027.42/94084},
timestamp = {Fri, 22 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/us/DeOrio12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/alr/KuroseYAY12,
author = {Shingo Kurose and
Kunihito Yamamori and
Masaru Aikawa and
Ikuo Yoshihara},
title = {Asynchronous migration for parallel genetic programming on a computer
cluster with multi-core processors},
journal = {Artif. Life Robotics},
volume = {16},
number = {4},
pages = {533--536},
year = {2012},
url = {https://doi.org/10.1007/s10015-011-0983-z},
doi = {10.1007/S10015-011-0983-Z},
timestamp = {Mon, 30 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/alr/KuroseYAY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/ZhouYH12,
author = {Shujia Zhou and
Yelena Yesha and
Milton Halem},
title = {Special Issue: Exploring the frontiers of computing science and technology:
efficiently utilizing multicore and many-core processors},
journal = {Concurr. Comput. Pract. Exp.},
volume = {24},
number = {2},
pages = {109--110},
year = {2012},
url = {https://doi.org/10.1002/cpe.1864},
doi = {10.1002/CPE.1864},
timestamp = {Mon, 02 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/concurrency/ZhouYH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/csl/Hanani0R12,
author = {Abualsoud Hanani and
Michael J. Carey and
Martin J. Russell},
title = {Language identification using multi-core processors},
journal = {Comput. Speech Lang.},
volume = {26},
number = {5},
pages = {371--383},
year = {2012},
url = {https://doi.org/10.1016/j.csl.2012.03.003},
doi = {10.1016/J.CSL.2012.03.003},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/csl/Hanani0R12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dpd/SafaeiSSH12,
author = {Ali A. Safaei and
Ali Sharifrazavian and
Mohsen Sharifi and
Mostafa S. Haghjoo},
title = {Dynamic routing of data stream tuples among parallel query plan running
on multi-core processors},
journal = {Distributed Parallel Databases},
volume = {30},
number = {2},
pages = {145--176},
year = {2012},
url = {https://doi.org/10.1007/s10619-012-7090-6},
doi = {10.1007/S10619-012-7090-6},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dpd/SafaeiSSH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/FanCCYZ12,
author = {Wenhua Fan and
Chen Chen and
Yun Chen and
Zhiyi Yu and
Xiaoyang Zeng},
title = {Efficient Implementation of {OFDM} Inner Receiver on a Programmable
Multi-Core Processor Platform},
journal = {{IEICE} Trans. Commun.},
volume = {95-B},
number = {4},
pages = {1241--1248},
year = {2012},
url = {https://doi.org/10.1587/transcom.E95.B.1241},
doi = {10.1587/TRANSCOM.E95.B.1241},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/FanCCYZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/HiramatsuWHNUK12,
author = {Yoshitaka Hiramatsu and
Hasitha Muthumala Waidyasooriya and
Masanori Hariyama and
Tohru Nojiri and
Kunio Uchiyama and
Michitaka Kameyama},
title = {Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core
Processor Based on {DTU} Data-Transfer with Data Re-Allocation},
journal = {{IEICE} Trans. Electron.},
volume = {95-C},
number = {12},
pages = {1872--1882},
year = {2012},
url = {https://doi.org/10.1587/transele.E95.C.1872},
doi = {10.1587/TRANSELE.E95.C.1872},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/HiramatsuWHNUK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/HuangYCYZ12,
author = {Bei Huang and
Kaidi You and
Yun Chen and
Zhiyi Yu and
Xiaoyang Zeng},
title = {A Fully Programmable Reed-Solomon Decoder on a Multi-Core Processor
Platform},
journal = {{IEICE} Trans. Inf. Syst.},
volume = {95-D},
number = {12},
pages = {2939--2947},
year = {2012},
url = {https://doi.org/10.1587/transinf.E95.D.2939},
doi = {10.1587/TRANSINF.E95.D.2939},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/HuangYCYZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ife/AlonsoDIMQ12,
author = {Pedro Alonso and
Manuel F. Dolz and
Francisco D. Igual and
Rafael Mayo and
Enrique S. Quintana{-}Ort{\'{\i}}},
title = {DVFS-control techniques for dense linear algebra operations on multi-core
processors},
journal = {Comput. Sci. Res. Dev.},
volume = {27},
number = {4},
pages = {289--298},
year = {2012},
url = {https://doi.org/10.1007/s00450-011-0188-7},
doi = {10.1007/S00450-011-0188-7},
timestamp = {Thu, 24 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ife/AlonsoDIMQ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcse/DingZ12,
author = {Yiqiang Ding and
Wei Zhang},
title = {Multicore-Aware Code Co-Positioning to Reduce {WCET} on Dual-Core
Processors with Shared Instruction Caches},
journal = {J. Comput. Sci. Eng.},
volume = {6},
number = {1},
pages = {12--25},
year = {2012},
url = {https://doi.org/10.5626/JCSE.2012.6.1.12},
doi = {10.5626/JCSE.2012.6.1.12},
timestamp = {Thu, 27 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcse/DingZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/TsaoL12,
author = {Shiao{-}Li Tsao and
Sung{-}Yuan Lee},
title = {Performance Evaluation of Inter-Processor Communication for an Embedded
Heterogeneous Multi-Core Processor},
journal = {J. Inf. Sci. Eng.},
volume = {28},
number = {3},
pages = {537--554},
year = {2012},
url = {http://www.iis.sinica.edu.tw/page/jise/2012/201205\_07.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/TsaoL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jnw/WanLL12,
author = {Ziqian Wan and
Gang Liang and
Tao Li},
title = {Multi-core Processors based Network Intrusion Detection Method},
journal = {J. Networks},
volume = {7},
number = {9},
pages = {1327--1333},
year = {2012},
url = {https://doi.org/10.4304/jnw.7.9.1327-1333},
doi = {10.4304/JNW.7.9.1327-1333},
timestamp = {Tue, 15 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jnw/WanLL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/JoJS12,
author = {Seong Min Jo and
Song Hyun Jo and
Yong Ho Song},
title = {Exploring parallelization techniques based on OpenMP in {H.264/AVC}
encoder for embedded multi-core processor},
journal = {J. Syst. Archit.},
volume = {58},
number = {9},
pages = {339--353},
year = {2012},
url = {https://doi.org/10.1016/j.sysarc.2012.06.005},
doi = {10.1016/J.SYSARC.2012.06.005},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jsa/JoJS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jucs/KellerKH12,
author = {J{\"{o}}rg Keller and
Christoph W. Kessler and
Rikard Hult{\'{e}}n},
title = {Optimized On-Chip-Pipelining for Memory-Intensive Computations on
Multi-Core Processors with Explicit Memory Hierarchy},
journal = {J. Univers. Comput. Sci.},
volume = {18},
number = {14},
pages = {1987--2023},
year = {2012},
url = {https://doi.org/10.3217/jucs-018-14-1987},
doi = {10.3217/JUCS-018-14-1987},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jucs/KellerKH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/LeeKCP12,
author = {Sungju Lee and
Heegon Kim and
Yongwha Chung and
Daihee Park},
title = {Energy Efficient Image/Video Data Transmission on Commercial Multi-Core
Processors},
journal = {Sensors},
volume = {12},
number = {11},
pages = {14647--14670},
year = {2012},
url = {https://doi.org/10.3390/s121114647},
doi = {10.3390/S121114647},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/sensors/LeeKCP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tce/GotoKSTS12,
author = {Tomio Goto and
Y. Kawamoto and
Yasuhiro Sakuta and
A. Tsutsui and
Masaru Sakurai},
title = {Learning-based super-resolution image reconstruction on multi-core
processor},
journal = {{IEEE} Trans. Consumer Electron.},
volume = {58},
number = {3},
pages = {941--946},
year = {2012},
url = {https://doi.org/10.1109/TCE.2012.6311340},
doi = {10.1109/TCE.2012.6311340},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tce/GotoKSTS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcom/HuWWHYV12,
author = {WeiDong Hu and
Jiangtao Wen and
Weiyi Wu and
Yuxing Han and
Shiqiang Yang and
John D. Villasenor},
title = {Highly Scalable Parallel Arithmetic Coding on Multi-Core Processors
Using {LDPC} Codes},
journal = {{IEEE} Trans. Commun.},
volume = {60},
number = {2},
pages = {289--294},
year = {2012},
url = {https://doi.org/10.1109/TCOMM.2011.101011.110071},
doi = {10.1109/TCOMM.2011.101011.110071},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcom/HuWWHYV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/RodriguesAKK12,
author = {Rance Rodrigues and
Arunachalam Annamalai and
Israel Koren and
Sandip Kundu},
title = {Improving performance per watt of asymmetric multi-core processors
via online program phase classification and adaptive core morphing},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {18},
number = {1},
pages = {5:1--5:23},
year = {2012},
url = {https://doi.org/10.1145/2390191.2390196},
doi = {10.1145/2390191.2390196},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/RodriguesAKK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/Chasaki12,
author = {Danai Chasaki},
editor = {Tilman Wolf and
Andrew W. Moore and
Viktor K. Prasanna},
title = {Securing multi-core multi-threaded packet processors},
booktitle = {Symposium on Architecture for Networking and Communications Systems,
{ANCS} '12, Austin, TX, {USA} - October 29 - 30, 2012},
pages = {149--150},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2396556.2396591},
doi = {10.1145/2396556.2396591},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ancs/Chasaki12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apsipa/LaiCHHL12,
author = {Jyu{-}Yuan Lai and
Po{-}Yu Chen and
Ting{-}Shuo Hsu and
Chih{-}Tsun Huang and
Jing{-}Jia Liou},
title = {Design and analysis of a many-core processor architecture for multimedia
applications},
booktitle = {Asia-Pacific Signal and Information Processing Association Annual
Summit and Conference, {APSIPA} 2012, Hollywood, CA, USA, December
3-6, 2012},
pages = {1--6},
publisher = {{IEEE}},
year = {2012},
url = {https://ieeexplore.ieee.org/document/6411869/},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apsipa/LaiCHHL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/AnjamKSW12,
author = {Fakhar Anjam and
Quan Kong and
Roel Seedorf and
Stephan Wong},
editor = {Oliver C. S. Choy and
Ray C. C. Cheung and
Peter M. Athanas and
Kentaro Sano},
title = {A Run-Time Task Migration Scheme for an Adjustable Issue-Slots Multi-core
Processor},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
8th International Symposium, {ARC} 2012, Hong Kong, China, March 19-23,
2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7199},
pages = {102--113},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-28365-9\_9},
doi = {10.1007/978-3-642-28365-9\_9},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/AnjamKSW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/PetridesNT12,
author = {Panayiotis Petrides and
George Nicolaides and
Pedro Trancoso},
editor = {Andreas Herkersdorf and
Kay R{\"{o}}mer and
Uwe Brinkschulte},
title = {{HPC} Performance Domains on Multi-core Processors with Virtualization},
booktitle = {Architecture of Computing Systems - {ARCS} 2012 - 25th International
Conference, Munich, Germany, February 28 - March 2, 2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7179},
pages = {123--134},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-28293-5\_11},
doi = {10.1007/978-3-642-28293-5\_11},
timestamp = {Thu, 14 Oct 2021 10:21:06 +0200},
biburl = {https://dblp.org/rec/conf/arcs/PetridesNT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/SchieleBTMM11,
author = {Steffen Schiele and
Holger Blaar and
Detlef Th{\"{u}}rkow and
Markus M{\"{o}}ller and
Matthias M{\"{u}}ller{-}Hannemann},
editor = {Gero M{\"{u}}hl and
Jan Richling and
Andreas Herkersdorf},
title = {Parallelization Strategies to Speed-Up Computations for Terrain Analysis
on Multi-Core Processors},
booktitle = {{ARCS} 2012 Workshops, 28. Februar - 2. M{\"{a}}rz 2012, M{\"{u}}nchen,
Germany},
series = {{LNI}},
volume = {{P-200}},
pages = {457--468},
publisher = {{GI}},
year = {2012},
url = {https://ieeexplore.ieee.org/document/6222207/},
timestamp = {Tue, 04 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arcs/SchieleBTMM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YeX12,
author = {Rong Ye and
Qiang Xu},
title = {Learning-based power management for multi-core processors via idle
period manipulation},
booktitle = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
{ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
pages = {115--120},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ASPDAC.2012.6164929},
doi = {10.1109/ASPDAC.2012.6164929},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/YeX12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccgrid/DehneZ12,
author = {Frank Dehne and
Hamidreza Zaboli},
title = {Parallel Real-Time {OLAP} on Multi-core Processors},
booktitle = {12th {IEEE/ACM} International Symposium on Cluster, Cloud and Grid
Computing, CCGrid 2012, Ottawa, Canada, May 13-16, 2012},
pages = {588--594},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/CCGrid.2012.19},
doi = {10.1109/CCGRID.2012.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ccgrid/DehneZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/PaulAGVASK12,
author = {Ayan Paul and
Matt Amrein and
Saket Gupta and
Arvind Vinod and
Abhishek Arun and
Sachin S. Sapatnekar and
Chris H. Kim},
title = {Staggered Core Activation: {A} circuit/architectural approach for
mitigating resonant supply noise issues in multi-core multi-power
domain processors},
booktitle = {Proceedings of the {IEEE} 2012 Custom Integrated Circuits Conference,
{CICC} 2012, San Jose, CA, USA, September 9-12, 2012},
pages = {1--4},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/CICC.2012.6330673},
doi = {10.1109/CICC.2012.6330673},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/PaulAGVASK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/LeeCC12,
author = {Haeseung Lee and
Weijia Che and
Karam S. Chatha},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Naehyuck Chang and
Franco Fummi},
title = {Dynamic scheduling of stream programs on embedded multi-core processors},
booktitle = {Proceedings of the 10th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2012, part of ESWeek '12
Eighth Embedded Systems Week, Tampere, Finland, October 7-12, 2012},
pages = {93--102},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380445.2380465},
doi = {10.1145/2380445.2380465},
timestamp = {Mon, 26 Nov 2018 12:14:45 +0100},
biburl = {https://dblp.org/rec/conf/codes/LeeCC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/crv/RanjanM12,
author = {Abhishek Ranjan and
Shahzad Malik},
title = {Parallelizing a Face Detection and Tracking System for Multi-Core
Processors},
booktitle = {Ninth Conference on Computer and Robot Vision, {CRV} 2012, Toronto,
Ontario, Canada, May 28-30, 2012},
pages = {290--297},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/CRV.2012.45},
doi = {10.1109/CRV.2012.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/crv/RanjanM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SinkarWK12,
author = {Abhishek A. Sinkar and
Hao Wang and
Nam Sung Kim},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Workload-aware voltage regulator optimization for power efficient
multi-core processors},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1134--1137},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176667},
doi = {10.1109/DATE.2012.6176667},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SinkarWK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SalloumEHIW12,
author = {Christian El Salloum and
Martin Elshuber and
Oliver H{\"{o}}ftberger and
Haris Isakovic and
Armin Wasicek},
title = {The {ACROSS} MPSoC - {A} New Generation of Multi-core Processors Designed
for Safety-Critical Embedded Systems},
booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
Izmir, Turkey, September 5-8, 2012},
pages = {105--113},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSD.2012.126},
doi = {10.1109/DSD.2012.126},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/SalloumEHIW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eenergy/BasmadjianM12,
author = {Robert Basmadjian and
Hermann de Meer},
editor = {Marco Ajmone Marsan and
Suresh Goyal and
Shugong Xu and
Antonio Fern{\'{a}}ndez and
Milan Prodanovic and
Ken Christensen},
title = {Evaluating and modeling power consumption of multi-core processors},
booktitle = {Proceedings of the 3rd International Conference on Energy-Efficient
Computing and Networking, e-Energy'12, Madrid, Spain, May 9-11, 2012},
pages = {12},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2208828.2208840},
doi = {10.1145/2208828.2208840},
timestamp = {Mon, 13 Jan 2020 13:57:44 +0100},
biburl = {https://dblp.org/rec/conf/eenergy/BasmadjianM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/emsoft/FernandezGQFZC12,
author = {Mikel Fern{\'{a}}ndez and
Roberto Gioiosa and
Eduardo Qui{\~{n}}ones and
Luca Fossati and
Marco Zulianello and
Francisco J. Cazorla},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Florence Maraninchi and
John Regehr},
title = {Assessing the suitability of the {NGMP} multi-core processor in the
space domain},
booktitle = {Proceedings of the 12th International Conference on Embedded Software,
{EMSOFT} 2012, part of the Eighth Embedded Systems Week, ESWeek 2012,
Tampere, Finland, October 7-12, 2012},
pages = {175--184},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380356.2380389},
doi = {10.1145/2380356.2380389},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/emsoft/FernandezGQFZC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AsaadBBHKPRSTT12,
author = {Sameh W. Asaad and
Ralph Bellofatto and
Bernard Brezzo and
Chuck Haymes and
Mohit Kapur and
Benjamin D. Parker and
Thomas Roewer and
Proshanta Saha and
Todd Takken and
Jos{\'{e}} A. Tierno},
editor = {Katherine Compton and
Brad L. Hutchings},
title = {A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating
multi-core processor simulation},
booktitle = {Proceedings of the {ACM/SIGDA} 20th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2012, Monterey, California, USA,
February 22-24, 2012},
pages = {153--162},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2145694.2145720},
doi = {10.1145/2145694.2145720},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AsaadBBHKPRSTT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/SheikhA12,
author = {Hafiz Fahad Sheikh and
Ishfaq Ahmad},
title = {Simultaneous optimization of performance, energy and temperature for
{DAG} scheduling in multi-core processors},
booktitle = {2012 International Green Computing Conference, {IGCC} 2012, San Jose,
CA, USA, June 4-8, 2012},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IGCC.2012.6322280},
doi = {10.1109/IGCC.2012.6322280},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/green/SheikhA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/El-MoursyS12,
author = {Ali El{-}Moursy and
Fadi N. Sibai},
editor = {Geyong Min and
Jia Hu and
Lei (Chris) Liu and
Laurence Tianruo Yang and
Seetharami Seelam and
Laurent Lef{\`{e}}vre},
title = {V-Set Cache Design for {LLC} of Multi-core Processors},
booktitle = {14th {IEEE} International Conference on High Performance Computing
and Communication {\&} 9th {IEEE} International Conference on
Embedded Software and Systems, {HPCC-ICESS} 2012, Liverpool, United
Kingdom, June 25-27, 2012},
pages = {995--1000},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/HPCC.2012.145},
doi = {10.1109/HPCC.2012.145},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpcc/El-MoursyS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpec/WangA12,
author = {Dan Wang and
Murtaza Ali},
title = {Synthetic Aperture Radar on low power multi-core Digital Signal Processor},
booktitle = {{IEEE} Conference on High Performance Extreme Computing, {HPEC} 2012,
Waltham, MA, USA, September 10-12, 2012},
pages = {1--6},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/HPEC.2012.6408665},
doi = {10.1109/HPEC.2012.6408665},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpec/WangA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic3/Balakrishnan12,
author = {M. Balakrishnan},
editor = {Manish Parashar and
Dinesh K. Kaushik and
Omer F. Rana and
Ravi Samtaney and
Yuanyuan Yang and
Albert Y. Zomaya},
title = {Power Consumption in Multi-core Processors},
booktitle = {Contemporary Computing - 5th International Conference, {IC3} 2012,
Noida, India, August 6-8, 2012. Proceedings},
series = {Communications in Computer and Information Science},
volume = {306},
pages = {3},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-32129-0\_3},
doi = {10.1007/978-3-642-32129-0\_3},
timestamp = {Wed, 24 May 2017 08:31:09 +0200},
biburl = {https://dblp.org/rec/conf/ic3/Balakrishnan12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ica3pp/Takahashi12,
author = {Daisuke Takahashi},
editor = {Yang Xiang and
Ivan Stojmenovic and
Bernady O. Apduhan and
Guojun Wang and
Koji Nakano and
Albert Y. Zomaya},
title = {An Implementation of Parallel 2-D {FFT} Using Intel {AVX} Instructions
on Multi-core Processors},
booktitle = {Algorithms and Architectures for Parallel Processing - 12th International
Conference, {ICA3PP} 2012, Fukuoka, Japan, September 4-7, 2012, Proceedings,
Part {II}},
series = {Lecture Notes in Computer Science},
volume = {7440},
pages = {197--205},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-33065-0\_21},
doi = {10.1007/978-3-642-33065-0\_21},
timestamp = {Fri, 31 Jul 2020 08:38:55 +0200},
biburl = {https://dblp.org/rec/conf/ica3pp/Takahashi12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccsa/ChoiPLK12,
author = {Hong Jun Choi and
Young Jin Park and
Hsien{-}Hsin S. Lee and
Cheol Hong Kim},
editor = {Beniamino Murgante and
Osvaldo Gervasi and
Sanjay Misra and
Nadia Nedjah and
Ana Maria A. C. Rocha and
David Taniar and
Bernady O. Apduhan},
title = {Adaptive Dynamic Frequency Scaling for Thermal-Aware 3D Multi-core
Processors},
booktitle = {Computational Science and Its Applications - {ICCSA} 2012 - 12th International
Conference, Salvador de Bahia, Brazil, June 18-21, 2012, Proceedings,
Part {IV}},
series = {Lecture Notes in Computer Science},
volume = {7336},
pages = {602--612},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-31128-4\_44},
doi = {10.1007/978-3-642-31128-4\_44},
timestamp = {Wed, 01 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccsa/ChoiPLK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icdma/Tu12,
author = {Jih{-}Fu Tu},
title = {Communication Control for Multi-core Processors},
booktitle = {Third International Conference on Digital Manufacturing {\&} Automation,
{ICDMA} 2012, Guilin, China, July 31 - Aug. 2, 2012},
pages = {281--284},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ICDMA.2012.68},
doi = {10.1109/ICDMA.2012.68},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icdma/Tu12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/SatoFNSNYTHI12,
author = {Mikiko Sato and
Go Fukazawa and
Kiyohiko Nagamine and
Ryuichi Sakamoto and
Mitaro Namiki and
Kazumi Yoshinaga and
Yuichi Tsujita and
Atsushi Hori and
Yutaka Ishikawa},
editor = {Torsten Hoefler and
Kamil Iskra},
title = {A design of hybrid operating system for a parallel computer with multi-core
and many-core processors},
booktitle = {Proceedings of the 2nd International Workshop on Runtime and Operating
Systems for Supercomputers, {ROSS} '12, Venice, Italy, June 29, 2012},
pages = {9:1--9:8},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2318916.2318927},
doi = {10.1145/2318916.2318927},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ics/SatoFNSNYTHI12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/igarss/BernabePLS12,
author = {Sergio Bernab{\'{e}} and
Antonio Plaza and
Sebasti{\'{a}}n L{\'{o}}pez and
Roberto Sarmiento},
title = {Parallel implementation of a hyperspectral unmixing chain: Graphic
processing units versus multi-core processors},
booktitle = {2012 {IEEE} International Geoscience and Remote Sensing Symposium,
{IGARSS} 2012, Munich, Germany, July 22-27, 2012},
pages = {3463--3466},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/IGARSS.2012.6350675},
doi = {10.1109/IGARSS.2012.6350675},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/igarss/BernabePLS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/LopesRG12,
author = {Noel Lopes and
Bernardete Ribeiro and
Jo{\~{a}}o Gon{\c{c}}alves},
title = {Restricted Boltzmann Machines and Deep Belief Networks on multi-core
processors},
booktitle = {The 2012 International Joint Conference on Neural Networks (IJCNN),
Brisbane, Australia, June 10-15, 2012},
pages = {1--7},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/IJCNN.2012.6252431},
doi = {10.1109/IJCNN.2012.6252431},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/ijcnn/LopesRG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/PichelR12,
author = {Juan Carlos Pichel and
Francisco F. Rivera},
title = {Experiences with the Sparse Matrix-Vector Multiplication on a Many-core
Processor},
booktitle = {26th {IEEE} International Parallel and Distributed Processing Symposium
Workshops {\&} PhD Forum, {IPDPS} 2012, Shanghai, China, May 21-25,
2012},
pages = {7--15},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IPDPSW.2012.17},
doi = {10.1109/IPDPSW.2012.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/PichelR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YingYZQJYZ12,
author = {Yan Ying and
Kaidi You and
Liyang Zhou and
Heng Quan and
Ming{-}e Jing and
Zhiyi Yu and
Xiaoyang Zeng},
title = {A pure software ldpc decoder on a multi-core processor platform with
reduced inter-processor communication cost},
booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2012, Seoul, Korea (South), May 20-23, 2012},
pages = {2609--2612},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCAS.2012.6271839},
doi = {10.1109/ISCAS.2012.6271839},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YingYZQJYZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/YangLLCLCHCSYKCPPSKYCPH12,
author = {Se{-}Hyun Yang and
Seogjun Lee and
Jae Young Lee and
Jeonglae Cho and
Hoi{-}Jin Lee and
Dongsik Cho and
Junghun Heo and
Sunghoon Cho and
Youngmin Shin and
Sunghee Yun and
Euiseok Kim and
Ukrae Cho and
Edward Pyo and
Man Hyuk Park and
Jae{-}Cheol Son and
Chinhyun Kim and
Jeongnam Youn and
Youngki Chung and
Sungho Park and
Seung Ho Hwang},
title = {A 32nm high-k metal gate application processor with GHz multi-core
{CPU}},
booktitle = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2012, San Francisco, CA, USA, February 19-23, 2012},
pages = {214--216},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISSCC.2012.6176980},
doi = {10.1109/ISSCC.2012.6176980},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/YangLLCLCHCSYKCPPSKYCPH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/jtres/ZabelPS12,
author = {Martin Zabel and
Thomas B. Preu{\ss}er and
Rainer G. Spallek},
editor = {Martin Schoeberl and
Andy J. Wellings},
title = {Increasing the efficiency of an embedded multi-core bytecode processor
using an object cache},
booktitle = {The 10th International Workshop on Java Technologies for Real-time
and Embedded Systems, {JTRES} '12, Copenhagen, Denmark, October 24-26,
2012},
pages = {88--97},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2388936.2388952},
doi = {10.1145/2388936.2388952},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/jtres/ZabelPS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/KyleBFLT12,
author = {Stephen C. Kyle and
Igor B{\"{o}}hm and
Bj{\"{o}}rn Franke and
Hugh Leather and
Nigel P. Topham},
editor = {Reinhard Wilhelm and
Heiko Falk and
Wang Yi},
title = {Efficiently parallelizing instruction set simulation of embedded multi-core
processors using region-based just-in-time dynamic binary translation},
booktitle = {{SIGPLAN/SIGBED} Conference on Languages, Compilers and Tools for
Embedded Systems 2012, {LCTES} '12, Beijing, China - June 12 - 13,
2012},
pages = {21--30},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2248418.2248422},
doi = {10.1145/2248418.2248422},
timestamp = {Thu, 24 Jun 2021 16:19:30 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/KyleBFLT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mcsoc/0002GQ12,
author = {Zheng Zhou and
Junjun Gu and
Gang Qu},
title = {Scheduling for Multi-core Processor under Process and Temperature
Variation},
booktitle = {{IEEE} 6th International Symposium on Embedded Multicore/Manycore
SoCs, MCSoC 2012, Fukushima, Japan, September 20-22, 2012},
pages = {113--120},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/MCSoC.2012.9},
doi = {10.1109/MCSOC.2012.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mcsoc/0002GQ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/RaminiB12,
author = {Luca Ramini and
Davide Bertozzi},
editor = {Maurizio Palesi and
Terrence S. T. Mak},
title = {Power efficiency of wavelength-routed optical NoC topologies for global
connectivity of 3D multi-core processors},
booktitle = {Fifth International Workshop on Network on Chip Architectures, NoCArc
'12, Vancouver, BC, Canada, December 1, 2012},
pages = {25--30},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2401716.2401723},
doi = {10.1145/2401716.2401723},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/RaminiB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/msept/WallerH12,
author = {Jan Waller and
Wilhelm Hasselbring},
editor = {Victor Pankratius and
Michael Philippsen},
title = {A Comparison of the Influence of Different Multi-core Processors on
the Runtime Overhead for Application-Level Monitoring},
booktitle = {Multicore Software Engineering, Performance, and Tools - International
Conference, {MSEPT} 2012, Prague, Czech Republic, May 31 - June 1,
2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7303},
pages = {42--53},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-31202-1\_5},
doi = {10.1007/978-3-642-31202-1\_5},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/msept/WallerH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/RaminiBC12,
author = {Luca Ramini and
Davide Bertozzi and
Luca P. Carloni},
title = {Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-core
Processor with Awareness of Layout Constraints},
booktitle = {2012 Sixth {IEEE/ACM} International Symposium on Networks-on-Chip
(NoCS), Copenhagen, Denmark, 9-11 May, 2012},
pages = {185--192},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/NOCS.2012.29},
doi = {10.1109/NOCS.2012.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nocs/RaminiBC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/AlonsoDIMQ12,
author = {Pedro Alonso and
Manuel F. Dolz and
Francisco D. Igual and
Rafael Mayo and
Enrique S. Quintana{-}Ort{\'{\i}}},
editor = {Rainer Stotzka and
Michael Schiffers and
Yannis Cotronis},
title = {Saving Energy in the {LU} Factorization with Partial Pivoting on Multi-core
Processors},
booktitle = {Proceedings of the 20th Euromicro International Conference on Parallel,
Distributed and Network-Based Processing, {PDP} 2012, Munich, Germany,
February 15-17, 2012},
pages = {353--358},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/PDP.2012.28},
doi = {10.1109/PDP.2012.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdp/AlonsoDIMQ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/BaoX12,
author = {Bin Bao and
Xiaoya Xiang},
editor = {Lixin Zhang and
Onur Mutlu},
title = {Defensive loop tiling for multi-core processor},
booktitle = {Proceedings of the 2012 {ACM} {SIGPLAN} workshop on Memory Systems
Performance and Correctness: held in conjunction with {PLDI} '12,
Beijing, China, June 16, 2012},
pages = {76--77},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2247684.2247701},
doi = {10.1145/2247684.2247701},
timestamp = {Mon, 12 Jul 2021 15:34:15 +0200},
biburl = {https://dblp.org/rec/conf/pldi/BaoX12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/racs/Seo12,
author = {Dongyou Seo},
editor = {Yookun Cho and
Rex E. Gantenbein and
Tei{-}Wei Kuo and
Vahid Tarokh},
title = {A study of workload consolidation and power consumption on a multi-core
processor},
booktitle = {Research in Applied Computation Symposium, {RACS} '12, San Antonio,
TX, USA, October 23-26, 2012},
pages = {457--458},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2401603.2401702},
doi = {10.1145/2401603.2401702},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/racs/Seo12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/SilvaCB12,
author = {Bruno de Abreu Silva and
Lucas Albers Cuminato and
Vanderlei Bonato},
title = {Reducing the overall cache miss rate using different cache sizes for
Heterogeneous Multi-core Processors},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2012, Cancun, Mexico, December 5-7, 2012},
pages = {1--6},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ReConFig.2012.6416783},
doi = {10.1109/RECONFIG.2012.6416783},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/SilvaCB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/KandhaluLKR12,
author = {Arvind Kandhalu and
Karthik Lakshmanan and
Junsung Kim and
Ragunathan Rajkumar},
editor = {Marco Di Natale},
title = {pCOMPATS: Period-Compatible Task Allocation and Splitting on Multi-core
Processors},
booktitle = {2012 {IEEE} 18th Real Time and Embedded Technology and Applications
Symposium, Beijing, China, April 16-19, 2012},
pages = {307--316},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/RTAS.2012.18},
doi = {10.1109/RTAS.2012.18},
timestamp = {Wed, 31 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rtas/KandhaluLKR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/TongMNB12,
author = {Wei Tong and
Orlando Moreira and
Rick J. M. Nas and
Kees van Berkel},
editor = {Marco Di Natale},
title = {Hard-Real-Time Scheduling on a Weakly Programmable Multi-core Processor
with Application to Multi-standard Channel Decoding},
booktitle = {2012 {IEEE} 18th Real Time and Embedded Technology and Applications
Symposium, Beijing, China, April 16-19, 2012},
pages = {151--160},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/RTAS.2012.32},
doi = {10.1109/RTAS.2012.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/TongMNB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/safecomp/KastnerSPCGHF12,
author = {Daniel K{\"{a}}stner and
Marc Schlickling and
Markus Pister and
Christoph Cullmann and
Gernot Gebhard and
Reinhold Heckmann and
Christian Ferdinand},
editor = {Frank Ortmeier and
Peter Daniel},
title = {Meeting Real-Time Requirements with Multi-core Processors},
booktitle = {Computer Safety, Reliability, and Security - {SAFECOMP} 2012 Workshops:
Sassur, ASCoMS, DESEC4LCCI, ERCIM/EWICS, IWDE, Magdeburg, Germany,
September 25-28, 2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7613},
pages = {117--131},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-33675-1\_10},
doi = {10.1007/978-3-642-33675-1\_10},
timestamp = {Tue, 14 May 2019 10:00:44 +0200},
biburl = {https://dblp.org/rec/conf/safecomp/KastnerSPCGHF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/saicsit/TristramB12,
author = {Waide B. Tristram and
Karen L. Bradshaw},
editor = {Jan H. Kroeze and
Ruth de Villiers},
title = {Performance optimisation of sequential programs on multi-core processors},
booktitle = {2012 South African Institute of Computer Scientists and Information
Technologists Conference, {SAICSIT} '12, Pretoria, South Africa, October
1-3, 2012},
pages = {119--128},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2389836.2389851},
doi = {10.1145/2389836.2389851},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/saicsit/TristramB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/ChinMCF12,
author = {George Chin Jr. and
Andr{\`{e}}s M{\'{a}}rquez and
Sutanay Choudhury and
John Feo},
editor = {Jairo Panetta and
Jos{\'{e}} E. Moreira and
David A. Padua and
Philippe O. A. Navaux},
title = {Scalable Triadic Analysis of Large-Scale Graphs: Multi-core vs. Multi-processor
vs. Multi-threaded Shared Memory Architectures},
booktitle = {{IEEE} 24th International Symposium on Computer Architecture and High
Performance Computing, {SBAC-PAD} 2012, New York, NY, USA, October
24-26, 2012},
pages = {163--170},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/SBAC-PAD.2012.39},
doi = {10.1109/SBAC-PAD.2012.39},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbac-pad/ChinMCF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/snpd/ChenCCS12,
author = {Fuh{-}Gwo Chen and
Kuo{-}Yi Chen and
Jr{-}Shian Chen and
Chi{-}Chen Shui},
editor = {Teruhisa Hochin and
Roger Y. Lee},
title = {Smart Energy Management of Multi-threaded Java Applications on Multi-core
Processors},
booktitle = {13th {ACIS} International Conference on Software Engineering, Artificial
Intelligence, Networking and Parallel/Distributed Computing, {SNPD}
2012, Kyoto, Japan, August 8-10, 2012},
pages = {260--265},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/SNPD.2012.66},
doi = {10.1109/SNPD.2012.66},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/snpd/ChenCCS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vecpar/ToyokawaIKTN12,
author = {Hiroki Toyokawa and
Hiroyuki Ishigami and
Kinji Kimura and
Masami Takata and
Yoshimasa Nakamura},
editor = {Michel J. Dayd{\'{e}} and
Osni Marques and
Kengo Nakajima},
title = {Accelerating the Reorthogonalization of Singular Vectors with a Multi-core
Processor},
booktitle = {High Performance Computing for Computational Science - {VECPAR} 2012,
10th International Conference, Kobe, Japan, July 17-20, 2012, Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {7851},
pages = {379--390},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-38718-0\_35},
doi = {10.1007/978-3-642-38718-0\_35},
timestamp = {Tue, 14 May 2019 10:00:36 +0200},
biburl = {https://dblp.org/rec/conf/vecpar/ToyokawaIKTN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/LiaoW12,
author = {Chien{-}Hui Liao and
Hung{-}Pin Wen},
title = {Performance validation of dynamic-remapping-based task scheduling
on 3D multi-core processors},
booktitle = {Proceedings of Technical Program of 2012 {VLSI} Design, Automation
and Test, {VLSI-DAT} 2012, Hsinchu, Taiwan, April 23-25, 2012},
pages = {1--4},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/VLSI-DAT.2012.6212656},
doi = {10.1109/VLSI-DAT.2012.6212656},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/LiaoW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1205-2005,
author = {Mich{\`{e}}le Weiland and
Lawrence Mitchell and
Gerard Gorman and
Stephan Kramer and
Mark Parsons and
James Southern},
title = {Mixed-mode implementation of PETSc for scalable linear algebra on
multi-core processors},
journal = {CoRR},
volume = {abs/1205.2005},
year = {2012},
url = {http://arxiv.org/abs/1205.2005},
eprinttype = {arXiv},
eprint = {1205.2005},
timestamp = {Tue, 22 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1205-2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1209-6308,
author = {George Chin Jr. and
Andr{\`{e}}s M{\'{a}}rquez and
Sutanay Choudhury and
John Feo},
title = {Scalable Triadic Analysis of Large-Scale Graphs: Multi-Core vs. Multi-
Processor vs. Multi-Threaded Shared Memory Architectures},
journal = {CoRR},
volume = {abs/1209.6308},
year = {2012},
url = {http://arxiv.org/abs/1209.6308},
eprinttype = {arXiv},
eprint = {1209.6308},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1209-6308.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1210-4053,
author = {Avinatan Hassidim and
Haim Kaplan and
Omry Tuval},
title = {Joint Cache Partition and Job Assignment on Multi-Core Processors},
journal = {CoRR},
volume = {abs/1210.4053},
year = {2012},
url = {http://arxiv.org/abs/1210.4053},
eprinttype = {arXiv},
eprint = {1210.4053},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1210-4053.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Chen11e,
author = {Zhimin Chen},
title = {SCA-Resistant and High-Performance Embedded Cryptography Using Instruction
Set Extensions and Multi-Core Processors},
school = {Virginia Tech, Blacksburg, VA, {USA}},
year = {2011},
url = {https://hdl.handle.net/10919/51256},
timestamp = {Thu, 05 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Chen11e.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/PereiradeAzevedoFilho11,
author = {A. Pereira de Azevedo Filho},
title = {Efficient Execution of Video Applications on Heterogeneous Multi-
and Many-Core Processors},
school = {Delft University of Technology, Netherlands},
year = {2011},
url = {http://resolver.tudelft.nl/uuid:09179df1-7418-4b33-8a75-e0c557c6079c},
timestamp = {Tue, 18 Apr 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/PereiradeAzevedoFilho11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/de/Mankodiya2011,
author = {Kunal Mankodiya},
title = {A multimodal, wearable health monitor using a dual-core Smartphone
processor},
school = {University of L{\"{u}}beck},
year = {2011},
url = {http://www.students.informatik.uni-luebeck.de/zhb/ediss898.pdf},
urn = {urn:nbn:de:gbv:841-20101112466},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/de/Mankodiya2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/es/Paolieri11,
author = {Marco Paolieri},
title = {A Multi-core processor for hard real-time systems},
school = {Polytechnic University of Catalonia, Spain},
year = {2011},
url = {http://hdl.handle.net/10803/51578},
timestamp = {Fri, 11 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/es/Paolieri11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Athaide11,
author = {Keith Florence Athaide},
title = {The design of predictable multi-core processors which support time-triggered
software architectures},
school = {University of Leicester, {UK}},
year = {2011},
url = {https://hdl.handle.net/2381/29237},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/Athaide11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/TanLZZFV11,
author = {Kun Tan and
He Liu and
Jiansong Zhang and
Yongguang Zhang and
Ji Fang and
Geoffrey M. Voelker},
title = {Sora: high-performance software radio using general-purpose multi-core
processors},
journal = {Commun. {ACM}},
volume = {54},
number = {1},
pages = {99--107},
year = {2011},
url = {https://doi.org/10.1145/1866739.1866760},
doi = {10.1145/1866739.1866760},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cacm/TanLZZFV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cee/Musoll11,
author = {Enric Musoll},
title = {Variable-size mosaics: {A} process-variation aware technique to increase
the performance of tile-based, massive multi-core processors},
journal = {Comput. Electr. Eng.},
volume = {37},
number = {6},
pages = {1193--1211},
year = {2011},
url = {https://doi.org/10.1016/j.compeleceng.2011.05.012},
doi = {10.1016/J.COMPELECENG.2011.05.012},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cee/Musoll11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/csse/WolfGKUMMRCSU11,
author = {Julian Wolf and
Mike Gerdes and
Florian Kluge and
Sascha Uhrig and
J{\"{o}}rg Mische and
Stefan Metzlaff and
Christine Rochange and
Hugues Cass{\'{e}} and
Pascal Sainrat and
Theo Ungerer},
title = {{RTOS} support for execution of parallelized hard real-time tasks
on the {MERASA} multi-core processor},
journal = {Comput. Syst. Sci. Eng.},
volume = {26},
number = {6},
year = {2011},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/csse/WolfGKUMMRCSU11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/HiranoO11,
author = {Masaki Hirano and
Shinichiro Ohnuki},
title = {Fast computation for electromagnetic scattering problems using a heterogeneous
multi-core processor},
journal = {{IEICE} Electron. Express},
volume = {8},
number = {16},
pages = {1330--1336},
year = {2011},
url = {https://doi.org/10.1587/elex.8.1330},
doi = {10.1587/ELEX.8.1330},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/HiranoO11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/LeeK11a,
author = {Wan Yeon Lee and
Kyong Hoon Kim},
title = {Energy-Saving Stochastic Scheduling of a Real-Time Parallel Task with
Varying Computation Amount on Multi-Core Processors},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {94-A},
number = {2},
pages = {842--845},
year = {2011},
url = {https://doi.org/10.1587/transfun.E94.A.842},
doi = {10.1587/TRANSFUN.E94.A.842},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/LeeK11a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/LeeKL11a,
author = {Wan Yeon Lee and
Hyogon Kim and
Heejo Lee},
title = {Minimum-Energy Semi-Static Scheduling of a Periodic Real-Time Task
on DVFS-Enabled Multi-Core Processors},
journal = {{IEICE} Trans. Inf. Syst.},
volume = {94-D},
number = {12},
pages = {2389--2392},
year = {2011},
url = {https://doi.org/10.1587/transinf.E94.D.2389},
doi = {10.1587/TRANSINF.E94.D.2389},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/LeeKL11a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/MiyamotoS11,
author = {Ryusuke Miyamoto and
Hiroki Sugano},
title = {Parallel Implementation Strategy for CoHOG-Based Pedestrian Detection
Using a Multi-Core Processor},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {94-A},
number = {11},
pages = {2315--2322},
year = {2011},
url = {https://doi.org/10.1587/transfun.E94.A.2315},
doi = {10.1587/TRANSFUN.E94.A.2315},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/MiyamotoS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/WeyLTS11,
author = {Chin{-}Long Wey and
Shin{-}Yo Lin and
Pei{-}Yun Tsai and
Ming{-}Der Shieh},
title = {Reconfigurable Homogenous Multi-Core {FFT} Processor Architectures
for Hybrid {SISO/MIMO} {OFDM} Wireless Communications},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {94-A},
number = {7},
pages = {1530--1539},
year = {2011},
url = {https://doi.org/10.1587/transfun.E94.A.1530},
doi = {10.1587/TRANSFUN.E94.A.1530},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/WeyLTS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/JooyaBA11,
author = {A. Zolfaghari Jooya and
Amirali Baniasadi and
M. Analoui},
title = {History-aware, resource-based dynamic scheduling for heterogeneous
multi-core processors},
journal = {{IET} Comput. Digit. Tech.},
volume = {5},
number = {4},
pages = {254--262},
year = {2011},
url = {https://doi.org/10.1049/iet-cdt.2009.0045},
doi = {10.1049/IET-CDT.2009.0045},
timestamp = {Wed, 04 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/JooyaBA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcse/YanZ11,
author = {Jun Yan and
Wei Zhang},
title = {Bounding Worst-Case Performance for Multi-Core Processors with Shared
{L2} Instruction Caches},
journal = {J. Comput. Sci. Eng.},
volume = {5},
number = {1},
pages = {1--18},
year = {2011},
url = {https://doi.org/10.5626/JCSE.2011.5.1.001},
doi = {10.5626/JCSE.2011.5.1.001},
timestamp = {Thu, 27 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcse/YanZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcse/YanZ11b,
author = {Jun Yan and
Wei Zhang},
title = {An Interference Matrix Based Approach to Bounding Worst-Case Inter-Thread
Cache Interferences and {WCET} for Multi-Core Processors},
journal = {J. Comput. Sci. Eng.},
volume = {5},
number = {2},
pages = {131--140},
year = {2011},
url = {https://doi.org/10.5626/JCSE.2011.5.2.131},
doi = {10.5626/JCSE.2011.5.2.131},
timestamp = {Thu, 27 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcse/YanZ11b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcst/ZhengDOJGM11,
author = {Long Zheng and
Mianxiong Dong and
Kaoru Ota and
Hai Jin and
Song Guo and
Jun Ma},
title = {Energy Efficiency of a Multi-Core Processor by Tag Reduction},
journal = {J. Comput. Sci. Technol.},
volume = {26},
number = {3},
pages = {491--503},
year = {2011},
url = {https://doi.org/10.1007/s11390-011-1149-0},
doi = {10.1007/S11390-011-1149-0},
timestamp = {Fri, 06 Jul 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcst/ZhengDOJGM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/QianHYC11,
author = {Hanhua Qian and
Xiwei Huang and
Hao Yu and
Chip{-}Hong Chang},
title = {Cyber-Physical Thermal Management of 3D Multi-Core Cache-Processor
System with Microfluidic Cooling},
journal = {J. Low Power Electron.},
volume = {7},
number = {1},
pages = {110--121},
year = {2011},
url = {https://doi.org/10.1166/jolpe.2011.1121},
doi = {10.1166/JOLPE.2011.1121},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/QianHYC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WendelKWCCCDHFIKLMPPRSSSTNWWZ11,
author = {Dieter F. Wendel and
Ronald N. Kalla and
James D. Warnock and
Robert Cargnoni and
Sam G. Chu and
Joachim G. Clabes and
Daniel Dreps and
David Hrusecky and
Joshua Friedrich and
Md. Saiful Islam and
James A. Kahle and
Jens Leenstra and
Gaurav Mittal and
Jose Paredes and
Juergen Pille and
Phillip J. Restle and
Balaram Sinharoy and
George Smith and
William J. Starke and
Scott A. Taylor and
James Van Norstrand and
Stephen Weitzel and
Phillip G. Williams and
Victor V. Zyuban},
title = {POWER7{\texttrademark}, a Highly Parallel, Scalable Multi-Core High
End Server Processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {1},
pages = {145--161},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2010.2080611},
doi = {10.1109/JSSC.2010.2080611},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/WendelKWCCCDHFIKLMPPRSSSTNWWZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsw/ChenCLJ11,
author = {Xiaowen Chen and
Shuming Chen and
Zhonghai Lu and
Axel Jantsch},
title = {Hybrid Distributed Shared Memory Space in Multi-core Processors},
journal = {J. Softw.},
volume = {6},
number = {12},
pages = {2369--2378},
year = {2011},
url = {https://doi.org/10.4304/jsw.6.12.2369-2378},
doi = {10.4304/JSW.6.12.2369-2378},
timestamp = {Tue, 15 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsw/ChenCLJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mta/HuangC11,
author = {Yung{-}Sung Huang and
Bin{-}Chang Chieu},
title = {Architecture for video coding on a processor with an {ARM} and {DSP}
cores},
journal = {Multim. Tools Appl.},
volume = {54},
number = {2},
pages = {527--543},
year = {2011},
url = {https://doi.org/10.1007/s11042-010-0550-y},
doi = {10.1007/S11042-010-0550-Y},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mta/HuangC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/VarogluJ11,
author = {Sevin Varoglu and
Stephen F. Jenks},
title = {Architectural support for thread communications in multi-core processors},
journal = {Parallel Comput.},
volume = {37},
number = {1},
pages = {26--41},
year = {2011},
url = {https://doi.org/10.1016/j.parco.2010.08.006},
doi = {10.1016/J.PARCO.2010.08.006},
timestamp = {Sun, 05 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pc/VarogluJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/KimPR11,
author = {Deokho Kim and
Karam Park and
Won Woo Ro},
title = {Network Coding on Heterogeneous Multi-Core Processors for Wireless
Sensor Networks},
journal = {Sensors},
volume = {11},
number = {8},
pages = {7908--7933},
year = {2011},
url = {https://doi.org/10.3390/s110807908},
doi = {10.3390/S110807908},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/sensors/KimPR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RoyRK11,
author = {Soumyaroop Roy and
Nagarajan Ranganathan and
Srinivas Katkoori},
title = {State-Retentive Power Gating of Register Files in Multicore Processors
Featuring Multithreaded In-Order Cores},
journal = {{IEEE} Trans. Computers},
volume = {60},
number = {11},
pages = {1547--1560},
year = {2011},
url = {https://doi.org/10.1109/TC.2010.249},
doi = {10.1109/TC.2010.249},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/RoyRK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DregoCBS11,
author = {Nigel Drego and
Anantha P. Chandrakasan and
Duane S. Boning and
Devavrat Shah},
title = {Reduction of Variation-Induced Energy Overhead in Multi-Core Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {30},
number = {6},
pages = {891--904},
year = {2011},
url = {https://doi.org/10.1109/TCAD.2010.2102431},
doi = {10.1109/TCAD.2010.2102431},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DregoCBS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HanumaiahVC11,
author = {Vinay Hanumaiah and
Sarma B. K. Vrudhula and
Karam S. Chatha},
title = {Performance Optimal Online {DVFS} and Task Migration Techniques for
Thermally Constrained Multi-Core Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {30},
number = {11},
pages = {1677--1690},
year = {2011},
url = {https://doi.org/10.1109/TCAD.2011.2161308},
doi = {10.1109/TCAD.2011.2161308},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HanumaiahVC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tods/KimCSSNKLBD11,
author = {Changkyu Kim and
Jatin Chhugani and
Nadathur Satish and
Eric Sedlar and
Anthony D. Nguyen and
Tim Kaldewey and
Victor W. Lee and
Scott A. Brandt and
Pradeep Dubey},
title = {Designing fast architecture-sensitive tree search on modern multicore/many-core
processors},
journal = {{ACM} Trans. Database Syst.},
volume = {36},
number = {4},
pages = {22:1--22:34},
year = {2011},
url = {https://doi.org/10.1145/2043652.2043655},
doi = {10.1145/2043652.2043655},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tods/KimCSSNKLBD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ChangLWLCW11,
author = {David Chih{-}Wei Chang and
Tay{-}Jyi Lin and
Chung{-}Ju Wu and
Jenq Kuen Lee and
Yuan{-}Hua Chu and
An{-}Yeu Wu},
title = {Parallel Architecture Core {(PAC)} - the First Multicore Application
Processor SoC in Taiwan Part {I:} Hardware Architecture {\&} Software
Development Tools},
journal = {J. Signal Process. Syst.},
volume = {62},
number = {3},
pages = {373--382},
year = {2011},
url = {https://doi.org/10.1007/s11265-010-0470-0},
doi = {10.1007/S11265-010-0470-0},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/ChangLWLCW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ChenLYTSW11,
author = {Jia{-}Ming Chen and
Chun{-}Nan Liu and
Jen{-}Kuei Yang and
Shau{-}Yin Tseng and
Wei{-}Kuan Shih and
An{-}Yeu Wu},
title = {Parallel Architecture Core {(PAC)} - the First Multicore Application
Processor SoC in Taiwan Part {II:} Application Programming},
journal = {J. Signal Process. Syst.},
volume = {62},
number = {3},
pages = {383--402},
year = {2011},
url = {https://doi.org/10.1007/s11265-010-0471-z},
doi = {10.1007/S11265-010-0471-Z},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/ChenLYTSW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/HanadaSIM11,
author = {Takaaki Hanada and
Hiroshi Sasaki and
Koji Inoue and
Kazuaki J. Murakami},
editor = {Mitsumasa Koyanagi and
Morihiro Kada},
title = {Performance evaluation of 3D stacked multi-core processors with temperature
consideration},
booktitle = {2011 {IEEE} International 3D Systems Integration Conference (3DIC),
Osaka, Japan, January 31 - February 2, 2012},
pages = {1--5},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/3DIC.2012.6263025},
doi = {10.1109/3DIC.2012.6263025},
timestamp = {Fri, 17 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/3dic/HanadaSIM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEares/DidehbanSSC11,
author = {Moslem Didehban and
Ario Sadafi and
Sajjad Salehi and
Mohammad Bagher Chami},
title = {A Gate Level Analysis of Transient Faults Effects on Dual-Core Chip-Multi
Processors},
booktitle = {Sixth International Conference on Availability, Reliability and Security,
{ARES} 2011, Vienna, Austria, August 22-26, 2011},
pages = {365--370},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ARES.2011.61},
doi = {10.1109/ARES.2011.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEares/DidehbanSSC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/YamamotoN11,
author = {Shu Yamamoto and
Akihiro Nakao},
title = {Fast Path Performance of Packet Cache Router Using Multi-core Network
Processor},
booktitle = {2011 {ACM/IEEE} Symposium on Architectures for Networking and Communications
Systems (ANCS), Brooklyn, NY, USA, October 3-4, 2011},
pages = {89--90},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ANCS.2011.22},
doi = {10.1109/ANCS.2011.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ancs/YamamotoN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/BiedermannSCH11,
author = {Alexander Biedermann and
Marc St{\"{o}}ttinger and
Lijing Chen and
Sorin A. Huss},
editor = {Andreas Koch and
Ram Krishnamurthy and
John McAllister and
Roger F. Woods and
Tarek A. El{-}Ghazawi},
title = {Secure Virtualization within a Multi-processor Soft-Core System-on-Chip
Architecture},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
7th International Symposium, {ARC} 2011, Belfast, UK, March 23-25,
2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6578},
pages = {385--396},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-19475-7\_40},
doi = {10.1007/978-3-642-19475-7\_40},
timestamp = {Fri, 25 Feb 2022 16:33:50 +0100},
biburl = {https://dblp.org/rec/conf/arc/BiedermannSCH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/GrandBGGD11,
author = {Michael Grand and
Lilian Bossuet and
Bertrand Le Gal and
Guy Gogniat and
Dominique Dallet},
editor = {Andreas Koch and
Ram Krishnamurthy and
John McAllister and
Roger F. Woods and
Tarek A. El{-}Ghazawi},
title = {Design and Implementation of a Multi-Core Crypto-Processor for Software
Defined Radios},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
7th International Symposium, {ARC} 2011, Belfast, UK, March 23-25,
2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6578},
pages = {29--40},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-19475-7\_5},
doi = {10.1007/978-3-642-19475-7\_5},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/GrandBGGD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/TheodoropoulosKG11,
author = {Dimitris Theodoropoulos and
Georgi Kuzmanov and
Georgi Gaydadjiev},
editor = {Andreas Koch and
Ram Krishnamurthy and
John McAllister and
Roger F. Woods and
Tarek A. El{-}Ghazawi},
title = {A Reconfigurable Audio Beamforming Multi-Core Processor},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications -
7th International Symposium, {ARC} 2011, Belfast, UK, March 23-25,
2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6578},
pages = {3--15},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-19475-7\_3},
doi = {10.1007/978-3-642-19475-7\_3},
timestamp = {Thu, 01 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/TheodoropoulosKG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BaiSK11,
author = {Ke Bai and
Aviral Shrivastava and
Saleel Kudchadker},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Stack data management for Limited Local Memory {(LLM)} multi-core
processors},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {231--234},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043275},
doi = {10.1109/ASAP.2011.6043275},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BaiSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/HeZFYZ11,
author = {Maofei He and
Jiajie Zhang and
Wenhua Fan and
Zhiyi Yu and
Xiaoyang Zeng},
title = {A channel estimator for {LTE} downlink mapped on a multi-core processor
platform},
booktitle = {2011 {IEEE} 9th International Conference on ASIC, {ASICON} 2011, Xiamen,
China, October 25-28, 2011},
pages = {204--207},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASICON.2011.6157157},
doi = {10.1109/ASICON.2011.6157157},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/asicon/HeZFYZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/NakajimaKSCL11,
author = {Tatsuo Nakajima and
Yuki Kinebuchi and
Hiromasa Shimada and
Alexandre Courbot and
Tsung{-}Han Lin},
title = {Temporal and spatial isolation in a virtualization layer for multi-core
processor based information appliances},
booktitle = {Proceedings of the 16th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2011, Yokohama, Japan, January 25-27, 2011},
pages = {645--652},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASPDAC.2011.5722268},
doi = {10.1109/ASPDAC.2011.5722268},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/NakajimaKSCL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/KamruzzamanST11,
author = {Md. Kamruzzaman and
Steven Swanson and
Dean M. Tullsen},
editor = {Rajiv Gupta and
Todd C. Mowry},
title = {Inter-core prefetching for multicore processors using migrating helper
threads},
booktitle = {Proceedings of the 16th International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2011, Newport Beach, CA, USA, March 5-11, 2011},
pages = {393--404},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1950365.1950411},
doi = {10.1145/1950365.1950411},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/KamruzzamanST11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ChangCLLCC11,
author = {Chia{-}Ming Chang and
Yu{-}Jung Chen and
Yen{-}Chang Lu and
Chun{-}Yi Lin and
Liang{-}Gee Chen and
Shao{-}Yi Chien},
title = {A 172.6mW 43.8GFLOPS energy-efficient scalable eight-core 3D graphics
processor for mobile multimedia applications},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2011, Jeju,
South Korea, November 14-16, 2011},
pages = {405--408},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASSCC.2011.6123602},
doi = {10.1109/ASSCC.2011.6123602},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ChangCLLCC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/YuffeVSKK11,
author = {Marcelo Yuffe and
Omer Vikinski and
Ziv Shmuely and
Ernest Knoll and
Tsvika Kurts},
title = {The Second Generation Intel{\textregistered} Core{\texttrademark}:
{A} highly integrated high performance multi IA-core and processor
graphics chip},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2011, Jeju,
South Korea, November 14-16, 2011},
pages = {13--16},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASSCC.2011.6123652},
doi = {10.1109/ASSCC.2011.6123652},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/YuffeVSKK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cascon/DehneZ11,
author = {Frank Dehne and
Hamidreza Zaboli},
editor = {Joanna W. Ng and
Christian Couturier and
Marin Litoiu and
Eleni Stroulia},
title = {Parallel data cubes on multi-core processors with multiple disks},
booktitle = {Center for Advanced Studies on Collaborative Research, {CASCON} '11,
Toronto, ON, Canada, November 7-10, 2011},
pages = {99--106},
publisher = {{IBM} / {ACM}},
year = {2011},
url = {http://dl.acm.org/citation.cfm?id=2093901},
timestamp = {Fri, 30 Nov 2018 02:24:54 +0100},
biburl = {https://dblp.org/rec/conf/cascon/DehneZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BaiLS11,
author = {Ke Bai and
Di Lu and
Aviral Shrivastava},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Vector class on limited local memory {(LLM)} multi-core processors},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {215--224},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038731},
doi = {10.1145/2038698.2038731},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BaiLS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/AhmedSBH11,
author = {Waheed Ahmed and
Muhammad Shafique and
Lars Bauer and
J{\"{o}}rg Henkel},
editor = {Robert P. Dick and
Jan Madsen},
title = {Adaptive resource management for simultaneous multitasking in mixed-grained
reconfigurable multi-core processors},
booktitle = {Proceedings of the 9th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2011, part of ESWeek '11
Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011},
pages = {365--374},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2039370.2039426},
doi = {10.1145/2039370.2039426},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/AhmedSBH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/BournoutianO11,
author = {Garo Bournoutian and
Alex Orailoglu},
editor = {Robert P. Dick and
Jan Madsen},
title = {Dynamic, multi-core cache coherence architecture for power-sensitive
mobile processors},
booktitle = {Proceedings of the 9th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2011, part of ESWeek '11
Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011},
pages = {89--98},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2039370.2039387},
doi = {10.1145/2039370.2039387},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/BournoutianO11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/coolchips/YamadaYSIHAFPU11,
author = {Hideki Yamada and
Toshiyuki Yamagishi and
Tomoya Suzuki and
Kuniaki Ito and
Koji Horisaki and
Tom Vander Aa and
Toshio Fujisawa and
Liesbet Van der Perre and
Yasuo Unekawa},
title = {A multimodal wireless baseband core using a coarse-grained dynamic
reconfigurable processor},
booktitle = {2011 {IEEE} Symposium on Low-Power and High-Speed Chips, Cool Chips
XIV, Yokohama, Japan, 20-22 April, 2011},
pages = {1--3},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/COOLCHIPS.2011.5890930},
doi = {10.1109/COOLCHIPS.2011.5890930},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/coolchips/YamadaYSIHAFPU11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cse/TranHLL11,
author = {Nhat{-}Phuong Tran and
Sugwon Hong and
Myungho Lee and
Seung{-}Jae Lee},
editor = {Wenyu Qu and
Kai Lin and
Yanming Shen and
Weisong Shi and
D. Frank Hsu and
Xiaolong Jin and
Francis C. M. Lau and
Junfeng Xu},
title = {Performance Enhancement of Network Devices with Multi-Core Processors},
booktitle = {14th {IEEE} International Conference on Computational Science and
Engineering, {CSE} 2011, Dalian, China, August 24-26, 2011},
pages = {279--284},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/CSE.2011.57},
doi = {10.1109/CSE.2011.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cse/TranHLL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HanumaiahV11,
author = {Vinay Hanumaiah and
Sarma B. K. Vrudhula},
title = {Reliability-aware thermal management for hard real-time applications
on multi-core processors},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {137--142},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763032},
doi = {10.1109/DATE.2011.5763032},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HanumaiahV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LungHKC11,
author = {Chiao{-}Ling Lung and
Yi{-}Lun Ho and
Ding{-}Ming Kwai and
Shih{-}Chieh Chang},
title = {Thermal-aware on-line task allocation for 3D multi-core processor
throughput optimization},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {8--13},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763008},
doi = {10.1109/DATE.2011.5763008},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/LungHKC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ShafiqueBAH11,
author = {Muhammad Shafique and
Lars Bauer and
Waheed Ahmed and
J{\"{o}}rg Henkel},
title = {Minority-Game-based resource allocation for run-time reconfigurable
multi-core processors},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {1261--1266},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763202},
doi = {10.1109/DATE.2011.5763202},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ShafiqueBAH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/AhmedSBHHB11,
author = {Waheed Ahmed and
Muhammad Shafique and
Lars Bauer and
Manuel Hammerich and
J{\"{o}}rg Henkel and
J{\"{u}}rgen Becker},
editor = {Paul Chow and
Michael J. Wirthlin},
title = {Run-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core
Reconfigurable Processors},
booktitle = {{IEEE} 19th Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2011, Salt Lake City, Utah, USA, 1-3 May
2011},
pages = {29--32},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/FCCM.2011.46},
doi = {10.1109/FCCM.2011.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/AhmedSBHHB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/TheoharoulisABA11,
author = {Kostas Theoharoulis and
Charalambos Antoniadis and
Nikolaos Bellas and
Christos D. Antonopoulos},
editor = {Paul Chow and
Michael J. Wirthlin},
title = {Implementation and Performance Analysis of {SEAL} Encryption on FPGA,
{GPU} and Multi-core Processors},
booktitle = {{IEEE} 19th Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2011, Salt Lake City, Utah, USA, 1-3 May
2011},
pages = {65--68},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/FCCM.2011.33},
doi = {10.1109/FCCM.2011.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/TheoharoulisABA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fgit/AhnSJKK11,
author = {Jin Woo Ahn and
Dong Oh Son and
Hyung Gyu Jeon and
Jong{-}Myon Kim and
Cheol Hong Kim},
editor = {Tai{-}Hoon Kim and
Hojjat Adeli and
Adrian Stoica and
Byeong Ho Kang},
title = {Complexity Adaptive Branch Predictor for Thermal-Aware 3D Multi-core
Processors},
booktitle = {Control and Automation, and Energy System Engineering - International
Conferences, {CA} and {CES3} 2011, Held as Part of the Future Generation
Information Technology Conference, {FGIT} 2011, in Conjunction with
{GDC} 2011, Jeju Island, Korea, December 8-10, 2011. Proceedings},
series = {Communications in Computer and Information Science},
volume = {256},
pages = {333--343},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-26010-0\_41},
doi = {10.1007/978-3-642-26010-0\_41},
timestamp = {Mon, 04 Nov 2019 12:36:13 +0100},
biburl = {https://dblp.org/rec/conf/fgit/AhnSJKK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fit/KhatoonMA11,
author = {Hasina Khatoon and
Shahid H. Mirza and
Talat Altaf},
title = {Operating System-Aware Cache Optimization Techniques for Multi Core
Processors},
booktitle = {2011 Frontiers of Information Technology, {FIT} 2011, Islamabad, Pakistan,
December 19-21, 2011},
pages = {99--105},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/FIT.2011.26},
doi = {10.1109/FIT.2011.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fit/KhatoonMA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gecco/SatoSN11,
author = {Mikiko Sato and
Yuji Sato and
Mitaro Namiki},
editor = {Natalio Krasnogor and
Pier Luca Lanzi},
title = {Acceleration experiment of genetic computations for sudoku solution
on multi-core processors},
booktitle = {13th Annual Genetic and Evolutionary Computation Conference, {GECCO}
2011, Companion Material Proceedings, Dublin, Ireland, July 12-16,
2011},
pages = {823--824},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2001858.2002107},
doi = {10.1145/2001858.2002107},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/gecco/SatoSN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gecco/TagawaSN11,
author = {Kiyoharu Tagawa and
Hidehito Shimizu and
Hiroyuki Nakamura},
editor = {Natalio Krasnogor and
Pier Luca Lanzi},
title = {Indicator-based differential evolution using exclusive hypervolume
approximation and parallelization for multi-core processors},
booktitle = {13th Annual Genetic and Evolutionary Computation Conference, {GECCO}
2011, Proceedings, Dublin, Ireland, July 12-16, 2011},
pages = {657--664},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2001576.2001667},
doi = {10.1145/2001576.2001667},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/gecco/TagawaSN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/SheikhA11,
author = {Hafiz Fahad Sheikh and
Ishfaq Ahmad},
title = {Fast algorithms for thermal constrained performance optimization in
{DAG} scheduling on multi-core processors},
booktitle = {2011 International Green Computing Conference and Workshops, {IGCC}
2012, Orlando, FL, USA, July 25-28, 2011},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/IGCC.2011.6008554},
doi = {10.1109/IGCC.2011.6008554},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/green/SheikhA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/MadanBBA11,
author = {Niti Madan and
Alper Buyuktosunoglu and
Pradip Bose and
Murali Annavaram},
title = {A case for guarded power gating for multi-core processors},
booktitle = {17th International Conference on High-Performance Computer Architecture
{(HPCA-17} 2011), February 12-16 2011, San Antonio, Texas, {USA}},
pages = {291--300},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/HPCA.2011.5749737},
doi = {10.1109/HPCA.2011.5749737},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/MadanBBA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/OlaruAT11,
author = {Vlad Olaru and
Mugurel Ionut Andreica and
Nicolae Tapus},
editor = {Parimala Thulasiraman and
Laurence Tianruo Yang and
Qiwen Pan and
Xingang Liu and
Yaw{-}Chung Chen and
Yo{-}Ping Huang and
Lin{-}Huang Chang and
Che{-}Lun Hung and
Che{-}Rung Lee and
Justin Y. Shi and
Ying Zhang},
title = {Using the Stream Control Transmission Protocol and Multi-core Processors
to Improve the Performance of Web Servers},
booktitle = {13th {IEEE} International Conference on High Performance Computing
{\&} Communication, {HPCC} 2011, Banff, Alberta, Canada, September
2-4, 2011},
pages = {135--144},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/HPCC.2011.27},
doi = {10.1109/HPCC.2011.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpcc/OlaruAT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/OlaruHS11,
author = {Vlad Olaru and
Anca Hangan and
Gheorghe Sebestyen{-}Pal},
editor = {Parimala Thulasiraman and
Laurence Tianruo Yang and
Qiwen Pan and
Xingang Liu and
Yaw{-}Chung Chen and
Yo{-}Ping Huang and
Lin{-}Huang Chang and
Che{-}Lun Hung and
Che{-}Rung Lee and
Justin Y. Shi and
Ying Zhang},
title = {Java Support Packages and Benchmarks for Multi-core Processors},
booktitle = {13th {IEEE} International Conference on High Performance Computing
{\&} Communication, {HPCC} 2011, Banff, Alberta, Canada, September
2-4, 2011},
pages = {528--535},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/HPCC.2011.75},
doi = {10.1109/HPCC.2011.75},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/OlaruHS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic-nc/WangSKL11,
author = {Jian Wang and
Joar Sohl and
Andreas Karlsson and
Dake Liu},
title = {An Efficient Streaming Star Network for Multi-core Parallel {DSP}
Processor},
booktitle = {Second International Conference on Networking and Computing, {ICNC}
2011, November 30 - December 2, 2011, Osaka, Japan},
pages = {332--336},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICNC.2011.64},
doi = {10.1109/ICNC.2011.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ic-nc/WangSKL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/XieL11,
author = {Yuejian Xie and
Gabriel H. Loh},
title = {Thread-aware dynamic shared cache compression in multi-core processors},
booktitle = {{IEEE} 29th International Conference on Computer Design, {ICCD} 2011,
Amherst, MA, USA, October 9-12, 2011},
pages = {135--141},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICCD.2011.6081388},
doi = {10.1109/ICCD.2011.6081388},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/XieL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccsa/RabaS11,
author = {Nikita Raba and
Elena N. Stankova},
editor = {Beniamino Murgante and
Osvaldo Gervasi and
Andr{\'{e}}s Iglesias and
David Taniar and
Bernady O. Apduhan},
title = {On the Problem of Numerical Modeling of Dangerous Convective Phenomena:
Possibilities of Real-Time Forecast with the Help of Multi-core Processors},
booktitle = {Computational Science and Its Applications - {ICCSA} 2011 - International
Conference, Santander, Spain, June 20-23, 2011. Proceedings, Part
{V}},
series = {Lecture Notes in Computer Science},
volume = {6786},
pages = {633--642},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-21934-4\_51},
doi = {10.1007/978-3-642-21934-4\_51},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccsa/RabaS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccsa/SonPAPKK11,
author = {Dong Oh Son and
Young Jin Park and
Jin Woo Ahn and
Jaehyung Park and
Jong{-}Myon Kim and
Cheol Hong Kim},
editor = {Beniamino Murgante and
Osvaldo Gervasi and
Andr{\'{e}}s Iglesias and
David Taniar and
Bernady O. Apduhan},
title = {Thermal-Aware Floorplan Schemes for Reliable 3D Multi-core Processors},
booktitle = {Computational Science and Its Applications - {ICCSA} 2011 - International
Conference, Santander, Spain, June 20-23, 2011. Proceedings, Part
{II}},
series = {Lecture Notes in Computer Science},
volume = {6783},
pages = {463--474},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-21887-3\_36},
doi = {10.1007/978-3-642-21887-3\_36},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/iccsa/SonPAPKK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmc/ColmenaresSBAPA11,
author = {Juan A. Colmenares and
Ian Saxton and
Eric Battenberg and
Rimas Avizienis and
Nils Peters and
Krste Asanovic and
John Kubiatowicz and
David Wessel},
title = {Real-time Musical Applications on an Experimental Operating System
for Multi-Core Processors},
booktitle = {Proceedings of the 2011 International Computer Music Conference, {ICMC}
2011, Huddersfield, UK, July 31 - August 5, 2011},
publisher = {Michigan Publishing},
year = {2011},
url = {https://hdl.handle.net/2027/spo.bbp2372.2011.044},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icmc/ColmenaresSBAPA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icppw/HerrmannJW11,
author = {Edward C. Herrmann and
Prudhvi Janga and
Philip A. Wilsey},
editor = {Jang{-}Ping Sheu and
Cho{-}Li Wang},
title = {Pre-computing Function Results in Multi-Core and Many-Core Processors},
booktitle = {2011 International Conference on Parallel Processing Workshops, {ICPPW}
2011, Taipei, Taiwan, Sept. 13-16, 2011},
pages = {437--446},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICPPW.2011.46},
doi = {10.1109/ICPPW.2011.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icppw/HerrmannJW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeehpcs/AlonsoDMQ11,
author = {Pedro Alonso and
Manuel F. Dolz and
Rafael Mayo and
Enrique S. Quintana{-}Ort{\'{\i}}},
editor = {Waleed W. Smari and
John P. McIntire},
title = {Improving power efficiency of dense linear algebra algorithms on multi-core
processors via slack control},
booktitle = {2011 International Conference on High Performance Computing {\&}
Simulation, {HPCS} 2012, Istanbul, Turkey, July 4-8, 2011},
pages = {463--470},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/HPCSim.2011.5999861},
doi = {10.1109/HPCSIM.2011.5999861},
timestamp = {Thu, 24 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ieeehpcs/AlonsoDMQ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeehpcs/ParedesVASC11,
author = {Roberto Uribe Paredes and
Pedro Valero{-}Lara and
Enrique Arias and
Jos{\'{e}} L. S{\'{a}}nchez and
Diego Cazorla},
editor = {Waleed W. Smari and
John P. McIntire},
title = {Similarity search implementations for multi-core and many-core processors},
booktitle = {2011 International Conference on High Performance Computing {\&}
Simulation, {HPCS} 2012, Istanbul, Turkey, July 4-8, 2011},
pages = {656--663},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/HPCSim.2011.5999889},
doi = {10.1109/HPCSIM.2011.5999889},
timestamp = {Fri, 30 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ieeehpcs/ParedesVASC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/CastilloDFMQR11,
author = {Maribel Castillo and
Manuel F. Dolz and
Juan Carlos Fern{\'{a}}ndez and
Rafael Mayo and
Enrique S. Quintana{-}Ort{\'{\i}} and
Vicente Roca},
title = {Evaluation of the Energy Performance of Dense Linear Algebra Kernels
on Multi-core and Many-Core Processors},
booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings},
pages = {846--853},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IPDPS.2011.228},
doi = {10.1109/IPDPS.2011.228},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/CastilloDFMQR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isads/DuXQY11,
author = {Zidong Du and
Bingbing Xia and
Fei Qiao and
Huazhong Yang},
title = {System-Level Evaluation of Video Processing System Using SimpleScalar-Based
Multi-core Processor Simulator},
booktitle = {10th International Symposium on Autonomous Decentralized Systems,
{ISADS} 2011, Tokyo {\&} Hiroshima, Japan, March 23-17, 2011},
pages = {256--259},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISADS.2011.34},
doi = {10.1109/ISADS.2011.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isads/DuXQY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeCD11,
author = {Victor W. Lee and
Yen{-}Kuang Chen and
Pradeep Debuy},
title = {Emerging applications for multi/many-core processors},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {1524--1527},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937865},
doi = {10.1109/ISCAS.2011.5937865},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LeeCD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/StoifSLH11,
author = {Christian Stoif and
Martin Schoeberl and
Benito Liccardi and
Jan Haase},
title = {Hardware synchronization for embedded multi-core processors},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {2557--2560},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5938126},
doi = {10.1109/ISCAS.2011.5938126},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/StoifSLH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YuSZ11,
author = {Zhiyi Yu and
Zewen Shi and
Xiaoyang Zeng},
title = {Fault tolerant computing for stream {DSP} applications using {GALS}
multi-core processors},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {2305--2308},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5938063},
doi = {10.1109/ISCAS.2011.5938063},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YuSZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/ChenHX11,
author = {Xi Chen and
Jiang Hu and
Ning Xu},
editor = {Yao{-}Wen Chang and
Jiang Hu},
title = {Regularity-constrained floorplanning for multi-core processors},
booktitle = {Proceedings of the 2011 International Symposium on Physical Design,
{ISPD} 2011, Santa Barbara, California, USA, March 27-30, 2011},
pages = {99--106},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1960397.1960421},
doi = {10.1145/1960397.1960421},
timestamp = {Tue, 02 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispd/ChenHX11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispdc/SpoialaSDB11,
author = {Vlad{-}Marian Spoiala and
Emil Slusanschi and
Monica Dagadita and
Cristian Bancu},
title = {Parallelization of High Dynamic Range Image Creation on Multi-core
Processor Architectures},
booktitle = {10th International Symposium on Parallel and Distributed Computing,
{ISPDC} 2011, Cluj-Napoca, Romania, July 6-8, 2011},
pages = {262--265},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISPDC.2011.46},
doi = {10.1109/ISPDC.2011.46},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispdc/SpoialaSDB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/OhPKLY11,
author = {Jinwook Oh and
Junyoung Park and
Gyeonghoon Kim and
Seungjin Lee and
Hoi{-}Jun Yoo},
title = {A 57mW embedded mixed-mode neuro-fuzzy accelerator for intelligent
multi-core processor},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
2011},
pages = {130--132},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSCC.2011.5746250},
doi = {10.1109/ISSCC.2011.5746250},
timestamp = {Fri, 13 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/OhPKLY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BhavsarP11,
author = {Dilip K. Bhavsar and
Steve Poehlman},
editor = {Bill Eklow and
R. D. (Shawn) Blanton},
title = {Test access and the testability features of the Poulson multi-core
Intel Itanium{\textregistered} processor},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2011, Anaheim, CA,
USA, September 20-22, 2011},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/TEST.2011.6139168},
doi = {10.1109/TEST.2011.6139168},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/BhavsarP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/marc/AlonsoDIMMQG11,
author = {Pedro Alonso and
Manuel F. Dolz and
Francisco D. Igual and
Bryan Marker and
Rafael Mayo and
Enrique S. Quintana{-}Ort{\'{\i}} and
Robert A. van de Geijn},
editor = {Diana G{\"{o}}hringer and
Michael H{\"{u}}bner and
J{\"{u}}rgen Becker},
title = {Power-aware Dense Linear Algebra Implementations on Multi-core and
Many-core Processors},
booktitle = {3rd Many-core Applications Research Community {(MARC)} Symposium.
Proceedings of the 3rd {MARC} Symposium, Ettlingen, Germany, July
5-6, 2011},
pages = {103--106},
publisher = {{KIT} Scientific Publishing, Karlsruhe},
year = {2011},
url = {http://digbib.ubka.uni-karlsruhe.de/volltexte/1000023937},
timestamp = {Mon, 28 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/marc/AlonsoDIMMQG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/PokamPHAGHW11,
author = {Gilles Pokam and
Cristiano Pereira and
Shiliang Hu and
Ali{-}Reza Adl{-}Tabatabai and
Justin Emile Gottschlich and
Jungwoo Ha and
Youfeng Wu},
editor = {Carlo Galuzzi and
Luigi Carro and
Andreas Moshovos and
Milos Prvulovic},
title = {CoreRacer: a practical memory race recorder for multicore x86 {TSO}
processors},
booktitle = {44rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2011, Porto Alegre, Brazil, December 3-7, 2011},
pages = {216--225},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2155620.2155646},
doi = {10.1145/2155620.2155646},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/PokamPHAGHW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pads/Hill11,
author = {David R. C. Hill},
title = {Distribution of Random Streams in Stochastic Models in the Age of
Multi-Core and Manycore Processors},
booktitle = {25th {ACM/IEEE/SCS} Workshop on Principles of Advanced and Distributed
Simulation, {PADS} 2011, Nice, France, June 14-17, 2011},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/PADS.2011.5936759},
doi = {10.1109/PADS.2011.5936759},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pads/Hill11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/DoganABLB11,
author = {Ahmed Yasir Dogan and
David Atienza and
Andreas Burg and
Igor Loi and
Luca Benini},
editor = {Jos{\'{e}} L. Ayala and
Braulio Garc{\'{\i}}a{-}C{\'{a}}mara and
Manuel Prieto and
Martino Ruggiero and
Gilles Sicard},
title = {Power/Performance Exploration of Single-core and Multi-core Processor
Approaches for Biomedical Signal Processing},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization,
and Simulation - 21st International Workshop, {PATMOS} 2011, Madrid,
Spain, September 26-29, 2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6951},
pages = {102--111},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-24154-3\_11},
doi = {10.1007/978-3-642-24154-3\_11},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/DoganABLB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/BaldoGGF11,
author = {Jose Ignacio Agulleiro Baldo and
Ester M. Garz{\'{o}}n and
Inmaculada Garc{\'{\i}}a and
Jos{\'{e}}{-}Jes{\'{u}}s Fern{\'{a}}ndez},
editor = {Yiannis Cotronis and
Marco Danelutto and
George Angelos Papadopoulos},
title = {Multi-core Desktop Processors Make Possible Real-Time Electron Tomography},
booktitle = {Proceedings of the 19th International Euromicro Conference on Parallel,
Distributed and Network-based Processing, {PDP} 2011, Ayia Napa, Cyprus,
9-11 February 2011},
pages = {127--132},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/PDP.2011.36},
doi = {10.1109/PDP.2011.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdp/BaldoGGF11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/Schuele11,
author = {Tobias Schuele},
editor = {Yiannis Cotronis and
Marco Danelutto and
George Angelos Papadopoulos},
title = {Efficient Parallel Execution of Streaming Applications on Multi-core
Processors},
booktitle = {Proceedings of the 19th International Euromicro Conference on Parallel,
Distributed and Network-based Processing, {PDP} 2011, Ayia Napa, Cyprus,
9-11 February 2011},
pages = {231--238},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/PDP.2011.48},
doi = {10.1109/PDP.2011.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdp/Schuele11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/peccs/PahikkalaAXLTS11,
author = {Tapio Pahikkala and
Antti Airola and
Thomas Canhao Xu and
Pasi Liljeberg and
Hannu Tenhunen and
Tapio Salakoski},
editor = {C{\'{e}}sar Benavente{-}Peces and
Joaquim Filipe},
title = {A Parallel Online Regularized Least-squares Machine Learning Algorithm
for Future Multi-core Processors},
booktitle = {{PECCS} 2011 - Proceedings of the 1st International Conference on
Pervasive and Embedded Computing and Communication Systems, Vilamoura,
Algarve, Portugal, 5-7 March, 2011},
pages = {590--599},
publisher = {SciTePress},
year = {2011},
timestamp = {Mon, 14 Nov 2011 10:29:31 +0100},
biburl = {https://dblp.org/rec/conf/peccs/PahikkalaAXLTS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/SammanPG11,
author = {Faizal Arya Samman and
Surapong Pongyupinpanich and
Manfred Glesner},
title = {Reconfigurable streaming processor core with interconnected floating-point
arithmetic units for multicore adaptive signal processing systems},
booktitle = {Proceedings of the 6th International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011},
pages = {1--6},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ReCoSoC.2011.5981539},
doi = {10.1109/RECOSOC.2011.5981539},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/SammanPG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/retis/SharmaK11,
author = {Rajkumar Sharma and
Priyesh Kanungo},
editor = {Mita Nasipuri and
Sarmistha Neogy and
Jamuna Kanta Sing and
Amit Konar and
Ujjwal Maulik and
Subhadip Basu and
Debasish Jana},
title = {Performance evaluation of {MPI} and hybrid MPI+OpenMP programming
paradigms on multi-core processors cluster},
booktitle = {International Conference on Recent Trends in Information Systems,
ReTIS 2011, December 21-23, 2011, Jadavpur University, Kolkata, India,
Proceedings},
pages = {137--140},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ReTIS.2011.6146855},
doi = {10.1109/RETIS.2011.6146855},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/retis/SharmaK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtcsa/LiKN11,
author = {Ning Li and
Yuki Kinebuchi and
Tatsuo Nakajima},
title = {Enhancing Security of Embedded Linux on a Multi-core Processor},
booktitle = {17th {IEEE} International Conference on Embedded and Real-Time Computing
Systems and Applications, {RTCSA} 2011, Toyama, Japan, August 28-31,
2011, Volume 2},
pages = {117--121},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/RTCSA.2011.36},
doi = {10.1109/RTCSA.2011.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtcsa/LiKN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/snpd/XuDZ11,
author = {Yuanchao Xu and
Lin Du and
Zhimin Zhang},
editor = {Morshed U. Chowdhury and
Sid Ray and
Roger Y. Lee},
title = {A Light-Weight Scheduler for Single-ISA Asymmetric Multi-core Processor
Using Online Profiling},
booktitle = {12th {ACIS} International Conference on Software Engineering, Artificial
Intelligence, Networking, and Parallel {\&} Distributed Computing,
{SNPD} 2011, Sydney, Australia, July 6-8, 2011},
pages = {183--188},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/SNPD.2011.14},
doi = {10.1109/SNPD.2011.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/snpd/XuDZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/trustcom/JiangYX11,
author = {Haiyang Jiang and
Jianhua Yang and
Gaogang Xie},
title = {Exploring and Enhancing the Performance of Parallel {IDS} on Multi-core
Processors},
booktitle = {{IEEE} 10th International Conference on Trust, Security and Privacy
in Computing and Communications, TrustCom 2011, Changsha, China, 16-18
November, 2011},
pages = {673--680},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/TrustCom.2011.86},
doi = {10.1109/TRUSTCOM.2011.86},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/trustcom/JiangYX11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/webist/IvkovicZ11,
author = {Mario Ivkovic and
Thomas Zefferer},
editor = {Jos{\'{e}} Cordeiro and
Joaquim Filipe},
title = {Employing Multi-core Processor Architectures to Accelerate Java Cryptography
Extensions},
booktitle = {{WEBIST} 2011, Proceedings of the 7th International Conference on
Web Information Systems and Technologies, Noordwijkerhout, The Netherlands,
6-9 May, 2011},
pages = {5--12},
publisher = {SciTePress},
year = {2011},
timestamp = {Thu, 26 Jan 2012 19:29:01 +0100},
biburl = {https://dblp.org/rec/conf/webist/IvkovicZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/procedia/MotokiN11,
author = {Shinji Motoki and
Atsushi Nakamura},
editor = {Mitsuhisa Sato and
Satoshi Matsuoka and
Peter M. A. Sloot and
G. Dick van Albada and
Jack J. Dongarra},
title = {Lattice gauge theory on a multi-core processor, Cell/B.E},
booktitle = {Proceedings of the International Conference on Computational Science,
{ICCS} 2011, Nanyang Technological University, Singapore, 1-3 June,
2011},
series = {Procedia Computer Science},
volume = {4},
pages = {860--868},
publisher = {Elsevier},
year = {2011},
url = {https://doi.org/10.1016/j.procs.2011.04.091},
doi = {10.1016/J.PROCS.2011.04.091},
timestamp = {Thu, 08 Jul 2021 16:04:01 +0200},
biburl = {https://dblp.org/rec/journals/procedia/MotokiN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1110-3535,
author = {Balaji Venu},
title = {Multi-core processors - An overview},
journal = {CoRR},
volume = {abs/1110.3535},
year = {2011},
url = {http://arxiv.org/abs/1110.3535},
eprinttype = {arXiv},
eprint = {1110.3535},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1110-3535.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Guney10,
author = {Murat Efe Guney},
title = {High-performance direct solution of finite element problems on multi-core
processors},
school = {Georgia Institute of Technology, Atlanta, GA, {USA}},
year = {2010},
url = {https://hdl.handle.net/1853/34662},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Guney10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Varbanescu10,
author = {Ana Lucia Varbanescu},
title = {On the effective parallel programming of multi-core processors},
school = {Delft University of Technology, Netherlands},
year = {2010},
url = {http://resolver.tudelft.nl/uuid:d48b5f56-6853-44c9-a517-59e82d6300cf},
timestamp = {Wed, 12 Apr 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Varbanescu10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Yu10,
author = {Chenjie Yu},
title = {Cross-Layer Customization for low Power and High Performance Embedded
Multi-Core Processors},
school = {University of Maryland, College Park, MD, {USA}},
year = {2010},
url = {https://hdl.handle.net/1903/11218},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Yu10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/de/Singler2010,
author = {Johannes Singler},
title = {Algorithm libraries for multi-core processors},
school = {Karlsruhe Institute of Technology},
year = {2010},
url = {http://digbib.ubka.uni-karlsruhe.de/volltexte/1000019394},
urn = {urn:nbn:de:swb:90-193946},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/de/Singler2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/McIlroy10,
author = {Ross McIlroy},
title = {Using program behaviour to exploit heterogeneous multi-core processors},
school = {University of Glasgow, {UK}},
year = {2010},
url = {http://theses.gla.ac.uk/1755/},
timestamp = {Tue, 05 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/McIlroy10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/us/Jacob10,
author = {Philip Jacob},
title = {Serial code accelerators for heterogeneous multi-core processor with
3D stacked memory},
school = {Rensselaer Polytechnic Institute, {USA}},
year = {2010},
url = {https://hdl.handle.net/20.500.13015/3061},
timestamp = {Fri, 10 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/us/Jacob10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cj/XiaZYYG10,
author = {Liang Xia and
Yongxin Zhu and
Jun Yang and
Jingwei Ye and
Zonghua Gu},
title = {Implementing a Thermal-Aware Scheduler in Linux Kernel on a Multi-Core
Processor},
journal = {Comput. J.},
volume = {53},
number = {7},
pages = {895--903},
year = {2010},
url = {https://doi.org/10.1093/comjnl/bxp119},
doi = {10.1093/COMJNL/BXP119},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cj/XiaZYYG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/WaidyasooriyaOHK10,
author = {Hasitha Muthumala Waidyasooriya and
Daisuke Okumura and
Masanori Hariyama and
Michitaka Kameyama},
title = {Task Allocation with Algorithm Transformation for Reducing Data-Transfer
Bottlenecks in Heterogeneous Multi-Core Processors: {A} Case Study
of {HOG} Descriptor Computation},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {93-A},
number = {12},
pages = {2570--2580},
year = {2010},
url = {https://doi.org/10.1587/transfun.E93.A.2570},
doi = {10.1587/TRANSFUN.E93.A.2570},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/WaidyasooriyaOHK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijaras/RaiNWN10,
author = {Jitendra Kumar Rai and
Atul Negi and
Rajeev Wankar and
K. D. Nayak},
title = {A Machine Learning Based Meta-Scheduler for Multi-Core Processors},
journal = {Int. J. Adapt. Resilient Auton. Syst.},
volume = {1},
number = {4},
pages = {46--59},
year = {2010},
url = {https://doi.org/10.4018/IJARAS.2010100104},
doi = {10.4018/IJARAS.2010100104},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijaras/RaiNWN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijdst/TomkinsBCDKLVLT10,
author = {James L. Tomkins and
Ron Brightwell and
William J. Camp and
Sudip S. Dosanjh and
Suzanne M. Kelly and
Paul T. Lin and
Courtenay T. Vaughan and
John M. Levesque and
Vinod Tipparaju},
title = {The Red Storm Architecture and Early Experiences with Multi-Core Processors},
journal = {Int. J. Distributed Syst. Technol.},
volume = {1},
number = {2},
pages = {74--93},
year = {2010},
url = {https://doi.org/10.4018/jdst.2010040105},
doi = {10.4018/JDST.2010040105},
timestamp = {Thu, 17 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijdst/TomkinsBCDKLVLT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpca/Brightwell10,
author = {Ron Brightwell},
title = {Exploiting Direct Access Shared Memory for {MPI} On Multi-Core Processors},
journal = {Int. J. High Perform. Comput. Appl.},
volume = {24},
number = {1},
pages = {69--77},
year = {2010},
url = {https://doi.org/10.1177/1094342009359014},
doi = {10.1177/1094342009359014},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijhpca/Brightwell10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/Zhang10,
author = {Nan Zhang},
title = {Computing Optimised Parallel Speeded-Up Robust Features {(P-SURF)}
on Multi-Core Processors},
journal = {Int. J. Parallel Program.},
volume = {38},
number = {2},
pages = {138--158},
year = {2010},
url = {https://doi.org/10.1007/s10766-009-0122-9},
doi = {10.1007/S10766-009-0122-9},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/Zhang10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcnc/AsgharL10,
author = {Rizwan Asghar and
Dake Liu},
title = {Multimode Flex-Interleaver Core for Baseband Processor Platform},
journal = {J. Comput. Networks Commun.},
volume = {2010},
pages = {793807:1--793807:16},
year = {2010},
url = {https://doi.org/10.1155/2010/793807},
doi = {10.1155/2010/793807},
timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcnc/AsgharL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcst/GaoCWTH10,
author = {Xiang Gao and
Yunji Chen and
Huandong Wang and
Dan Tang and
Weiwu Hu},
title = {System Architecture of Godson-3 Multi-Core Processors},
journal = {J. Comput. Sci. Technol.},
volume = {25},
number = {2},
pages = {181--191},
year = {2010},
url = {https://doi.org/10.1007/s11390-010-9315-3},
doi = {10.1007/S11390-010-9315-3},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcst/GaoCWTH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/DingWYB10,
author = {Jianxun Jason Ding and
Abdul Waheed and
Jingnan Yao and
Laxmi N. Bhuyan},
title = {Performance characterization of multi-thread and multi-core processors
based {XML} application oriented networking systems},
journal = {J. Parallel Distributed Comput.},
volume = {70},
number = {5},
pages = {584--597},
year = {2010},
url = {https://doi.org/10.1016/j.jpdc.2009.10.009},
doi = {10.1016/J.JPDC.2009.10.009},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/DingWYB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jss/ChoiD10,
author = {Gyu Sang Choi and
Chita R. Das},
title = {A Superscalar software architecture model for Multi-Core Processors
(MCPs)},
journal = {J. Syst. Softw.},
volume = {83},
number = {10},
pages = {1823--1837},
year = {2010},
url = {https://doi.org/10.1016/j.jss.2010.04.068},
doi = {10.1016/J.JSS.2010.04.068},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jss/ChoiD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/KwonE10,
author = {Young{-}Su Kwon and
Nak{-}Woong Eum},
title = {Partial access conflict-relieving programmable address shuffler for
parallel memory system in multi-core processor},
journal = {Microprocess. Microsystems},
volume = {34},
number = {1},
pages = {1--13},
year = {2010},
url = {https://doi.org/10.1016/j.micpro.2009.10.002},
doi = {10.1016/J.MICPRO.2009.10.002},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/KwonE10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mcs/Larsson10,
author = {Jonas Larsson},
title = {Monte Carlo implementation of financial simulation on Cell/B.E. multi-core
processor},
journal = {Math. Comput. Simul.},
volume = {81},
number = {3},
pages = {578--587},
year = {2010},
url = {https://doi.org/10.1016/j.matcom.2010.08.004},
doi = {10.1016/J.MATCOM.2010.08.004},
timestamp = {Wed, 04 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mcs/Larsson10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/orl/YeZ10,
author = {Deshi Ye and
Guochuan Zhang},
title = {On-line scheduling of multi-core processor tasks with virtualization},
journal = {Oper. Res. Lett.},
volume = {38},
number = {4},
pages = {307--311},
year = {2010},
url = {https://doi.org/10.1016/j.orl.2010.04.002},
doi = {10.1016/J.ORL.2010.04.002},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/orl/YeZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/GotzIFDR10,
author = {Jan G{\"{o}}tz and
Klaus Iglberger and
Christian Feichtinger and
Stefan Donath and
Ulrich R{\"{u}}de},
title = {Coupling multibody dynamics and computational fluid dynamics on 8192
processor cores},
journal = {Parallel Comput.},
volume = {36},
number = {2-3},
pages = {142--151},
year = {2010},
url = {https://doi.org/10.1016/j.parco.2010.01.005},
doi = {10.1016/J.PARCO.2010.01.005},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pc/GotzIFDR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ppl/SanchoKL10,
author = {Jos{\'{e}} Carlos Sancho and
Darren J. Kerbyson and
Michael Lang},
title = {On the Performance and Technological Impact of Adding Memory Controllers
in Multi-Core Processors},
journal = {Parallel Process. Lett.},
volume = {20},
number = {4},
pages = {341--357},
year = {2010},
url = {https://doi.org/10.1142/S0129626410000284},
doi = {10.1142/S0129626410000284},
timestamp = {Tue, 24 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ppl/SanchoKL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/WooFKL10,
author = {Dong Hyuk Woo and
Joshua B. Fryman and
Allan D. Knies and
Hsien{-}Hsin S. Lee},
title = {Chameleon: Virtualizing idle acceleration cores of a heterogeneous
multicore processor for caching and prefetching},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {7},
number = {1},
pages = {3:1--3:35},
year = {2010},
url = {https://doi.org/10.1145/1736065.1736068},
doi = {10.1145/1736065.1736068},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/WooFKL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Musoll10,
author = {Enric Musoll},
title = {A cost-effective load-balancing policy for tile-based, massive multi-core
packet processors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {9},
number = {3},
pages = {24:1--24:25},
year = {2010},
url = {https://doi.org/10.1145/1698772.1698782},
doi = {10.1145/1698772.1698782},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/Musoll10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ACISicis/ParkZLLKK10,
author = {Young Jin Park and
Min Zeng and
Byeong{-}Seok Lee and
Jeong{-}A Lee and
Seung Gu Kang and
Cheol Hong Kim},
editor = {Tokuro Matsuo and
Naohiro Ishii and
Roger Y. Lee},
title = {Thermal Analysis for 3D Multi-core Processors with Dynamic Frequency
Scaling},
booktitle = {9th {IEEE/ACIS} International Conference on Computer and Information
Science, {IEEE/ACIS} {ICIS} 2010, 18-20 August 2010, Yamagata, Japan},
pages = {69--74},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ICIS.2010.54},
doi = {10.1109/ICIS.2010.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ACISicis/ParkZLLKK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcit/EmenekerA10,
author = {Wesley Emeneker and
Amy W. Apon},
title = {Cache Effects of Virtual Machine Placement on Multi-Core Processors},
booktitle = {10th {IEEE} International Conference on Computer and Information Technology,
{CIT} 2010, Bradford, West Yorkshire, UK, June 29-July 1, 2010},
pages = {2261--2266},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/CIT.2010.390},
doi = {10.1109/CIT.2010.390},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcit/EmenekerA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcit/YanWWZC10,
author = {Like Yan and
Binbin Wu and
Yuan Wen and
Shaobin Zhang and
Tianzhou Chen},
title = {A Reconfigurable Processor Architecture Combining Multi-core and Reconfigurable
Processing Unit},
booktitle = {10th {IEEE} International Conference on Computer and Information Technology,
{CIT} 2010, Bradford, West Yorkshire, UK, June 29-July 1, 2010},
pages = {2897--2902},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/CIT.2010.484},
doi = {10.1109/CIT.2010.484},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcit/YanWWZC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/Musoll10,
author = {Enric Musoll},
editor = {Bill Lin and
Jeffrey C. Mogul and
Ravishankar R. Iyer},
title = {Load balancing packets on a tile-based massive multi-core processor
with {S-NUCA}},
booktitle = {Proceedings of the 2010 {ACM/IEEE} Symposium on Architecture for Networking
and Communications Systems, {ANCS} 2010, San Diego, California, USA,
October 25-26, 2010},
pages = {32},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1872007.1872047},
doi = {10.1145/1872007.1872047},
timestamp = {Mon, 15 May 2023 22:11:15 +0200},
biburl = {https://dblp.org/rec/conf/ancs/Musoll10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/antsw/TsutsuiF10,
author = {Shigeyoshi Tsutsui and
Noriyuki Fujimoto},
editor = {Marco Dorigo and
Mauro Birattari and
Gianni A. Di Caro and
Ren{\'{e}} Doursat and
Andries P. Engelbrecht and
Dario Floreano and
Luca Maria Gambardella and
Roderich Gro{\ss} and
Erol Sahin and
Hiroki Sayama and
Thomas St{\"{u}}tzle},
title = {Parallel Ant Colony Optimization Algorithm on a Multi-core Processor},
booktitle = {Swarm Intelligence - 7th International Conference, {ANTS} 2010, Brussels,
Belgium, September 8-10, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6234},
pages = {488--495},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-15461-4\_48},
doi = {10.1007/978-3-642-15461-4\_48},
timestamp = {Mon, 16 Aug 2021 17:13:22 +0200},
biburl = {https://dblp.org/rec/conf/antsw/TsutsuiF10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/Krishnamurthy10,
author = {Ram Krishnamurthy},
editor = {Phaophak Sirisuk and
Fearghal Morgan and
Tarek A. El{-}Ghazawi and
Hideharu Amano},
title = {High-Performance Energy-Efficient Reconfigurable Accelerators/Co-processors
for Tera-Scale Multi-core Microprocessors},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 6th
International Symposium, {ARC} 2010, Bangkok, Thailand, March 17-19,
2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5992},
pages = {1},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-12133-3\_1},
doi = {10.1007/978-3-642-12133-3\_1},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arc/Krishnamurthy10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/ZeppenfeldH10,
author = {Johannes Zeppenfeld and
Andreas Herkersdorf},
editor = {Christian M{\"{u}}ller{-}Schloer and
Wolfgang Karl and
Sami Yehia},
title = {Autonomic Workload Management for Multi-core Processor Systems},
booktitle = {Architecture of Computing Systems - {ARCS} 2010, 23rd International
Conference, Hannover, Germany, February 22-25, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5974},
pages = {49--60},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-11950-7\_6},
doi = {10.1007/978-3-642-11950-7\_6},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/ZeppenfeldH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeeZK10,
author = {Jungseob Lee and
Shi{-}Ting Zhou and
Nam Sung Kim},
title = {Analyzing impact of multiple {ABB} and {AVS} domains on throughput
of power and thermal-constrained multi-core processors},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {229--234},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419889},
doi = {10.1109/ASPDAC.2010.5419889},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LeeZK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OhKCDH10,
author = {Dongkeun Oh and
Nam Sung Kim and
Charlie Chung{-}Ping Chen and
Azadeh Davoodi and
Yu Hen Hu},
title = {Runtime temperature-based power estimation for optimizing throughput
of thermal-constrained multi-core processors},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {593--599},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419815},
doi = {10.1109/ASPDAC.2010.5419815},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/OhKCDH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bwcca/OginoKSY10,
author = {Masao Ogino and
Hiroshi Kawai and
Ryuji Shioya and
Shinobu Yoshimura},
title = {Parallel Implementation of a Balancing Domain Decomposition Method
for Multi-core Processors},
booktitle = {Proceedings of the Fifth International Conference on Broadband and
Wireless Computing, Communication and Applications, {BWCCA} 2010,
November 4-6, 2010, Fukuoka Institute of Technology, Fukuoka, Japan
(In conjunction with the 3PGCIC-2010 International Conference)},
pages = {56--61},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/BWCCA.2010.48},
doi = {10.1109/BWCCA.2010.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/bwcca/OginoKSY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cascon/DehneJ10,
author = {Frank Dehne and
Stephan Jou},
editor = {Joanna W. Ng and
Christian Couturier and
Hausi A. M{\"{u}}ller and
Arthur G. Ryman and
Anatol W. Kark},
title = {Parallel algorithms for multi-core and many-core processors},
booktitle = {Proceedings of the 2010 conference of the Centre for Advanced Studies
on Collaborative Research, November 1-4, 2010, Toronto, Ontario, Canada},
pages = {391},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1923947.1924009},
doi = {10.1145/1923947.1924009},
timestamp = {Fri, 30 Nov 2018 02:24:54 +0100},
biburl = {https://dblp.org/rec/conf/cascon/DehneJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccgrid/BhowmikG10,
author = {Rajdeep Bhowmik and
Madhusudhan Govindaraju},
title = {Cache Performance Optimization for Processing XML-Based Application
Data on Multi-core Processors},
booktitle = {10th {IEEE/ACM} International Conference on Cluster, Cloud and Grid
Computing, CCGrid 2010, 17-20 May 2010, Melbourne, Victoria, Australia},
pages = {455--463},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/CCGRID.2010.122},
doi = {10.1109/CCGRID.2010.122},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ccgrid/BhowmikG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/KimKK10,
author = {Jong{-}Myon Kim and
Yongmin Kim and
Cheol Hong Kim},
editor = {Hamid R. Arabnia and
Ashu M. G. Solo},
title = {Performance Evaluation of Multimedia Extensions on Variable Many-Core
Processors},
booktitle = {Proceedings of the 2010 International Conference on Computer Design,
{CDES} 2010, July 12-15, 2010, Las Vegas Nevada, {USA}},
pages = {98--104},
publisher = {{CSREA} Press},
year = {2010},
timestamp = {Sat, 10 Mar 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cdes/KimKK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cec/SatoSN10,
author = {Mikiko Sato and
Yuji Sato and
Mitaro Namiki},
title = {Proposal of a multi-core processor from the viewpoint of evolutionary
computation},
booktitle = {Proceedings of the {IEEE} Congress on Evolutionary Computation, {CEC}
2010, Barcelona, Spain, 18-23 July 2010},
pages = {1--8},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/CEC.2010.5586365},
doi = {10.1109/CEC.2010.5586365},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cec/SatoSN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/BaiS10,
author = {Ke Bai and
Aviral Shrivastava},
editor = {Tony Givargis and
Adam Donlin},
title = {Heap data management for limited local memory {(LLM)} multi-core processors},
booktitle = {Proceedings of the 8th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2010, part of ESWeek '10
Sixth Embedded Systems Week, Scottsdale, AZ, USA, October 24-28, 2010},
pages = {317--326},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878961.1879015},
doi = {10.1145/1878961.1879015},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/codes/BaiS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dateso/KrulisY10,
author = {Martin Krulis and
Jakub Yaghob},
editor = {Jaroslav Pokorn{\'{y}} and
V{\'{a}}clav Sn{\'{a}}sel and
Karel Richta},
title = {Efficient Implementation of XPath Processor on Multi-Core CPUs},
booktitle = {Proceedings of the Dateso 2010 Annual International Workshop on DAtabases,
TExts, Specifications and Objects, Stedronin-Plazy, Czech Republic,
April 21-23, 2010},
series = {{CEUR} Workshop Proceedings},
volume = {567},
pages = {60--71},
publisher = {CEUR-WS.org},
year = {2010},
url = {https://ceur-ws.org/Vol-567/paper12.pdf},
timestamp = {Fri, 10 Mar 2023 16:23:19 +0100},
biburl = {https://dblp.org/rec/conf/dateso/KrulisY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dbta/Cheng10,
author = {Hui Cheng},
editor = {Zhengbing Hu and
Ping Ma},
title = {A High Efficient Task Scheduling Algorithm Based on Heterogeneous
Multi-Core Processor},
booktitle = {Second International Workshop on Database Technology and Applications,
{DBTA} 2010, Wuhan, Hubei, China, November 27-28, 2010, Proceedings},
pages = {1--4},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/DBTA.2010.5659041},
doi = {10.1109/DBTA.2010.5659041},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/dbta/Cheng10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BaakliniSNA10,
author = {Elias Baaklini and
Hassan Sbeity and
Sma{\"{\i}}l Niar and
Nouhad Amaneddine},
editor = {Sebasti{\'{a}}n L{\'{o}}pez},
title = {{H.264} Color Components Video Decoding Parallelization on Multi-core
Processors},
booktitle = {13th Euromicro Conference on Digital System Design, Architectures,
Methods and Tools, {DSD} 2010, 1-3 September 2010, Lille, France},
pages = {785--790},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DSD.2010.76},
doi = {10.1109/DSD.2010.76},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/BaakliniSNA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/WaidyasooriyaHK10,
author = {Hasitha Muthumala Waidyasooriya and
Masanori Hariyama and
Michitaka Kameyama},
editor = {Toomas P. Plaks and
David Andrews and
Ronald F. DeMara and
Herman Lam and
Jooheung Lee and
Christian Plessl and
Greg Stitt},
title = {Architecture of an FPGA-Oriented Heterogeneous Multi-core Processor
with SIMD-Accelerator Cores},
booktitle = {Proceedings of the 2010 International Conference on Engineering of
Reconfigurable Systems {\&} Algorithms, {ERSA} 2010, July 12-15,
2010, Las Vegas Nevada, {USA}},
pages = {179--186},
publisher = {{CSREA} Press},
year = {2010},
timestamp = {Wed, 14 Aug 2019 11:41:16 +0200},
biburl = {https://dblp.org/rec/conf/ersa/WaidyasooriyaHK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/WaidyasooriyaOHK10,
author = {Hasitha Muthumala Waidyasooriya and
Daisuke Okumura and
Masanori Hariyama and
Michitaka Kameyama},
editor = {Toomas P. Plaks and
David Andrews and
Ronald F. DeMara and
Herman Lam and
Jooheung Lee and
Christian Plessl and
Greg Stitt},
title = {Mapping for a Heterogeneous Multi-Core Media Processor Considering
the Data Transfer Time},
booktitle = {Proceedings of the 2010 International Conference on Engineering of
Reconfigurable Systems {\&} Algorithms, {ERSA} 2010, July 12-15,
2010, Las Vegas Nevada, {USA}},
pages = {281--284},
publisher = {{CSREA} Press},
year = {2010},
timestamp = {Wed, 08 Dec 2010 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ersa/WaidyasooriyaOHK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fcst/FangW10,
author = {Juan Fang and
Xiaocui Wang},
editor = {Ivan Stojmenovic and
Gerald E. Farin and
Minyi Guo and
Hai Jin and
Keqiu Li and
Liang Hu and
Xiaohui Wei and
Xiangjiu Che},
title = {A Prefetching Coordinate Algorithm Which Can Be Used in Multi-core
Processors},
booktitle = {Fifth International Conference on Frontier of Computer Science and
Technology, {FCST} 2010, Changchun, Jilin Province, China, August
18-22, 2010},
pages = {111--115},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FCST.2010.32},
doi = {10.1109/FCST.2010.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fcst/FangW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fcst/GengXZ10,
author = {Xiaozhong Geng and
Gaochao Xu and
Yuan Zhang},
editor = {Ivan Stojmenovic and
Gerald E. Farin and
Minyi Guo and
Hai Jin and
Keqiu Li and
Liang Hu and
Xiaohui Wei and
Xiangjiu Che},
title = {Dynamic Load Balancing Scheduling Model Based on Multi-core Processor},
booktitle = {Fifth International Conference on Frontier of Computer Science and
Technology, {FCST} 2010, Changchun, Jilin Province, China, August
18-22, 2010},
pages = {398--403},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/FCST.2010.54},
doi = {10.1109/FCST.2010.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fcst/GengXZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gecco/SatoSN10,
author = {Mikiko Sato and
Yuji Sato and
Mitaro Namiki},
editor = {Martin Pelikan and
J{\"{u}}rgen Branke},
title = {Proposal of a multi-core processor architecture for effective evolutionary
computation},
booktitle = {Genetic and Evolutionary Computation Conference, {GECCO} 2010, Proceedings,
Portland, Oregon, USA, July 7-11, 2010},
pages = {1321--1322},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1830483.1830723},
doi = {10.1145/1830483.1830723},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/gecco/SatoSN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/GeQ10,
author = {Yang Ge and
Qinru Qiu},
title = {Task allocation for minimum system power in a homogenous multi-core
processor},
booktitle = {International Green Computing Conference 2010, Chicago, IL, USA, 15-18
August 2010},
pages = {299--306},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/GREENCOMP.2010.5598299},
doi = {10.1109/GREENCOMP.2010.5598299},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/green/GeQ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/KingAS10,
author = {David King and
Ishfaq Ahmad and
Hafiz Fahad Sheikh},
title = {Stretch and compress based re-scheduling techniques for minimizing
the execution times of DAGs on multi-core processors under energy
constraints},
booktitle = {International Green Computing Conference 2010, Chicago, IL, USA, 15-18
August 2010},
pages = {49--60},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/GREENCOMP.2010.5598274},
doi = {10.1109/GREENCOMP.2010.5598274},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/green/KingAS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/WangR10,
author = {Zhe Wang and
Sanjay Ranka},
title = {Thermal constrained workload distribution for maximizing throughput
on multi-core processors},
booktitle = {International Green Computing Conference 2010, Chicago, IL, USA, 15-18
August 2010},
pages = {291--298},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/GREENCOMP.2010.5598302},
doi = {10.1109/GREENCOMP.2010.5598302},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/green/WangR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/GolovanevskyDZE10,
author = {Olga Golovanevsky and
Alon Dayan and
Ayal Zaks and
David Edelsohn},
editor = {Yale N. Patt and
Pierfrancesco Foglia and
Evelyn Duesterwald and
Paolo Faraboschi and
Xavier Martorell},
title = {Trace-Based Data Layout Optimizations for Multi-core Processors},
booktitle = {High Performance Embedded Architectures and Compilers, 5th International
Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5952},
pages = {81--95},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-11515-8\_8},
doi = {10.1007/978-3-642-11515-8\_8},
timestamp = {Tue, 14 May 2019 10:00:51 +0200},
biburl = {https://dblp.org/rec/conf/hipeac/GolovanevskyDZE10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/DienerMRASNH10,
author = {Matthias Diener and
Felipe Lopes Madruga and
Eduardo Rocha Rodrigues and
Marco A. Z. Alves and
J{\"{o}}rg Schneider and
Philippe Olivier Alexandre Navaux and
Hans{-}Ulrich Heiss},
title = {Evaluating Thread Placement Based on Memory Access Patterns for Multi-core
Processors},
booktitle = {12th {IEEE} International Conference on High Performance Computing
and Communications, {HPCC} 2010, 1-3 September 2010, Melbourne, Australia},
pages = {491--496},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/HPCC.2010.114},
doi = {10.1109/HPCC.2010.114},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpcc/DienerMRASNH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic-nc/TakamaedaSMK10,
author = {Shinya Takamaeda and
Shimpei Sato and
Takefumi Miyoshi and
Kenji Kise},
title = {Smart Core System for Dependable Many-Core Processor with Multifunction
Routers},
booktitle = {First International Conference on Networking and Computing, {ICNC}
2010, Higashi Hiroshima, Japan, November 17-19, 2010. Proceedings},
pages = {133--139},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/IC-NC.2010.53},
doi = {10.1109/IC-NC.2010.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ic-nc/TakamaedaSMK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/DasRKK10,
author = {Anup Das and
Rance Rodrigues and
Israel Koren and
Sandip Kundu},
title = {A study on performance benefits of core morphing in an asymmetric
multicore processor},
booktitle = {28th International Conference on Computer Design, {ICCD} 2010, 3-6
October 2010, Amsterdam, The Netherlands, Proceedings},
pages = {17--22},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ICCD.2010.5647566},
doi = {10.1109/ICCD.2010.5647566},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/DasRKK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccsa/RabaS10,
author = {Nikita Raba and
Elena N. Stankova},
editor = {David Taniar and
Osvaldo Gervasi and
Beniamino Murgante and
Eric Pardede and
Bernady O. Apduhan},
title = {On the Possibilities of Multi-core Processor Use for Real-Time Forecast
of Dangerous Convective Phenomena},
booktitle = {Computational Science and Its Applications - {ICCSA} 2010, International
Conference, Fukuoka, Japan, March 23-26, 2010, Proceedings, Part {II}},
series = {Lecture Notes in Computer Science},
volume = {6017},
pages = {130--138},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-12165-4\_11},
doi = {10.1007/978-3-642-12165-4\_11},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/iccsa/RabaS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icppw/PinelPBK10,
author = {Fr{\'{e}}d{\'{e}}ric Pinel and
Johnatan E. Pecero and
Pascal Bouvry and
Samee Ullah Khan},
editor = {Wang{-}Chien Lee and
Xin Yuan},
title = {Memory-Aware Green Scheduling on Multi-core Processors},
booktitle = {39th International Conference on Parallel Processing, {ICPP} Workshops
2010, San Diego, California, USA, 13-16 September 2010},
pages = {485--488},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ICPPW.2010.71},
doi = {10.1109/ICPPW.2010.71},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icppw/PinelPBK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icppw/ZhengDOLGG10,
author = {Long Zheng and
Mianxiong Dong and
Kaoru Ota and
Huakang Li and
Song Guo and
Minyi Guo},
editor = {Wang{-}Chien Lee and
Xin Yuan},
title = {Exploring the Limits of Tag Reduction for Energy Saving on a Multi-core
Processor},
booktitle = {39th International Conference on Parallel Processing, {ICPP} Workshops
2010, San Diego, California, USA, 13-16 September 2010},
pages = {104--112},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ICPPW.2010.26},
doi = {10.1109/ICPPW.2010.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icppw/ZhengDOLGG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/idt/Majzoub10,
author = {Sohaib Majzoub},
editor = {Yervant Zorian and
Imtinan Elahi and
Andr{\'{e}} Ivanov and
Ashraf Salem},
title = {Voltage island design in multi-core {SIMD} processors},
booktitle = {5th International Design and Test Workshop, {IDT} 2010, Abu Dhabi,
UAE, 14-15 December 2010},
pages = {18--23},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IDT.2010.5724399},
doi = {10.1109/IDT.2010.5724399},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/idt/Majzoub10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/InoueN10,
author = {Hiroshi Inoue and
Toshio Nakatani},
title = {Performance of multi-process and multi-thread processing on multi-core
{SMT} processors},
booktitle = {Proceedings of the 2010 {IEEE} International Symposium on Workload
Characterization, {IISWC} 2010, Atlanta, GA, USA, December 2-4, 2010},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/IISWC.2010.5650174},
doi = {10.1109/IISWC.2010.5650174},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/InoueN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/SreeramP10,
author = {Jaswanth Sreeram and
Santosh Pande},
title = {Exploiting approximate value locality for data synchronization on
multi-core processors},
booktitle = {Proceedings of the 2010 {IEEE} International Symposium on Workload
Characterization, {IISWC} 2010, Atlanta, GA, USA, December 2-4, 2010},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/IISWC.2010.5650333},
doi = {10.1109/IISWC.2010.5650333},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/SreeramP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/interspeech/PariharSRH10,
author = {Naveen Parihar and
Ralf Schl{\"{u}}ter and
David Rybach and
Eric A. Hansen},
editor = {Takao Kobayashi and
Keikichi Hirose and
Satoshi Nakamura},
title = {Parallel lexical-tree based {LVCSR} on multi-core processors},
booktitle = {11th Annual Conference of the International Speech Communication Association,
{INTERSPEECH} 2010, Makuhari, Chiba, Japan, September 26-30, 2010},
pages = {1485--1488},
publisher = {{ISCA}},
year = {2010},
url = {https://doi.org/10.21437/Interspeech.2010-435},
doi = {10.21437/INTERSPEECH.2010-435},
timestamp = {Tue, 11 Jun 2024 16:45:43 +0200},
biburl = {https://dblp.org/rec/conf/interspeech/PariharSRH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/SanchoLK10,
author = {Jos{\'{e}} Carlos Sancho and
Michael Lang and
Darren J. Kerbyson},
title = {Analyzing the trade-off between multiple memory controllers and memory
channels on multi-core processor performance},
booktitle = {24th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2010, Atlanta, Georgia, USA, 19-23 April 2010 - Workshop Proceedings},
pages = {1--7},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IPDPSW.2010.5470812},
doi = {10.1109/IPDPSW.2010.5470812},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/SanchoLK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/WangR10,
author = {Zhe Wang and
Sanjay Ranka},
title = {A simple thermal model for multi-core processors and its application
to slack allocation},
booktitle = {24th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2010, Atlanta, Georgia, USA, 19-23 April 2010 - Conference
Proceedings},
pages = {1--11},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IPDPS.2010.5470426},
doi = {10.1109/IPDPS.2010.5470426},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/WangR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BircherJ10,
author = {William Lloyd Bircher and
Lizy K. John},
editor = {Ana Lucia Varbanescu and
Anca Mariana Molnos and
Rob van Nieuwpoort},
title = {Predictive Power Management for Multi-core Processors},
booktitle = {Computer Architecture - {ISCA} 2010 International Workshops A4MMC,
AMAS-BT, EAMA, WEED, WIOSCA, Saint-Malo, France, June 19-23, 2010,
Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {6161},
pages = {243--255},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-24322-6\_21},
doi = {10.1007/978-3-642-24322-6\_21},
timestamp = {Mon, 26 Jun 2023 20:44:16 +0200},
biburl = {https://dblp.org/rec/conf/isca/BircherJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/YanLHL10,
author = {Guihai Yan and
Xiaoyao Liang and
Yinhe Han and
Xiaowei Li},
editor = {Andr{\'{e}} Seznec and
Uri C. Weiser and
Ronny Ronen},
title = {Leveraging the core-level complementary effects of {PVT} variations
to reduce timing emergencies in multi-core processors},
booktitle = {37th International Symposium on Computer Architecture {(ISCA} 2010),
June 19-23, 2010, Saint-Malo, France},
pages = {485--496},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1815961.1816025},
doi = {10.1145/1815961.1816025},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/YanLHL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NomuraAFKK10,
author = {Kumiko Nomura and
Keiko Abe and
Shinobu Fujita and
Yasuhiko Kurosawa and
Atsushi Kageshima},
title = {Performance analysis of 3D-IC for multi-core processors in sub-65nm
{CMOS} technologies},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
30 - June 2, 2010, Paris, France},
pages = {2876--2879},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISCAS.2010.5536963},
doi = {10.1109/ISCAS.2010.5536963},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NomuraAFKK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangCCCK10,
author = {Yu Zhang and
Dongdong Chen and
Younhee Choi and
Li Chen and
Seok{-}Bum Ko},
title = {A high performance pseudo-multi-core {ECC} processor over GF(2\({}^{\mbox{163}}\))},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
30 - June 2, 2010, Paris, France},
pages = {701--704},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISCAS.2010.5537486},
doi = {10.1109/ISCAS.2010.5537486},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangCCCK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iske/LiuY10a,
author = {Jiahai Liu and
Maolin Yang},
title = {Task scheduling of real-time systems on multi-core embedded processor},
booktitle = {2010 {IEEE} International Conference on Intelligent Systems and Knowledge
Engineering, {ISKE} 2010, Hangzhou, China, November 15-16, 2010},
pages = {580--583},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISKE.2010.5680756},
doi = {10.1109/ISKE.2010.5680756},
timestamp = {Tue, 09 Nov 2021 13:25:50 +0100},
biburl = {https://dblp.org/rec/conf/iske/LiuY10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/LeeWGBCK10,
author = {Jungseob Lee and
Chi{-}Chao Wang and
Hamid Reza Ghasemi and
Lloyd Bircher and
Yu Cao and
Nam Sung Kim},
editor = {Vojin G. Oklobdzija and
Barry Pangle and
Naehyuck Chang and
Naresh R. Shanbhag and
Chris H. Kim},
title = {Workload-adaptive process tuning strategy for power-efficient multi-core
processors},
booktitle = {Proceedings of the 2010 International Symposium on Low Power Electronics
and Design, 2010, Austin, Texas, USA, August 18-20, 2010},
pages = {225--230},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1840845.1840889},
doi = {10.1145/1840845.1840889},
timestamp = {Thu, 15 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/LeeWGBCK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isorc/WolfGKUMMRCSU10,
author = {Julian Wolf and
Mike Gerdes and
Florian Kluge and
Sascha Uhrig and
J{\"{o}}rg Mische and
Stefan Metzlaff and
Christine Rochange and
Hugues Cass{\'{e}} and
Pascal Sainrat and
Theo Ungerer},
title = {{RTOS} Support for Parallel Execution of Hard Real-Time Applications
on the {MERASA} Multi-core Processor},
booktitle = {13th {IEEE} International Symposium on Object/Component/Service-Oriented
Real-Time Distributed Computing, {ISORC} 2010, Carmona, Sevilla, Spain,
5-6 May 2010},
pages = {193--201},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISORC.2010.31},
doi = {10.1109/ISORC.2010.31},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isorc/WolfGKUMMRCSU10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/OhCKH10,
author = {Dongkeun Oh and
Charlie Chung{-}Ping Chen and
Nam Sung Kim and
Yu Hen Hu},
title = {The compatibility analysis of thread migration and {DVFS} in multi-core
processor},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {866--871},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450478},
doi = {10.1109/ISQED.2010.5450478},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/OhCKH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SartoriPKG10,
author = {John Sartori and
Aashish Pant and
Rakesh Kumar and
Puneet Gupta},
title = {Variation-aware speed binning of multi-core processors},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {307--314},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450442},
doi = {10.1109/ISQED.2010.5450442},
timestamp = {Thu, 28 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/SartoriPKG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WendelKCCFFKSSTWCIZ10,
author = {Dieter F. Wendel and
Ronald N. Kalla and
Robert Cargnoni and
Joachim G. Clabes and
Joshua Friedrich and
Roland Frech and
James A. Kahle and
Balaram Sinharoy and
William J. Starke and
Scott A. Taylor and
Steve Weitzel and
Sam G. Chu and
Md. Saiful Islam and
Victor V. Zyuban},
title = {The implementation of POWER7\({}^{\mbox{TM}}\): {A} highly parallel
and scalable multi-core high-end server processor},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
2010},
pages = {102--103},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISSCC.2010.5434074},
doi = {10.1109/ISSCC.2010.5434074},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/WendelKCCFFKSSTWCIZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mmsp/MomcilovicWRV10,
author = {Svetislav Momcilovic and
Yige Wang and
Shantanu Rane and
Anthony Vetro},
title = {Toward realtime side information decoding on multi-core processors},
booktitle = {2010 {IEEE} International Workshop on Multimedia Signal Processing,
{MMSP} 2010, Saint Malo, France, October 4-6, 2010},
pages = {321--326},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/MMSP.2010.5662040},
doi = {10.1109/MMSP.2010.5662040},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/mmsp/MomcilovicWRV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nas/LiL10,
author = {Sanping Li and
Yan Luo},
title = {High Performance Flow Feature Extraction with Multi-core Processors},
booktitle = {Fifth International Conference on Networking, Architecture, and Storage,
{NAS} 2010, Macau, China, July 15-17, 2010},
pages = {193--201},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NAS.2010.36},
doi = {10.1109/NAS.2010.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nas/LiL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nas/LiZWG10,
author = {Yan Li and
Yunquan Zhang and
Ke Wang and
Wenhua Guan},
title = {Heterogeneous Multi-core Parallel {SGEMM} Performance Testing and
Analysis on Cell/B.E Processor},
booktitle = {Fifth International Conference on Networking, Architecture, and Storage,
{NAS} 2010, Macau, China, July 15-17, 2010},
pages = {202--207},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/NAS.2010.48},
doi = {10.1109/NAS.2010.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nas/LiZWG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/npc/Zhang10,
author = {Xiaodong Zhang},
editor = {Chen Ding and
Zhiyuan Shao and
Ran Zheng},
title = {Building a Domain-Knowledge Guided System Software Environment to
Achieve High-Performance of Multi-core Processors},
booktitle = {Network and Parallel Computing, {IFIP} International Conference, {NPC}
2010, Zhengzhou, China, September 13-15, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6289},
pages = {1},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-15672-4\_1},
doi = {10.1007/978-3-642-15672-4\_1},
timestamp = {Wed, 20 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/npc/Zhang10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/para/GuidettiMMPST10,
author = {Marco Guidetti and
Andrea Maiorano and
Filippo Mantovani and
Marcello Pivanti and
Sebastiano Fabio Schifano and
Raffaele Tripiccione},
editor = {Kristj{\'{a}}n J{\'{o}}nasson},
title = {Monte Carlo Simulations of Spin Systems on Multi-core Processors},
booktitle = {Applied Parallel and Scientific Computing - 10th International Conference,
{PARA} 2010, Reykjav{\'{\i}}k, Iceland, June 6-9, 2010, Revised
Selected Papers, Part {I}},
series = {Lecture Notes in Computer Science},
volume = {7133},
pages = {220--230},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-28151-8\_22},
doi = {10.1007/978-3-642-28151-8\_22},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/para/GuidettiMMPST10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/para/PetschowB10,
author = {Matthias Petschow and
Paolo Bientinesi},
editor = {Kristj{\'{a}}n J{\'{o}}nasson},
title = {The Algorithm of Multiple Relatively Robust Representations for Multi-core
Processors},
booktitle = {Applied Parallel and Scientific Computing - 10th International Conference,
{PARA} 2010, Reykjav{\'{\i}}k, Iceland, June 6-9, 2010, Revised
Selected Papers, Part {I}},
series = {Lecture Notes in Computer Science},
volume = {7133},
pages = {152--161},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-28151-8\_15},
doi = {10.1007/978-3-642-28151-8\_15},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/para/PetschowB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdcat/LiYLWFZ10,
author = {Wanqing Li and
Tang Ying and
Yunfa Li and
Wei Zhang and
Jangcong Feng and
Jilin Zhang},
title = {Analysis of Parallel Computing Environment Overhead of OpenMP for
Loop with Multi-core Processors},
booktitle = {2010 International Conference on Parallel and Distributed Computing,
Applications and Technologies, {PDCAT} 2010, Wuhan, China, 8-11 December,
2010},
pages = {514--517},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/PDCAT.2010.64},
doi = {10.1109/PDCAT.2010.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdcat/LiYLWFZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/CostaBMB10,
author = {Veronica Gil{-}Costa and
Ricardo J. Barrientos and
Mauricio Mar{\'{\i}}n and
Carolina Bonacic},
editor = {Marco Danelutto and
Julien Bourgeois and
Tom Gross},
title = {Scheduling Metric-Space Queries Processing on Multi-Core Processors},
booktitle = {Proceedings of the 18th Euromicro Conference on Parallel, Distributed
and Network-based Processing, {PDP} 2010, Pisa, Italy, February 17-19,
2010},
pages = {187--194},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/PDP.2010.94},
doi = {10.1109/PDP.2010.94},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdp/CostaBMB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/prdc/NakajimaKCSLM10,
author = {Tatsuo Nakajima and
Yuki Kinebuchi and
Alexandre Courbot and
Hiromasa Shimada and
Tsung{-}Han Lin and
Hitoshi Mitake},
editor = {Yutaka Ishikawa and
Dong Tang and
Hiroshi Nakamura},
title = {Composition Kernel: {A} Multi-core Processor Virtualization Layer
for Highly Functional Embedded Systems},
booktitle = {16th {IEEE} Pacific Rim International Symposium on Dependable Computing,
{PRDC} 2010, Tokyo, Japan, December 13-15, 2010},
pages = {223--224},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/PRDC.2010.11},
doi = {10.1109/PRDC.2010.11},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/prdc/NakajimaKCSLM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/LakshmananKR10,
author = {Karthik Lakshmanan and
Shinpei Kato and
Ragunathan Rajkumar},
title = {Scheduling Parallel Real-Time Tasks on Multi-core Processors},
booktitle = {Proceedings of the 31st {IEEE} Real-Time Systems Symposium, {RTSS}
2010, San Diego, California, USA, November 30 - December 3, 2010},
pages = {259--268},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/RTSS.2010.42},
doi = {10.1109/RTSS.2010.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtss/LakshmananKR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sac/WeiYKHC10,
author = {Yi{-}Hung Wei and
Chuan{-}Yue Yang and
Tei{-}Wei Kuo and
Shih{-}Hao Hung and
Yuan{-}Hua Chu},
editor = {Sung Y. Shin and
Sascha Ossowski and
Michael Schumacher and
Mathew J. Palakal and
Chih{-}Cheng Hung},
title = {Energy-efficient real-time scheduling of multimedia tasks on multi-core
processors},
booktitle = {Proceedings of the 2010 {ACM} Symposium on Applied Computing (SAC),
Sierre, Switzerland, March 22-26, 2010},
pages = {258--262},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1774088.1774142},
doi = {10.1145/1774088.1774142},
timestamp = {Sun, 02 Jun 2019 21:18:37 +0200},
biburl = {https://dblp.org/rec/conf/sac/WeiYKHC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/seus/NakajimaKCSLM10,
author = {Tatsuo Nakajima and
Yuki Kinebuchi and
Alexandre Courbot and
Hiromasa Shimada and
Tsung{-}Han Lin and
Hitoshi Mitake},
editor = {Sang Lyul Min and
Robert G. Pettit IV and
Peter P. Puschner and
Theo Ungerer},
title = {Composition Kernel: {A} Multi-core Processor Virtualization Layer
for Rich Functional Smart Products},
booktitle = {Software Technologies for Embedded and Ubiquitous Systems - 8th {IFIP}
{WG} 10.2 International Workshop, {SEUS} 2010, Waidhofen/Ybbs, Austria,
October 13-15, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6399},
pages = {227--238},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-16256-5\_22},
doi = {10.1007/978-3-642-16256-5\_22},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/seus/NakajimaKCSLM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vecpar/BonacicGMPT10,
author = {Carolina Bonacic and
Carlos Garc{\'{\i}}a and
Mauricio Mar{\'{\i}}n and
Manuel Prieto and
Francisco Tirado},
editor = {Jos{\'{e}} M. Laginha M. Palma and
Michel J. Dayd{\'{e}} and
Osni Marques and
Jo{\~{a}}o Correia Lopes},
title = {On-Line Multi-Threaded Processing of Web User-Clicks on Multi-Core
Processors},
booktitle = {High Performance Computing for Computational Science - {VECPAR} 2010
- 9th International conference, Berkeley, CA, USA, June 22-25, 2010,
Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {6449},
pages = {222--235},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-19328-6\_22},
doi = {10.1007/978-3-642-19328-6\_22},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vecpar/BonacicGMPT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/procedia/RabaSA10,
author = {Nikita Raba and
Elena N. Stankova and
Natalya Ampilova},
editor = {Peter M. A. Sloot and
G. Dick van Albada and
Jack J. Dongarra},
title = {On investigation of parallelization effectiveness with the help of
multi-core processors},
booktitle = {Proceedings of the International Conference on Computational Science,
{ICCS} 2010, University of Amsterdam, The Netherlands, May 31 - June
2, 2010},
series = {Procedia Computer Science},
volume = {1},
number = {1},
pages = {2763--2768},
publisher = {Elsevier},
year = {2010},
url = {https://doi.org/10.1016/j.procs.2010.04.310},
doi = {10.1016/J.PROCS.2010.04.310},
timestamp = {Thu, 08 Jul 2021 14:29:22 +0200},
biburl = {https://dblp.org/rec/journals/procedia/RabaSA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1003-0952,
author = {Vicente H. F. Batista and
George O. Ainsworth Jr. and
Fernando L. B. Ribeiro},
title = {Parallel structurally-symmetric sparse matrix-vector products on multi-core
processors},
journal = {CoRR},
volume = {abs/1003.0952},
year = {2010},
url = {http://arxiv.org/abs/1003.0952},
eprinttype = {arXiv},
eprint = {1003.0952},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1003-0952.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1006-5572,
author = {Hiroaki Inoue},
title = {A Multi-Core Processor Platform for Open Embedded Systems},
journal = {CoRR},
volume = {abs/1006.5572},
year = {2010},
url = {http://arxiv.org/abs/1006.5572},
eprinttype = {arXiv},
eprint = {1006.5572},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1006-5572.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Videau09,
author = {Brice Videau},
title = {Exp{\'{e}}rimentation sur les nouvelles architectures : des processeurs
multi-c{\oe}urs aux grilles de calcul. (Experiments on new architectures:
from multi-cores processors to computing grids)},
school = {Joseph Fourier University, Grenoble, France},
year = {2009},
url = {https://tel.archives-ouvertes.fr/tel-00924386},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Videau09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/chinaf/PangHSY09,
author = {Yi Pang and
WeiDong Hu and
Lifeng Sun and
Shiqiang Yang},
title = {Adaptive data-driven parallelization of multi-view video coding on
multi-core processor},
journal = {Sci. China Ser. {F} Inf. Sci.},
volume = {52},
number = {2},
pages = {195--205},
year = {2009},
url = {https://doi.org/10.1007/s11432-009-0042-8},
doi = {10.1007/S11432-009-0042-8},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/chinaf/PangHSY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/SommerPW09,
author = {Robin Sommer and
Vern Paxson and
Nicholas Weaver},
title = {An architecture for exploiting multi-core processors to parallelize
network intrusion prevention},
journal = {Concurr. Comput. Pract. Exp.},
volume = {21},
number = {10},
pages = {1255--1279},
year = {2009},
url = {https://doi.org/10.1002/cpe.1422},
doi = {10.1002/CPE.1422},
timestamp = {Mon, 02 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/concurrency/SommerPW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/ZhouYH09,
author = {Shujia Zhou and
Yelena Yesha and
Milton Halem},
title = {Special Issue: Exploring the Frontiers of Computing Science and Technology:
Adapting Emerging Multi- and Many-core Processors},
journal = {Concurr. Comput. Pract. Exp.},
volume = {21},
number = {17},
pages = {2141--2142},
year = {2009},
url = {https://doi.org/10.1002/cpe.1488},
doi = {10.1002/CPE.1488},
timestamp = {Mon, 02 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/concurrency/ZhouYH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/SeshadriLC09,
author = {Sangeetha Seshadri and
Ling Liu and
Lawrence Chiu},
title = {Recovery scopes, recovery groups, and fine-grained recovery in enterprise
storage controllers with multi-core processors},
journal = {{IBM} J. Res. Dev.},
volume = {53},
number = {2},
pages = {9},
year = {2009},
url = {https://doi.org/10.1147/JRD.2009.5429051},
doi = {10.1147/JRD.2009.5429051},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ibmrd/SeshadriLC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/KimKKLY09,
author = {Donghyun Kim and
Kwanho Kim and
Joo{-}Young Kim and
Seungjin Lee and
Hoi{-}Jun Yoo},
title = {Memory-centric network-on-chip for power efficient execution of task-level
pipeline on a multi-core processor},
journal = {{IET} Comput. Digit. Tech.},
volume = {3},
number = {5},
pages = {513--524},
year = {2009},
url = {https://doi.org/10.1049/iet-cdt.2008.0085},
doi = {10.1049/IET-CDT.2008.0085},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/KimKKLY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/imt/SatoFMK09,
author = {Shimpei Sato and
Naoki Fujieda and
Akira Moriya and
Kenji Kise},
title = {SimCell: {A} Processor Simulator for Multi-Core Architecture Research},
journal = {Inf. Media Technol.},
volume = {4},
number = {2},
pages = {270--281},
year = {2009},
url = {https://doi.org/10.11185/imt.4.270},
doi = {10.11185/IMT.4.270},
timestamp = {Thu, 05 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/imt/SatoFMK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsiaml/ToyokawaKTN09,
author = {Hiroki Toyokawa and
Kinji Kimura and
Masami Takata and
Yoshimasa Nakamura},
title = {On parallelism of the {I-SVD} algorithm with a multi-core processor},
journal = {{JSIAM} Lett.},
volume = {1},
pages = {48--51},
year = {2009},
url = {https://doi.org/10.14495/jsiaml.1.48},
doi = {10.14495/JSIAML.1.48},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jsiaml/ToyokawaKTN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KonstadinidisTC09,
author = {Georgios K. Konstadinidis and
Marc Tremblay and
Shailender Chaudhry and
Mamun Rashid and
Peter F. Lai and
Yukio Otaguro and
Yannis Orginos and
Sudhendra Parampalli and
Mark Steigerwald and
Shriram Gundala and
Rambabu Pyapali and
Leonard Rarick and
Ilyas Elkin and
Yuefei Ge and
Ishwar Parulkar},
title = {Architecture and Physical Implementation of a Third Generation 65
nm, 16 Core, 32 Thread Chip-Multithreading {SPARC} Processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {44},
number = {1},
pages = {7--17},
year = {2009},
url = {https://doi.org/10.1109/JSSC.2008.2007144},
doi = {10.1109/JSSC.2008.2007144},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/KonstadinidisTC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/MoriUNTSFKMMAMO09,
author = {Tatsuya Mori and
Yasuyuki Ueda and
Nobuhiro Nonogaki and
Toshihiro Terazawa and
Milosz Sroka and
Tetsuya Fujita and
Takeshi Kodaka and
Takayuki Mori and
Kumiko Morita and
Hideho Arakida and
Takashi Miura and
Yuji Okuda and
Toshiki Kizu and
Yoshiro Tsuboi},
title = {A Power, Performance Scalable Eight-Cores Media Processor for Mobile
Multimedia Applications},
journal = {{IEEE} J. Solid State Circuits},
volume = {44},
number = {11},
pages = {2957--2965},
year = {2009},
url = {https://doi.org/10.1109/JSSC.2009.2028936},
doi = {10.1109/JSSC.2009.2028936},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/MoriUNTSFKMMAMO09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ppl/Soliman09,
author = {Mostafa I. Soliman},
title = {Performance Evaluation of Multi-Core Intel Xeon Processors on Basic
Linear Algebra Subprograms},
journal = {Parallel Process. Lett.},
volume = {19},
number = {1},
pages = {159--174},
year = {2009},
url = {https://doi.org/10.1142/S0129626409000134},
doi = {10.1142/S0129626409000134},
timestamp = {Tue, 24 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ppl/Soliman09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pvldb/LeeDCLZ09,
author = {Rubao Lee and
Xiaoning Ding and
Feng Chen and
Qingda Lu and
Xiaodong Zhang},
title = {{MCC-DB:} Minimizing Cache Conflicts in Multi-core Processors for
Databases},
journal = {Proc. {VLDB} Endow.},
volume = {2},
number = {1},
pages = {373--384},
year = {2009},
url = {http://www.vldb.org/pvldb/vol2/vldb09-248.pdf},
doi = {10.14778/1687627.1687670},
timestamp = {Sat, 25 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pvldb/LeeDCLZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sp/Araya-PoloRCHCS09,
author = {Mauricio Araya{-}Polo and
F{\'{e}}lix Rubio and
Ra{\'{u}}l de la Cruz and
Mauricio Hanzich and
Jos{\'{e}} Mar{\'{\i}}a Cela and
Daniele Paolo Scarpazza},
title = {3D seismic imaging through reverse-time migration on homogeneous and
heterogeneous multi-core processors},
journal = {Sci. Program.},
volume = {17},
number = {1-2},
pages = {185--198},
year = {2009},
url = {https://doi.org/10.3233/SPR-2009-0271},
doi = {10.3233/SPR-2009-0271},
timestamp = {Wed, 06 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sp/Araya-PoloRCHCS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BowmanASW09,
author = {Keith A. Bowman and
Alaa R. Alameldeen and
Srikanth T. Srinivasan and
Chris Wilkerson},
title = {Impact of Die-to-Die and Within-Die Parameter Variations on the Clock
Frequency and Throughput of Multi-Core Processors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {12},
pages = {1679--1690},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2006057},
doi = {10.1109/TVLSI.2008.2006057},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/BowmanASW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/LiTWZC09,
author = {Wenlong Li and
Xiaofeng Tong and
Tao Wang and
Yimin Zhang and
Yen{-}Kuang Chen},
title = {Parallelization Strategies and Performance Analysis of Media Mining
Applications on Multi-Core Processors},
journal = {J. Signal Process. Syst.},
volume = {57},
number = {2},
pages = {213--228},
year = {2009},
url = {https://doi.org/10.1007/s11265-008-0320-5},
doi = {10.1007/S11265-008-0320-5},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/LiTWZC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ACMse/YalamanchiliMT09,
author = {Pavan Yalamanchili and
Sumod K. Mohan and
Tarek M. Taha},
editor = {John D. McGregor},
title = {Implementing a hierarchical Bayesian visual cortex model on multi-core
processors},
booktitle = {Proceedings of the 47th Annual Southeast Regional Conference, 2009,
Clemson, South Carolina, USA, March 19-21, 2009},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1566445.1566484},
doi = {10.1145/1566445.1566484},
timestamp = {Fri, 12 Mar 2021 15:27:48 +0100},
biburl = {https://dblp.org/rec/conf/ACMse/YalamanchiliMT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ISCApdcs/AhmedAR09,
author = {Mohamed F. Ahmed and
Reda A. Ammar and
Sanguthevar Rajasekaran},
editor = {James H. Graham and
Anthony Skjellum},
title = {Optimal Micro-Threading Scheduling for Multi-Core Processors to Hide
Memory Latency},
booktitle = {22nd International Conference on Parallel and Distributed Computing
and Communication Systems, {PDCCS} 2009, September 24-26, 2009, Marriott
Louisville Downtown, Louisville, Kentucky, {USA}},
pages = {221--227},
publisher = {{ISCA}},
year = {2009},
timestamp = {Mon, 09 Aug 2021 16:35:40 +0200},
biburl = {https://dblp.org/rec/conf/ISCApdcs/AhmedAR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acivs/KumarPMS09,
author = {Praveen Kumar and
Kannappan Palaniappan and
Ankush Mittal and
Guna Seetharaman},
editor = {Jacques Blanc{-}Talon and
Wilfried Philips and
Dan C. Popescu and
Paul Scheunders},
title = {Parallel Blob Extraction Using the Multi-core Cell Processor},
booktitle = {Advanced Concepts for Intelligent Vision Systems, 11th International
Conference, {ACIVS} 2009, Bordeaux, France, September 28 - October
2, 2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5807},
pages = {320--332},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-04697-1\_30},
doi = {10.1007/978-3-642-04697-1\_30},
timestamp = {Fri, 27 Dec 2019 21:26:39 +0100},
biburl = {https://dblp.org/rec/conf/acivs/KumarPMS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ae/Tsutsui09,
author = {Shigeyoshi Tsutsui},
editor = {Pierre Collet and
Nicolas Monmarch{\'{e}} and
Pierrick Legrand and
Marc Schoenauer and
Evelyne Lutton},
title = {Parallelization of an Evolutionary Algorithm on a Platform with Multi-core
Processors},
booktitle = {Artifical Evolution, 9th International Conference, Evolution Artificielle,
EA, 2009, Strasbourg, France, October 26-28, 2009. Revised Selected
Papers},
series = {Lecture Notes in Computer Science},
volume = {5975},
pages = {61--73},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-14156-0\_6},
doi = {10.1007/978-3-642-14156-0\_6},
timestamp = {Tue, 14 May 2019 10:00:50 +0200},
biburl = {https://dblp.org/rec/conf/ae/Tsutsui09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/amcc/AzimiG09,
author = {Ali Azimi and
Brandon W. Gordon},
title = {Dynamic processor allocation for multiple {RHC} systems in multi-core
computing environments},
booktitle = {American Control Conference, {ACC} 2009. St. Louis, Missouri, USA,
June 10-12, 2009},
pages = {4921--4926},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ACC.2009.5160633},
doi = {10.1109/ACC.2009.5160633},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/amcc/AzimiG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/LiaoBGK09,
author = {Guangdeng Liao and
Laxmi N. Bhuyan and
Danhua Guo and
Steve R. King},
editor = {Peter Z. Onufryk and
K. K. Ramakrishnan and
Patrick Crowley and
John Wroclawski},
title = {{EINIC:} an architecture for high bandwidth network {I/O} on multi-core
processors},
booktitle = {Proceedings of the 2009 {ACM/IEEE} Symposium on Architecture for Networking
and Communications Systems, {ANCS} 2009, Princeton, New Jersey, USA,
October 19-20, 2009},
pages = {68--69},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1882486.1882503},
doi = {10.1145/1882486.1882503},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ancs/LiaoBGK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Edahiro09,
author = {Masato Edahiro},
editor = {Kazutoshi Wakabayashi},
title = {Parallelizing fundamental algorithms such as sorting on multi-core
processors for {EDA} acceleration},
booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2009, Yokohama, Japan, January 19-22, 2009},
pages = {230--233},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ASPDAC.2009.4796485},
doi = {10.1109/ASPDAC.2009.4796485},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Edahiro09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KwonKE09,
author = {Young{-}Su Kwon and
Bontae Koo and
Nak{-}Woong Eum},
editor = {Kazutoshi Wakabayashi},
title = {Partial conflict-relieving programmable address shuffler for parallel
memories in multi-core processor},
booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2009, Yokohama, Japan, January 19-22, 2009},
pages = {329--334},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ASPDAC.2009.4796502},
doi = {10.1109/ASPDAC.2009.4796502},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KwonKE09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccnc/ChoIS10,
author = {Seung Mo Cho and
Dong{-}Woo Im and
Hyo{-}Jung Song},
title = {Parallelization and analysis of speech recognition on mobile multi-core
processor},
booktitle = {6th {IEEE} Consumer Communications and Networking Conference, {CCNC}
2009, Las Vegas, NV, USA, 10-13 Jan., 2009},
pages = {1--2},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/CCNC.2009.4784794},
doi = {10.1109/CCNC.2009.4784794},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/ccnc/ChoIS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/WestPTM09,
author = {Paul E. West and
Yuval Peress and
Gary S. Tyson and
Sally A. McKee},
editor = {Gearold Johnson and
Carsten Trinitis and
Georgi Gaydadjiev and
Alexander V. Veidenbaum},
title = {Core monitors: monitoring performance in multicore processors},
booktitle = {Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia,
Italy, May 18-20, 2009},
pages = {31--40},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1531743.1531751},
doi = {10.1145/1531743.1531751},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/WestPTM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cisis/BajrovicM09,
author = {Enes Bajrovic and
Eduard Mehofer},
editor = {Leonard Barolli and
Fatos Xhafa and
Hui{-}Huang Hsu},
title = {Experimental Study of Multithreading to Improve Memory Hierarchy Performance
of Multi-core Processors for Scientific Applications},
booktitle = {2009 International Conference on Complex, Intelligent and Software
Intensive Systems, {CISIS} 2009, Fukuoka, Japan, March 16-19, 2009},
pages = {645--650},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/CISIS.2009.110},
doi = {10.1109/CISIS.2009.110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cisis/BajrovicM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cmg/McGalliardS09,
author = {James W. McGalliard and
Tyler A. Simon},
title = {Multi-Core Processor Memory Contention Benchmark Analysis Case Study},
booktitle = {35. International Computer Measurement Group Conference, Dallas, TX,
USA, December 6-11, 2009},
publisher = {Computer Measurement Group},
year = {2009},
url = {http://www.cmg.org/?s2member\_file\_download=/proceedings/2009/9059.pdf},
timestamp = {Wed, 17 Jul 2019 13:20:27 +0200},
biburl = {https://dblp.org/rec/conf/cmg/McGalliardS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChenJ09,
author = {Jian Chen and
Lizy Kurian John},
title = {Efficient program scheduling for heterogeneous multi-core processors},
booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
San Francisco, CA, USA, July 26-31, 2009},
pages = {927--930},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629911.1630149},
doi = {10.1145/1629911.1630149},
timestamp = {Wed, 12 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChenJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HanumaiahRVC09,
author = {Vinay Hanumaiah and
Ravishankar Rao and
Sarma B. K. Vrudhula and
Karam S. Chatha},
title = {Throughput optimal task allocation under thermal constraints for multi-core
processors},
booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
San Francisco, CA, USA, July 26-31, 2009},
pages = {776--781},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629911.1630112},
doi = {10.1145/1629911.1630112},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HanumaiahRVC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LeeK09,
author = {Jungseob Lee and
Nam Sung Kim},
title = {Optimizing throughput of power- and thermal-constrained multicore
processors using {DVFS} and per-core power-gating},
booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
San Francisco, CA, USA, July 26-31, 2009},
pages = {47--50},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629911.1629926},
doi = {10.1145/1629911.1629926},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/LeeK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HanumaiahVC09,
author = {Vinay Hanumaiah and
Sarma B. K. Vrudhula and
Karam S. Chatha},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Performance optimal speed control of multi-core processors under thermal
constraints},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {1548--1551},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090908},
doi = {10.1109/DATE.2009.5090908},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/HanumaiahVC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KodakaSTONKMUAOKTM09,
author = {Takeshi Kodaka and
Shunsuke Sasaki and
Takahiro Tokuyoshi and
Ryuichiro Ohyama and
Nobuhiro Nonogaki and
Koji Kitayama and
Tatsuya Mori and
Yasuyuki Ueda and
Hideho Arakida and
Yuji Okuda and
Toshiki Kizu and
Yoshiro Tsuboi and
Nobu Matsumoto},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Design and implementation of scalable, transparent threads for multi-core
media processor},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {1035--1039},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090816},
doi = {10.1109/DATE.2009.5090816},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KodakaSTONKMUAOKTM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/LiuJLP09,
author = {Mengxiao Liu and
Weixing Ji and
Jiaxin Li and
Xing Pu},
editor = {Antonio N{\'{u}}{\~{n}}ez and
Pedro P. Carballo},
title = {Storage Architecture for an On-chip Multi-core Processor},
booktitle = {12th Euromicro Conference on Digital System Design, Architectures,
Methods and Tools, {DSD} 2009, 27-29 August 2009, Patras, Greece},
pages = {263--270},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DSD.2009.213},
doi = {10.1109/DSD.2009.213},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/LiuJLP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsrt/Lee09,
author = {Wan Yeon Lee},
editor = {Stephen John Turner and
David J. Roberts and
Wentong Cai and
Abdulmotaleb El{-}Saddik},
title = {Energy-Saving {DVFS} Scheduling of Multiple Periodic Real-Time Tasks
on Multi-core Processors},
booktitle = {13th {IEEE/ACM} International Symposium on Distributed Simulation
and Real Time Applications, Singapore, 25-28 October 2009},
pages = {216--223},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DS-RT.2009.12},
doi = {10.1109/DS-RT.2009.12},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsrt/Lee09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/LakshmananRL09,
author = {Karthik Lakshmanan and
Ragunathan Rajkumar and
John P. Lehoczky},
title = {Partitioned Fixed-Priority Preemptive Scheduling for Multi-core Processors},
booktitle = {21st Euromicro Conference on Real-Time Systems, {ECRTS} 2009, Dublin,
Ireland, July 1-3, 2009},
pages = {239--248},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ECRTS.2009.33},
doi = {10.1109/ECRTS.2009.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecrts/LakshmananRL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/edbt/BordawekarLS09,
author = {Rajesh Bordawekar and
Lipyeow Lim and
Oded Shmueli},
editor = {Martin L. Kersten and
Boris Novikov and
Jens Teubner and
Vladimir Polutin and
Stefan Manegold},
title = {Parallelization of XPath queries using multi-core processors: challenges
and experiences},
booktitle = {{EDBT} 2009, 12th International Conference on Extending Database Technology,
Saint Petersburg, Russia, March 24-26, 2009, Proceedings},
series = {{ACM} International Conference Proceeding Series},
volume = {360},
pages = {180--191},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1516360.1516382},
doi = {10.1145/1516360.1516382},
timestamp = {Wed, 04 May 2022 13:02:27 +0200},
biburl = {https://dblp.org/rec/conf/edbt/BordawekarLS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/LongFZ09,
author = {Guoping Long and
Dongrui Fan and
Junchao Zhang},
editor = {Henk J. Sips and
Dick H. J. Epema and
Hai{-}Xiang Lin},
title = {Characterizing and Understanding the Bandwidth Behavior of Workloads
on Multi-core Processors},
booktitle = {Euro-Par 2009 Parallel Processing, 15th International Euro-Par Conference,
Delft, The Netherlands, August 25-28, 2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5704},
pages = {110--121},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-03869-3\_14},
doi = {10.1007/978-3-642-03869-3\_14},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/europar/LongFZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/MarquesQQG09,
author = {Mercedes Marqu{\'{e}}s and
Gregorio Quintana{-}Ort{\'{\i}} and
Enrique S. Quintana{-}Ort{\'{\i}} and
Robert A. van de Geijn},
editor = {Henk J. Sips and
Dick H. J. Epema and
Hai{-}Xiang Lin},
title = {Out-of-Core Computation of the {QR} Factorization on Multi-core Processors},
booktitle = {Euro-Par 2009 Parallel Processing, 15th International Euro-Par Conference,
Delft, The Netherlands, August 25-28, 2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5704},
pages = {809--820},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-03869-3\_75},
doi = {10.1007/978-3-642-03869-3\_75},
timestamp = {Thu, 13 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/europar/MarquesQQG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eusipco/PariharH09,
author = {Naveen Parihar and
Eric A. Hansen},
title = {Analysis of a parallel lexical-tree-based speech decoder for multi-core
processors},
booktitle = {17th European Signal Processing Conference, {EUSIPCO} 2009, Glasgow,
Scotland, UK, August 24-28, 2009},
pages = {2509--2513},
publisher = {{IEEE}},
year = {2009},
url = {https://ieeexplore.ieee.org/document/7077455/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eusipco/PariharH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fit/IsmailMA09,
author = {Muhammad Ali Ismail and
Shahid H. Mirza and
Talat Altaf},
editor = {Sajjad Ahmad Madani},
title = {Design of a cache hierarchy for LogN and LogN+1 model for multi-level
cache system for multi-core processors},
booktitle = {{FIT} '09, 7th International Conference on Frontiers of Information
Technology, Abbottabad, Pakistan, December 16-18, 2009},
pages = {24:1--24:6},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1838002.1838029},
doi = {10.1145/1838002.1838029},
timestamp = {Tue, 06 Nov 2018 11:07:00 +0100},
biburl = {https://dblp.org/rec/conf/fit/IsmailMA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KapreD09,
author = {Nachiket Kapre and
Andr{\'{e}} DeHon},
editor = {Martin Danek and
Jiri Kadlec and
Brent E. Nelson},
title = {Performance comparison of single-precision {SPICE} Model-Evaluation
on FPGA, GPU, Cell, and multi-core processors},
booktitle = {19th International Conference on Field Programmable Logic and Applications,
{FPL} 2009, August 31 - September 2, 2009, Prague, Czech Republic},
pages = {65--72},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/FPL.2009.5272548},
doi = {10.1109/FPL.2009.5272548},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KapreD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KadinRU09,
author = {Michael Kadin and
Sherief Reda and
Augustus K. Uht},
editor = {Fabrizio Lombardi and
Sanjukta Bhanja and
Yehia Massoud and
R. Iris Bahar},
title = {Central vs. distributed dynamic thermal management for multi-core
processors: which one is better?},
booktitle = {Proceedings of the 19th {ACM} Great Lakes Symposium on {VLSI} 2009,
Boston Area, MA, USA, May 10-12 2009},
pages = {137--140},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1531542.1531577},
doi = {10.1145/1531542.1531577},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KadinRU09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hoti/JangJ09,
author = {Hye{-}Churn Jang and
Hyun{-}Wook Jin},
editor = {Keren Bergman and
Ron Brightwell and
Fabrizio Petrini and
Head Bubba},
title = {MiAMI: Multi-core Aware Processor Affinity for {TCP/IP} over Multiple
Network Interfaces},
booktitle = {17th {IEEE} Symposium on High Performance Interconnects, {HOTI} 2009,
New York, New York, USA, August 25-27, 2009},
pages = {73--82},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/HOTI.2009.19},
doi = {10.1109/HOTI.2009.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hoti/JangJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/KhanFXZ09,
author = {Haroon{-}Ur{-}Rashid Khan and
Shi Feng and
Jia Xinli and
Bai Ziru},
title = {Performance of Triplet Based Interconnection Strategy for Multi-Core
On-Chip Processors},
booktitle = {11th {IEEE} International Conference on High Performance Computing
and Communications, {HPCC} 2009, 25-27 June 2009, Seoul, Korea},
pages = {163--170},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/HPCC.2009.81},
doi = {10.1109/HPCC.2009.81},
timestamp = {Tue, 08 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/KhanFXZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcs/MuhammadE09,
author = {Nasim Muhammad and
Hermann J. Eberl},
editor = {Douglas J. K. Mewhort and
Natalie M. Cann and
Gary W. Slater and
Thomas J. Naughton},
title = {OpenMP Parallelization of a Mickens Time-Integration Scheme for a
Mixed-Culture Biofilm Model and Its Performance on Multi-core and
Multi-processor Computers},
booktitle = {High Performance Computing Systems and Applications, 23rd International
Symposium, {HPCS} 2009, Kingston, ON, Canada, June 14-17, 2009, Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {5976},
pages = {180--195},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-12659-8\_14},
doi = {10.1007/978-3-642-12659-8\_14},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcs/MuhammadE09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ic3/AhmadAWMI09,
author = {Ishfaq Ahmad and
Roman Arora and
Derek White and
Vangelis Metsis and
Rebecca Ingram},
editor = {Sanjay Ranka and
Srinivas Aluru and
Rajkumar Buyya and
Yeh{-}Ching Chung and
Sumeet Dua and
Ananth Grama and
Sandeep K. S. Gupta and
Rajeev Kumar and
Vir V. Phoha},
title = {Energy-Constrained Scheduling of DAGs on Multi-core Processors},
booktitle = {Contemporary Computing - Second International Conference, {IC3} 2009,
Noida, India, August 17-19, 2009. Proceedings},
series = {Communications in Computer and Information Science},
volume = {40},
pages = {592--603},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-03547-0\_56},
doi = {10.1007/978-3-642-03547-0\_56},
timestamp = {Wed, 24 May 2017 08:31:10 +0200},
biburl = {https://dblp.org/rec/conf/ic3/AhmadAWMI09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HanumaiahVC09,
author = {Vinay Hanumaiah and
Sarma B. K. Vrudhula and
Karam S. Chatha},
editor = {Jaijeet S. Roychowdhury},
title = {Maximizing performance of thermally constrained multi-core processors
by dynamic voltage and frequency control},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {310--313},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687458},
doi = {10.1145/1687399.1687458},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/HanumaiahVC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/Schubert09,
author = {Klaus{-}Dieter Schubert},
editor = {Jaijeet S. Roychowdhury},
title = {{POWER7} - Verification challenge of a multi-core processor},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {809--812},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687551},
doi = {10.1145/1687399.1687551},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/Schubert09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/JangYKSC09,
author = {Hyung Beom Jang and
Ikroh Yoon and
Cheol Hong Kim and
Seungwon Shin and
Sung Woo Chung},
title = {The impact of liquid cooling on 3D multi-core processors},
booktitle = {27th International Conference on Computer Design, {ICCD} 2009, Lake
Tahoe, CA, USA, October 4-7, 2009},
pages = {472--478},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ICCD.2009.5413115},
doi = {10.1109/ICCD.2009.5413115},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/JangYKSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/CheungAKF09,
author = {Ngai{-}Man Cheung and
Oscar C. Au and
Man Cheung Kung and
Xiaopeng Fan},
title = {Parallel rate-distortion optimized intra mode decision on multi-core
graphics processors using greedy-based encoding orders},
booktitle = {Proceedings of the International Conference on Image Processing, {ICIP}
2009, 7-10 November 2009, Cairo, Egypt},
pages = {2309--2312},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ICIP.2009.5414475},
doi = {10.1109/ICIP.2009.5414475},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icip/CheungAKF09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpads/WangQYXL09,
author = {Xiang Wang and
Yaxuan Qi and
Baohua Yang and
Yibo Xue and
Jun Li},
title = {Towards High-Performance Network Intrusion Prevention System on Multi-core
Network Services Processor},
booktitle = {15th {IEEE} International Conference on Parallel and Distributed Systems,
{ICPADS} 2009, Shenzhen, China, December 8-11, 2009},
pages = {220--227},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ICPADS.2009.109},
doi = {10.1109/ICPADS.2009.109},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpads/WangQYXL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icse/HughesMPSSY09,
author = {James P. Hughes and
Gary Morton and
Jan Pechanec and
Christoph L. Schuba and
Lawrence Spracklen and
Bhargava Yenduri},
title = {Transparent multi-core cryptographic support on Niagara {CMT} Processors},
booktitle = {Proceedings of the 2009 {ICSE} Workshop on Multicore Software Engineering,
{IWMSE} '09, Vancouver, BC, Canada, May 18, 2009},
pages = {81--88},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IWMSE.2009.5071387},
doi = {10.1109/IWMSE.2009.5071387},
timestamp = {Mon, 29 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icse/HughesMPSSY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icse/SondagR09,
author = {Tyler Sondag and
Hridesh Rajan},
title = {Phase-guided thread-to-core assignment for improved utilization of
performance-asymmetric multi-core processors},
booktitle = {Proceedings of the 2009 {ICSE} Workshop on Multicore Software Engineering,
{IWMSE} '09, Vancouver, BC, Canada, May 18, 2009},
pages = {73--80},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IWMSE.2009.5071386},
doi = {10.1109/IWMSE.2009.5071386},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icse/SondagR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/imcsit/GepnerFKT09,
author = {Pawel Gepner and
David L. Fraser and
Michal Filip Kowalik and
R. Tylman},
title = {New multi-core Intel Xeon processors help design energy efficient
solution for high performance computing},
booktitle = {Proceedings of the International Multiconference on Computer Science
and Information Technology, {IMCSIT} 2009, Mragowo, Poland, 12-14
October 2009},
pages = {567--571},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/IMCSIT.2009.5352782},
doi = {10.1109/IMCSIT.2009.5352782},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/imcsit/GepnerFKT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/MarquesQQG09,
author = {Mercedes Marqu{\'{e}}s and
Gregorio Quintana{-}Ort{\'{\i}} and
Enrique S. Quintana{-}Ort{\'{\i}} and
Robert A. van de Geijn},
title = {Solving "large" dense matrix problems on multi-core processors},
booktitle = {23rd {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2009, Rome, Italy, May 23-29, 2009},
pages = {1--8},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/IPDPS.2009.5161162},
doi = {10.1109/IPDPS.2009.5161162},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/MarquesQQG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PowellBGM09,
author = {Michael D. Powell and
Arijit Biswas and
Shantanu Gupta and
Shubhendu S. Mukherjee},
editor = {Stephen W. Keckler and
Luiz Andr{\'{e}} Barroso},
title = {Architectural core salvaging in a multi-core processor for hard-error
tolerance},
booktitle = {36th International Symposium on Computer Architecture {(ISCA} 2009),
June 20-24, 2009, Austin, TX, {USA}},
pages = {93--104},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1555754.1555769},
doi = {10.1145/1555754.1555769},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/PowellBGM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/AyoubR09,
author = {Raid Zuhair Ayoub and
Tajana Simunic Rosing},
editor = {J{\"{o}}rg Henkel and
Ali Keshavarzi and
Naehyuck Chang and
Tahir Ghani},
title = {Predict and act: dynamic thermal management for multi-core processors},
booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics
and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
pages = {99--104},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1594233.1594256},
doi = {10.1145/1594233.1594256},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/AyoubR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispa/SuoY09,
author = {Guang Suo and
Xuejun Yang},
title = {Balancing Parallel Applications on Multi-core Processors Based on
Cache Partitioning},
booktitle = {{IEEE} International Symposium on Parallel and Distributed Processing
with Applications, {ISPA} 2009, Chengdu, Sichuan, China, 10-12 August
2009},
pages = {190--195},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISPA.2009.37},
doi = {10.1109/ISPA.2009.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispa/SuoY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/RossiCDMPWECGKH09,
author = {Davide Rossi and
Fabio Campi and
Antonio Deledda and
Claudio Mucci and
Stefano Pucillo and
Sean Whitty and
Rolf Ernst and
St{\'{e}}phane Chevobbe and
St{\'{e}}phane Guyetant and
Matthias K{\"{u}}hnle and
Michael H{\"{u}}bner and
J{\"{u}}rgen Becker and
Wolfram Putzke{-}R{\"{o}}ming},
title = {A multi-core signal processor for heterogeneous reconfigurable computing},
booktitle = {2008 {IEEE} International Symposium on System-on-Chip, {SOC} 2009,
Tampere, Finland, October 6-7, 2008},
pages = {106--109},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/SOCC.2009.5335668},
doi = {10.1109/SOCC.2009.5335668},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/issoc/RossiCDMPWECGKH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/SarkarMRM09,
author = {Abhik Sarkar and
Frank Mueller and
Harini Ramaprasad and
Sibin Mohan},
editor = {Christoph M. Kirsch and
Mahmut T. Kandemir},
title = {Push-assisted migration of real-time tasks in multi-core processors},
booktitle = {Proceedings of the 2009 {ACM} {SIGPLAN/SIGBED} conference on Languages,
compilers, and tools for embedded systems, {LCTES} 2009, Dublin, Ireland,
June 19-20, 2009},
pages = {80--89},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1542452.1542464},
doi = {10.1145/1542452.1542464},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/SarkarMRM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Sinharoy09,
author = {Balaram Sinharoy},
editor = {David H. Albonesi and
Margaret Martonosi and
David I. August and
Jos{\'{e}} F. Mart{\'{\i}}nez},
title = {{POWER7} multi-core processor design},
booktitle = {42st Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-42} 2009), December 12-16, 2009, New York, New York, {USA}},
pages = {1},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1669112.1669114},
doi = {10.1145/1669112.1669114},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/Sinharoy09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nabic/RaiNWN09,
author = {Jitendra Kumar Rai and
Atul Negi and
Rajeev Wankar and
K. D. Nayak},
title = {Characterizing {L2} Cache Behavior of Programs on Multi-core Processors:
Regression Models and their Transferability},
booktitle = {World Congress on Nature {\&} Biologically Inspired Computing,
NaBIC 2009, 9-11 December 2009, Coimbatore, India},
pages = {1673--1676},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/NABIC.2009.5393643},
doi = {10.1109/NABIC.2009.5393643},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nabic/RaiNWN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nas/JamalQMWD09,
author = {Muhammad Hasan Jamal and
Abdul Qadeer and
Waqar Mahmood and
Abdul Waheed and
Jianxun Jason Ding},
title = {Virtual Machine Scalability on Multi-Core Processors Based Servers
for Cloud Computing Workloads},
booktitle = {International Conference on Networking, Architecture, and Storage,
{NAS} 2009, 9-11 July 2009, Zhang Jia Jie, Hunan, China},
pages = {90--97},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NAS.2009.20},
doi = {10.1109/NAS.2009.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nas/JamalQMWD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nas/LiuJPL09,
author = {Mengxiao Liu and
Weixing Ji and
Xing Pu and
Jiaxin Li},
title = {A Parallel Memory System Model for Multi-core Processor},
booktitle = {International Conference on Networking, Architecture, and Storage,
{NAS} 2009, 9-11 July 2009, Zhang Jia Jie, Hunan, China},
pages = {219--222},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NAS.2009.48},
doi = {10.1109/NAS.2009.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nas/LiuJPL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nsdi/TanZFLYWZWWV09,
author = {Kun Tan and
Jiansong Zhang and
Ji Fang and
He Liu and
Yusheng Ye and
Shen Wang and
Yongguang Zhang and
Haitao Wu and
Wei Wang and
Geoffrey M. Voelker},
editor = {Jennifer Rexford and
Emin G{\"{u}}n Sirer},
title = {Sora: High Performance Software Radio Using General Purpose Multi-core
Processors},
booktitle = {Proceedings of the 6th {USENIX} Symposium on Networked Systems Design
and Implementation, {NSDI} 2009, April 22-24, 2009, Boston, MA, {USA}},
pages = {75--90},
publisher = {{USENIX} Association},
year = {2009},
url = {http://www.usenix.org/events/nsdi09/tech/full\_papers/tan/tan.pdf},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nsdi/TanZFLYWZWWV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pcs/SuTCTC09,
author = {Yu{-}Chi Su and
Sung{-}Fang Tsai and
Tzu{-}Der Chuang and
You{-}Ming Tsao and
Liang{-}Gee Chen},
title = {Mapping Scalable Video Coding decoder on multi-core stream processors},
booktitle = {2009 Picture Coding Symposium, {PCS} 2009, Chicago, IL, USA, May 6-8,
2009},
pages = {1--4},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/PCS.2009.5167370},
doi = {10.1109/PCS.2009.5167370},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/pcs/SuTCTC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdcat/MoriK09,
author = {Yosuke Mori and
Kenji Kise},
title = {The Cache-Core Architecture to Enhance the Memory Performance on Multi-Core
Processors},
booktitle = {2009 International Conference on Parallel and Distributed Computing,
Applications and Technologies, {PDCAT} 2009, Higashi Hiroshima, Japan,
8-11 December 2009},
pages = {445--450},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/PDCAT.2009.84},
doi = {10.1109/PDCAT.2009.84},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdcat/MoriK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppam/Takahashi09,
author = {Daisuke Takahashi},
editor = {Roman Wyrzykowski and
Jack J. Dongarra and
Konrad Karczewski and
Jerzy Wasniewski},
title = {An Implementation of Parallel 3-D {FFT} with 2-D Decomposition on
a Massively Parallel Cluster of Multi-core Processors},
booktitle = {Parallel Processing and Applied Mathematics, 8th International Conference,
{PPAM} 2009, Wroclaw, Poland, September 13-16, 2009. Revised Selected
Papers, Part {I}},
series = {Lecture Notes in Computer Science},
volume = {6067},
pages = {606--614},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-14390-8\_63},
doi = {10.1007/978-3-642-14390-8\_63},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ppam/Takahashi09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtcsa/SunZ09,
author = {Yu Sun and
Wei Zhang},
title = {Exploiting Multi-core Processors to Improve Time Predictability for
Real-Time Java Computing},
booktitle = {15th {IEEE} International Conference on Embedded and Real-Time Computing
Systems and Applications, {RTCSA} 2009, Beijing, China, 24-26 August
2009},
pages = {447--454},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RTCSA.2009.54},
doi = {10.1109/RTCSA.2009.54},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtcsa/SunZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtcsa/ZhangY09,
author = {Wei Zhang and
Jun Yan},
title = {Accurately Estimating Worst-Case Execution Time for Multi-core Processors
with Shared Direct-Mapped Instruction Caches},
booktitle = {15th {IEEE} International Conference on Embedded and Real-Time Computing
Systems and Applications, {RTCSA} 2009, Beijing, China, 24-26 August
2009},
pages = {455--463},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RTCSA.2009.55},
doi = {10.1109/RTCSA.2009.55},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtcsa/ZhangY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/HardyPP09,
author = {Damien Hardy and
Thomas Piquet and
Isabelle Puaut},
editor = {Theodore P. Baker},
title = {Using Bypass to Tighten {WCET} Estimates for Multi-Core Processors
with Shared Instruction Caches},
booktitle = {Proceedings of the 30th {IEEE} Real-Time Systems Symposium, {RTSS}
2009, Washington, DC, USA, 1-4 December 2009},
pages = {68--77},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RTSS.2009.34},
doi = {10.1109/RTSS.2009.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtss/HardyPP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sasp/HanYZMAE09,
author = {Wei Han and
Ying Yi and
Xin Zhao and
Mark Muir and
Tughrul Arslan and
Ahmet T. Erdogan},
title = {Heterogeneous multi-core architectures with dynamically reconfigurable
processors for wireless communication},
booktitle = {Proceedings of the {IEEE} 7th Symposium on Application Specific Processors,
{SASP} 2009, San Francisco, CA, {USA} , July 27-28, 2009},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/SASP.2009.5226347},
doi = {10.1109/SASP.2009.5226347},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sasp/HanYZMAE09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sipew/ChoZL09,
author = {Chang{-}Burm Cho and
Wangyuan Zhang and
Tao Li},
editor = {David R. Kaeli and
Kai Sachs},
title = {Thermal Design Space Exploration of 3D Die Stacked Multi-core Processors
Using Geospatial-Based Predictive Models},
booktitle = {Computer Performance Evaluation and Benchmarking, {SPEC} Benchmark
Workshop 2009, Austin, TX, USA, January 25, 2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5419},
pages = {102--120},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-540-93799-9\_7},
doi = {10.1007/978-3-540-93799-9\_7},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/sipew/ChoZL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/HanYZMAE09,
author = {Wei Han and
Ying Yi and
Xin Zhao and
Mark Muir and
Tughrul Arslan and
Ahmet T. Erdogan},
title = {Heterogeneous multi-core architectures with dynamically reconfigurable
processors for WiMAX transmitter},
booktitle = {Annual {IEEE} International SoC Conference, SoCC 2009, September 9-11,
2009, Belfast, Northern Ireland, UK, Proceedings},
pages = {97--100},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/SOCCON.2009.5398085},
doi = {10.1109/SOCCON.2009.5398085},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/socc/HanYZMAE09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:series/icas/Hofstee09,
author = {H. Peter Hofstee},
editor = {Stephen W. Keckler and
Kunle Olukotun and
H. Peter Hofstee},
title = {Heterogeneous Multi-core Processors: The Cell Broadband Engine},
booktitle = {Multicore Processors and Systems},
series = {Integrated Circuits and Systems},
pages = {271--295},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-1-4419-0263-4\_9},
doi = {10.1007/978-1-4419-0263-4\_9},
timestamp = {Mon, 06 May 2019 19:20:42 +0200},
biburl = {https://dblp.org/rec/series/icas/Hofstee09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:series/icas/MooreC09,
author = {Chuck Moore and
Pat Conway},
editor = {Stephen W. Keckler and
Kunle Olukotun and
H. Peter Hofstee},
title = {General-Purpose Multi-core Processors},
booktitle = {Multicore Processors and Systems},
series = {Integrated Circuits and Systems},
pages = {173--203},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-1-4419-0263-4\_6},
doi = {10.1007/978-1-4419-0263-4\_6},
timestamp = {Mon, 06 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/series/icas/MooreC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FideJ08,
author = {Sevin Fide and
Stephen F. Jenks},
title = {Proactive Use of Shared {L3} Caches to Enhance Cache Communications
in Multi-Core Processors},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {7},
number = {2},
pages = {57--60},
year = {2008},
url = {https://doi.org/10.1109/L-CA.2008.10},
doi = {10.1109/L-CA.2008.10},
timestamp = {Sun, 05 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/FideJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cg/ThomaszewskiPB08,
author = {Bernhard Thomaszewski and
Simon Pabst and
Wolfgang Blochinger},
title = {Parallel techniques for physically based simulation on multi-core
processor architectures},
journal = {Comput. Graph.},
volume = {32},
number = {1},
pages = {25--40},
year = {2008},
url = {https://doi.org/10.1016/j.cag.2007.11.003},
doi = {10.1016/J.CAG.2007.11.003},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cg/ThomaszewskiPB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijcse/WeidendorferT08,
author = {Josef Weidendorfer and
Carsten Trinitis},
title = {Off-loading application controlled data prefetching in numerical codes
for multi-core processors},
journal = {Int. J. Comput. Sci. Eng.},
volume = {4},
number = {1},
pages = {22--28},
year = {2008},
url = {https://doi.org/10.1504/IJCSE.2008.021109},
doi = {10.1504/IJCSE.2008.021109},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijcse/WeidendorferT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/imt/Tanaka0A08,
author = {Katsunori Tanaka and
Yuichi Nakamura and
Atsushi Atarashi},
title = {A Study of Multi-core Processor Design with Asynchronous Interconnect
Using Synchronous Design Tools},
journal = {Inf. Media Technol.},
volume = {3},
number = {4},
pages = {671--679},
year = {2008},
url = {https://doi.org/10.11185/imt.3.671},
doi = {10.11185/IMT.3.671},
timestamp = {Wed, 28 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/imt/Tanaka0A08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ipsj/TanakaNA08,
author = {Katsunori Tanaka and
Yuichi Nakamura and
Atsushi Atarashi},
title = {A Study of Multi-core Processor Design with Asynchronous Interconnect
Using Synchronous Design Tools},
journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.},
volume = {1},
pages = {58--66},
year = {2008},
url = {https://doi.org/10.2197/ipsjtsldm.1.58},
doi = {10.2197/IPSJTSLDM.1.58},
timestamp = {Fri, 10 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ipsj/TanakaNA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ChienTCL08,
author = {Shao{-}Yi Chien and
You{-}Ming Tsao and
Chin{-}Hsiang Chang and
Yu{-}Cheng Lin},
title = {An 8.6 mW 25 Mvertices/s 400-MFLOPS 800-MOPS 8.91 mm\({}^{\mbox{2}}\)
Multimedia Stream Processor Core for Mobile Applications},
journal = {{IEEE} J. Solid State Circuits},
volume = {43},
number = {9},
pages = {2025--2035},
year = {2008},
url = {https://doi.org/10.1109/JSSC.2008.2001898},
doi = {10.1109/JSSC.2008.2001898},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/ChienTCL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/AlamAV08,
author = {Sadaf R. Alam and
Pratul K. Agarwal and
Jeffrey S. Vetter},
title = {Performance characteristics of biomolecular simulations on high-end
systems with multi-core processors},
journal = {Parallel Comput.},
volume = {34},
number = {11},
pages = {640--651},
year = {2008},
url = {https://doi.org/10.1016/j.parco.2008.05.003},
doi = {10.1016/J.PARCO.2008.05.003},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pc/AlamAV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/scpe/HanYMNAE08,
author = {Wei Han and
Ying Yi and
Mark Muir and
Ioannis Nousias and
Tughrul Arslan and
Ahmet T. Erdogan},
title = {Efficient Implementation of WiMAX Physical Layer on Multi-core Architectures
with Dynamically Reconfigurable Processors},
journal = {Scalable Comput. Pract. Exp.},
volume = {9},
number = {3},
year = {2008},
url = {http://www.scpe.org/index.php/scpe/article/view/539},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/scpe/HanYMNAE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/HaTA08,
author = {Phuong Hoai Ha and
Philippas Tsigas and
Otto J. Anshus},
title = {Non-blocking programming on multi-core graphics processors: (extended
asbtract)},
journal = {{SIGARCH} Comput. Archit. News},
volume = {36},
number = {5},
pages = {19--28},
year = {2008},
url = {https://doi.org/10.1145/1556444.1556448},
doi = {10.1145/1556444.1556448},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/HaTA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigmetrics/Sibai08,
author = {Fadi N. Sibai},
title = {Evaluating the performance of single and multiple core processors
with PCMARK{\textregistered}05 and benchmark analysis},
journal = {{SIGMETRICS} Perform. Evaluation Rev.},
volume = {35},
number = {4},
pages = {62--71},
year = {2008},
url = {https://doi.org/10.1145/1364644.1364647},
doi = {10.1145/1364644.1364647},
timestamp = {Tue, 28 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigmetrics/Sibai08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/RomanescuS08,
author = {Bogdan F. Romanescu and
Daniel J. Sorin},
editor = {Andreas Moshovos and
David Tarditi and
Kunle Olukotun},
title = {Core cannibalization architecture: improving lifetime chip performance
for multicore processors in the presence of hard faults},
booktitle = {17th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2008, Toronto, Ontario, Canada, October 25-29,
2008},
pages = {43--51},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1454115.1454124},
doi = {10.1145/1454115.1454124},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/RomanescuS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/ZhengCC0ZZ08,
author = {Jing Zheng and
Wenguang Chen and
Yurong Chen and
Yimin Zhang and
Ying Zhao and
Weimin Zheng},
title = {Parallelization of spectral clustering algorithm on multi-core processors
and {GPGPU}},
booktitle = {13th Asia-Pacific Computer Systems Architecture Conference, {ACSAC}
2008, Hsinchu, China, August 4-6, 2008},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/APCSAC.2008.4625449},
doi = {10.1109/APCSAC.2008.4625449},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aPcsac/ZhengCC0ZZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/QiZYHXL08,
author = {Yaxuan Qi and
Zongwei Zhou and
Baohua Yang and
Fei He and
Yibo Xue and
Jun Li},
editor = {Mark A. Franklin and
Dhabaleswar K. Panda and
Dimitrios Stiliadis},
title = {Towards effective network algorithms on multi-core network processors},
booktitle = {Proceedings of the 2008 {ACM/IEEE} Symposium on Architecture for Networking
and Communications Systems, {ANCS} 2008, San Jose, California, USA,
November 6-7, 2008},
pages = {125--126},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1477942.1477963},
doi = {10.1145/1477942.1477963},
timestamp = {Thu, 10 Jun 2021 11:42:07 +0200},
biburl = {https://dblp.org/rec/conf/ancs/QiZYHXL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/FangC08,
author = {Xing Fang and
Shuming Chen},
title = {The design and algorithm mapping of a heterogeneous multi-core processor
for {SDR}},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
Macao, China, November 30 2008 - December 3, 2008},
pages = {1086--1089},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/APCCAS.2008.4746213},
doi = {10.1109/APCCAS.2008.4746213},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/apccas/FangC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cisis/GuoLPHCDW08,
author = {Jianjun Guo and
Ming{-}che Lai and
Zhengyuan Pang and
Libo Huang and
Fangyuan Chen and
Kui Dai and
Zhiying Wang},
editor = {Fatos Xhafa and
Leonard Barolli},
title = {Memory System Design for a Multi-core Processor},
booktitle = {Second International Conference on Complex, Intelligent and Software
Intensive Systems (CISIS-2008), March 4th-7th, 2008, Technical University
of Catalonia, Barcelona, Spain},
pages = {601--606},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/CISIS.2008.39},
doi = {10.1109/CISIS.2008.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cisis/GuoLPHCDW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cisis/HanYMNAE08,
author = {Wei Han and
Ying Yi and
Mark Muir and
Ioannis Nousias and
Tughrul Arslan and
Ahmet Teyfik Erdogan},
editor = {Fatos Xhafa and
Leonard Barolli},
title = {Efficient Implementation of Wireless Applications on Multi-core Platforms
Based on Dynamically Reconfigurable Processors},
booktitle = {Second International Conference on Complex, Intelligent and Software
Intensive Systems (CISIS-2008), March 4th-7th, 2008, Technical University
of Catalonia, Barcelona, Spain},
pages = {837--842},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/CISIS.2008.61},
doi = {10.1109/CISIS.2008.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cisis/HanYMNAE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cse/MendoncaD08,
author = {Rodrigo P. Mendon{\c{c}}a and
Mario A. R. Dantas},
title = {A Study of Adaptive Co-scheduling Approach for an Opportunistic Software
Environment to Execute in Multi-core and Multi-Processor Configurations},
booktitle = {Proceedings of the 11th {IEEE} International Conference on Computational
Science and Engineering, {CSE} 2008, S{\~{a}}o Paulo, SP, Brazil,
July 16-18, 2008},
pages = {41--47},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/CSE.2008.53},
doi = {10.1109/CSE.2008.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cse/MendoncaD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/csicc/JooyaS08,
author = {A. Zolfaghari Jooya and
Mohsen Soryani},
editor = {Hamid Sarbazi{-}Azad and
Behrooz Parhami and
Seyed Ghassem Miremadi and
Shaahin Hessabi},
title = {The Effect of Core Number and Core Diversity on Power and Performance
in Multicore Processors},
booktitle = {Advances in Computer Science and Engineering - 13th International
{CSI} Computer Conference, {CSICC} 2008, Kish Island, Iran, March
9-11, 2008 Revised Selected Papers},
series = {Communications in Computer and Information Science},
volume = {6},
pages = {251--258},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-89985-3\_31},
doi = {10.1007/978-3-540-89985-3\_31},
timestamp = {Thu, 23 Jun 2022 19:54:33 +0200},
biburl = {https://dblp.org/rec/conf/csicc/JooyaS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eScience/BhowmikG08,
author = {Rajdeep Bhowmik and
Madhusudhan Govindaraju},
title = {Analysis of Cache Performance for Processing XML-Based Application
Data on Multi-core Processors},
booktitle = {Fourth International Conference on e-Science, e-Science 2008, 7-12
December 2008, Indianapolis, IN, {USA}},
pages = {688--694},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/eScience.2008.79},
doi = {10.1109/ESCIENCE.2008.79},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/eScience/BhowmikG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euc/ZhengZX08,
author = {Kai Zheng and
Yongxin Zhu and
Jun Xu},
editor = {Cheng{-}Zhong Xu and
Minyi Guo},
title = {Evaluation of Partitioning Methods for Stream Applications on a Heterogeneous
Multi-core Processor Simulator},
booktitle = {2008 {IEEE/IPIP} International Conference on Embedded and Ubiquitous
Computing {(EUC} 2008), Shanghai, China, December 17-20, 2008, Volume
{II:} Workshops},
pages = {486--491},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/EUC.2008.164},
doi = {10.1109/EUC.2008.164},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/euc/ZhengZX08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eusipco/PariharH08,
author = {Naveen Parihar and
Eric A. Hansen},
title = {A lexical-tree division-based approach to parallelizing a cross-word
speech decoder for multi-core processors},
booktitle = {2008 16th European Signal Processing Conference, {EUSIPCO} 2008, Lausanne,
Switzerland, August 25-29, 2008},
pages = {1--5},
publisher = {{IEEE}},
year = {2008},
url = {https://ieeexplore.ieee.org/document/7080705/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eusipco/PariharH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftdcs/XiangZ08,
author = {Yang Xiang and
Wanlei Zhou},
title = {Using Multi-Core Processors to Support Network Security Applications},
booktitle = {12th {IEEE} International Workshop on Future Trends of Distributed
Computing Systems, {FTDCS} 2008, Kunming, China, October 21-23, 2008},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/FTDCS.2008.16},
doi = {10.1109/FTDCS.2008.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftdcs/XiangZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/grc/DaiXJ08,
author = {Hongjun Dai and
Xinshun Xu and
Zhiping Jia},
title = {A Fuzzy Algorithm for Parallelizability Evaluation and Load Balance
on the Multi-core Processor},
booktitle = {The 2008 {IEEE} International Conference on Granular Computing, GrC
2008, Hangzhou, China, 26-28 August 2008},
pages = {168--171},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/GRC.2008.4664678},
doi = {10.1109/GRC.2008.4664678},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/grc/DaiXJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/BlagojevicFCN08,
author = {Filip Blagojevic and
Xizhou Feng and
Kirk W. Cameron and
Dimitrios S. Nikolopoulos},
editor = {Per Stenstr{\"{o}}m and
Michel Dubois and
Manolis Katevenis and
Rajiv Gupta and
Theo Ungerer},
title = {Modeling Multigrain Parallelism on Heterogeneous Multi-core Processors:
{A} Case Study of the Cell {BE}},
booktitle = {High Performance Embedded Architectures and Compilers, Third International
Conference, HiPEAC 2008, G{\"{o}}teborg, Sweden, January 27-29,
2008, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4917},
pages = {38--52},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-77560-7\_4},
doi = {10.1007/978-3-540-77560-7\_4},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipeac/BlagojevicFCN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/ZhangWLSZLL08,
author = {Fan Zhang and
Gang Wang and
Xiaoguang Liu and
Guangyi Sun and
Xin Zhao and
Jing Liu and
Guizhang Lu},
title = {An Improved Parallel Implementation of 3-D {DRIE} Simulation on Multi-core
Processors},
booktitle = {10th {IEEE} International Conference on High Performance Computing
and Communications, {HPCC} 2008, 25-27 Sept. 2008, Dalian, China},
pages = {891--896},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/HPCC.2008.23},
doi = {10.1109/HPCC.2008.23},
timestamp = {Thu, 01 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpcc/ZhangWLSZLL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/ChenLLW08,
author = {Yen{-}Kuang Chen and
Wenlong Li and
Jianguo Li and
Tao Wang},
title = {Novel parallel Hough Transform on multi-core processors},
booktitle = {Proceedings of the {IEEE} International Conference on Acoustics, Speech,
and Signal Processing, {ICASSP} 2008, March 30 - April 4, 2008, Caesars
Palace, Las Vegas, Nevada, {USA}},
pages = {1457--1460},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICASSP.2008.4517895},
doi = {10.1109/ICASSP.2008.4517895},
timestamp = {Tue, 25 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icassp/ChenLLW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/RaoV08,
author = {Ravishankar Rao and
Sarma B. K. Vrudhula},
editor = {Sani R. Nassif and
Jaijeet S. Roychowdhury},
title = {Efficient online computation of core speeds to maximize the throughput
of thermally constrained multi-core processors},
booktitle = {2008 International Conference on Computer-Aided Design, {ICCAD} 2008,
San Jose, CA, USA, November 10-13, 2008},
pages = {537--542},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICCAD.2008.4681627},
doi = {10.1109/ICCAD.2008.4681627},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/RaoV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icccn/LuoZ08,
author = {Yan Luo and
Chunhui Zhang},
title = {The Design of a Programmable Edge Node with Hybrid Multi-Core Processors
for Virtual Networks},
booktitle = {Proceedings of the 17th International Conference on Computer Communications
and Networks, {IEEE} {ICCCN} 2008, St. Thomas, {U.S.} Virgin Islands,
August 3-7, 2008},
pages = {30--35},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICCCN.2008.ECP.26},
doi = {10.1109/ICCCN.2008.ECP.26},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/icccn/LuoZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KadinR08,
author = {Michael Kadin and
Sherief Reda},
title = {Frequency and voltage planning for multi-core processors under thermal
constraints},
booktitle = {26th International Conference on Computer Design, {ICCD} 2008, 12-15
October 2008, Lake Tahoe, CA, USA, Proceedings},
pages = {463--470},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICCD.2008.4751902},
doi = {10.1109/ICCD.2008.4751902},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KadinR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icdcs/ZhangLSYB08,
author = {Yue Zhang and
Bin Liu and
Lei Shi and
Jingnan Yao and
Laxmi N. Bhuyan},
title = {Quantum-Adaptive Scheduling for Multi-Core Network Processors},
booktitle = {28th {IEEE} International Conference on Distributed Computing Systems
{(ICDCS} 2008), 17-20 June 2008, Beijing, China},
pages = {554--561},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICDCS.2008.63},
doi = {10.1109/ICDCS.2008.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icdcs/ZhangLSYB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmc/Roy08,
author = {Peter Van Roy},
title = {The Challenges and Opportunities of Multiple Processors: Why Multi-Core
Processors are Easy and Internet is Hard},
booktitle = {Proceedings of the 2008 International Computer Music Conference, {ICMC}
2008, Belfast, Ireland, August 24-29, 2008},
publisher = {Michigan Publishing},
year = {2008},
url = {https://hdl.handle.net/2027/spo.bbp2372.2008.185},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icmc/Roy08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ZhengLZZ08,
author = {Hongzhong Zheng and
Jiang Lin and
Zhao Zhang and
Zhichun Zhu},
title = {Memory Access Scheduling Schemes for Systems with Multi-Core Processors},
booktitle = {2008 International Conference on Parallel Processing, {ICPP} 2008,
September 8-12, 2008, Portland, Oregon, {USA}},
pages = {406--413},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICPP.2008.53},
doi = {10.1109/ICPP.2008.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/ZhengLZZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/BircherJ08,
author = {William Lloyd Bircher and
Lizy K. John},
editor = {Pin Zhou},
title = {Analysis of dynamic power management on multi-core processors},
booktitle = {Proceedings of the 22nd Annual International Conference on Supercomputing,
{ICS} 2008, Island of Kos, Greece, June 7-12, 2008},
pages = {327--338},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1375527.1375575},
doi = {10.1145/1375527.1375575},
timestamp = {Tue, 06 Nov 2018 11:07:03 +0100},
biburl = {https://dblp.org/rec/conf/ics/BircherJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/ChernikovC08,
author = {Andrey N. Chernikov and
Nikos Chrisochoides},
editor = {Pin Zhou},
title = {Three-dimensional delaunay refinement for multi-core processors},
booktitle = {Proceedings of the 22nd Annual International Conference on Supercomputing,
{ICS} 2008, Island of Kos, Greece, June 7-12, 2008},
pages = {214--224},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1375527.1375560},
doi = {10.1145/1375527.1375560},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/ChernikovC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/VictorSD08,
author = {Michel N. Victor and
Aris K. Silzars and
Edward S. Davidson},
editor = {Pin Zhou},
title = {A freespace crossbar for multi-core processors},
booktitle = {Proceedings of the 22nd Annual International Conference on Supercomputing,
{ICS} 2008, Island of Kos, Greece, June 7-12, 2008},
pages = {56--62},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1375527.1375539},
doi = {10.1145/1375527.1375539},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/VictorSD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icycs/GuoDLW08,
author = {Jianjun Guo and
Kui Dai and
Ming{-}che Lai and
Zhiying Wang},
title = {The {P2P} Communication Model for a Local Memory based Multi-core
Processor},
booktitle = {Proceedings of the 9th International Conference for Young Computer
Scientists, {ICYCS} 2008, Zhang Jia Jie, Hunan, China, November 18-21,
2008},
pages = {1354--1359},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICYCS.2008.272},
doi = {10.1109/ICYCS.2008.272},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icycs/GuoDLW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/HughesL08,
author = {Clay Hughes and
Tao Li},
editor = {David Christie and
Alan Lee and
Onur Mutlu and
Benjamin G. Zorn},
title = {Accelerating multi-core processor design space evaluation using automatic
multi-threaded workload synthesis},
booktitle = {4th International Symposium on Workload Characterization {(IISWC}
2008), Seattle, Washington, USA, September 14-16, 2008},
pages = {163--172},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/IISWC.2008.4636101},
doi = {10.1109/IISWC.2008.4636101},
timestamp = {Tue, 13 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iiswc/HughesL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/AhmadRK08,
author = {Ishfaq Ahmad and
Sanjay Ranka and
Samee Ullah Khan},
title = {Using game theory for scheduling tasks on multi-core processors for
simultaneous optimization of performance and energy},
booktitle = {22nd {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2008, Miami, Florida USA, April 14-18, 2008},
pages = {1--6},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/IPDPS.2008.4536420},
doi = {10.1109/IPDPS.2008.4536420},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ipps/AhmadRK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/KlimmBB08,
author = {Alexander Klimm and
Lars Braun and
J{\"{u}}rgen Becker},
title = {An adaptive and scalable multiprocessor system For Xilinx FPGAs using
minimal sized processor cores},
booktitle = {22nd {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2008, Miami, Florida USA, April 14-18, 2008},
pages = {1--7},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/IPDPS.2008.4536519},
doi = {10.1109/IPDPS.2008.4536519},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/KlimmBB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Loh08,
author = {Gabriel H. Loh},
title = {3D-Stacked Memory Architectures for Multi-core Processors},
booktitle = {35th International Symposium on Computer Architecture {(ISCA} 2008),
June 21-25, 2008, Beijing, China},
pages = {453--464},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISCA.2008.15},
doi = {10.1109/ISCA.2008.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Loh08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscsct/ZhangZA08,
author = {Shuo Zhang and
Rongcai Zhao and
Ke An},
title = {On Generating Self-Similar Network Traffic Using Multi-core Processors},
booktitle = {2008 International Symposium on Computer Science and Computational
Technology, {ISCSCT} 2008, 20-22 December 2008, Shanghai, China, 2
Volumes},
pages = {667--672},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISCSCT.2008.162},
doi = {10.1109/ISCSCT.2008.162},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscsct/ZhangZA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/KadinR08,
author = {Michael Kadin and
Sherief Reda},
editor = {Vijaykrishnan Narayanan and
C. P. Ravikumar and
J{\"{o}}rg Henkel and
Ali Keshavarzi and
Vojin G. Oklobdzija and
Barry M. Pangrle},
title = {Frequency planning for multi-core processors under thermal constraints},
booktitle = {Proceedings of the 2008 International Symposium on Low Power Electronics
and Design, 2008, Bangalore, India, August 11-13, 2008},
pages = {213--216},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1393921.1393977},
doi = {10.1145/1393921.1393977},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/KadinR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/RaoVB08,
author = {Ravishankar Rao and
Sarma B. K. Vrudhula and
Krzysztof S. Berezowski},
editor = {Vijaykrishnan Narayanan and
C. P. Ravikumar and
J{\"{o}}rg Henkel and
Ali Keshavarzi and
Vojin G. Oklobdzija and
Barry M. Pangrle},
title = {Analytical results for design space exploration of multi-core processors
employing thread migration},
booktitle = {Proceedings of the 2008 International Symposium on Low Power Electronics
and Design, 2008, Bangalore, India, August 11-13, 2008},
pages = {229--232},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1393921.1393981},
doi = {10.1145/1393921.1393981},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/RaoVB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispa/DouDXZ08,
author = {Yong Dou and
Lin Deng and
Jinhui Xu and
Yi Zheng},
title = {{DMA} Performance Analysis and Multi-core Memory Optimization for
{SWIM} Benchmark on the Cell Processor},
booktitle = {{IEEE} International Symposium on Parallel and Distributed Processing
with Applications, {ISPA} 2008, Sydney, NSW, Australia, December 10-12,
2008},
pages = {170--179},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISPA.2008.54},
doi = {10.1109/ISPA.2008.54},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispa/DouDXZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/LiuHS08,
author = {Yifang Liu and
Jiang Hu and
Weiping Shi},
editor = {David Z. Pan and
Gi{-}Joon Nam},
title = {Multi-scenario buffer insertion in multi-core processor designs},
booktitle = {Proceedings of the 2008 International Symposium on Physical Design,
{ISPD} 2008, Portland, Oregon, USA, April 13-16, 2008},
pages = {15--22},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1353629.1353635},
doi = {10.1145/1353629.1353635},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/LiuHS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Musoll08,
author = {Enric Musoll},
title = {A Thermal-Friendly Load-Balancing Technique for Multi-Core Processors},
booktitle = {9th International Symposium on Quality of Electronic Design {(ISQED}
2008), 17-19 March 2008, San Jose, CA, {USA}},
pages = {549--552},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISQED.2008.4479794},
doi = {10.1109/ISQED.2008.4479794},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Musoll08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KonstadinidisRLOOPSGPREGP08,
author = {Georgios K. Konstadinidis and
Mamun Rashid and
Peter F. Lai and
Yukio Otaguro and
Yannis Orginos and
Sudhendra Parampalli and
Mark Steigerwald and
Shriram Gundala and
Rambabu Pyapali and
Leonard Rarick and
Ilyas Elkin and
Yuefei Ge and
Ishwar Parulkar},
title = {Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading
SPARCs{\textregistered} Processor},
booktitle = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2008, Digest of Technical Papers, San Francisco, CA, USA, February
3-7, 2008},
pages = {84--85},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISSCC.2008.4523068},
doi = {10.1109/ISSCC.2008.4523068},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/KonstadinidisRLOOPSGPREGP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/LaueMRHS08,
author = {Ralf Laue and
H. Gregor Molter and
Felix Rieder and
Sorin A. Huss and
Kartik Saxena},
title = {A Novel Multiple Core Co-processor Architecture for Efficient Server-Based
Public Key Cryptographic Applications},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {87--92},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.9},
doi = {10.1109/ISVLSI.2008.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/LaueMRHS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Singh08,
author = {Adit D. Singh},
editor = {Douglas Young and
Nur A. Touba},
title = {Scan Based Testing of Dual/Multi Core Processors for Small Delay Defects},
booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
California, USA, October 26-31, 2008},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/TEST.2008.4700563},
doi = {10.1109/TEST.2008.4700563},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Singh08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdcat/HuangTZJNRW08,
author = {Zhiyi Huang and
Andrew Trotman and
Jiaqi Zhang and
Xiangfei Jia and
Mariusz Nowostawski and
Nathan Rountree and
Paul Werstein},
title = {Virtual Aggregated Processor in Multi-core Computers},
booktitle = {Ninth International Conference on Parallel and Distributed Computing,
Applications and Technologies, {PDCAT} 2008, Dunedin, Otago, New Zealand,
1-4 December 2008},
pages = {481--488},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/PDCAT.2008.27},
doi = {10.1109/PDCAT.2008.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdcat/HuangTZJNRW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdcat/IparraguirreT08,
author = {Javier Iparraguirre and
Mitchell D. Theys},
title = {The Layer Disruption Model: {A} Runtime Approach to Multi-Core Processors
and Serial Code},
booktitle = {Ninth International Conference on Parallel and Distributed Computing,
Applications and Technologies, {PDCAT} 2008, Dunedin, Otago, New Zealand,
1-4 December 2008},
pages = {497--502},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/PDCAT.2008.83},
doi = {10.1109/PDCAT.2008.83},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdcat/IparraguirreT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/YanZ08,
author = {Jun Yan and
Wei Zhang},
title = {{WCET} Analysis for Multi-Core Processors with Shared {L2} Instruction
Caches},
booktitle = {Proceedings of the 14th {IEEE} Real-Time and Embedded Technology and
Applications Symposium, {RTAS} 2008, April 22-24, 2008, St. Louis,
Missouri, {USA}},
pages = {80--89},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/RTAS.2008.6},
doi = {10.1109/RTAS.2008.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/YanZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sac/GuoLPHCDW08,
author = {Jianjun Guo and
Ming{-}che Lai and
Zhengyuan Pang and
Libo Huang and
Fangyuan Chen and
Kui Dai and
Zhiying Wang},
editor = {Roger L. Wainwright and
Hisham Haddad},
title = {Hierarchical memory system design for a heterogeneous multi-core processor},
booktitle = {Proceedings of the 2008 {ACM} Symposium on Applied Computing (SAC),
Fortaleza, Ceara, Brazil, March 16-20, 2008},
pages = {1504--1508},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1363686.1364039},
doi = {10.1145/1363686.1364039},
timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sac/GuoLPHCDW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sasp/HanYMNAE08,
author = {Wei Han and
Ying Yi and
Mark Muir and
Ioannis Nousias and
Tughrul Arslan and
Ahmet Teyfik Erdogan},
title = {Multi-core Architectures with Dynamically Reconfigurable Array Processors
for the WiMAX Physical Layer},
booktitle = {Proceedings of the {IEEE} Symposium on Application Specific Processors,
{SASP} 2008, held in conjunction with the {DAC} 2008, June 8-9, 2008,
Anaheim, California, {USA}},
pages = {115--120},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/SASP.2008.4570795},
doi = {10.1109/SASP.2008.4570795},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sasp/HanYMNAE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/BrightwellPH08,
author = {Ron Brightwell and
Kevin T. Pedretti and
Trammell Hudson},
title = {{SMARTMAP:} operating system support for efficient data sharing among
processes on a multi-core processor},
booktitle = {Proceedings of the {ACM/IEEE} Conference on High Performance Computing,
{SC} 2008, November 15-21, 2008, Austin, Texas, {USA}},
pages = {25},
publisher = {{IEEE/ACM}},
year = {2008},
url = {https://doi.org/10.1109/SC.2008.5218881},
doi = {10.1109/SC.2008.5218881},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/BrightwellPH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/ChenLT08,
author = {Yen{-}Kuang Chen and
Wenlong Li and
Xiaofeng Tong},
title = {Parallelization of AdaBoost algorithm on multi-core processors},
booktitle = {Proceedings of the {IEEE} Workshop on Signal Processing Systems, SiPS
2008, October 8-10, 2008, Washington, {D.C.} Metro Area, {USA}},
pages = {275--280},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SIPS.2008.4671775},
doi = {10.1109/SIPS.2008.4671775},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sips/ChenLT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wotug/KosekKS08,
author = {Anna Magdalena Kosek and
Jon M. Kerridge and
Aly A. Syed},
editor = {Peter H. Welch and
Susan Stepney and
Fiona Polack and
Fred R. M. Barnes and
Alistair A. McEwan and
Gardiner S. Stiles and
Jan F. Broenink and
Adam T. Sampson},
title = {Modelling a Multi-Core Media Processor Using {JCSP}},
booktitle = {The thirty-first Communicating Process Architectures Conference, {CPA}
2008, organised under the auspices of WoTUG and the Department of
Computer Science of the University of York, York, Yorkshire, UK, 7-10
September 2008},
series = {Concurrent Systems Engineering Series},
volume = {66},
pages = {431--443},
publisher = {{IOS} Press},
year = {2008},
url = {https://doi.org/10.3233/978-1-58603-907-3-431},
doi = {10.3233/978-1-58603-907-3-431},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/wotug/KosekKS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0018624,
author = {James Reinders},
title = {Intel threading building blocks - outfitting {C++} for multi-core
processor parallelism},
publisher = {O'Reilly},
year = {2007},
url = {http://www.oreilly.com/catalog/9780596514808/index.html},
isbn = {978-0-596-51480-8},
timestamp = {Mon, 21 Mar 2011 00:00:00 +0100},
biburl = {https://dblp.org/rec/books/daglib/0018624.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ac/KumarT07,
author = {Rakesh Kumar and
Dean M. Tullsen},
title = {The architecture of Efficient Multi-Core Processors: {A} Holistic
Approach},
journal = {Adv. Comput.},
volume = {69},
pages = {1--87},
year = {2007},
url = {https://doi.org/10.1016/S0065-2458(06)69001-3},
doi = {10.1016/S0065-2458(06)69001-3},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ac/KumarT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LuftnerBPGSHBMJ07,
author = {Thomas L{\"{u}}ftner and
J{\"{o}}rg Berthold and
Christian Pacha and
Georg Georgakos and
Guillaume Sauzon and
Olaf H{\"{o}}mke and
Jurij Beshenar and
Peter Mahrla and
Knut M. Just and
Peter Hober and
Stephan Henzler and
Doris Schmitt{-}Landsiedel and
Andre Yakovleff and
Axel Klein and
Richard J. Knight and
Pramod Acharya and
Andre Bonnardot and
Steffen Buch and
Matthias Sauer},
title = {A 90-nm {CMOS} Low-Power {GSM/EDGE} Multimedia-Enhanced Baseband Processor
With 380-MHz {ARM926} Core and Mixed-Signal Extensions},
journal = {{IEEE} J. Solid State Circuits},
volume = {42},
number = {1},
pages = {134--144},
year = {2007},
url = {https://doi.org/10.1109/JSSC.2006.886528},
doi = {10.1109/JSSC.2006.886528},
timestamp = {Fri, 15 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/LuftnerBPGSHBMJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/RusuTMACCSBVLLV07,
author = {Stefan Rusu and
Simon M. Tam and
Harry Muljono and
David Ayers and
Jonathan Chang and
Brian S. Cherkauer and
Jason Stinson and
John Benoit and
Raj Varada and
Justin Leung and
Rahul Dilip Limaye and
Sujal Vora},
title = {A 65-nm Dual-Core Multithreaded Xeon{\textregistered} Processor With
16-MB {L3} Cache},
journal = {{IEEE} J. Solid State Circuits},
volume = {42},
number = {1},
pages = {17--25},
year = {2007},
url = {https://doi.org/10.1109/JSSC.2006.885041},
doi = {10.1109/JSSC.2006.885041},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/RusuTMACCSBVLLV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChenWLG07,
author = {Chung{-}Ho Chen and
Chih{-}Kai Wei and
Tai{-}Hua Lu and
Hsun{-}Wei Gao},
title = {Software-Based Self-Testing With Multiple-Level Abstractions for Soft
Processor Cores},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {15},
number = {5},
pages = {505--517},
year = {2007},
url = {https://doi.org/10.1109/TVLSI.2007.893650},
doi = {10.1109/TVLSI.2007.893650},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ChenWLG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/InoueMKN07,
author = {Hiroshi Inoue and
Takao Moriyama and
Hideaki Komatsu and
Toshio Nakatani},
title = {AA-Sort: {A} New Parallel Sorting Algorithm for Multi-Core {SIMD}
Processors},
booktitle = {16th International Conference on Parallel Architectures and Compilation
Techniques {(PACT} 2007), Brasov, Romania, September 15-19, 2007},
pages = {189--198},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.ieeecomputersociety.org/10.1109/PACT.2007.12},
doi = {10.1109/PACT.2007.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/InoueMKN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/TirumalaiSK07,
author = {Partha Tirumalai and
Yonghong Song and
Spiros Kalogeropulos},
editor = {Lynn Choi and
Yunheung Paek and
Sangyeun Cho},
title = {Performance Evaluation of Evolutionary Multi-core and Aggressively
Multi-threaded Processor Architectures},
booktitle = {Advances in Computer Systems Architecture, 12th Asia-Pacific Conference,
{ACSAC} 2007, Seoul, Korea, August 23-25, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4697},
pages = {280--289},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74309-5\_27},
doi = {10.1007/978-3-540-74309-5\_27},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/aPcsac/TirumalaiSK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/QiXHYYL07,
author = {Yaxuan Qi and
Bo Xu and
Fei He and
Baohua Yang and
Jianming Yu and
Jun Li},
editor = {Raj Yavatkar and
Dirk Grunwald and
K. K. Ramakrishnan},
title = {Towards high-performance flow-level packet processing on multi-core
network processors},
booktitle = {Proceedings of the 2007 {ACM/IEEE} Symposium on Architecture for Networking
and Communications Systems, {ANCS} 2007, Orlando, Florida, USA, December
3-4, 2007},
pages = {17--26},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1323548.1323552},
doi = {10.1145/1323548.1323552},
timestamp = {Thu, 27 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ancs/QiXHYYL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/SaghirN07,
author = {Mazen A. R. Saghir and
Rawan Naous},
editor = {Pedro C. Diniz and
Eduardo Marques and
Koen Bertels and
Marcio Merino Fernandes and
Jo{\~{a}}o M. P. Cardoso},
title = {A Configurable Multi-ported Register File Architecture for Soft Processor
Cores},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, Third
International Workshop, {ARC} 2007, Mangaratiba, Brazil, March 27-29,
2007},
series = {Lecture Notes in Computer Science},
volume = {4419},
pages = {14--25},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-71431-6\_2},
doi = {10.1007/978-3-540-71431-6\_2},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/SaghirN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/calco/Harman07,
author = {Neal A. Harman},
editor = {Till Mossakowski and
Ugo Montanari and
Magne Haveraaen},
title = {Algebraic Models of Simultaneous Multithreaded and Multi-core Processors},
booktitle = {Algebra and Coalgebra in Computer Science, Second International Conference,
{CALCO} 2007, Bergen, Norway, August 20-24, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4624},
pages = {294--311},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-73859-6\_20},
doi = {10.1007/978-3-540-73859-6\_20},
timestamp = {Tue, 14 May 2019 10:00:51 +0200},
biburl = {https://dblp.org/rec/conf/calco/Harman07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MoussaliGS07,
author = {Roger Moussali and
Nabil Ghanem and
Mazen A. R. Saghir},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Supporting multithreading in configurable soft processor cores},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {155--159},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289910},
doi = {10.1145/1289881.1289910},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MoussaliGS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/BuciakB07,
author = {Piotr Buciak and
Jakub Botwicz},
editor = {Patrick Girard and
Andrzej Krasniewski and
Elena Gramatov{\'{a}} and
Adam Pawlak and
Tomasz Garbolino},
title = {Lightweight Multi-threaded Network Processor Core in {FPGA}},
booktitle = {Proceedings of the 10th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2007), Krak{\'{o}}w,
Poland, April 11-13, 2007},
pages = {125--130},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DDECS.2007.4295266},
doi = {10.1109/DDECS.2007.4295266},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/BuciakB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/egpgv/ThomaszewskiPB07,
author = {Bernhard Thomaszewski and
Simon Pabst and
Wolfgang Blochinger},
editor = {Jean M. Favre and
Lu{\'{\i}}s Paulo Santos and
Dirk Reiners},
title = {Exploiting Parallelism in Physically-Based Simulations on Multi-Core
Processor Architectures},
booktitle = {7th Eurographics Symposium on Parallel Graphics and Visualization,
{EGPGV} 2007, Lugano, Switzerland, May 20-21, 2007},
pages = {69--76},
publisher = {Eurographics Association},
year = {2007},
url = {https://doi.org/10.2312/EGPGV/EGPGV07/069-076},
doi = {10.2312/EGPGV/EGPGV07/069-076},
timestamp = {Tue, 16 Jun 2020 12:43:05 +0200},
biburl = {https://dblp.org/rec/conf/egpgv/ThomaszewskiPB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcs/PourrezaG07,
author = {Hossein Pourreza and
Peter Graham},
title = {On the Programming Impact ofMulti-Core, Multi-Processor Nodes inMPI
Clusters},
booktitle = {21st Annual International Symposium on High Performance Computing
Systems and Applications {(HPCS} 2007), 13-16 May 2007, Saskatoon,
Saskatchewan, Canada},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/HPCS.2007.23},
doi = {10.1109/HPCS.2007.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpcs/PourrezaG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpdc/BhowmikGGA07,
author = {Rajdeep Bhowmik and
Chaitali Gupta and
Madhusudhan Govindaraju and
Aneesh Aggarwal},
editor = {Kenneth Chiu and
Shigeru Chiba and
Dennis Gannon and
Lionel Villard},
title = {McGrid: framework for optimizing grid middleware on multi-core processors},
booktitle = {Proceedings of the 2007 workshop on Service-oriented computing performance:
aspects, issues, and approaches, SOCP@HPDC 2007, Monterey, California,
USA, June 25, 2007},
pages = {9--16},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1272457.1272459},
doi = {10.1145/1272457.1272459},
timestamp = {Tue, 06 Nov 2018 11:07:20 +0100},
biburl = {https://dblp.org/rec/conf/hpdc/BhowmikGGA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icebe/SunLZYL07,
author = {Yuanhao Sun and
Tianyou Li and
Qi Zhang and
Jia Yang and
Shih{-}Wei Liao},
editor = {Shing{-}Chi Cheung and
Yinsheng Li and
Kuo{-}Ming Chao and
Muhammad Younas and
Jen{-}Yao Chung},
title = {Parallel {XML} Transformations on Multi-Core Processors},
booktitle = {Proceedings of {ICEBE} 2007, {IEEE} International Conference on e-Business
Engineering and the Workshops {SOAIC} 2007, {SOSE} 2007, {SOKM} 2007,
24-26 October, 2007, Hong Kong, China},
pages = {701--708},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICEBE.2007.110},
doi = {10.1109/ICEBE.2007.110},
timestamp = {Fri, 02 Aug 2024 10:57:36 +0200},
biburl = {https://dblp.org/rec/conf/icebe/SunLZYL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icess/HuMC07,
author = {Xiao Hu and
Pengyong Ma and
Shuming Chen},
editor = {Yann{-}Hang Lee and
Heung{-}Nam Kim and
Jong Kim and
Yongwan Park and
Laurence Tianruo Yang and
Sung Won Kim},
title = {Scheduling for Combining Traffic of On-Chip Trace Data in Embedded
Multi-core Processor},
booktitle = {Embedded Software and Systems, [Third] International Conference, {ICESS}
2007, Daegu, Korea, May 14-16, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4523},
pages = {67--79},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-72685-2\_7},
doi = {10.1007/978-3-540-72685-2\_7},
timestamp = {Tue, 13 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icess/HuMC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/ChenBHC07,
author = {Trista Pei{-}Chun Chen and
Dmitry Budnikov and
Christopher J. Hughes and
Yen{-}Kuang Chen},
title = {Computer Vision on Multi-Core Processors: Articulated Body Tracking},
booktitle = {Proceedings of the 2007 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2007, July 2-5, 2007, Beijing, China},
pages = {1862--1865},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICME.2007.4285037},
doi = {10.1109/ICME.2007.4285037},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/ChenBHC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/QiXHZYL07,
author = {Yaxuan Qi and
Bo Xu and
Fei He and
Xin Zhou and
Jianming Yu and
Jun Li},
title = {Towards Optimized Packet Classification Algorithms for Multi-Core
Network Processors},
booktitle = {2007 International Conference on Parallel Processing {(ICPP} 2007),
September 10-14, 2007, Xi-An, China},
pages = {2},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICPP.2007.82},
doi = {10.1109/ICPP.2007.82},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/QiXHZYL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icws/BhowmikGGA07,
author = {Rajdeep Bhowmik and
Chaitali Gupta and
Madhusudhan Govindaraju and
Aneesh Aggarwal},
title = {Efficient XML-Based Grid Middleware Design for Multi-Core Processors},
booktitle = {2007 {IEEE} International Conference on Web Services {(ICWS} 2007),
July 9-13, 2007, Salt Lake City, Utah, {USA}},
pages = {1197--1198},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICWS.2007.84},
doi = {10.1109/ICWS.2007.84},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icws/BhowmikGGA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/AlamA07,
author = {Sadaf R. Alam and
Pratul K. Agarwal},
title = {On the Path to Enable Multi-scale Biomolecular Simulations on PetaFLOPS
Supercomputer with Multi-core Processors},
booktitle = {21th International Parallel and Distributed Processing Symposium {(IPDPS}
2007), Proceedings, 26-30 March 2007, Long Beach, California, {USA}},
pages = {1--8},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/IPDPS.2007.370443},
doi = {10.1109/IPDPS.2007.370443},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/AlamA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/VillaSPP07,
author = {Oreste Villa and
Daniele Paolo Scarpazza and
Fabrizio Petrini and
Juan Fern{\'{a}}ndez Peinador},
title = {Challenges in Mapping Graph Exploration Algorithms on Advanced Multi-core
Processors},
booktitle = {21th International Parallel and Distributed Processing Symposium {(IPDPS}
2007), Proceedings, 26-30 March 2007, Long Beach, California, {USA}},
pages = {1--10},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/IPDPS.2007.370253},
doi = {10.1109/IPDPS.2007.370253},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/VillaSPP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/AggarwalRJS07,
author = {Nidhi Aggarwal and
Parthasarathy Ranganathan and
Norman P. Jouppi and
James E. Smith},
editor = {Dean M. Tullsen and
Brad Calder},
title = {Configurable isolation: building high availability systems with commodity
multi-core processors},
booktitle = {34th International Symposium on Computer Architecture {(ISCA} 2007),
June 9-13, 2007, San Diego, California, {USA}},
pages = {470--481},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1250662.1250720},
doi = {10.1145/1250662.1250720},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/AggarwalRJS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/BowmanASW07,
author = {Keith A. Bowman and
Alaa R. Alameldeen and
Srikanth T. Srinivasan and
Chris Wilkerson},
editor = {Diana Marculescu and
Anand Raghunathan and
Ali Keshavarzi and
Vijaykrishnan Narayanan},
title = {Impact of die-to-die and within-die parameter variations on the throughput
distribution of multi-core processors},
booktitle = {Proceedings of the 2007 International Symposium on Low Power Electronics
and Design, 2007, Portland, OR, USA, August 27-29, 2007},
pages = {50--55},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1283780.1283792},
doi = {10.1145/1283780.1283792},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/BowmanASW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/RaoVC07,
author = {Ravishankar Rao and
Sarma B. K. Vrudhula and
Chaitali Chakrabarti},
editor = {Diana Marculescu and
Anand Raghunathan and
Ali Keshavarzi and
Vijaykrishnan Narayanan},
title = {Throughput of multi-core processors under thermal constraints},
booktitle = {Proceedings of the 2007 International Symposium on Low Power Electronics
and Design, 2007, Portland, OR, USA, August 27-29, 2007},
pages = {201--206},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1283780.1283824},
doi = {10.1145/1283780.1283824},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/RaoVC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/ShirahamaMHNA07,
author = {Hirokatsu Shirahama and
Akira Mochizuki and
Takahiro Hanyu and
Masami Nakajima and
Kazutami Arimoto},
title = {Design of a Processing Element Based on Quaternary Differential Logic
for a Multi-Core {SIMD} Processor},
booktitle = {37th International Symposium on Multiple-Valued Logic, {ISMVL} 2007,
13-16 May 2007, Oslo, Norway},
pages = {43},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISMVL.2007.14},
doi = {10.1109/ISMVL.2007.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/ShirahamaMHNA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mva/IkeKS07,
author = {Tsukasa Ike and
Nobuhisa Kishikawa and
Bj{\"{o}}rn Stenger},
title = {A Real-Time Hand Gesture Interface Implemented on a Multi-Core Processor},
booktitle = {Proceedings of the {IAPR} Conference on Machine Vision Applications
{(IAPR} {MVA} 2007), May 16-18, 2007, Tokyo, Japan},
pages = {9--12},
year = {2007},
url = {http://b2.cvl.iis.u-tokyo.ac.jp/mva/proceedings/2007CD/papers/01-03.pdf},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mva/IkeKS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdcat/Liu07,
author = {Xuli Liu},
editor = {David S. Munro and
Hong Shen and
Quan Z. Sheng and
Henry Detmold and
Katrina Falkner and
Cruz Izu and
Paul D. Coddington and
Bradley Alexander and
Si{-}Qing Zheng},
title = {Exploiting Object-Based Parallelism on Multi-core Multi-processor
Clusters},
booktitle = {Eighth International Conference on Parallel and Distributed Computing,
Applications and Technologies {(PDCAT} 2007), 3-6 December 2007, Adelaide,
Australia},
pages = {259--266},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/PDCAT.2007.25},
doi = {10.1109/PDCAT.2007.25},
timestamp = {Mon, 17 Jul 2023 13:04:30 +0200},
biburl = {https://dblp.org/rec/conf/pdcat/Liu07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/SchlanskerCOSRBCMBJ07,
author = {Michael S. Schlansker and
Nagabhushan Chitlur and
Erwin Oertli and
Paul M. Stillwell Jr. and
Linda Rankin and
Dennis Bradford and
Richard J. Carter and
Jayaram Mudigonda and
Nathan L. Binkert and
Norman P. Jouppi},
editor = {Becky Verastegui},
title = {High-performance ethernet-based communications for future multi-core
processors},
booktitle = {Proceedings of the {ACM/IEEE} Conference on High Performance Networking
and Computing, {SC} 2007, November 10-16, 2007, Reno, Nevada, {USA}},
pages = {37},
publisher = {{ACM} Press},
year = {2007},
url = {https://doi.org/10.1145/1362622.1362672},
doi = {10.1145/1362622.1362672},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/sc/SchlanskerCOSRBCMBJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/UnderwoodLB07,
author = {Keith D. Underwood and
Michael J. Levenhagen and
Ron Brightwell},
editor = {Becky Verastegui},
title = {Evaluating {NIC} hardware requirements to achieve high message rate
{PGAS} support on multi-core processors},
booktitle = {Proceedings of the {ACM/IEEE} Conference on High Performance Networking
and Computing, {SC} 2007, November 10-16, 2007, Reno, Nevada, {USA}},
pages = {36},
publisher = {{ACM} Press},
year = {2007},
url = {https://doi.org/10.1145/1362622.1362671},
doi = {10.1145/1362622.1362671},
timestamp = {Tue, 04 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/UnderwoodLB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sosp/SondagKR07,
author = {Tyler Sondag and
Viswanath Krishnamurthy and
Hridesh Rajan},
editor = {Eric Eide and
Marc E. Fiuczynski},
title = {Predictive thread-to-core assignment on a heterogeneous multi-core
processor},
booktitle = {Proceedings of the 4th workshop on Programming languages and operating
systems, PLOS@SOSP 2007, Stevenson, Washington, USA, October 18, 2007},
pages = {7:1--7:5},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1376789.1376799},
doi = {10.1145/1376789.1376799},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sosp/SondagKR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spaa/BrownKT07,
author = {Jeffery A. Brown and
Rakesh Kumar and
Dean M. Tullsen},
editor = {Phillip B. Gibbons and
Christian Scheideler},
title = {Proximity-aware directory-based coherence for multi-core processor
architectures},
booktitle = {{SPAA} 2007: Proceedings of the 19th Annual {ACM} Symposium on Parallelism
in Algorithms and Architectures, San Diego, California, USA, June
9-11, 2007},
pages = {126--134},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1248377.1248398},
doi = {10.1145/1248377.1248398},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/spaa/BrownKT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vldb/LiL07,
author = {Eric Li and
Li Liu},
editor = {Christoph Koch and
Johannes Gehrke and
Minos N. Garofalakis and
Divesh Srivastava and
Karl Aberer and
Anand Deshpande and
Daniela Florescu and
Chee Yong Chan and
Venkatesh Ganti and
Carl{-}Christian Kanne and
Wolfgang Klas and
Erich J. Neuhold},
title = {Optimization of Frequent Itemset Mining on Multiple-Core Processor},
booktitle = {Proceedings of the 33rd International Conference on Very Large Data
Bases, University of Vienna, Austria, September 23-27, 2007},
pages = {1275--1285},
publisher = {{ACM}},
year = {2007},
url = {http://www.vldb.org/conf/2007/papers/industrial/p1275-liu.pdf},
timestamp = {Fri, 21 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vldb/LiL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijccc/LiLLW06,
author = {Peng Li and
Yu Lu and
Shen Li and
Hongxing Wei},
title = {Realization of Embedded Multimedia System Based On Dual-Core Processor
{OMAP5910}},
journal = {Int. J. Comput. Commun. Control},
volume = {1},
number = {4},
pages = {85--91},
year = {2006},
url = {https://doi.org/10.15837/ijccc.2006.4.2310},
doi = {10.15837/IJCCC.2006.4.2310},
timestamp = {Mon, 30 Mar 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijccc/LiLLW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/imt/AndoAKOW06,
author = {Hisashige Ando and
Akira Asato and
Motoyuki Kawaba and
Hideki Okawara and
William W. Walker},
title = {A Case Study: Energy Efficient High Throughput Chip Multi-Processor
Using Reduced-complexity Cores for Transaction Processing Workload},
journal = {Inf. Media Technol.},
volume = {1},
number = {1},
pages = {80--91},
year = {2006},
url = {https://doi.org/10.11185/imt.1.80},
doi = {10.11185/IMT.1.80},
timestamp = {Mon, 26 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/imt/AndoAKOW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/NaffzigerSGJDAH06,
author = {Samuel Naffziger and
Blaine A. Stackhouse and
Tom Grutkowski and
Doug Josephson and
Jayen Desai and
Elad Alon and
Mark Horowitz},
title = {The implementation of a 2-core, multi-threaded itanium family processor},
journal = {{IEEE} J. Solid State Circuits},
volume = {41},
number = {1},
pages = {197--209},
year = {2006},
url = {https://doi.org/10.1109/JSSC.2005.859894},
doi = {10.1109/JSSC.2005.859894},
timestamp = {Fri, 15 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/NaffzigerSGJDAH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HopkinsM06,
author = {Andrew B. T. Hopkins and
Klaus D. McDonald{-}Maier},
title = {Debug Support Strategy for Systems-on-Chips with Multiple Processor
Cores},
journal = {{IEEE} Trans. Computers},
volume = {55},
number = {2},
pages = {174--184},
year = {2006},
url = {https://doi.org/10.1109/TC.2006.22},
doi = {10.1109/TC.2006.22},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/HopkinsM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/GuoDW06,
author = {Jianjun Guo and
Kui Dai and
Zhiying Wang},
editor = {Chris R. Jesshope and
Colin Egan},
title = {A Heterogeneous Multi-core Processor Architecture for High Performance
Computing},
booktitle = {Advances in Computer Systems Architecture, 11th Asia-Pacific Conference,
{ACSAC} 2006, Shanghai, China, September 6-8, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4186},
pages = {359--365},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11859802\_30},
doi = {10.1007/11859802\_30},
timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aPcsac/GuoDW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PhamABBGHHJKKKLLNPPPPRVWWW06,
author = {Dac C. Pham and
Hans{-}Werner Anderson and
Erwin Behnen and
Mark Bolliger and
Sanjay Gupta and
H. Peter Hofstee and
Paul E. Harvey and
Charles R. Johns and
James A. Kahle and
Atsushi Kameyama and
John M. Keaty and
Bob Le and
Sang Lee and
Tuyen V. Nguyen and
John G. Petrovick and
Mydung Pham and
Juergen Pille and
Stephen D. Posluszny and
Mack W. Riley and
Joseph Verock and
James D. Warnock and
Steve Weitzel and
Dieter F. Wendel},
editor = {Fumiyasu Hirose},
title = {Key features of the design methodology enabling a multi-core SoC implementation
of a first-generation {CELL} processor},
booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation:
{ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006},
pages = {871--878},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ASPDAC.2006.1594796},
doi = {10.1109/ASPDAC.2006.1594796},
timestamp = {Fri, 15 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/PhamABBGHHJKKKLLNPPPPRVWWW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiuHHT06,
author = {Duo Liu and
Bei Hua and
Xianghui Hu and
Xinan Tang},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {High-performance packet classification algorithm for many-core and
multithreaded network processor},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {334--344},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176801},
doi = {10.1145/1176760.1176801},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiuHHT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/Gajda06,
author = {Zbysek Gajda},
editor = {Matteo Sonza Reorda and
Ondrej Nov{\'{a}}k and
Bernd Straube and
Hana Kub{\'{a}}tov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Pavel Kubal{\'{\i}}k and
Raimund Ubar and
Jir{\'{\i}} Bucek},
title = {A Core Generator for Multi-ALU Processors Utilized in Genetic Parallel
Programming},
booktitle = {Proceedings of the 9th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2006), Prague, Czech
Republic, April 18-21, 2006},
pages = {238--240},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DDECS.2006.1649625},
doi = {10.1109/DDECS.2006.1649625},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/Gajda06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/VaradaSCG06,
author = {Raj Varada and
Mysore Sriram and
Kris Chou and
James Guzzo},
editor = {Soha Hassoun},
title = {Design and integration methods for a multi-threaded dual core 65nm
Xeon{\textregistered} processor},
booktitle = {2006 International Conference on Computer-Aided Design, {ICCAD} 2006,
San Jose, CA, USA, November 5-9, 2006},
pages = {607--610},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1233501.1233626},
doi = {10.1145/1233501.1233626},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/VaradaSCG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-3/HaaseDHW06,
author = {Jan Haase and
Markus Damm and
Dennis Hauser and
Klaus Waldschmidt},
editor = {Bernd Kleinjohann and
Lisa Kleinjohann and
Ricardo Jorge Machado and
Carlos Eduardo Pereira and
P. S. Thiagarajan},
title = {Reliability-Aware Power Management of Multi-Core Processors},
booktitle = {From Model-Driven Design to Resource Management for Distributed Embedded
Systems, {IFIP} {TC} 10 Working Conference on Distributed and Parallel
Embedded Systems {(DIPES} 2006), October 11-13, 2006, Braga, Portugal},
series = {{IFIP}},
volume = {225},
pages = {205--214},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/978-0-387-39362-9\_22},
doi = {10.1007/978-0-387-39362-9\_22},
timestamp = {Wed, 09 Aug 2023 08:39:52 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-3/HaaseDHW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/AlamBKRV06,
author = {Sadaf R. Alam and
Richard F. Barrett and
Jeffery A. Kuehn and
Philip C. Roth and
Jeffrey S. Vetter},
title = {Characterization of Scientific Workloads on Systems with Multi-Core
Processors},
booktitle = {Proceedings of the 2006 {IEEE} International Symposium on Workload
Characterization, {IISWC} 2006, October 25-27, 2006, San Jose, California,
{USA}},
pages = {225--236},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/IISWC.2006.302747},
doi = {10.1109/IISWC.2006.302747},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/AlamBKRV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/UhrigMKU06,
author = {Sascha Uhrig and
Stefan Maier and
Georgi Kuzmanov and
Theo Ungerer},
title = {Coupling of a reconfigurable architecture and a multithreaded processor
core with integrated real-time scheduling},
booktitle = {20th International Parallel and Distributed Processing Symposium {(IPDPS}
2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/IPDPS.2006.1639471},
doi = {10.1109/IPDPS.2006.1639471},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/UhrigMKU06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChuHCLLGC06,
author = {Jui{-}Chin Chu and
Chih{-}Wen Huang and
He{-}Chun Chen and
Keng{-}Po Lu and
Ming{-}Shuan Lee and
Jiun{-}In Guo and
Tien{-}Fu Chen},
title = {Design of customized functional units for the VLIW-based multi-threading
processor core targeted at multimedia applications},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1693103},
doi = {10.1109/ISCAS.2006.1693103},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChuHCLLGC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/RusuTMAC06,
author = {Stefan Rusu and
Simon M. Tam and
Harry Muljono and
David Ayers and
Jonathan Chang},
title = {A Dual-Core Multi-Threaded Xeon Processor with 16MB {L3} Cache},
booktitle = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
2006, Digest of Technical Papers, an Francisco, CA, USA, February
6-9, 2006},
pages = {315--324},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISSCC.2006.1696062},
doi = {10.1109/ISSCC.2006.1696062},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/isscc/RusuTMAC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/para/KurzakD06,
author = {Jakub Kurzak and
Jack J. Dongarra},
editor = {Bo K{\aa}gstr{\"{o}}m and
Erik Elmroth and
Jack J. Dongarra and
Jerzy Wasniewski},
title = {Implementing Linear Algebra Routines on Multi-core Processors with
Pipelining and a Look Ahead},
booktitle = {Applied Parallel Computing. State of the Art in Scientific Computing,
8th International Workshop, {PARA} 2006, Ume{\aa}, Sweden, June 18-21,
2006, Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {4699},
pages = {147--156},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/978-3-540-75755-9\_18},
doi = {10.1007/978-3-540-75755-9\_18},
timestamp = {Tue, 14 May 2019 10:00:40 +0200},
biburl = {https://dblp.org/rec/conf/para/KurzakD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/parelec/GepnerK06,
author = {Pawel Gepner and
Michal Filip Kowalik},
title = {Multi-Core Processors: New Way to Achieve High System Performance},
booktitle = {Fifth International Conference on Parallel Computing in Electrical
Engineering {(PARELEC} 2006), 13-17 September 2006, Bialystok, Poland},
pages = {9--13},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/PARELEC.2006.54},
doi = {10.1109/PARELEC.2006.54},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/parelec/GepnerK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppopp/HuTH06,
author = {Xianghui Hu and
Xinan Tang and
Bei Hua},
editor = {Josep Torrellas and
Siddhartha Chatterjee},
title = {High-performance IPv6 forwarding algorithm for multi-core and multithreaded
network processor},
booktitle = {Proceedings of the {ACM} {SIGPLAN} Symposium on Principles and Practice
of Parallel Programming, {PPOPP} 2006, New York, New York, USA, March
29-31, 2006},
pages = {168--177},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1122971.1122998},
doi = {10.1145/1122971.1122998},
timestamp = {Sun, 12 Jun 2022 19:46:08 +0200},
biburl = {https://dblp.org/rec/conf/ppopp/HuTH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/siggraph/OhlenburgB06,
author = {Jan Ohlenburg and
Wolfgang Broll},
editor = {John W. Finnegan and
Mike McGrath},
title = {Parallel multi-view rendering on multi-core processor systems},
booktitle = {International Conference on Computer Graphics and Interactive Techniques,
{SIGGRAPH} 2006, Boston, Massachusetts, USA, July 30 - August 3, 2006,
Research Posters},
pages = {121},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1179622.1179763},
doi = {10.1145/1179622.1179763},
timestamp = {Fri, 12 Mar 2021 11:22:59 +0100},
biburl = {https://dblp.org/rec/conf/siggraph/OhlenburgB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/VaradaTBC06,
author = {Raj Varada and
Simon Tarn and
John Benoit and
Kris Chou},
title = {{SOC} Design Challenges in a Multi-threaded 65nm Dual Core Xeon{\textregistered}
{MP} Processor},
booktitle = {2006 {IEEE} International {SOC} Conference, Austin, Texas, USA, September
24-27, 2006},
pages = {217--220},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/SOCC.2006.283884},
doi = {10.1109/SOCC.2006.283884},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/VaradaTBC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spaa/Lowney06,
author = {Geoff Lowney},
editor = {Phillip B. Gibbons and
Uzi Vishkin},
title = {Why Intel is designing multi-core processors},
booktitle = {{SPAA} 2006: Proceedings of the 18th Annual {ACM} Symposium on Parallelism
in Algorithms and Architectures, Cambridge, Massachusetts, USA, July
30 - August 2, 2006},
pages = {113},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1148109.1148126},
doi = {10.1145/1148109.1148126},
timestamp = {Wed, 21 Nov 2018 11:13:10 +0100},
biburl = {https://dblp.org/rec/conf/spaa/Lowney06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/SongKT05,
author = {Yonghong Song and
Spiros Kalogeropulos and
Partha Tirumalai},
title = {Design and Implementation of a Compiler Framework for Helper Threading
on Multi-core Processors},
booktitle = {14th International Conference on Parallel Architectures and Compilation
Techniques {(PACT} 2005), 17-21 September 2005, St. Louis, MO, {USA}},
pages = {99--109},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/PACT.2005.17},
doi = {10.1109/PACT.2005.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/SongKT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cc/EnnalsSM05,
author = {Robert Ennals and
Richard Sharp and
Alan Mycroft},
editor = {Rastislav Bod{\'{\i}}k},
title = {Task Partitioning for Multi-core Network Processors},
booktitle = {Compiler Construction, 14th International Conference, {CC} 2005, Held
as Part of the Joint European Conferences on Theory and Practice of
Software, {ETAPS} 2005, Edinburgh, UK, April 4-8, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3443},
pages = {76--90},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/978-3-540-31985-6\_6},
doi = {10.1007/978-3-540-31985-6\_6},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/cc/EnnalsSM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/PhamBBHJKKKLMPR05,
author = {Dac C. Pham and
Erwin Behnen and
Mark Bolliger and
H. Peter Hofstee and
Charles R. Johns and
James A. Kahle and
Atsushi Kameyama and
John M. Keaty and
Bob Le and
Yoshio Masubuchi and
Stephen D. Posluszny and
Mack W. Riley and
Masakazu Suzuoki and
Michael Wang and
James D. Warnock and
Steve Weitzel and
Dieter F. Wendel and
Kazuaki Yazawa},
title = {The design methodology and implementation of a first-generation {CELL}
processor: a multi-core SoC},
booktitle = {Proceedings of the {IEEE} 2005 Custom Integrated Circuits Conference,
{CICC} 2005, DoubleTree Hotel, San Jose, California, USA, September
18-21, 2005},
pages = {45--49},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/CICC.2005.1568604},
doi = {10.1109/CICC.2005.1568604},
timestamp = {Fri, 15 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/PhamBBHJKKKLMPR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euc/SuhK05,
author = {Hyo{-}Joong Suh and
Jeongmin Kim},
editor = {Laurence Tianruo Yang and
Makoto Amamiya and
Zhen Liu and
Minyi Guo and
Franz J. Rammig},
title = {{RISC/DSP} Dual Core Wireless SoC Processor Focused on Multimedia
Applications},
booktitle = {Embedded and Ubiquitous Computing - {EUC} 2005, International Conference
{EUC} 2005, Nagasaki, Japan, December 6-9, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3824},
pages = {321--330},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11596356\_34},
doi = {10.1007/11596356\_34},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/euc/SuhK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lcpc/ShirakoOWSKK05,
author = {Jun Shirako and
Naoto Oshiyama and
Yasutaka Wada and
Hiroaki Shikano and
Keiji Kimura and
Hironori Kasahara},
editor = {Eduard Ayguad{\'{e}} and
Gerald Baumgartner and
J. Ramanujam and
P. Sadayappan},
title = {Compiler Control Power Saving Scheme for Multi Core Processors},
booktitle = {Languages and Compilers for Parallel Computing, 18th International
Workshop, {LCPC} 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {4339},
pages = {362--376},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/978-3-540-69330-7\_25},
doi = {10.1007/978-3-540-69330-7\_25},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/lcpc/ShirakoOWSKK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtv/Kim05,
author = {Soohong P. Kim},
editor = {Magdy S. Abadir and
Li{-}C. Wang},
title = {Pre-Silicon Validation of {IPF} Memory Ordering for Multi-Core Processors},
booktitle = {Sixth International Workshop on Microprocessor Test and Verification
{(MTV} 2005), Common Challenges and Solutions, 3-4 November 2005,
Austin, Texas, {USA}},
pages = {105--110},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/MTV.2005.19},
doi = {10.1109/MTV.2005.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtv/Kim05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KallaST04,
author = {Ronald N. Kalla and
Balaram Sinharoy and
Joel M. Tendler},
title = {{IBM} Power5 Chip: {A} Dual-Core Multithreaded Processor},
journal = {{IEEE} Micro},
volume = {24},
number = {2},
pages = {40--47},
year = {2004},
url = {https://doi.org/10.1109/MM.2004.1289290},
doi = {10.1109/MM.2004.1289290},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/KallaST04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeungTK04,
author = {Lap{-}Fai Leung and
Chi{-}Ying Tsui and
Wing{-}Hung Ki},
editor = {Masaharu Imai},
title = {Minimizing energy consumption of multiple-processors-core systems
with simultaneous task allocation, scheduling and voltage assignment},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
Electronic Design and Solution Fair 2004, Yokohama, Japan, January
27-30, 2004},
pages = {647--652},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.137},
doi = {10.1109/ASPDAC.2004.137},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/LeungTK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccnc/VermeirenBH04,
author = {Tim Vermeiren and
Eric Borghs and
Bart Haagdorens},
title = {Evaluation of software techniques for parallel packet processing on
multi-core processors},
booktitle = {1st {IEEE} Consumer Communications and Networking Conference, {CCNC}
2004, Las Vegas, NV, USA, January 5-8, 2004},
pages = {645--647},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/CCNC.2004.1286942},
doi = {10.1109/CCNC.2004.1286942},
timestamp = {Fri, 26 Jun 2020 14:31:37 +0200},
biburl = {https://dblp.org/rec/conf/ccnc/VermeirenBH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Michaud04,
author = {Pierre Michaud},
title = {Exploiting the Cache Capacity of a Single-Chip Multi-Core Processor
with Execution Migration},
booktitle = {10th International Conference on High-Performance Computer Architecture
{(HPCA-10} 2004), 14-18 February 2004, Madrid, Spain},
pages = {186--197},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/HPCA.2004.10026},
doi = {10.1109/HPCA.2004.10026},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Michaud04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sac/UhrigU04,
author = {Sascha Uhrig and
Theo Ungerer},
editor = {Hisham Haddad and
Andrea Omicini and
Roger L. Wainwright and
Lorie M. Liebrock},
title = {Fine-grained power management for multithreaded processor cores},
booktitle = {Proceedings of the 2004 {ACM} Symposium on Applied Computing (SAC),
Nicosia, Cyprus, March 14-17, 2004},
pages = {907--908},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/967900.968083},
doi = {10.1145/967900.968083},
timestamp = {Tue, 06 Nov 2018 11:06:44 +0100},
biburl = {https://dblp.org/rec/conf/sac/UhrigU04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KumarFJRT03,
author = {Rakesh Kumar and
Keith I. Farkas and
Norman P. Jouppi and
Parthasarathy Ranganathan and
Dean M. Tullsen},
title = {Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core
Architectures},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {2},
year = {2003},
url = {https://doi.org/10.1109/L-CA.2003.6},
doi = {10.1109/L-CA.2003.6},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/KumarFJRT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/RamazaniMDL03,
author = {Abbas Ramazani and
Fabrice Monteiro and
Abbas Dandache and
Bernard Lepley},
title = {A methodology to design a multimedia processor core},
booktitle = {Proceedings of the 2003 10th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2003, Sharjah, United Arab Emirates,
December 14-17, 2003},
pages = {998--1001},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ICECS.2003.1301677},
doi = {10.1109/ICECS.2003.1301677},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/RamazaniMDL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeungTK03,
author = {Lap{-}Fai Leung and
Chi{-}Ying Tsui and
Wing{-}Hung Ki},
title = {Simultaneous task allocation, scheduling and voltage assignment for
multiple-processors-core systems using mixed integer nonlinear programming},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {309--312},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1206264},
doi = {10.1109/ISCAS.2003.1206264},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LeungTK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KumarFJRT03,
author = {Rakesh Kumar and
Keith I. Farkas and
Norman P. Jouppi and
Parthasarathy Ranganathan and
Dean M. Tullsen},
title = {Single-ISA Heterogeneous Multi-Core Architectures: The Potential for
Processor Power Reduction},
booktitle = {Proceedings of the 36th Annual International Symposium on Microarchitecture,
San Diego, CA, USA, December 3-5, 2003},
pages = {81--92},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/MICRO.2003.1253185},
doi = {10.1109/MICRO.2003.1253185},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KumarFJRT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MemikM02,
author = {Gokhan Memik and
William H. Mangione{-}Smith},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Increasing power efficiency of multi-core network processors through
data filtering},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {108--116},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581647},
doi = {10.1145/581630.581647},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MemikM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/FatemiP98,
author = {Omid Fatemi and
Sethuraman Panchanathan},
title = {Fractal engine: an affine video processor core for multimedia applications},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {8},
number = {7},
pages = {892--908},
year = {1998},
url = {https://doi.org/10.1109/76.735384},
doi = {10.1109/76.735384},
timestamp = {Mon, 15 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcsv/FatemiP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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