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@article{DBLP:journals/mam/X24,
title = {Retraction notice to "FPGA implementation of {PMSG} based {AC} conversion
using soft switching twin-mode {PWM/FPGA} control for high power {IM}
application" [Microprocessors and Microsystems 75 {(2020)} 103044]},
journal = {Microprocess. Microsystems},
volume = {104},
pages = {104977},
year = {2024},
url = {https://doi.org/10.1016/j.micpro.2023.104977},
doi = {10.1016/J.MICPRO.2023.104977},
timestamp = {Tue, 20 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/X24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/KrishnamoorthyKC23,
author = {Ramesh Krishnamoorthy and
Kalimuthu Krishnan and
Bharatiraja Chokkalingam},
title = {Integrated analysis of power and performance for cutting edge Internet
of Things microprocessor architectures},
journal = {Microprocess. Microsystems},
volume = {98},
pages = {104815},
year = {2023},
url = {https://doi.org/10.1016/j.micpro.2023.104815},
doi = {10.1016/J.MICPRO.2023.104815},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/KrishnamoorthyKC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/X23,
title = {Retraction notice to "Applications of internet of things {(IOT)} to
improve the stability of a grid connected power system using interline
power flow controller" [Microprocessors and Microsystems 76 {(2020)}
103038]},
journal = {Microprocess. Microsystems},
volume = {103},
pages = {104941},
year = {2023},
url = {https://doi.org/10.1016/j.micpro.2023.104941},
doi = {10.1016/J.MICPRO.2023.104941},
timestamp = {Tue, 20 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/X23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isgt/MontoyaJHR23,
author = {Armando Y. Montoya and
Miguel Jim{\'{e}}nez{-}Aparicio and
Javier Hernandez{-}Alvidrez and
Matthew J. Reno},
title = {A Fast Microprocessor-Based Traveling Wave Fault Detection System
for Electrical Power Networks},
booktitle = {{IEEE} Power {\&} Energy Society Innovative Smart Grid Technologies
Conference, {ISGT} 2023, Washington, DC, USA, January 16-19, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISGT51731.2023.10066370},
doi = {10.1109/ISGT51731.2023.10066370},
timestamp = {Tue, 13 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isgt/MontoyaJHR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangSOAT22,
author = {Jinwei Zhang and
Sheriff Sadiqbatcha and
Michael O'Dea and
Hussam Amrouch and
Sheldon X.{-}D. Tan},
title = {Full-Chip Power Density and Thermal Map Characterization for Commercial
Microprocessors Under Heat Sink Cooling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {41},
number = {5},
pages = {1453--1466},
year = {2022},
url = {https://doi.org/10.1109/TCAD.2021.3088081},
doi = {10.1109/TCAD.2021.3088081},
timestamp = {Wed, 18 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhangSOAT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/RonchiMCGPSSTTD22,
author = {Marco Ronchi and
Francesco Malena and
Michele Caselli and
Devis Gatti and
Ermano Picco and
Elena Salurso and
Marco Sosio and
Lucio Ticli and
Alessandro Tomasoni and
Eusebio Di{-}Cola and
Tommaso Majo and
Fabio Osnato and
Elio Guidetti and
Andrea Boni},
title = {An Integrated Low-power 802.11ba Wake-up Radio for IoT with Embedded
Microprocessor},
booktitle = {29th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2022, Glasgow, United Kingdom, October 24-26, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICECS202256217.2022.9970845},
doi = {10.1109/ICECS202256217.2022.9970845},
timestamp = {Fri, 23 Dec 2022 17:47:32 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/RonchiMCGPSSTTD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/elektrik/TokatliGSGNK21,
author = {Nazli Tokatli and
Isa Ahmet G{\"{u}}ney and
Sercan Sari and
Merve Yildiz G{\"{u}}ney and
Ugur Nezir and
G{\"{u}}rhan K{\"{u}}{\c{c}}{\"{u}}k},
title = {ShapeShifter: a morphable microprocessor for low power},
journal = {Turkish J. Electr. Eng. Comput. Sci.},
volume = {29},
number = {4},
pages = {1964--1977},
year = {2021},
url = {https://doi.org/10.3906/elk-2005-180},
doi = {10.3906/ELK-2005-180},
timestamp = {Mon, 25 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/elektrik/TokatliGSGNK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/suscom/Dinakarrao21,
author = {Sai Manoj Pudukotai Dinakarrao},
title = {Self-aware power management for multi-core microprocessors},
journal = {Sustain. Comput. Informatics Syst.},
volume = {29},
number = {Part},
pages = {100480},
year = {2021},
url = {https://doi.org/10.1016/j.suscom.2020.100480},
doi = {10.1016/J.SUSCOM.2020.100480},
timestamp = {Thu, 29 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/suscom/Dinakarrao21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/XieXWKPHHYCD21,
author = {Zhiyao Xie and
Xiaoqing Xu and
Matt Walker and
Joshua Knebel and
Kumaraguru Palaniswamy and
Nicolas Hebert and
Jiang Hu and
Huanrui Yang and
Yiran Chen and
Shidhartha Das},
title = {{APOLLO:} An Automated Power Modeling Framework for Runtime Power
Introspection in High-Volume Commercial Microprocessors},
booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture,
Virtual Event, Greece, October 18-22, 2021},
pages = {1--14},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3466752.3480064},
doi = {10.1145/3466752.3480064},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/XieXWKPHHYCD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/amcc/KimTB20,
author = {Sunsoo Kim and
Vaishnav Tadiparthi and
Raktim Bhattacharya},
title = {Nonlinear Attitude Estimation for Small UAVs with Low Power Microprocessors},
booktitle = {2020 American Control Conference, {ACC} 2020, Denver, CO, USA, July
1-3, 2020},
pages = {2593--2598},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/ACC45564.2020.9147415},
doi = {10.23919/ACC45564.2020.9147415},
timestamp = {Sun, 08 Aug 2021 01:40:57 +0200},
biburl = {https://dblp.org/rec/conf/amcc/KimTB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZhangSJT20,
author = {Jinwei Zhang and
Sheriff Sadiqbatcha and
Wentian Jin and
Sheldon X.{-}D. Tan},
title = {Accurate Power Density Map Estimation for Commercial Multi-Core Microprocessors},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {1085--1090},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116545},
doi = {10.23919/DATE48585.2020.9116545},
timestamp = {Thu, 25 Jun 2020 12:55:44 +0200},
biburl = {https://dblp.org/rec/conf/date/ZhangSJT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ReddyMJ20,
author = {Nagabhushan Reddy and
Sankaran Menon and
Prashant D. Joshi},
editor = {Luigi Dilillo and
Mihalis Psarakis and
Taniya Siddiqua},
title = {Validation Challenges in Recent Trends of Power Management in Microprocessors},
booktitle = {{IEEE} International Symposium on Defect and Fault Tolerance in {VLSI}
and Nanotechnology Systems, {DFT} 2020, Frascati, Italy, October 19-21,
2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DFT50435.2020.9250842},
doi = {10.1109/DFT50435.2020.9250842},
timestamp = {Tue, 17 Nov 2020 13:54:22 +0100},
biburl = {https://dblp.org/rec/conf/dft/ReddyMJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/host/FGBR20,
author = {Muhammad Arsath K. F and
Vinod Ganesan and
Rahul Bodduna and
Chester Rebeiro},
title = {{PARAM:} {A} Microprocessor Hardened for Power Side-Channel Attack
Resistance},
booktitle = {2020 {IEEE} International Symposium on Hardware Oriented Security
and Trust, {HOST} 2020, San Jose, CA, USA, December 7-11, 2020},
pages = {23--34},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/HOST45689.2020.9300263},
doi = {10.1109/HOST45689.2020.9300263},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/host/FGBR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Haj-YahyaAK0RMC20,
author = {Jawad Haj{-}Yahya and
Mohammed Alser and
Jeremie S. Kim and
Lois Orosa and
Efraim Rotem and
Avi Mendelson and
Anupam Chattopadhyay and
Onur Mutlu},
title = {FlexWatts: {A} Power- and Workload-Aware Hybrid Power Delivery Network
for Energy-Efficient Microprocessors},
booktitle = {53rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2020, Athens, Greece, October 17-21, 2020},
pages = {1051--1066},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/MICRO50266.2020.00088},
doi = {10.1109/MICRO50266.2020.00088},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/Haj-YahyaAK0RMC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2003-13802,
author = {Sunsoo Kim and
Vaishnav Tadiparthi and
Raktim Bhattacharya},
title = {Nonlinear Attitude Estimation for Small UAVs with Low Power Microprocessors},
journal = {CoRR},
volume = {abs/2003.13802},
year = {2020},
url = {https://arxiv.org/abs/2003.13802},
eprinttype = {arXiv},
eprint = {2003.13802},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2003-13802.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-14385,
author = {Sunsoo Kim and
Vaishnav Tadiparthi and
Raktim Bhattacharya},
title = {Extended {H2} Filtering for Attitude Estimation in Low Power Microprocessors},
journal = {CoRR},
volume = {abs/2006.14385},
year = {2020},
url = {https://arxiv.org/abs/2006.14385},
eprinttype = {arXiv},
eprint = {2006.14385},
timestamp = {Wed, 01 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2006-14385.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2009-09094,
author = {Jawad Haj{-}Yahya and
Mohammed Alser and
Jeremie S. Kim and
Lois Orosa and
Efraim Rotem and
Avi Mendelson and
Anupam Chattopadhyay and
Onur Mutlu},
title = {FlexWatts: {A} Power- and Workload-Aware Hybrid Power Delivery Network
for Energy-Efficient Microprocessors},
journal = {CoRR},
volume = {abs/2009.09094},
year = {2020},
url = {https://arxiv.org/abs/2009.09094},
eprinttype = {arXiv},
eprint = {2009.09094},
timestamp = {Wed, 23 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2009-09094.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2012-02290,
author = {Zhendong Ai and
Zihan Wang and
Wei Cui},
title = {Low-Power Wireless Wearable {ECG} Monitoring Chestbelt Based on Ferroelectric
Microprocessor},
journal = {CoRR},
volume = {abs/2012.02290},
year = {2020},
url = {https://arxiv.org/abs/2012.02290},
eprinttype = {arXiv},
eprint = {2012.02290},
timestamp = {Wed, 09 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2012-02290.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/RachamallaRJ19,
author = {Spandana Rachamalla and
Shashidhar Reddy and
Arun Joseph},
title = {Heterogeneity aware power abstractions for dynamic power dominated
FinFET-based microprocessors},
journal = {{IET} Comput. Digit. Tech.},
volume = {13},
number = {6},
pages = {524--531},
year = {2019},
url = {https://doi.org/10.1049/iet-cdt.2019.0031},
doi = {10.1049/IET-CDT.2019.0031},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/RachamallaRJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ZamanSCM19,
author = {Monir Zaman and
Mustafa M. Shihab and
Ayse K. Coskun and
Yiorgos Makris},
title = {{CAPE:} {A} cross-layer framework for accurate microprocessor power
estimation},
journal = {Integr.},
volume = {68},
pages = {87--98},
year = {2019},
url = {https://doi.org/10.1016/j.vlsi.2019.05.002},
doi = {10.1016/J.VLSI.2019.05.002},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/ZamanSCM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/JiaJG19,
author = {Tianyu Jia and
Russ Joseph and
Jie Gu},
title = {An Instruction-Driven Adaptive Clock Management Through Dynamic Phase
Scaling and Compiler Assistance for a Low Power Microprocessor},
journal = {{IEEE} J. Solid State Circuits},
volume = {54},
number = {8},
pages = {2327--2338},
year = {2019},
url = {https://doi.org/10.1109/JSSC.2019.2912510},
doi = {10.1109/JSSC.2019.2912510},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/JiaJG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pcs/MalkovskySKZT19,
author = {Sergey I. Malkovsky and
Aleksei A. Sorokin and
Sergey P. Korolev and
A. A. Zatsarinnyi and
G. I. Tsoi},
title = {Performance Evaluation of a Hybrid Computer Cluster Built on {IBM}
{POWER8} Microprocessors},
journal = {Program. Comput. Softw.},
volume = {45},
number = {6},
pages = {324--332},
year = {2019},
url = {https://doi.org/10.1134/S0361768819060057},
doi = {10.1134/S0361768819060057},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pcs/MalkovskySKZT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Haj-YahyaRMC19,
author = {Jawad Haj{-}Yahya and
Efraim Rotem and
Avi Mendelson and
Anupam Chattopadhyay},
title = {A Comprehensive Evaluation of Power Delivery Schemes for Modern Microprocessors},
booktitle = {20th International Symposium on Quality Electronic Design, {ISQED}
2019, Santa Clara, CA, USA, March 6-7, 2019},
pages = {123--130},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISQED.2019.8697544},
doi = {10.1109/ISQED.2019.8697544},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/Haj-YahyaRMC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rws/Mera-RomoR19,
author = {Daniel Ernesto Mera{-}Romo and
Rafael A. Rodr{\'{\i}}guez{-}Sol{\'{\i}}s},
title = {Low Power and Miniaturized Back-End Processing System for an L-Band
Radiometer based on {ARM} Embedded Microprocessor},
booktitle = {{IEEE} Radio and Wireless Symposium, {RWS} 2019, Orlando, FL, USA,
January 20-23, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/RWS.2019.8714392},
doi = {10.1109/RWS.2019.8714392},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/rws/Mera-RomoR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1911-08813,
author = {Muhammad Arsath K. F and
Vinod Ganesan and
Rahul Bodduna and
Chester Rebeiro},
title = {{PARAM:} {A} Microprocessor Hardened for Power Side-Channel Attack
Resistance},
journal = {CoRR},
volume = {abs/1911.08813},
year = {2019},
url = {http://arxiv.org/abs/1911.08813},
eprinttype = {arXiv},
eprint = {1911.08813},
timestamp = {Tue, 03 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1911-08813.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Cakmakci18,
author = {Yaman Cakmakci},
title = {Investigating power management schemes in out-of-order microprocessors},
school = {University of Manchester, {UK}},
year = {2018},
url = {https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.823068},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/ethos/Cakmakci18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Coates18,
author = {Glenn Coates},
title = {A syntax directed imperative language microprocessor for reduced power
consumption and improved performance},
school = {University of York, {UK}},
year = {2018},
url = {https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.772965},
timestamp = {Tue, 05 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/Coates18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/DJS18,
author = {Sai Manoj P. D. and
Axel Jantsch and
Muhammad Shafique},
title = {SmartDPM: Machine Learning-Based Dynamic Power Management for Multi-Core
Microprocessors},
journal = {J. Low Power Electron.},
volume = {14},
number = {4},
pages = {460--474},
year = {2018},
url = {https://doi.org/10.1166/jolpe.2018.1576},
doi = {10.1166/JOLPE.2018.1576},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jolpe/DJS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcst/LevaTGF18,
author = {Alberto Leva and
Federico Terraneo and
Irene Giacomello and
William Fornaciari},
title = {Event-Based Power/Performance-Aware Thermal Management for High-Density
Microprocessors},
journal = {{IEEE} Trans. Control. Syst. Technol.},
volume = {26},
number = {2},
pages = {535--550},
year = {2018},
url = {https://doi.org/10.1109/TCST.2017.2675841},
doi = {10.1109/TCST.2017.2675841},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcst/LevaTGF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/JiaJG18,
author = {Tianyu Jia and
Russ Joseph and
Jie Gu},
title = {An Instruction Driven Adaptive Clock Phase Scaling with Timing Encoding
and Online Instruction Calibration for a Low Power Microprocessor},
booktitle = {44th {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2018,
Dresden, Germany, September 3-6, 2018},
pages = {94--97},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ESSCIRC.2018.8494244},
doi = {10.1109/ESSCIRC.2018.8494244},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/esscirc/JiaJG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ewdts/SolovyovMR18,
author = {S. G. Solovyov and
E. R. Milutin and
V. A. Ryzhikov},
title = {Improvement of the Design of a Microprocessor-Based Power Supply Control
System of an Internal Combustion Engine},
booktitle = {2018 {IEEE} East-West Design {\&} Test Symposium, {EWDTS} 2018,
Kazan, Russia, September 14-17, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/EWDTS.2018.8524841},
doi = {10.1109/EWDTS.2018.8524841},
timestamp = {Mon, 09 Aug 2021 14:53:48 +0200},
biburl = {https://dblp.org/rec/conf/ewdts/SolovyovMR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/ZamanSCM18,
author = {Monir Zaman and
Mustafa M. Shihab and
Ayse K. Coskun and
Yiorgos Makris},
title = {Towards a Cross-Layer Framework for Accurate Power Modeling of Microprocessor
Designs},
booktitle = {28th International Symposium on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2018, Platja d'Aro, Spain, July 2-4, 2018},
pages = {229--236},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/PATMOS.2018.8464153},
doi = {10.1109/PATMOS.2018.8464153},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/ZamanSCM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Wang17b,
author = {Wei Wang},
title = {An improved instruction-level power and energy model for {RISC} microprocessors},
school = {University of Southampton, {UK}},
year = {2017},
url = {https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.714603},
timestamp = {Tue, 05 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/Wang17b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/SulaimanHI17,
author = {Diary R. Sulaiman and
Ibrahim Ismael Hamad and
Muhammed A. Ibrahim},
title = {Adaptive supply and body voltage control for ultra-low power microprocessors},
journal = {{IEICE} Electron. Express},
volume = {14},
number = {12},
pages = {20170306},
year = {2017},
url = {https://doi.org/10.1587/elex.14.20170306},
doi = {10.1587/ELEX.14.20170306},
timestamp = {Fri, 28 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieiceee/SulaimanHI17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/SulaimanHI17a,
author = {Diary R. Sulaiman and
Ibrahim Ismael Hamad and
Muhammed A. Ibrahim},
title = {Microprocessors optimal power dissipation using combined threshold
hopping and voltage scaling},
journal = {{IEICE} Electron. Express},
volume = {14},
number = {24},
pages = {20171046},
year = {2017},
url = {https://doi.org/10.1587/elex.14.20171046},
doi = {10.1587/ELEX.14.20171046},
timestamp = {Fri, 28 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieiceee/SulaimanHI17a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/ParkP17,
author = {Sungkyung Park and
Chester Sungchung Park},
title = {Design of Low-Gate-Count Low-Power Microprocessors with High Code
Density for Deeply Embedded Applications},
journal = {J. Circuits Syst. Comput.},
volume = {26},
number = {9},
pages = {1750132:1--1750132:24},
year = {2017},
url = {https://doi.org/10.1142/S0218126617501328},
doi = {10.1142/S0218126617501328},
timestamp = {Wed, 09 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcsc/ParkP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SundaramGNBKLRR17,
author = {Sriram Sundaram and
Aaron Grenat and
Samuel Naffziger and
Tom Burd and
Stephen Kosonocky and
Steven Liepe and
Ravinder Rachala and
Miguel Rodriguez and
Michael Austin and
Sriram Sambamurthy},
title = {Bristol Ridge: {A} 28-nm {\texttimes} 86 Performance-Enhanced Microprocessor
Through System Power Management},
journal = {{IEEE} J. Solid State Circuits},
volume = {52},
number = {1},
pages = {89--97},
year = {2017},
url = {https://doi.org/10.1109/JSSC.2016.2623637},
doi = {10.1109/JSSC.2016.2623637},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/SundaramGNBKLRR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/DurraniR17a,
title = {Retraction notice to 'Power Modeling for High Performance Network-on-Chip
Architectures' [Microprocessors and Microsystems 50 {(2017)} 80-89]},
journal = {Microprocess. Microsystems},
volume = {50},
year = {2017},
url = {https://doi.org/10.1016/j.micpro.2017.11.007},
doi = {10.1016/J.MICPRO.2017.11.007},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/DurraniR17a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/OmanaPVMAG17,
author = {Martin Oma{\~{n}}a and
Marco Padovani and
Kreshnik Veliu and
Cecilia Metra and
Juergen Alt and
Rajesh Galivanche},
title = {New Approaches for Power Binning of High Performance Microprocessors},
journal = {{IEEE} Trans. Computers},
volume = {66},
number = {7},
pages = {1159--1171},
year = {2017},
url = {https://doi.org/10.1109/TC.2017.2655060},
doi = {10.1109/TC.2017.2655060},
timestamp = {Sun, 20 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/OmanaPVMAG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BhadraS17,
author = {Dipanjan Bhadra and
Kenneth S. Stevens},
editor = {David Atienza and
Giorgio Di Natale},
title = {Design of a low power, relative timing based asynchronous {MSP430}
microprocessor},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {794--799},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927097},
doi = {10.23919/DATE.2017.7927097},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/BhadraS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/KimCS17,
author = {Seongjong Kim and
Joao Pedro Cerqueira and
Mingoo Seok},
title = {Near-Vt adaptive microprocessor and power-management-unit system based
on direct error regulation},
booktitle = {43rd {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2017,
Leuven, Belgium, September 11-14, 2017},
pages = {163--166},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ESSCIRC.2017.8094551},
doi = {10.1109/ESSCIRC.2017.8094551},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/KimCS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChuangVPRWSTLBB17,
author = {Pierce I{-}Jen Chuang and
Christos Vezyrtzis and
Divya Pathak and
Richard F. Rizzolo and
Tobias Webel and
Thomas Strach and
Otto A. Torreiter and
Preetham Lobo and
Alper Buyuktosunoglu and
Ramon Bertran and
Michael S. Floyd and
Malcolm S. Ware and
Gerard Salem and
Sean M. Carey and
Phillip J. Restle},
title = {26.2 Power supply noise in a 22nm z13{\texttrademark} microprocessor},
booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2017, San Francisco, CA, USA, February 5-9, 2017},
pages = {438--439},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISSCC.2017.7870449},
doi = {10.1109/ISSCC.2017.7870449},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/ChuangVPRWSTLBB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nvmsa/KudoU17,
author = {Masaru Kudo and
Kimiyoshi Usami},
title = {Nonvolatile power gating with {MTJ} based nonvolatile flip-flops for
a microprocessor},
booktitle = {{IEEE} 6th Non-Volatile Memory Systems and Applications Symposium,
{NVMSA} 2017, Hsinchu, Taiwan, August 16-18, 2017},
pages = {1--6},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NVMSA.2017.8064472},
doi = {10.1109/NVMSA.2017.8064472},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/nvmsa/KudoU17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/ChoB17,
author = {Young H. Cho and
Siddharth S. Bhargav},
title = {Fine-grained on-line power monitoring for soft microprocessor based
system-on-chip},
booktitle = {International Conference on ReConFigurable Computing and FPGAs, ReConFig
2017, Cancun, Mexico, December 4-6, 2017},
pages = {1--6},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/RECONFIG.2017.8279794},
doi = {10.1109/RECONFIG.2017.8279794},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/ChoB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LuriaSZL16,
author = {Kosta Luria and
Joseph Shor and
Michael Zelikson and
Alex Lyakhov},
title = {Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off
Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm},
journal = {{IEEE} J. Solid State Circuits},
volume = {51},
number = {3},
pages = {752--762},
year = {2016},
url = {https://doi.org/10.1109/JSSC.2015.2512387},
doi = {10.1109/JSSC.2015.2512387},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LuriaSZL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/WangGF16,
author = {Jinhui Wang and
Na Gong and
Eby G. Friedman},
title = {{PNS-FCR:} Flexible Charge Recycling Dynamic Circuit Technique for
Low-Power Microprocessors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {2},
pages = {613--624},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2419255},
doi = {10.1109/TVLSI.2015.2419255},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/WangGF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdc/LevaTSG16,
author = {Alberto Leva and
Federico Terraneo and
Silvano Seva and
Irene Giacomello},
title = {High-speed thermal management for power-dense microprocessors},
booktitle = {55th {IEEE} Conference on Decision and Control, {CDC} 2016, Las Vegas,
NV, USA, December 12-14, 2016},
pages = {1663--1668},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/CDC.2016.7798504},
doi = {10.1109/CDC.2016.7798504},
timestamp = {Fri, 04 Mar 2022 13:29:43 +0100},
biburl = {https://dblp.org/rec/conf/cdc/LevaTSG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icm2/El-RazekAI16,
author = {Mohamed Abd El{-}Razek and
Mohamed B. Abdelhalim and
Hanady Hussien Issa},
title = {Dynamic power reduction of microprocessors for IoT applications},
booktitle = {28th International Conference on Microelectronics, {ICM} 2016, Giza,
Egypt, December 17-20, 2016},
pages = {297--300},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ICM.2016.7847874},
doi = {10.1109/ICM.2016.7847874},
timestamp = {Mon, 20 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icm2/El-RazekAI16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/TomeiDK016,
author = {Matthew Tomei and
Henry Duwe and
Nam Sung Kim and
Rakesh Kumar},
title = {Bit Serializing a Microprocessor for Ultra-low-power},
booktitle = {Proceedings of the 2016 International Symposium on Low Power Electronics
and Design, {ISLPED} 2016, San Francisco Airport, CA, USA, August
08 - 10, 2016},
pages = {200--205},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2934583.2934597},
doi = {10.1145/2934583.2934597},
timestamp = {Tue, 06 Nov 2018 16:59:21 +0100},
biburl = {https://dblp.org/rec/conf/islped/TomeiDK016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/GrenatSKRSLRBCA16,
author = {Aaron Grenat and
Sriram Sundaram and
Stephen Kosonocky and
Ravinder Rachala and
Sriram Sambamurthy and
Steven Liepe and
Miguel Rodriguez and
Tom Burd and
Adam Clark and
Michael Austin and
Samuel Naffziger},
title = {4.2 Increasing the performance of a 28nm x86-64 microprocessor through
system power management},
booktitle = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2016, San Francisco, CA, USA, January 31 - February 4, 2016},
pages = {74--75},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISSCC.2016.7417913},
doi = {10.1109/ISSCC.2016.7417913},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/GrenatSKRSLRBCA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/syscon/YousafM16,
author = {Awais Yousaf and
Shahid Masud},
title = {Stochastic model based dynamic power estimation of microprocessor
using Imperas simulator},
booktitle = {Annual {IEEE} Systems Conference, SysCon 2016, Orlando, FL, USA, April
18-21, 2016},
pages = {1--8},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/SYSCON.2016.7490564},
doi = {10.1109/SYSCON.2016.7490564},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/syscon/YousafM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/us/Johnson15a,
author = {Matthew R. Johnson},
title = {Fast, accurate power measurement and optimization for microprocessor
platforms},
school = {University of Illinois Urbana-Champaign, {USA}},
year = {2015},
url = {https://hdl.handle.net/2142/78785},
timestamp = {Thu, 07 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/us/Johnson15a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/DYW15,
author = {Sai Manoj P. D. and
Hao Yu and
Kanwen Wang},
title = {3D Many-Core Microprocessor Power Management by Space-Time Multiplexing
Based Demand-Supply Matching},
journal = {{IEEE} Trans. Computers},
volume = {64},
number = {11},
pages = {3022--3036},
year = {2015},
url = {https://doi.org/10.1109/TC.2015.2389827},
doi = {10.1109/TC.2015.2389827},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/DYW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/GongWJS15,
author = {Na Gong and
Jinhui Wang and
Shixiong Jiang and
Ramalingam Sridhar},
title = {{TM-RF:} Aging-Aware Power-Efficient Register File Design for Modern
Microprocessors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {23},
number = {7},
pages = {1196--1209},
year = {2015},
url = {https://doi.org/10.1109/TVLSI.2014.2334136},
doi = {10.1109/TVLSI.2014.2334136},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/GongWJS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/MosalikantiKMO15,
author = {Praveen Mosalikanti and
Nasser A. Kurd and
Christopher Mozak and
Takao Oshita},
title = {Low power analog circuit techniques in the 5\({}^{\mbox{th}}\) generation
intel core\({}^{\mbox{TM}}\) microprocessor (broadwell)},
booktitle = {2015 {IEEE} Custom Integrated Circuits Conference, {CICC} 2015, San
Jose, CA, USA, September 28-30, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CICC.2015.7338454},
doi = {10.1109/CICC.2015.7338454},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/MosalikantiKMO15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cscs/MackowskiN15,
author = {Michal Mackowski and
Michal Niezabitowski},
title = {Power Consumption Analysis of Microprocessor Unit Based on Software
Realization},
booktitle = {20th International Conference on Control Systems and Computer Science,
{CSCS} 2015, Bucharest, Romania, May 27-29, 2015},
pages = {493--498},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CSCS.2015.75},
doi = {10.1109/CSCS.2015.75},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cscs/MackowskiN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/OborilET15,
author = {Fabian Oboril and
Jos Ewert and
Mehdi Baradaran Tahoori},
editor = {Wolfgang Nebel and
David Atienza},
title = {High-resolution online power monitoring for modern microprocessors},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {265--268},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755811},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/OborilET15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LuriaSZL15,
author = {Kosta Luria and
Joseph Shor and
Michael Zelikson and
Alex Lyakhov},
title = {8.7 Dual-use low-drop-out regulator/power gate with linear and on-off
conduction modes for microprocessor on-die supply voltages in 14nm},
booktitle = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2015, Digest of Technical Papers, San Francisco, CA, USA, February
22-26, 2015},
pages = {1--3},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISSCC.2015.7062973},
doi = {10.1109/ISSCC.2015.7062973},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/LuriaSZL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/OnizawaMTH15,
author = {Naoya Onizawa and
Akira Mochizuki and
Akira Tamakoshi and
Takahiro Hanyu},
title = {A sudden power-outage resilient nonvolatile microprocessor for immediate
system recovery},
booktitle = {Proceedings of the 2015 {IEEE/ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2015, Boston, MA, USA, July 8-10, 2015},
pages = {39--44},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NANOARCH.2015.7180584},
doi = {10.1109/NANOARCH.2015.7180584},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/OnizawaMTH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/YoshikawaIN14,
author = {Kumpei Yoshikawa and
Kouji Ichikawa and
Makoto Nagata},
title = {{AC} Power Supply Noise Simulation of {CMOS} Microprocessor with {LSI}
Chip-Package-Board Integrated Model},
journal = {{IEICE} Trans. Electron.},
volume = {97-C},
number = {4},
pages = {264--271},
year = {2014},
url = {https://doi.org/10.1587/transele.E97.C.264},
doi = {10.1587/TRANSELE.E97.C.264},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/YoshikawaIN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/LiuTWH014,
author = {Zao Liu and
Sheldon X.{-}D. Tan and
Hai Wang and
Yingbo Hua and
Ashish Gupta},
title = {Compact thermal modeling for packaged microprocessor design with practical
power maps},
journal = {Integr.},
volume = {47},
number = {1},
pages = {71--85},
year = {2014},
url = {https://doi.org/10.1016/j.vlsi.2013.07.003},
doi = {10.1016/J.VLSI.2013.07.003},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/LiuTWH014.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RodriguesAK14,
author = {Rance Rodrigues and
Arunachalam Annamalai and
Sandip Kundu},
title = {A low-power instruction replay mechanism for design of resilient microprocessors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {13},
number = {4},
pages = {85:1--85:23},
year = {2014},
url = {https://doi.org/10.1145/2560034},
doi = {10.1145/2560034},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/RodriguesAK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/UsamiKMKTWAKSNKN14,
author = {Kimiyoshi Usami and
Masaru Kudo and
Kensaku Matsunaga and
Tsubasa Kosaka and
Yoshihiro Tsurui and
Weihan Wang and
Hideharu Amano and
Hiroaki Kobayashi and
Ryuichi Sakamoto and
Mitaro Namiki and
Masaaki Kondo and
Hiroshi Nakamura},
title = {Design and control methodology for fine grain power gating based on
energy characterization and code profiling of microprocessors},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {843--848},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742995},
doi = {10.1109/ASPDAC.2014.6742995},
timestamp = {Thu, 21 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/UsamiKMKTWAKSNKN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WangCKPLLLY14,
author = {Cong Wang and
Naehyuck Chang and
Younghyun Kim and
Sangyoung Park and
Yongpan Liu and
Hyung Gyu Lee and
Rong Luo and
Huazhong Yang},
title = {Storage-less and converter-less maximum power point tracking of photovoltaic
cells for a nonvolatile microprocessor},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {379--384},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742919},
doi = {10.1109/ASPDAC.2014.6742919},
timestamp = {Thu, 28 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WangCKPLLLY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/GrovesRDST14,
author = {Robert A. Groves and
Phillip J. Restle and
Alan J. Drake and
David Shan and
Michael G. R. Thomson},
title = {Optimization and modeling of resonant clocking inductors for the POWER8\({}^{\mbox{TM}}\)
microprocessor},
booktitle = {Proceedings of the {IEEE} 2014 Custom Integrated Circuits Conference,
{CICC} 2014, San Jose, CA, USA, September 15-17, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/CICC.2014.6946025},
doi = {10.1109/CICC.2014.6946025},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/GrovesRDST14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KondoKSWTNWAMKUKN14,
author = {Masaaki Kondo and
Hiroaki Kobayashi and
Ryuichi Sakamoto and
Motoki Wada and
Jun Tsukamoto and
Mitaro Namiki and
Weihan Wang and
Hideharu Amano and
Kensaku Matsunaga and
Masaru Kudo and
Kimiyoshi Usami and
Toshiya Komoda and
Hiroshi Nakamura},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Design and evaluation of fine-grained power-gating for embedded microprocessors},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.158},
doi = {10.7873/DATE.2014.158},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/KondoKSWTNWAMKUKN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/TheodorouKPG14,
author = {George Theodorou and
Nektarios Kranitis and
Antonis M. Paschalis and
Dimitris Gizopoulos},
title = {Power-aware optimization of software-based self-test for {L1} caches
in microprocessors},
booktitle = {2014 {IEEE} 20th International On-Line Testing Symposium, {IOLTS}
2014, Platja d'Aro, Girona, Spain, July 7-9, 2014},
pages = {154--159},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/IOLTS.2014.6873688},
doi = {10.1109/IOLTS.2014.6873688},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/TheodorouKPG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isicir/HsuK14,
author = {Chen{-}Bo Hsu and
James B. Kuo},
title = {{MTCMOS} low-power design technique {(LPDT)} for low-voltage pipelined
microprocessor circuits},
booktitle = {2014 International Symposium on Integrated Circuits (ISIC), Singapore,
December 10-12, 2014},
pages = {328--331},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISICIR.2014.7029442},
doi = {10.1109/ISICIR.2014.7029442},
timestamp = {Thu, 09 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isicir/HsuK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/DenizSBSKKBGRSD14,
author = {Zeynep Toprak Deniz and
Michael A. Sperling and
John F. Bulzacchelli and
Gregory S. Still and
Ryan Kruse and
Seongwon Kim and
David Boerstler and
Tilman Gloekler and
Raphael Robertazzi and
Kevin Stawiasz and
Tim Diemoz and
George English and
David Hui and
Paul Muench and
Joshua Friedrich},
title = {5.2 Distributed system of digitally controlled microregulators enabling
per-core {DVFS} for the POWER8\({}^{\mbox{TM}}\) microprocessor},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {98--99},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757354},
doi = {10.1109/ISSCC.2014.6757354},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/isscc/DenizSBSKKBGRSD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/GrenatPRN14,
author = {Aaron Grenat and
Sanjay Pant and
Ravinder Rachala and
Samuel Naffziger},
title = {5.6 Adaptive clocking system for improved power efficiency in a 28nm
x86-64 microprocessor},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {106--107},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757358},
doi = {10.1109/ISSCC.2014.6757358},
timestamp = {Mon, 10 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/GrenatPRN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/RestleSHKDHBSJF14,
author = {Phillip J. Restle and
David Shan and
David Hogenmiller and
Yong Kim and
Alan J. Drake and
Jason Hibbeler and
Thomas J. Bucelot and
Gregory S. Still and
Keith A. Jenkins and
Joshua Friedrich},
title = {5.3 Wide-frequency-range resonant clock with on-the-fly mode changing
for the POWER8\({}^{\mbox{TM}}\) microprocessor},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {100--101},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757355},
doi = {10.1109/ISSCC.2014.6757355},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/RestleSHKDHBSJF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/HsuK14,
author = {Chen{-}Bo Hsu and
James B. Kuo},
title = {Power consumption optimization methodology {(PCOM)} for low-power/
low-voltage 32-bit microprocessor circuit design via {MTCMOS}},
booktitle = {{IEEE} 57th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2014, College Station, TX, USA, August 3-6, 2014},
pages = {921--924},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/MWSCAS.2014.6908566},
doi = {10.1109/MWSCAS.2014.6908566},
timestamp = {Thu, 09 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/HsuK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SatheAIOPN13,
author = {Visvesh S. Sathe and
Srikanth Arekapudi and
Alexander T. Ishii and
Charles Ouyang and
Marios C. Papaefthymiou and
Samuel Naffziger},
title = {Resonant-Clock Design for a Power-Efficient, High-Volume x86-64 Microprocessor},
journal = {{IEEE} J. Solid State Circuits},
volume = {48},
number = {1},
pages = {140--149},
year = {2013},
url = {https://doi.org/10.1109/JSSC.2012.2218068},
doi = {10.1109/JSSC.2012.2218068},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/SatheAIOPN13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShelarP13,
author = {Rupesh S. Shelar and
Marek Patyra},
title = {Impact of Local Interconnects on Timing and Power in a High Performance
Microprocessor},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {32},
number = {10},
pages = {1623--1627},
year = {2013},
url = {https://doi.org/10.1109/TCAD.2013.2266404},
doi = {10.1109/TCAD.2013.2266404},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShelarP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/RodriguesAKK13,
author = {Rance Rodrigues and
Arunachalam Annamalai and
Israel Koren and
Sandip Kundu},
title = {A Study on the Use of Performance Counters to Estimate Power in Microprocessors},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {60-II},
number = {12},
pages = {882--886},
year = {2013},
url = {https://doi.org/10.1109/TCSII.2013.2285966},
doi = {10.1109/TCSII.2013.2285966},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/RodriguesAKK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/VaccaGZ13,
author = {Marco Vacca and
Mariagrazia Graziano and
Maurizio Zamboni},
title = {Nanomagnetic Logic Microprocessor: Hierarchical Power Model},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {8},
pages = {1410--1420},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2211903},
doi = {10.1109/TVLSI.2012.2211903},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/VaccaGZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/BhagavatulaJ13,
author = {Srikar Bhagavatula and
Byunghoo Jung},
title = {A power sensor with 80ns response time for power management in microprocessors},
booktitle = {Proceedings of the {IEEE} 2013 Custom Integrated Circuits Conference,
{CICC} 2013, San Jose, CA, USA, September 22-25, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CICC.2013.6658487},
doi = {10.1109/CICC.2013.6658487},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/BhagavatulaJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DinakarraoWY13,
author = {Sai Manoj Pudukotai Dinakarrao and
Kanwen Wang and
Hao Yu},
title = {Peak power reduction and workload balancing by space-time multiplexing
based demand-supply matching for 3D thousand-core microprocessor},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {175:1--175:6},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488950},
doi = {10.1145/2463209.2488950},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DinakarraoWY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KarnikPB13,
author = {Tanay Karnik and
Mondira (Mandy) Deb Pant and
Shekhar Borkar},
title = {Power management and delivery for high-performance microprocessors},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {159:1--159:3},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488931},
doi = {10.1145/2463209.2488931},
timestamp = {Thu, 14 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/KarnikPB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WangYWZ13,
author = {Kanwen Wang and
Hao Yu and
Benfei Wang and
Chun Zhang},
editor = {Enrico Macii},
title = {3D reconfigurable power switch network for demand-supply matching
between multi-output power converters and many-core microprocessors},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1643--1648},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.333},
doi = {10.7873/DATE.2013.333},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/WangYWZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/DrakeFWHHSTCS13,
author = {Alan J. Drake and
Michael S. Floyd and
Richard L. Willaman and
Derek J. Hathaway and
Joshua Hernandez and
Crystal Soja and
Marshall D. Tiner and
Gary D. Carpenter and
Robert M. Senger},
editor = {Pai H. Chou and
Ru Huang and
Yuan Xie and
Tanay Karnik},
title = {Single-cycle, pulse-shaped critical path monitor in the {POWER7+}
microprocessor},
booktitle = {International Symposium on Low Power Electronics and Design (ISLPED),
Beijing, China, September 4-6, 2013},
pages = {193--198},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISLPED.2013.6629293},
doi = {10.1109/ISLPED.2013.6629293},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/islped/DrakeFWHHSTCS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GongWS13,
author = {Na Gong and
Jinhui Wang and
Ramalingam Sridhar},
title = {Application-driven power efficient {ALU} design methodology for modern
microprocessors},
booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013,
Santa Clara, CA, USA, March 4-6, 2013},
pages = {184--188},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISQED.2013.6523608},
doi = {10.1109/ISQED.2013.6523608},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/GongWS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/ManuzzatoCLP13,
author = {Andrea Manuzzato and
Fabio Campi and
Valentino Liberali and
Davide Pandini},
title = {Design methodology for low-power embedded microprocessors},
booktitle = {2013 23rd International Workshop on Power and Timing Modeling, Optimization
and Simulation (PATMOS), Karlsruhe, Germany, September 9-11, 2013},
pages = {259--264},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/PATMOS.2013.6662184},
doi = {10.1109/PATMOS.2013.6662184},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/patmos/ManuzzatoCLP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sensys/RizzonRPB13,
author = {Luca Rizzon and
Maurizio Rossi and
Roberto Passerone and
Davide Brunelli},
editor = {Geoff V. Merrett and
Davide Brunelli},
title = {Wireless sensor networks for environmental monitoring powered by microprocessors
heat dissipation},
booktitle = {Proceedings of the 1st International Workshop on Energy Neutral Sensing
Systems, ENSSys 2013, Rome, Italy, November 13, 2013},
pages = {8:1--8:6},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2534208.2534216},
doi = {10.1145/2534208.2534216},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sensys/RizzonRPB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/ViswanathA12,
author = {Vinod Viswanath and
Jacob A. Abraham},
title = {Automatic and Correct Register Transfer Level Annotations for Low
Power Microprocessor Design},
journal = {J. Low Power Electron.},
volume = {8},
number = {4},
pages = {424--439},
year = {2012},
url = {https://doi.org/10.1166/jolpe.2012.1204},
doi = {10.1166/JOLPE.2012.1204},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/ViswanathA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WangTLG12,
author = {Hai Wang and
Sheldon X.{-}D. Tan and
Xuexin Liu and
Ashish Gupta},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Runtime power estimator calibration for high-performance microprocessors},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {352--357},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176496},
doi = {10.1109/DATE.2012.6176496},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WangTLG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/embc/ChenMCC12,
author = {Tung{-}Chien Chen and
Tsung{-}Chuan Ma and
Yun{-}Yu Chen and
Liang{-}Gee Chen},
title = {Low power and high accuracy spike sorting microprocessor with on-line
interpolation and re-alignment in 90nm {CMOS} process},
booktitle = {Annual International Conference of the {IEEE} Engineering in Medicine
and Biology Society, {EMBC} 2012, San Diego, CA, USA, August 28 -
September 1, 2012},
pages = {4485--4488},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/EMBC.2012.6346963},
doi = {10.1109/EMBC.2012.6346963},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/embc/ChenMCC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ValadimasTA12,
author = {Stefanos Valadimas and
Yiorgos Tsiatouhas and
Angela Arapoyanni},
title = {Cost and power efficient timing error tolerance in flip-flop based
microprocessor cores},
booktitle = {17th {IEEE} European Test Symposium, {ETS} 2012, Annecy, France, May
28 - June 1 2012},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ETS.2012.6233002},
doi = {10.1109/ETS.2012.6233002},
timestamp = {Tue, 28 Apr 2020 11:43:43 +0200},
biburl = {https://dblp.org/rec/conf/ets/ValadimasTA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/Korobkov12,
author = {Alexander Korobkov},
editor = {Jiang Hu and
Cheng{-}Kok Koh},
title = {Power-grid {(PG)} analysis challenges for large microprocessor designs:
(our experience with oracle sparc processor designs)},
booktitle = {International Symposium on Physical Design, ISPD'12, Napa, CA, USA,
March 25-28, 2012},
pages = {95--96},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2160916.2160938},
doi = {10.1145/2160916.2160938},
timestamp = {Tue, 06 Nov 2018 11:07:46 +0100},
biburl = {https://dblp.org/rec/conf/ispd/Korobkov12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/MillerBKKMSKVYLHSKPHCYXMCSABVTLKFJ12,
author = {Brian Miller and
Derek Brasili and
Tim Kiszely and
Rob Kuhn and
Rahul Mehrotra and
Manan Salvi and
Mandar Kulkarni and
Anand Varadharajan and
Shi{-}Huang Yin and
William Lin and
Adam Hughes and
Bill Stysiack and
Vasu Kandadi and
Ilan Pragaspathi and
Dan Hartman and
David Carlson and
Vishnu Yalala and
Thucydides Xanthopoulos and
Scott E. Meninger and
Ethan Crain and
Mark Spaeth and
Akin Aina and
Suresh Balasubramanian and
Joe Vulih and
Pragati Tiwary and
David Lin and
Richard Kessler and
Bruce Fishbein and
Anil Jain},
title = {A 32-core {RISC} microprocessor with network accelerators, power management
and testability features},
booktitle = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2012, San Francisco, CA, USA, February 19-23, 2012},
pages = {58--60},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISSCC.2012.6176877},
doi = {10.1109/ISSCC.2012.6176877},
timestamp = {Fri, 15 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/MillerBKKMSKVYLHSKPHCYXMCSABVTLKFJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SatheAOPIN12,
author = {Visvesh S. Sathe and
Srikanth Arekapudi and
Charles Ouyang and
Marios C. Papaefthymiou and
Alexander T. Ishii and
Samuel Naffziger},
title = {Resonant clock design for a power-efficient high-volume x86-64 microprocessor},
booktitle = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2012, San Francisco, CA, USA, February 19-23, 2012},
pages = {68--70},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISSCC.2012.6176933},
doi = {10.1109/ISSCC.2012.6176933},
timestamp = {Thu, 28 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/SatheAOPIN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/VijayakumarKK12,
author = {Arunkumar Vijayakumar and
Raghavan Kumar and
Sandip Kundu},
title = {On Design of Low Cost Power Supply Noise Detection Sensor for Microprocessors},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2012, Amherst,
MA, USA, August 19-21, 2012},
pages = {120--125},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISVLSI.2012.32},
doi = {10.1109/ISVLSI.2012.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/VijayakumarKK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mipro/Bojic12,
author = {Davor Bojic},
title = {Microprocessor based pipe rupture monitoring system on pumped storage
power plant Velebit},
booktitle = {2012 Proceedings of the 35th International Convention, {MIPRO} 2012,
Opatija, Croatia, May 21-25, 2012},
pages = {930--934},
publisher = {{IEEE}},
year = {2012},
url = {https://ieeexplore.ieee.org/document/6240776/},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mipro/Bojic12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/ReddKGG012,
author = {Bennion Redd and
Spencer S. Kellis and
Nathaniel Gaskin and
Matthew Guthaus and
Richard Brown},
title = {Architecture for increased address space in an ultra-low-power microprocessor},
booktitle = {55th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2012, Boise, ID, USA, August 5-8, 2012},
pages = {125--128},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/MWSCAS.2012.6291973},
doi = {10.1109/MWSCAS.2012.6291973},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/ReddKGG012.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/WeckxRMD12,
author = {Pieter Weckx and
Nele Reynders and
Ilse de Moffarts and
Wim Dehaene},
editor = {Jos{\'{e}} L. Ayala and
Delong Shang and
Alex Yakovlev},
title = {Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 22nd International Workshop, {PATMOS} 2012, Newcastle
upon Tyne, UK, September 4-6, 2012, Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {7606},
pages = {175--184},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-36157-9\_18},
doi = {10.1007/978-3-642-36157-9\_18},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/WeckxRMD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/FriedrichPBBDHHKKKLLMNOPQRRRRRRST11,
author = {Joshua Friedrich and
Ruchir Puri and
Uwe Brandt and
Markus B{\"{u}}hler and
Jack DiLullo and
Jeremy Hopkins and
Mozammel Hossain and
Michael A. Kazda and
Joachim Keinert and
Zahi M. Kurzum and
Douglass Lamb and
Alice Lee and
Frank Musante and
Jens Noack and
Peter J. Osler and
Stephen D. Posluszny and
Haifeng Qian and
Shyam Ramji and
Vasant B. Rao and
Lakshmi N. Reddy and
Haoxing Ren and
Thomas E. Rosser and
Benjamin R. Russell and
Cliff C. N. Sze and
Gustavo E. T{\'{e}}llez},
title = {Design methodology for the {IBM} {POWER7} microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {55},
number = {3},
pages = {9},
year = {2011},
url = {https://doi.org/10.1147/JRD.2011.2105692},
doi = {10.1147/JRD.2011.2105692},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/FriedrichPBBDHHKKKLLMNOPQRRRRRRST11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/BandoN11,
author = {Yoji Bando and
Makoto Nagata},
title = {Microprocessor power noise measurements with different levels of resource
occupancy},
journal = {{IEICE} Electron. Express},
volume = {8},
number = {3},
pages = {182--188},
year = {2011},
url = {https://doi.org/10.1587/elex.8.182},
doi = {10.1587/ELEX.8.182},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/BandoN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ipsj/LeiIUNKNA11,
author = {Zhao Lei and
Daisuke Ikebuchi and
Kimiyoshi Usami and
Mitaro Namiki and
Masaaki Kondo and
Hiroshi Nakamura and
Hideharu Amano},
title = {Design and Implementation Fine-grained Power Gating on Microprocessor
Functional Units},
journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.},
volume = {4},
pages = {182--192},
year = {2011},
url = {https://doi.org/10.2197/ipsjtsldm.4.182},
doi = {10.2197/IPSJTSLDM.4.182},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ipsj/LeiIUNKNA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/PadmawarRC11,
author = {Mandar Padmawar and
Sanghamitra Roy and
Koushik Chakraborty},
title = {Microprocessor Power Supply Noise Aware Floorplanning Using a Circuit-Architectural
Framework},
journal = {J. Low Power Electron.},
volume = {7},
number = {3},
pages = {303--313},
year = {2011},
url = {https://doi.org/10.1166/jolpe.2011.1140},
doi = {10.1166/JOLPE.2011.1140},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/PadmawarRC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/YehCCY11,
author = {Chang{-}Ching Yeh and
Kuei{-}Chung Chang and
Tien{-}Fu Chen and
Chingwei Yeh},
title = {Maintaining performance on power gating of microprocessor functional
units by using a predictive pre-wakeup strategy},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {3},
pages = {16:1--16:27},
year = {2011},
url = {https://doi.org/10.1145/2019608.2019615},
doi = {10.1145/2019608.2019615},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/YehCCY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HenrySN11,
author = {Michael B. Henry and
Meeta Srivastav and
Leyla Nazhandali},
editor = {Leon Stok and
Nikil D. Dutt and
Soha Hassoun},
title = {A case for NEMS-based functional-unit power gating of low-power embedded
microprocessors},
booktitle = {Proceedings of the 48th Design Automation Conference, {DAC} 2011,
San Diego, California, USA, June 5-10, 2011},
pages = {872--877},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2024724.2024919},
doi = {10.1145/2024724.2024919},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HenrySN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/ChawlaH11,
author = {Vipul Chawla and
Dong Sam Ha},
editor = {Rolf Kraemer and
Adam Pawlak and
Andreas Steininger and
Mario Sch{\"{o}}lzel and
Jaan Raik and
Heinrich Theodor Vierhaus},
title = {Dual use of power lines for data communications in microprocessors},
booktitle = {14th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2011, Cottbus, Germany, April 13-15,
2011},
pages = {23--28},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/DDECS.2011.5783041},
doi = {10.1109/DDECS.2011.5783041},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/ChawlaH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/KimJ11,
author = {Youngtaek Kim and
Lizy Kurian John},
editor = {Naehyuck Chang and
Hiroshi Nakamura and
Koji Inoue and
Kenichi Osada and
Massimo Poncino},
title = {Automated di/dt stressmark generation for microprocessor power delivery
networks},
booktitle = {Proceedings of the 2011 International Symposium on Low Power Electronics
and Design, 2011, Fukuoka, Japan, August 1-3, 2011},
pages = {253--258},
publisher = {{IEEE/ACM}},
year = {2011},
url = {http://portal.acm.org/citation.cfm?id=2016860\&CFID=34981777\&CFTOKEN=25607807},
timestamp = {Mon, 13 Aug 2012 09:40:34 +0200},
biburl = {https://dblp.org/rec/conf/islped/KimJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtv/YouHAC11,
author = {Daecheol You and
Young{-}Si Hwang and
Youngho Ahn and
Ki{-}Seok Chung},
editor = {Magdy S. Abadir and
Jay Bhadra and
Li{-}C. Wang},
title = {A Test Method for Power Management of SoC-based Microprocessors},
booktitle = {12th International Workshop on Microprocessor Test and Verification,
{MTV} 2011, Austin, TX, USA, December 5-7, 2011},
pages = {28--31},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/MTV.2011.14},
doi = {10.1109/MTV.2011.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtv/YouHAC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/ThirugnanamH11,
author = {Rajesh Thirugnanam and
Dong Sam Ha},
title = {Feasibility study for communication over Power Distribution Networks
of microprocessors},
booktitle = {{IEEE} 24th International SoC Conference, {SOCC} 2011, Taipei, Taiwan,
September 26-28, 2011},
pages = {118--121},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/SOCC.2011.6085131},
doi = {10.1109/SOCC.2011.6085131},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/ThirugnanamH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/daglib/p/GuptaB11,
author = {Meeta Sharma Gupta and
Pradip Bose},
editor = {Swarup Bhunia and
Saibal Mukhopadhyay},
title = {Variation-Tolerant Microprocessor Architecture at Low Power},
booktitle = {Low-Power Variation-Tolerant Design in Nanometer Silicon},
pages = {211--247},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-1-4419-7418-1\_7},
doi = {10.1007/978-1-4419-7418-1\_7},
timestamp = {Tue, 16 May 2017 14:01:33 +0200},
biburl = {https://dblp.org/rec/books/daglib/p/GuptaB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Roy10a,
author = {Soumyaroop Roy},
title = {Architecture and Compiler Support for Leakage Reduction Using Power
Gating in Microprocessors},
school = {University of South Florida, Tampa, {USA}},
year = {2010},
url = {https://digitalcommons.usf.edu/etd/3479},
timestamp = {Fri, 30 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/basesearch/Roy10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/us/Winter10,
author = {Jonathan A. Winter},
title = {Adaptive Thread Management for Power, Temperature, and Reliability
in Future Microprocessors},
school = {Cornell University, {USA}},
year = {2010},
timestamp = {Thu, 07 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/us/Winter10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/StralenP10,
author = {Peter van Stralen and
Andy D. Pimentel},
title = {A High-level Microprocessor Power Modeling Technique Based on Event
Signatures},
journal = {J. Signal Process. Syst.},
volume = {60},
number = {2},
pages = {239--250},
year = {2010},
url = {https://doi.org/10.1007/s11265-008-0301-8},
doi = {10.1007/S11265-008-0301-8},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/StralenP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cn/MackowskiS10,
author = {Michal Mackowski and
Krzysztof Skoroniak},
editor = {Andrzej Kwiecien and
Piotr Gaj and
Piotr Stera},
title = {Instruction Prediction in Microprocessor Unit Based on Power Supply
Line},
booktitle = {Computer Networks - 17th Conference, {CN} 2010, Ustro{\'{n}},
Poland, June 15-19, 2010. Proceedings},
series = {Communications in Computer and Information Science},
volume = {79},
pages = {173--182},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-13861-4\_17},
doi = {10.1007/978-3-642-13861-4\_17},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cn/MackowskiS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BoseBCDGHJKKMNRSWZ10,
author = {Pradip Bose and
Alper Buyuktosunoglu and
Chen{-}Yong Cher and
John A. Darringer and
Meeta Sharma Gupta and
Hendrik F. Hamann and
Hans M. Jacobson and
Prabhakar Kudva and
Eren Kursun and
Niti Madan and
Indira Nair and
Jude A. Rivers and
Jeonghee Shin and
Alan J. Weger and
Victor V. Zyuban},
editor = {R. Iris Bahar and
Fabrizio Lombardi and
David Atienza and
Erik Brunvand},
title = {Power-efficient, reliable microprocessor architectures: modeling and
design methods},
booktitle = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
Providence, Rhode Island, USA, May 16-18 2010},
pages = {299--304},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1785481.1785551},
doi = {10.1145/1785481.1785551},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BoseBCDGHJKKMNRSWZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/greencom/WangZDZ10,
author = {Yongwen Wang and
Qianbing Zheng and
Qiang Dou and
Minxuan Zhang},
editor = {Peidong Zhu and
Lizhe Wang and
Feng Xia and
Huajun Chen and
Ian McLoughlin and
Shiao{-}Li Tsao and
Mitsuhisa Sato and
Sun{-}Ki Chai and
Irwin King},
title = {Low Power Design for a Multi-core Multi-thread Microprocessor},
booktitle = {2010 {IEEE/ACM} Int'l Conference on Green Computing and Communications,
GreenCom 2010, {\&} Int'l Conference on Cyber, Physical and Social
Computing, CPSCom 2010, Hangzhou, China, December 18-20, 2010},
pages = {351--356},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/GreenCom-CPSCom.2010.66},
doi = {10.1109/GREENCOM-CPSCOM.2010.66},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/greencom/WangZDZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ParkLKK10,
author = {Danbee Park and
Jungseob Lee and
Nam Sung Kim and
Taewhan Kim},
editor = {Louis Scheffer and
Joel R. Phillips and
Alan J. Hu},
title = {Optimal algorithm for profile-based power gating: {A} compiler technique
for reducing leakage on execution units in microprocessors},
booktitle = {2010 International Conference on Computer-Aided Design, {ICCAD} 2010,
San Jose, CA, USA, November 7-11, 2010},
pages = {361--364},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICCAD.2010.5653652},
doi = {10.1109/ICCAD.2010.5653652},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ParkLKK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icwet/MegalingamKNVS10,
author = {Rajesh Kannan Megalingam and
V. Krishnan and
M. Nair and
Vineeth Sarma V. and
Rahul Srikumar},
editor = {B. K. Mishra},
title = {Serializing the data bus of the Sun OpenSPARC {T1} microprocessor
datapath for reduced power consumption},
booktitle = {Proceedings of the {ICWET} '10 International Conference {\&} Workshop
on Emerging Trends in Technology, Mumbai, Maharashtra, India, February
26 - 27, 2010},
pages = {868--873},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1741906.1742106},
doi = {10.1145/1741906.1742106},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icwet/MegalingamKNVS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/Pant10,
author = {Mondira (Mandy) Deb Pant},
editor = {Vojin G. Oklobdzija and
Barry Pangle and
Naehyuck Chang and
Naresh R. Shanbhag and
Chris H. Kim},
title = {Microprocessor power delivery challenges in the Nano-Era},
booktitle = {Proceedings of the 2010 International Symposium on Low Power Electronics
and Design, 2010, Austin, Texas, USA, August 18-20, 2010},
pages = {375--376},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1840845.1840927},
doi = {10.1145/1840845.1840927},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/Pant10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/CainN10,
author = {Harold W. Cain and
Priya Nagpurkar},
title = {Runahead execution vs. conventional data prefetching in the {IBM}
{POWER6} microprocessor},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2010, 28-30 March 2010, White Plains, NY, {USA}},
pages = {203--212},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISPASS.2010.5452021},
doi = {10.1109/ISPASS.2010.5452021},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/CainN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/ShelarP10,
author = {Rupesh S. Shelar and
Marek Patyra},
editor = {Prashant Saxena and
Yao{-}Wen Chang},
title = {Impact of local interconnects on timing and power in a high performance
microprocessor},
booktitle = {Proceedings of the 2010 International Symposium on Physical Design,
{ISPD} 2010, San Francisco, California, USA, March 14-17, 2010},
pages = {145--152},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1735023.1735060},
doi = {10.1145/1735023.1735060},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/ShelarP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/UsamiHKYIANKN10,
author = {Kimiyoshi Usami and
Tatsunori Hashida and
Satoshi Koyama and
Tatsuya Yamamoto and
Daisuke Ikebuchi and
Hideharu Amano and
Mitaro Namiki and
Masaaki Kondo and
Hiroshi Nakamura},
title = {Adaptive power gating for function units in a microprocessor},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {29--37},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450407},
doi = {10.1109/ISQED.2010.5450407},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/UsamiHKYIANKN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/CraftsBCFFHKSTW10,
author = {James Crafts and
David Bogdan and
Dennis Conti and
Donato O. Forlenza and
Orazio P. Forlenza and
William V. Huott and
Mary P. Kusko and
Edward Seymour and
Timothy Taylor and
Brian Walsh},
editor = {Ron Press and
Erik H. Volkerink},
title = {Testing the {IBM} Power 7{\texttrademark} 4 GHz eight core microprocessor},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX,
USA, November 2-4, 2010},
pages = {49--58},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/TEST.2010.5699204},
doi = {10.1109/TEST.2010.5699204},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/CraftsBCFFHKSTW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Robinson09b,
author = {Andrew J. Robinson},
title = {Improving instruction encoding efficiency in low power microprocessors},
school = {University of Manchester, {UK}},
year = {2009},
url = {https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.500489},
timestamp = {Tue, 05 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/Robinson09b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/eminds/KawaharaRA09,
author = {Yoshihiro Kawahara and
Nanami Ryu and
Tohru Asami},
title = {Monitoring Daily Energy Expenditure using a 3-Axis Accelerometer with
a Low-Power Microprocessor},
journal = {e Minds Int. J. Hum. Comput. Interact.},
volume = {1},
number = {5},
year = {2009},
url = {http://www.eminds.uniovi.es/index.php?journal=eminds\&page=article\&op=view\&path\%5B\%5D=64},
timestamp = {Thu, 07 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/eminds/KawaharaRA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/FukazawaKATN09,
author = {Mitsuya Fukazawa and
Masanori Kurimoto and
Rei Akiyama and
Hidehiro Takata and
Makoto Nagata},
title = {Experimental Evaluation of Dynamic Power Supply Noise and Logical
Failures in Microprocessor Operations},
journal = {{IEICE} Trans. Electron.},
volume = {92-C},
number = {4},
pages = {475--482},
year = {2009},
url = {https://doi.org/10.1587/transele.E92.C.475},
doi = {10.1587/TRANSELE.E92.C.475},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/FukazawaKATN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/XiaT09,
author = {Xiao Xin Xia and
Teng Tiow Tay},
title = {Intra-Application Energy Reduction for Microprocessor Low-Power Design},
journal = {J. Circuits Syst. Comput.},
volume = {18},
number = {1},
pages = {181--198},
year = {2009},
url = {https://doi.org/10.1142/S0218126609005010},
doi = {10.1142/S0218126609005010},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/XiaT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MoiseevKW09,
author = {Konstantin Moiseev and
Avinoam Kolodny and
Shmuel Wimer},
title = {Power-delay optimization in {VLSI} microprocessors by wire spacing},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {14},
number = {4},
pages = {55:1--55:28},
year = {2009},
url = {https://doi.org/10.1145/1562514.1562523},
doi = {10.1145/1562514.1562523},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/MoiseevKW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RoyRK09,
author = {Soumyaroop Roy and
Nagarajan Ranganathan and
Srinivas Katkoori},
title = {A Framework for Power-Gating Functional Units in Embedded Microprocessors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {11},
pages = {1640--1649},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2005774},
doi = {10.1109/TVLSI.2008.2005774},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/RoyRK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iasam/Osorno09,
author = {Bruno Osorno},
title = {Application of Microprocessor Based Protective Relays in Power Systems},
booktitle = {Annual Meeting of the {IEEE} Industry Applications Society, {IAS}
2009, Houston, TX, USA, 4-8 October, 2009, Proceedings},
pages = {1--8},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/IAS.2009.5324898},
doi = {10.1109/IAS.2009.5324898},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/iasam/Osorno09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ercim/AxelsenGVT09,
author = {Holger Bock Axelsen and
Robert Gl{\"{u}}ck and
Alexis De Vos and
Michael Kirkedal Thomsen},
title = {MicroPower: Towards Low-Power Microprocessors with Reversible Computing},
journal = {{ERCIM} News},
volume = {2009},
number = {79},
year = {2009},
url = {http://ercim-news.ercim.eu/en79/special/micropower-towards-low-power-microprocessors-with-reversible-computing},
timestamp = {Wed, 22 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ercim/AxelsenGVT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/WatanabeCS08,
author = {Shingo Watanabe and
Akihiro Chiyonobu and
Toshinori Sato},
title = {A Low-Power Instruction Issue Queue for Microprocessors},
journal = {{IEICE} Trans. Electron.},
volume = {91-C},
number = {4},
pages = {400--409},
year = {2008},
url = {https://doi.org/10.1093/ietele/e91-c.4.400},
doi = {10.1093/IETELE/E91-C.4.400},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/WatanabeCS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/HaighC08,
author = {Jonathan R. Haigh and
Lawrence T. Clark},
title = {High performance set associative translation lookaside buffers for
low power microprocessors},
journal = {Integr.},
volume = {41},
number = {4},
pages = {509--523},
year = {2008},
url = {https://doi.org/10.1016/j.vlsi.2007.11.003},
doi = {10.1016/J.VLSI.2007.11.003},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/HaighC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/StoltMDMLFF08,
author = {Benjamin Stolt and
Yonatan Mittlefehldt and
Sanjay Dubey and
Gaurav Mittal and
Mike Lee and
Joshua Friedrich and
Eric Fluhr},
title = {Design and Implementation of the {POWER6} Microprocessor},
journal = {{IEEE} J. Solid State Circuits},
volume = {43},
number = {1},
pages = {21--28},
year = {2008},
url = {https://doi.org/10.1109/JSSC.2007.910963},
doi = {10.1109/JSSC.2007.910963},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/StoltMDMLFF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/ReickSSKMFH08,
author = {Kevin Reick and
Pia N. Sanda and
Scott B. Swaney and
Jeffrey W. Kellington and
Michael J. Mack and
Michael S. Floyd and
Daniel Henderson},
title = {Fault-Tolerant Design of the {IBM} Power6 Microprocessor},
journal = {{IEEE} Micro},
volume = {28},
number = {2},
pages = {30--38},
year = {2008},
url = {https://doi.org/10.1109/MM.2008.22},
doi = {10.1109/MM.2008.22},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/ReickSSKMFH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangCCGHW08,
author = {Lin Zhang and
Aaron Carpenter and
Berkehan Ciftcioglu and
Alok Garg and
Michael C. Huang and
Hui Wu},
title = {Injection-Locked Clocking: {A} Low-Power Clock Distribution Scheme
for High-Performance Microprocessors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {16},
number = {9},
pages = {1251--1256},
year = {2008},
url = {https://doi.org/10.1109/TVLSI.2008.2000976},
doi = {10.1109/TVLSI.2008.2000976},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangCCGHW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/Zarrineh08,
author = {Kamran Zarrineh},
editor = {Cristiana Bolchini and
Yong{-}Bin Kim and
Dimitris Gizopoulos and
Mohammad Tehranipoor},
title = {Design for Test Challenges of High Performance/Low Power Microprocessors},
booktitle = {23rd {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2008), 1-3 October 2008, Boston, MA, {USA}},
pages = {503--503},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DFT.2008.71},
doi = {10.1109/DFT.2008.71},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Zarrineh08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ArunachalamB08,
author = {Venkatesh Arunachalam and
Wayne P. Burleson},
editor = {Vijaykrishnan Narayanan and
Zhiyuan Yan and
Enrico Macii and
Sanjukta Bhanja},
title = {Low-power clock distribution in a multilayer core 3d microprocessor},
booktitle = {Proceedings of the 18th {ACM} Great Lakes Symposium on {VLSI} 2008,
Orlando, Florida, USA, May 4-6, 2008},
pages = {429--434},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1366110.1366212},
doi = {10.1145/1366110.1366212},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ArunachalamB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/Balasubramanian08,
author = {Srikanth Balasubramanian},
editor = {Vijaykrishnan Narayanan and
C. P. Ravikumar and
J{\"{o}}rg Henkel and
Ali Keshavarzi and
Vojin G. Oklobdzija and
Barry M. Pangrle},
title = {Power delivery for high performance microprocessors},
booktitle = {Proceedings of the 2008 International Symposium on Low Power Electronics
and Design, 2008, Bangalore, India, August 11-13, 2008},
pages = {239--240},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1393921.1393985},
doi = {10.1145/1393921.1393985},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/Balasubramanian08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SongISSDSMJKS08,
author = {Peilin Song and
Stephen Ippolito and
Franco Stellari and
John Sylvestri and
Tim Diemoz and
George Smith and
Paul Muench and
Norm James and
Seongwon Kim and
Hector Saenz},
editor = {Douglas Young and
Nur A. Touba},
title = {Optical Diagnostics for {IBM} {POWER6-} Microprocessor},
booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
California, USA, October 26-31, 2008},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/TEST.2008.4700597},
doi = {10.1109/TEST.2008.4700597},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SongISSDSMJKS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ShyePSMMDD08,
author = {Alex Shye and
Yan Pan and
Benjamin Scholbrock and
J. Scott Miller and
Gokhan Memik and
Peter A. Dinda and
Robert P. Dick},
title = {Power to the people: Leveraging human physiological traits to control
microprocessor frequency},
booktitle = {41st Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-41} 2008), November 8-12, 2008, Lake Como, Italy},
pages = {188--199},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/MICRO.2008.4771790},
doi = {10.1109/MICRO.2008.4771790},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/ShyePSMMDD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/BerridgeABBCDDKLMRSSSTRRRW07,
author = {Rex Berridge and
Robert M. Averill III and
Arnold E. Barish and
Michael A. Bowen and
Peter J. Camporese and
Jack DiLullo and
Peter E. Dudley and
Joachim Keinert and
David W. Lewis and
Robert D. Morel and
Thomas E. Rosser and
Nicole S. Schwartz and
Philip Shephard and
Howard H. Smith and
Dave Thomas and
Phillip J. Restle and
John R. Ripley and
Stephen L. Runyon and
Patrick M. Williams},
title = {{IBM} {POWER6} microprocessor physical design and design methodology},
journal = {{IBM} J. Res. Dev.},
volume = {51},
number = {6},
pages = {685--714},
year = {2007},
url = {https://doi.org/10.1147/rd.516.0685},
doi = {10.1147/RD.516.0685},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/BerridgeABBCDDKLMRSSSTRRRW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/CurranFPSFCH07,
author = {Brian W. Curran and
Eric Fluhr and
Jose Paredes and
Leon J. Sigal and
Joshua Friedrich and
Yiu{-}Hing Chan and
Charlie Hwang},
title = {Power-constrained high-frequency circuits for the {IBM} {POWER6} microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {51},
number = {6},
pages = {715--732},
year = {2007},
url = {https://doi.org/10.1147/rd.516.0715},
doi = {10.1147/RD.516.0715},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/CurranFPSFCH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/FloydGKRRRW07,
author = {Michael S. Floyd and
Soraya Ghiasi and
Tom W. Keller and
Karthick Rajamani and
Freeman L. Rawson III and
Juan C. Rubio and
Malcolm S. Ware},
title = {System power management support in the {IBM} {POWER6} microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {51},
number = {6},
pages = {733--746},
year = {2007},
url = {https://doi.org/10.1147/rd.516.0733},
doi = {10.1147/RD.516.0733},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/FloydGKRRRW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/McCrearyBFGHRRRW07,
author = {Hye{-}Young McCreary and
Martha A. Broyles and
Michael S. Floyd and
Andrew J. Geissler and
Steven P. Hartman and
Freeman L. Rawson III and
Todd J. Rosedahl and
Juan C. Rubio and
Malcolm S. Ware},
title = {EnergyScale for {IBM} {POWER6} microprocessor-based systems},
journal = {{IBM} J. Res. Dev.},
volume = {51},
number = {6},
pages = {775--786},
year = {2007},
url = {https://doi.org/10.1147/rd.516.0775},
doi = {10.1147/RD.516.0775},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/McCrearyBFGHRRRW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/Trancoso07,
author = {Pedro Trancoso},
title = {Watt Matters Most? Design Space Exploration of High-Performance Microprocessors
for Power-Performance Efficiency},
journal = {J. Circuits Syst. Comput.},
volume = {16},
number = {3},
pages = {357--378},
year = {2007},
url = {https://doi.org/10.1142/S0218126607003721},
doi = {10.1142/S0218126607003721},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/Trancoso07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/Notarangelo0SG07,
author = {Giuseppe Notarangelo and
Francesco Pappalardo and
Elena Salurso and
Elio Guidetti},
title = {A Low Power, Scalable and Runtime Customizable Microprocessor Architecture
for Image Processing},
journal = {J. Low Power Electron.},
volume = {3},
number = {1},
pages = {36--42},
year = {2007},
url = {https://doi.org/10.1166/jolpe.2007.109},
doi = {10.1166/JOLPE.2007.109},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/Notarangelo0SG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HamannWLHBCW07,
author = {Hendrik F. Hamann and
Alan J. Weger and
James A. Lacey and
Zhigang Hu and
Pradip Bose and
Erwin B. Cohen and
Jamil A. Wakil},
title = {Hotspot-Limited Microprocessors: Direct Temperature and Power Distribution
Measurements},
journal = {{IEEE} J. Solid State Circuits},
volume = {42},
number = {1},
pages = {56--65},
year = {2007},
url = {https://doi.org/10.1109/JSSC.2006.885064},
doi = {10.1109/JSSC.2006.885064},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/HamannWLHBCW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BrooksDJS07,
author = {David M. Brooks and
Robert P. Dick and
Russ Joseph and
Li Shang},
title = {Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors},
journal = {{IEEE} Micro},
volume = {27},
number = {3},
pages = {49--62},
year = {2007},
url = {https://doi.org/10.1109/MM.2007.58},
doi = {10.1109/MM.2007.58},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/BrooksDJS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/scpe/HauserDSY07,
author = {Thomas Hauser and
Aravind Dasu and
Arvind Sudarsanam and
Seth Young},
title = {Performance of a {LU} decomposition on a multi-FPGA system compared
to a low power commodity microprocessor system},
journal = {Scalable Comput. Pract. Exp.},
volume = {8},
number = {4},
year = {2007},
url = {http://www.scpe.org/index.php/scpe/article/view/432},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/scpe/HauserDSY07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/SarkarS07,
author = {Arghya Sarkar and
Samarjit Sengupta},
title = {A Low-Cost Fault-Tolerant Real, Reactive, and Apparent Power Measurement
Technique Using Microprocessor},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {56},
number = {6},
pages = {2672--2680},
year = {2007},
url = {https://doi.org/10.1109/TIM.2007.907946},
doi = {10.1109/TIM.2007.907946},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/SarkarS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YangH07,
author = {Fu{-}Ching Yang and
Ing{-}Jer Huang},
title = {An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor
Compatible with {ARM7} Software Tools},
booktitle = {Proceedings of the 12th Conference on Asia South Pacific Design Automation,
{ASP-DAC} 2007, Yokohama, Japan, January 23-26, 2007},
pages = {902--907},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASPDAC.2007.358104},
doi = {10.1109/ASPDAC.2007.358104},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/YangH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/MurrayBCCFGGHHHJKKLMMNRSSSTWWYYZ07,
author = {Daniel Murray and
James Burnette and
Brian Campbell and
Mark Chung and
Bruce Fernandes and
Subhendra Ghosh and
Rajat Goel and
Greg Hess and
Hang Huang and
Zhibin Huang and
Naveen Javarappa and
Pradeep Kanapathipillai and
Fabian Klass and
Fang Liu and
Anup Mehta and
Yamini Modukuru and
Nishant Nerurkar and
Abhijit Radhakrishnan and
Sribalan Santhanam and
Junji Sugisawa and
Shyam Sundar and
Honkai John Tam and
Ricky Wen and
Eric Wu and
Jung{-}Cheng Yeh and
John Yong and
Sanjay Zambare},
title = {A 2GHz, 7W (max) 64b Power\({}^{\mbox{TM}}\) Microprocessor Core},
booktitle = {Proceedings of the {IEEE} 2007 Custom Integrated Circuits Conference,
{CICC} 2007, DoubleTree Hotel, San Jose, California, USA, September
16-19, 2007},
pages = {725--728},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/CICC.2007.4405833},
doi = {10.1109/CICC.2007.4405833},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/MurrayBCCFGGHHHJKKLMMNRSSSTWWYYZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/BaumannBNSDSP07,
author = {Thomas Baumann and
J{\"{o}}rg Berthold and
T. Niedermeier and
Tim Schoenauer and
J. Dienstuhl and
Doris Schmitt{-}Landsiedel and
Christian Pacha},
editor = {Doris Schmitt{-}Landsiedel and
Tobias Noll},
title = {Performance improvement of embedded low-power microprocessor cores
by selective flip flop replacement},
booktitle = {33rd European Solid-State Circuits Conference, {ESSCIRC} 2007, Munich,
Germany, 11-13 September 2007},
pages = {308--311},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ESSCIRC.2007.4430305},
doi = {10.1109/ESSCIRC.2007.4430305},
timestamp = {Mon, 18 Oct 2021 17:08:49 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/BaumannBNSDSP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/estimedia/StralenP07,
author = {Peter van Stralen and
Andy D. Pimentel},
editor = {Samarjit Chakraborty and
Petru Eles},
title = {Signature-based Microprocessor Power Modeling for Rapid System-level
Design Space Exploration},
booktitle = {Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time
Multimedia, ESTIMedia 2007, October 4-5, Salzburg, Austria, conjunction
with {CODES+ISSS} 2007},
pages = {33--38},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ESTMED.2007.4375798},
doi = {10.1109/ESTMED.2007.4375798},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/estimedia/StralenP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RobinsonG07,
author = {Andrew Robinson and
Jim D. Garside},
editor = {Hai Zhou and
Enrico Macii and
Zhiyuan Yan and
Yehia Massoud},
title = {Sensitive registers: a technique for reducing the fetch bandwidth
in low-power microprocessors},
booktitle = {Proceedings of the 17th {ACM} Great Lakes Symposium on {VLSI} 2007,
Stresa, Lago Maggiore, Italy, March 11-13, 2007},
pages = {138--143},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1228784.1228820},
doi = {10.1145/1228784.1228820},
timestamp = {Wed, 16 Aug 2023 21:16:32 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RobinsonG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChuZHJ07,
author = {Chunta Chu and
Xinyi Zhang and
Lei He and
Tong Jing},
editor = {Georges G. E. Gielen},
title = {Temperature aware microprocessor floorplanning considering application
dependent power load},
booktitle = {2007 International Conference on Computer-Aided Design, {ICCAD} 2007,
San Jose, CA, USA, November 5-8, 2007},
pages = {586--589},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICCAD.2007.4397328},
doi = {10.1109/ICCAD.2007.4397328},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChuZHJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iess/JansenFBD07,
author = {Dirk Jansen and
Nidal Fawaz and
Daniel Bau and
Marc Durrenberger},
editor = {Achim Rettberg and
Mauro Cesar Zanella and
Rainer D{\"{o}}mer and
Andreas Gerstlauer and
Franz{-}Josef Rammig},
title = {A Small High Performance Microprocessor Core Sirius for Embedded Low
Power Designs, Demonstrated in a Medical Mass Application of an Electronic
Pill(EPill{\textregistered})},
booktitle = {Embedded System Design: Topics, Techniques and Trends, {IFIP} {TC10}
Working Conference: International Embedded Systems Symposium (IESS),
May 30 - June 1, 2007, Irvine, CA, {USA}},
series = {{IFIP} Advances in Information and Communication Technology},
volume = {231},
pages = {363--372},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-0-387-72258-0\_31},
doi = {10.1007/978-0-387-72258-0\_31},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iess/JansenFBD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/ShahETH07,
author = {Jeegar Tilak Shah and
Marius Evers and
Jeff Trull and
Alper Halbutogullari},
editor = {Patrick H. Madden and
David Z. Pan},
title = {Circuit optimization for leakage power reduction using multi-threshold
voltages for high performance microprocessors},
booktitle = {Proceedings of the 2007 International Symposium on Physical Design,
{ISPD} 2007, Austin, Texas, USA, March 18-21, 2007},
pages = {67--74},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1231996.1232010},
doi = {10.1145/1231996.1232010},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/ShahETH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/FriedrichMJHCFMCCPCLCRTDL07,
author = {Joshua Friedrich and
Bradley D. McCredie and
Norman K. James and
Bill Huott and
Brian W. Curran and
Eric Fluhr and
Gaurav Mittal and
Eddie Chan and
Yuen H. Chan and
Donald W. Plass and
Sam G. Chu and
Hung Q. Le and
Leo Clark and
John R. Ripley and
Scott A. Taylor and
Jack DiLullo and
Mary Yvonne Lanzerotti},
title = {Design of the Power6 Microprocessor},
booktitle = {2007 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2007, Digest of Technical Papers, San Francisco, CA, USA, February
11-15, 2007},
pages = {96--97},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISSCC.2007.373605},
doi = {10.1109/ISSCC.2007.373605},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/FriedrichMJHCFMCCPCLCRTDL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/JamesRFHM07,
author = {Norman K. James and
Phillip J. Restle and
Joshua Friedrich and
Bill Huott and
Bradley D. McCredie},
title = {Comparison of Split-Versus Connected-Core Supplies in the {POWER6}
Microprocessor},
booktitle = {2007 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2007, Digest of Technical Papers, San Francisco, CA, USA, February
11-15, 2007},
pages = {298--604},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISSCC.2007.373412},
doi = {10.1109/ISSCC.2007.373412},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/JamesRFHM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ThirugnanamHM07,
author = {Rajesh Thirugnanam and
Dong Sam Ha and
T. M. Mak},
title = {Data Recovery Block Design for Impulse Modulated Power Line Communications
in a Microprocessor},
booktitle = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2007), May 9-11, 2007, Porto Alegre, Brazil},
pages = {153--158},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISVLSI.2007.34},
doi = {10.1109/ISVLSI.2007.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ThirugnanamHM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RoyKR07,
author = {Soumyaroop Roy and
Srinivas Katkoori and
Nagarajan Ranganathan},
title = {A Compiler Based Leakage Reduction Technique by Power-Gating Functional
Units in Embedded Microprocessors},
booktitle = {20th International Conference on {VLSI} Design {(VLSI} Design 2007),
Sixth International Conference on Embedded Systems {(ICES} 2007),
6-10 January 2007, Bangalore, India},
pages = {215--220},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VLSID.2007.10},
doi = {10.1109/VLSID.2007.10},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RoyKR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/ChengT06,
author = {Allen C. Cheng and
Gary S. Tyson},
title = {High-quality {ISA} synthesis for low-power cache designs in embedded
microprocessors},
journal = {{IBM} J. Res. Dev.},
volume = {50},
number = {2-3},
pages = {299--310},
year = {2006},
url = {https://doi.org/10.1147/rd.502.0299},
doi = {10.1147/RD.502.0299},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/ChengT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KhanWKLNYBHGHGW06,
author = {Aurangzeb Khan and
Philip Watson and
George Kuo and
Due Le and
Trung{-}Kien Nguyen and
Steven Yang and
Peter Bennett and
Pokai Huang and
Jaspal Gill and
Chris Hawkins and
John Goodenough and
Demin Wang and
Irfan Ahmed and
Peter Tran and
Helder Mak and
Oanh Kim and
Frank Martin and
Yimu Fan and
David Ge and
Joseph Kung and
Vincent Shek},
title = {A 90-nm Power Optimization Methodology With Application to the {ARM}
1136JF-S Microprocessor},
journal = {{IEEE} J. Solid State Circuits},
volume = {41},
number = {8},
pages = {1707--1717},
year = {2006},
url = {https://doi.org/10.1109/JSSC.2006.877248},
doi = {10.1109/JSSC.2006.877248},
timestamp = {Wed, 12 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/KhanWKLNYBHGHGW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WongRMT06,
author = {Keng L. Wong and
Tawfik Rahal{-}Arabi and
Matthew Ma and
Greg Taylor},
title = {Enhancing microprocessor immunity to power supply noise with clock-data
compensation},
journal = {{IEEE} J. Solid State Circuits},
volume = {41},
number = {4},
pages = {749--758},
year = {2006},
url = {https://doi.org/10.1109/JSSC.2006.870925},
doi = {10.1109/JSSC.2006.870925},
timestamp = {Fri, 15 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/WongRMT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/WeinraubW06,
author = {Yehuda Sadeh Weinraub and
Shlomo Weiss},
title = {Power-aware out-of-order issue logic in high-performance microprocessors},
journal = {Microprocess. Microsystems},
volume = {30},
number = {7},
pages = {457--467},
year = {2006},
url = {https://doi.org/10.1016/j.micpro.2006.05.001},
doi = {10.1016/J.MICPRO.2006.05.001},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/WeinraubW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LiBSDKRZ06,
author = {Wei Li and
Daniel Blakely and
Scott Van Sooy and
Keven Dunn and
David Kidd and
Robert Rogenmoser and
Dian Zhou},
title = {{LVS} verification across multiple power domains for a quad-core microprocessor},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {11},
number = {2},
pages = {490--500},
year = {2006},
url = {https://doi.org/10.1145/1142155.1142166},
doi = {10.1145/1142155.1142166},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LiBSDKRZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/ZhangZZX06,
author = {Chengyi Zhang and
Hongwei Zhou and
Minxuan Zhang and
Zuocheng Xing},
editor = {Chris R. Jesshope and
Colin Egan},
title = {An Architectural Leakage Power Reduction Method for Instruction Cache
in Ultra Deep Submicron Microprocessors},
booktitle = {Advances in Computer Systems Architecture, 11th Asia-Pacific Conference,
{ACSAC} 2006, Shanghai, China, September 6-8, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4186},
pages = {588--594},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11859802\_62},
doi = {10.1007/11859802\_62},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/aPcsac/ZhangZZX06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/MohamedBZ06,
author = {Nagm Mohamed and
Nazeih Botros and
Wei Zhang},
editor = {Hamid R. Arabnia and
Mary Mehrnoosh Eshaghian{-}Wilner},
title = {The Impact of Cache Organization in Optimizing Microprocessor Power
Consumption},
booktitle = {Proceedings of the 2006 International Conference on Computer Design
{\&} Conference on Computing in Nanotechnology, {CDES} 2006, Las
Vegas, Nevada, USA, June 26-29, 2006},
pages = {84--90},
publisher = {{CSREA} Press},
year = {2006},
timestamp = {Fri, 12 Oct 2012 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cdes/MohamedBZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WuJYLT06,
author = {Wei Wu and
Lingling Jin and
Jun Yang and
Pu Liu and
Sheldon X.{-}D. Tan},
editor = {Ellen Sentovich},
title = {A systematic method for functional unit power estimation in microprocessors},
booktitle = {Proceedings of the 43rd Design Automation Conference, {DAC} 2006,
San Francisco, CA, USA, July 24-28, 2006},
pages = {554--557},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1146909.1147053},
doi = {10.1145/1146909.1147053},
timestamp = {Thu, 04 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/WuJYLT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ViswanathAJ06,
author = {Vinod Viswanath and
Jacob A. Abraham and
Warren A. Hunt Jr.},
editor = {Georges G. E. Gielen},
title = {Automatic insertion of low power annotations in {RTL} for pipelined
microprocessors},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {496--501},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.243858},
doi = {10.1109/DATE.2006.243858},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ViswanathAJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/Trancoso06,
author = {Pedro Trancoso},
title = {Adaptive High-End Microprocessor for Power-Performance Efficiency},
booktitle = {Ninth Euromicro Conference on Digital System Design: Architectures,
Methods and Tools {(DSD} 2006), 30 August - 1 September 2006, Dubrovnik,
Croatia},
pages = {221--228},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DSD.2006.98},
doi = {10.1109/DSD.2006.98},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/Trancoso06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccsa/LeePG06,
author = {Seong{-}Won Lee and
Neungsoo Park and
Jean{-}Luc Gaudiot},
editor = {Marina L. Gavrilova and
Osvaldo Gervasi and
Vipin Kumar and
Chih Jeng Kenneth Tan and
David Taniar and
Antonio Lagan{\`{a}} and
Youngsong Mun and
Hyunseung Choo},
title = {Low Power Microprocessor Design for Embedded Systems},
booktitle = {Computational Science and Its Applications - {ICCSA} 2006, International
Conference, Glasgow, UK, May 8-11, 2006, Proceedings, Part {IV}},
series = {Lecture Notes in Computer Science},
volume = {3983},
pages = {622--630},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11751632\_68},
doi = {10.1007/11751632\_68},
timestamp = {Thu, 28 Apr 2022 16:17:38 +0200},
biburl = {https://dblp.org/rec/conf/iccsa/LeePG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/LuCSWRH06,
author = {Pong{-}Fei Lu and
Nianzheng Cao and
Leon J. Sigal and
Pieter Woltgens and
Raphael Robertazzi and
David F. Heidel},
editor = {Wolfgang Nebel and
Mircea R. Stan and
Anand Raghunathan and
J{\"{o}}rg Henkel and
Diana Marculescu},
title = {A pulsed low-voltage swing latch for reduced power dissipation in
high-frequency microprocessors},
booktitle = {Proceedings of the 2006 International Symposium on Low Power Electronics
and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006},
pages = {85--88},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1165573.1165593},
doi = {10.1145/1165573.1165593},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/LuCSWRH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/HamannWLCA06,
author = {Hendrik F. Hamann and
Alan J. Weger and
James A. Lacey and
Erwin B. Cohen and
Craig Atherton},
title = {Power Distribution Measurements of the Dual Core PowerPC\({}^{\mbox{TM}}\)
970MP Microprocessor},
booktitle = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
2006, Digest of Technical Papers, an Francisco, CA, USA, February
6-9, 2006},
pages = {2172--2179},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISSCC.2006.1696278},
doi = {10.1109/ISSCC.2006.1696278},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/HamannWLCA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ThomsonRJ06,
author = {Michael G. R. Thomson and
Phillip J. Restle and
Norman K. James},
title = {A 5GHz Duty-Cycle Correcting Clock Distribution Network for the {POWER6}
Microprocessor},
booktitle = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
2006, Digest of Technical Papers, an Francisco, CA, USA, February
6-9, 2006},
pages = {1522--1529},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISSCC.2006.1696203},
doi = {10.1109/ISSCC.2006.1696203},
timestamp = {Thu, 14 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/ThomsonRJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/csur/VenkatachalamF05,
author = {Vasanth Venkatachalam and
Michael Franz},
title = {Power reduction techniques for microprocessor systems},
journal = {{ACM} Comput. Surv.},
volume = {37},
number = {3},
pages = {195--237},
year = {2005},
url = {https://doi.org/10.1145/1108956.1108957},
doi = {10.1145/1108956.1108957},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/csur/VenkatachalamF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/VictorLPNSHCBGRF05,
author = {Dave W. Victor and
John M. Ludden and
Richard D. Peterson and
Bradley S. Nelson and
W. Keith Sharp and
James K. Hsu and
Bing{-}Lun Chu and
Michael L. Behm and
Rebecca M. Gott and
Audre D. Romonosky and
Steven R. Farago},
title = {Functional verification of the {POWER5} microprocessor and {POWER5}
multiprocessor systems},
journal = {{IBM} J. Res. Dev.},
volume = {49},
number = {4-5},
pages = {541--554},
year = {2005},
url = {https://doi.org/10.1147/rd.494.0541},
doi = {10.1147/RD.494.0541},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/VictorLPNSHCBGRF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/SekiASNMKHKKS05,
author = {Takahiro Seki and
Satoshi Akui and
Katsunori Seno and
Masakatsu Nakai and
Tetsumasa Meguro and
Tetsuo Kondo and
Akihiko Hashiguchi and
Hirokazu Kawahara and
Kazuo Kumano and
Masayuki Shimura},
title = {Dynamic Voltage and Frequency Management for a Low-Power Embedded
Microprocessor},
journal = {{IEICE} Trans. Electron.},
volume = {88-C},
number = {4},
pages = {520--527},
year = {2005},
url = {https://doi.org/10.1093/ietele/e88-c.4.520},
doi = {10.1093/IETELE/E88-C.4.520},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/SekiASNMKHKKS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/NakaiASMSKHKKS05,
author = {Masakatsu Nakai and
Satoshi Akui and
Katsunori Seno and
Tetsumasa Meguro and
Takahiro Seki and
Tetsuo Kondo and
Akihiko Hashiguchi and
Hirokazu Kawahara and
Kazuo Kumano and
Masayuki Shimura},
title = {Dynamic voltage and frequency management for a low-power embedded
microprocessor},
journal = {{IEEE} J. Solid State Circuits},
volume = {40},
number = {1},
pages = {28--35},
year = {2005},
url = {https://doi.org/10.1109/JSSC.2004.838021},
doi = {10.1109/JSSC.2004.838021},
timestamp = {Wed, 02 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/NakaiASMSKHKKS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/RohrerLSKCCPRHG05,
author = {Norman J. Rohrer and
C{\'{e}}dric Lichtenau and
Peter A. Sandon and
Paul Kartschoke and
Erwin B. Cohen and
Miles G. Canada and
Thomas Pfl{\"{u}}ger and
Mathew I. Ringler and
Rolf B. Hilgendorf and
Stephen F. Geissler and
Jeffrey S. Zimmerman},
title = {A 64-bit microprocessor in 130-nm and 90-nm technologies with power
management features},
journal = {{IEEE} J. Solid State Circuits},
volume = {40},
number = {1},
pages = {19--27},
year = {2005},
url = {https://doi.org/10.1109/JSSC.2004.838022},
doi = {10.1109/JSSC.2004.838022},
timestamp = {Wed, 02 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/RohrerLSKCCPRHG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcit/ZhuT05,
author = {Xiaoping Zhu and
Teng{-}Tiow Tay},
title = {A Compiler-Controlled Instruction Cache Architecture for an Embedded
Low Power Microprocessor},
booktitle = {Fifth International Conference on Computer and Information Technology
{(CIT} 2005), 21-23 September 2005, Shanghai, China},
pages = {815--821},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/CIT.2005.3},
doi = {10.1109/CIT.2005.3},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcit/ZhuT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aiccsa/Patt05,
author = {Yale N. Patt},
title = {The microprocessor of the year 2014: do Pentium 4, Pentium M, and
Power 5 provide any hints?},
booktitle = {2005 {ACS} / {IEEE} International Conference on Computer Systems and
Applications {(AICCSA} 2005), January 3-6, 2005, Cairo, Egypt},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/AICCSA.2005.1387008},
doi = {10.1109/AICCSA.2005.1387008},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aiccsa/Patt05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/Trancoso05,
author = {Pedro Trancoso},
editor = {Michael Beigl and
Paul Lukowicz},
title = {Design Space Navigation for Neighboring Power-Performance Efficient
Microprocessor Configurations},
booktitle = {Systems Aspects in Organic and Pervasive Computing - {ARCS} 2005,
18th International Conference on Architecture of Computing Systems,
Innsbruck, Austria, March 14-17, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3432},
pages = {193--206},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/978-3-540-31967-2\_14},
doi = {10.1007/978-3-540-31967-2\_14},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/Trancoso05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/KhanWKLNYBHGWAT05,
author = {Aurangzeb Khan and
Philip Watson and
George Kuo and
Due Le and
Trung{-}Kien Nguyen and
Steven Yang and
P. Bennet and
Pokai Huang and
Jaspal Gill and
Demin Wang and
Irfan Ahmed and
Peter Tran and
Helder Mak and
Oanh Kim and
Frank Martin and
Yimu Fan and
D. Ge and
Joseph Kung and
Vincent Shek},
title = {A 90nm power optimization methodology and its' application to the
{ARM} 1136SF-S microprocessor},
booktitle = {Proceedings of the {IEEE} 2005 Custom Integrated Circuits Conference,
{CICC} 2005, DoubleTree Hotel, San Jose, California, USA, September
18-21, 2005},
pages = {771--774},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/CICC.2005.1568782},
doi = {10.1109/CICC.2005.1568782},
timestamp = {Fri, 15 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/KhanWKLNYBHGWAT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/AnandBSAD05,
author = {Himyanshu Anand and
Jayanta Bhadra and
Alper Sen and
Magdy S. Abadir and
Kenneth G. Davis},
title = {Establishing latch correspondence for embedded circuits of PowerPC
microprocessors},
booktitle = {Tenth {IEEE} International High-Level Design Validation and Test Workshop
2005, Napa Valley, CA, USA, November 30 - December 2, 2005},
pages = {37--44},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HLDVT.2005.1568811},
doi = {10.1109/HLDVT.2005.1568811},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/AnandBSAD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MiyazakiOK05,
author = {Masayuki Miyazaki and
Goichi Ono and
Takayuki Kawahara},
title = {Optimum threshold-voltage tuning for low-power, high-performance microprocessor},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {17--20},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1464513},
doi = {10.1109/ISCAS.2005.1464513},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/MiyazakiOK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TschanzNKD05,
author = {James W. Tschanz and
Siva G. Narendra and
Ali Keshavarzi and
Vivek De},
title = {Adaptive circuit techniques to minimize variation impacts on microprocessor
performance and power},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {9--12},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1464511},
doi = {10.1109/ISCAS.2005.1464511},
timestamp = {Mon, 28 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/TschanzNKD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ZhuA05,
author = {Qing K. Zhu and
David Ayers},
title = {Power Grid Planning for Microprocessors and {SOCS}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {352--356},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.95},
doi = {10.1109/ISQED.2005.95},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ZhuA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtv/BhadraABT05,
author = {Jayanta Bhadra and
Magdy S. Abadir and
David Burgess and
Ekaterina Trofimova},
editor = {Magdy S. Abadir and
Li{-}C. Wang},
title = {Automatic Generation of High Performance Embedded Memory Models for
PowerPC Microprocessors},
booktitle = {Sixth International Workshop on Microprocessor Test and Verification
{(MTV} 2005), Common Challenges and Solutions, 3-4 November 2005,
Austin, Texas, {USA}},
pages = {111--118},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/MTV.2005.9},
doi = {10.1109/MTV.2005.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtv/BhadraABT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/BastosKR05,
author = {Rodrigo Possamai Bastos and
Fernanda Lima Kastensmidt and
Ricardo Reis},
editor = {Vassilis Paliouras and
Johan Vounckx and
Diederik Verkest},
title = {Designing Low-Power Embedded Software for Mass-Produced Microprocessor
by Using a Loop Table in On-Chip Memory},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation, 15th International Workshop, {PATMOS} 2005, Leuven,
Belgium, September 21-23, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3728},
pages = {59--68},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11556930\_7},
doi = {10.1007/11556930\_7},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/BastosKR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Bose05,
author = {Pradip Bose},
title = {Power-Aware, Reliable Microprocessor Design},
booktitle = {18th International Conference on {VLSI} Design {(VLSI} Design 2005),
with the 4th International Conference on Embedded Systems Design,
3-7 January 2005, Kolkata, India},
pages = {3--6},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICVD.2005.142},
doi = {10.1109/ICVD.2005.142},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Bose05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BeniniMO04,
author = {Luca Benini and
Francesco Menichelli and
Mauro Olivieri},
title = {A Class of Code Compression Schemes for Reducing Power Consumption
in Embedded Microprocessor Systems},
journal = {{IEEE} Trans. Computers},
volume = {53},
number = {4},
pages = {467--482},
year = {2004},
url = {https://doi.org/10.1109/TC.2004.1268405},
doi = {10.1109/TC.2004.1268405},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/BeniniMO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ZyubanBSGBSE04,
author = {Victor V. Zyuban and
David M. Brooks and
Viji Srinivasan and
Michael Gschwind and
Pradip Bose and
Philip N. Strenski and
Philip G. Emma},
title = {Integrated Analysis of Power and Performance for Pipelined Microprocessors},
journal = {{IEEE} Trans. Computers},
volume = {53},
number = {8},
pages = {1004--1016},
year = {2004},
url = {https://doi.org/10.1109/TC.2004.46},
doi = {10.1109/TC.2004.46},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ZyubanBSGBSE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/KavvadiasNNKL04,
author = {Nikolaos Kavvadias and
Periklis Neofotistos and
Spiridon Nikolaidis and
C. A. Kosmatopoulos and
Theodore Laopoulos},
title = {Measurements analysis of the software-related power consumption in
microprocessors},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {53},
number = {4},
pages = {1106--1112},
year = {2004},
url = {https://doi.org/10.1109/TIM.2004.830784},
doi = {10.1109/TIM.2004.830784},
timestamp = {Tue, 04 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/KavvadiasNNKL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LiBCRV04,
author = {Hai Li and
Swarup Bhunia and
Yiran Chen and
Kaushik Roy and
T. N. Vijaykumar},
title = {{DCG:} deterministic clock-gating for low-power microprocessor design},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {3},
pages = {245--254},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2004.824307},
doi = {10.1109/TVLSI.2004.824307},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LiBCRV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/ChoiLH04,
author = {Byung{-}Soo Choi and
Jeong{-}A Lee and
Dong{-}Soo Har},
editor = {Pen{-}Chung Yew and
Jingling Xue},
title = {High Performance Microprocessor Design Methods Exploiting Information
Locality and Data Redundancy for Lower Area Cost and Power Consumption},
booktitle = {Advances in Computer Systems Architecture, 9th Asia-Pacific Conference,
{ACSAC} 2004, Beijing, China, September 7-9, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3189},
pages = {170--184},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30102-8\_15},
doi = {10.1007/978-3-540-30102-8\_15},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/aPcsac/ChoiLH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChenRK04,
author = {Yiran Chen and
Kaushik Roy and
Cheng{-}Kok Koh},
editor = {Masaharu Imai},
title = {Priority assignment optimization for minimization of current surge
in high performance power efficient clock-gated microprocessor},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
Electronic Design and Solution Fair 2004, Yokohama, Japan, January
27-30, 2004},
pages = {893--898},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.168},
doi = {10.1109/ASPDAC.2004.168},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ChenRK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ClabesFSDCPDMPFSLGWSRGRKMD04,
author = {Joachim G. Clabes and
Joshua Friedrich and
Mark Sweet and
Jack DiLullo and
Sam G. Chu and
Donald W. Plass and
James Dawson and
Paul Muench and
Larry Powell and
Michael S. Floyd and
Balaram Sinharoy and
Mike Lee and
Michael Goulet and
James Wagoner and
Nicole S. Schwartz and
Stephen L. Runyon and
Gary Gorman and
Phillip J. Restle and
Ronald N. Kalla and
Joseph McGill and
J. Steve Dodson},
editor = {Sharad Malik and
Limor Fix and
Andrew B. Kahng},
title = {Design and implementation of the {POWER5} microprocessor},
booktitle = {Proceedings of the 41th Design Automation Conference, {DAC} 2004,
San Diego, CA, USA, June 7-11, 2004},
pages = {670--672},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/996566.996749},
doi = {10.1145/996566.996749},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ClabesFSDCPDMPFSLGWSRGRKMD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/KimKBAM04,
author = {Nam Sung Kim and
Taeho Kgil and
Valeria Bertacco and
Todd M. Austin and
Trevor N. Mudge},
editor = {Rajiv V. Joshi and
Kiyoung Choi and
Vivek Tiwari and
Kaushik Roy},
title = {Microarchitectural power modeling techniques for deep sub-micron microprocessors},
booktitle = {Proceedings of the 2004 International Symposium on Low Power Electronics
and Design, 2004, Newport Beach, California, USA, August 9-11, 2004},
pages = {212--217},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1013235.1013290},
doi = {10.1145/1013235.1013290},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/KimKBAM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/slip/MagenKWS04,
author = {Nir Magen and
Avinoam Kolodny and
Uri C. Weiser and
Nachum Shamir},
editor = {Louis Scheffer and
Igor L. Markov},
title = {Interconnect-power dissipation in a microprocessor},
booktitle = {The Sixth International Workshop on System-Level Interconnect Prediction
{(SLIP} 2004), Paris, France, February 14-15, 2004, Proceedings},
pages = {7--13},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/966747.966750},
doi = {10.1145/966747.966750},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/slip/MagenKWS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/BrooksBSGER03,
author = {David M. Brooks and
Pradip Bose and
Viji Srinivasan and
Michael Gschwind and
Philip G. Emma and
Michael G. Rosenfield},
title = {New methodology for early-stage, microarchitecture-level power-performance
analysis of microprocessors},
journal = {{IBM} J. Res. Dev.},
volume = {47},
number = {5-6},
pages = {653--670},
year = {2003},
url = {https://doi.org/10.1147/rd.475.0653},
doi = {10.1147/RD.475.0653},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/BrooksBSGER03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TschanzNND03,
author = {James W. Tschanz and
Siva G. Narendra and
Raj Nair and
Vivek De},
title = {Effectiveness of adaptive supply voltage and body bias for reducing
impact of parameter variations in low power and high performance microprocessors},
journal = {{IEEE} J. Solid State Circuits},
volume = {38},
number = {5},
pages = {826--829},
year = {2003},
url = {https://doi.org/10.1109/JSSC.2003.810053},
doi = {10.1109/JSSC.2003.810053},
timestamp = {Wed, 20 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TschanzNND03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TschanzNYBBD03,
author = {James W. Tschanz and
Siva G. Narendra and
Yibin Ye and
Bradley A. Bloechel and
Shekhar Borkar and
Vivek De},
title = {Dynamic sleep transistor and body bias for active leakage power control
of microprocessors},
journal = {{IEEE} J. Solid State Circuits},
volume = {38},
number = {11},
pages = {1838--1845},
year = {2003},
url = {https://doi.org/10.1109/JSSC.2003.818291},
doi = {10.1109/JSSC.2003.818291},
timestamp = {Wed, 20 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TschanzNYBBD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Hattori03,
author = {Toshihiro Hattori},
editor = {Hiroto Yasuura},
title = {Design methodology of low-power microprocessors},
booktitle = {Proceedings of the 2003 Asia and South Pacific Design Automation Conference,
{ASP-DAC} '03, Kitakyushu, Japan, January 21-24, 2003},
pages = {390--393},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/1119772.1119849},
doi = {10.1145/1119772.1119849},
timestamp = {Thu, 11 Mar 2021 17:04:51 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/Hattori03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compsystech/PetkovPPJ03,
author = {Petko Petkov and
Roumiana Phileva and
Simeon Panev and
Eftim Jonchev},
editor = {Boris Rachev and
Angel Smrikarov},
title = {Microprocessor control of uninterruptible power supplies for responsible
loads},
booktitle = {Proceedings of the 4th International Conference on Computer Systems
and Technologies: e-Learning, CompSysTech 2003, Rousse, Bulgaria,
June 19-20, 2003},
pages = {54--59},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/973620.973629},
doi = {10.1145/973620.973629},
timestamp = {Wed, 01 Jun 2022 14:16:12 +0200},
biburl = {https://dblp.org/rec/conf/compsystech/PetkovPPJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LiBCVR03,
author = {Hai Li and
Swarup Bhunia and
Yiran Chen and
T. N. Vijaykumar and
Kaushik Roy},
title = {Deterministic Clock Gating for Microprocessor Power Reduction},
booktitle = {Proceedings of the Ninth International Symposium on High-Performance
Computer Architecture (HPCA'03), Anaheim, California, USA, February
8-12, 2003},
pages = {113--122},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/HPCA.2003.1183529},
doi = {10.1109/HPCA.2003.1183529},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/LiBCVR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/OlivieriR03,
author = {Mauro Olivieri and
Marco Raspa},
title = {Power Efficiency of Application-Dependent Self-Configuring Pipeline
Depth in {DSP} Microprocessors},
booktitle = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
pages = {185},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IPDPS.2003.1213342},
doi = {10.1109/IPDPS.2003.1213342},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/OlivieriR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/LiJ03,
author = {Tao Li and
Lizy Kurian John},
editor = {Ingrid Verbauwhede and
Hyung Roh},
title = {Routine based OS-aware microprocessor resource adaptation for run-time
operating system power saving},
booktitle = {Proceedings of the 2003 International Symposium on Low Power Electronics
and Design, 2003, Seoul, Korea, August 25-27, 2003},
pages = {241--246},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/871506.871565},
doi = {10.1145/871506.871565},
timestamp = {Tue, 15 Jan 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/LiJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BaiB03,
author = {Yu Bai and
R. Iris Bahar},
title = {A Dynamically Reconfigurable Mixed In-Order/Out-of-Order Issue Queue
for Power-Aware Microprocessors},
booktitle = {2003 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2003), New Trends and Technologies for {VLSI} Systems Design, 20-21
February 2003, Tampa, FL, {USA}},
pages = {139--148},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ISVLSI.2003.1183365},
doi = {10.1109/ISVLSI.2003.1183365},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BaiB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/RaimiL02,
author = {Richard Raimi and
James Lear},
title = {Silicon Debug of a PowerPC[tm] Microprocessor Using Model Checking},
journal = {Formal Methods Syst. Des.},
volume = {21},
number = {1},
pages = {79--94},
year = {2002},
url = {https://doi.org/10.1023/A:1016044019648},
doi = {10.1023/A:1016044019648},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/RaimiL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/LuddenRHRJCBBPABKKLLMMNPPRSTVW02,
author = {John M. Ludden and
Wolfgang Roesner and
Gerry M. Heiling and
John R. Reysa and
Jonathan R. Jackson and
Bing{-}Lun Chu and
Michael L. Behm and
Jason Baumgartner and
Richard D. Peterson and
Jamee Abdulhafiz and
William E. Bucy and
John H. Klaus and
Danny J. Klema and
Tien N. Le and
F. Danette Lewis and
Philip E. Milling and
Lawrence A. McConville and
Bradley S. Nelson and
Viresh Paruthi and
Travis W. Pouarz and
Audre D. Romonosky and
Jeff Stuecheli and
Kent D. Thompson and
Dave W. Victor and
Bruce Wile},
title = {Functional verification of the {POWER4} microprocessor and {POWER4}
multiprocessor system},
journal = {{IBM} J. Res. Dev.},
volume = {46},
number = {1},
pages = {53--76},
year = {2002},
url = {https://doi.org/10.1147/rd.461.0053},
doi = {10.1147/RD.461.0053},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/LuddenRHRJCBBPABKKLLMMNPPRSTVW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/WarnockKPCKKRZA02,
author = {James D. Warnock and
John M. Keaty and
John G. Petrovick and
Joachim G. Clabes and
Charles J. Kircher and
Byron Krauter and
Phillip J. Restle and
Brian A. Zoric and
Carl J. Anderson},
title = {The circuit and physical design of the {POWER4} microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {46},
number = {1},
pages = {27--52},
year = {2002},
url = {https://doi.org/10.1147/rd.461.0027},
doi = {10.1147/RD.461.0027},
timestamp = {Fri, 25 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/WarnockKPCKKRZA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/QuKUP02,
author = {Gang Qu and
Naoyuki Kawabe and
Kimiyoshi Usami and
Miodrag Potkonjak},
title = {Code Coverage-Based Power Estimation Techniques for Microprocessors},
journal = {J. Circuits Syst. Comput.},
volume = {11},
number = {5},
pages = {557},
year = {2002},
url = {https://doi.org/10.1142/S0218126602000616},
doi = {10.1142/S0218126602000616},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcsc/QuKUP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BrandoleseSFS02,
author = {Carlo Brandolese and
Fabio Salice and
William Fornaciari and
Donatella Sciuto},
title = {Static power modeling of 32-bit microprocessors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {21},
number = {11},
pages = {1306--1316},
year = {2002},
url = {https://doi.org/10.1109/TCAD.2002.804104},
doi = {10.1109/TCAD.2002.804104},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BrandoleseSFS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Olivieri02,
author = {Mauro Olivieri},
title = {Theoretical system-level limits of power dissipation reduction under
a performance constraint in {VLSI} microprocessor design},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {10},
number = {5},
pages = {595--600},
year = {2002},
url = {https://doi.org/10.1109/TVLSI.2002.801549},
doi = {10.1109/TVLSI.2002.801549},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Olivieri02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/KrishnamurthyAD02,
author = {Ram K. Krishnamurthy and
Atila Alvandpour and
Vivek De and
Shekhar Borkar},
title = {High-performance and low-power challenges for sub-70 nm microprocessor
circuits},
booktitle = {Proceedings of the {IEEE} 2002 Custom Integrated Circuits Conference,
{CICC} 2002, Orlando, FL, USA, May 12-15, 2002},
pages = {125--128},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/CICC.2002.1012781},
doi = {10.1109/CICC.2002.1012781},
timestamp = {Tue, 04 Oct 2022 22:39:17 +0200},
biburl = {https://dblp.org/rec/conf/cicc/KrishnamurthyAD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KarnikYTWBGDB02,
author = {Tanay Karnik and
Yibin Ye and
James W. Tschanz and
Liqiong Wei and
Steven M. Burns and
Venkatesh Govindarajulu and
Vivek De and
Shekhar Borkar},
title = {Total power optimization by simultaneous dual-Vt allocation and device
sizing in high performance microprocessors},
booktitle = {Proceedings of the 39th Design Automation Conference, {DAC} 2002,
New Orleans, LA, USA, June 10-14, 2002},
pages = {486--491},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/513918.514042},
doi = {10.1145/513918.514042},
timestamp = {Wed, 15 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/KarnikYTWBGDB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PonomarevKG02,
author = {Dmitry Ponomarev and
Gurhan Kucuk and
Kanad Ghose},
title = {AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {124--129},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998259},
doi = {10.1109/DATE.2002.998259},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PonomarevKG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/KabadiKCNSP02,
author = {Mohan G. Kabadi and
Natarajan Kannan and
Palanidaran Chidambaram and
Suriya Narayanan and
M. Subramanian and
Ranjani Parthasarathi},
editor = {Sartaj Sahni and
Viktor K. Prasanna and
Uday Shukla},
title = {Dead-Block Elimination in Cache: {A} Mechanism to Reduce I-cache Power
Consumption in High Performance Microprocessors},
booktitle = {High Performance Computing - HiPC 2002, 9th International Conference,
Bangalore, India, December 18-21, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2552},
pages = {79--88},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-36265-7\_8},
doi = {10.1007/3-540-36265-7\_8},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hipc/KabadiKCNSP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/MartinFMB02,
author = {Steven M. Martin and
Kriszti{\'{a}}n Flautner and
Trevor N. Mudge and
David T. Blaauw},
editor = {Lawrence T. Pileggi and
Andreas Kuehlmann},
title = {Combined dynamic voltage scaling and adaptive body biasing for lower
power microprocessors under dynamic workloads},
booktitle = {Proceedings of the 2002 {IEEE/ACM} International Conference on Computer-aided
Design, {ICCAD} 2002, San Jose, California, USA, November 10-14, 2002},
pages = {721--725},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1145/774572.774678},
doi = {10.1145/774572.774678},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/MartinFMB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Hofstee02,
author = {H. Peter Hofstee},
title = {Power-Constrained Microprocessor Design},
booktitle = {20th International Conference on Computer Design {(ICCD} 2002), {VLSI}
in Computers and Processors, 16-18 September 2002, Freiburg, Germany,
Proceedings},
pages = {14--16},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ICCD.2002.1106740},
doi = {10.1109/ICCD.2002.1106740},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Hofstee02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KussenerBMK02,
author = {Edith Kussener and
Herv{\'{e}} Barth{\'{e}}lemy and
Alexandre Malherbe and
Andreas Kaiser},
title = {Versatile macromodel for the power supply of submicronic {CMOS} microprocessors
based on voltage down {DC-DC} converter},
booktitle = {Proceedings of the 2002 International Symposium on Circuits and Systems,
{ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
pages = {821--824},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ISCAS.2002.1010830},
doi = {10.1109/ISCAS.2002.1010830},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KussenerBMK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/AthasYR02,
author = {William C. Athas and
Lynn Youngs and
Andrew Reinhart},
editor = {Vivek De and
Mary Jane Irwin and
Ingrid Verbauwhede and
Christian Piguet},
title = {Compact models for estimating microprocessor frequency and power},
booktitle = {Proceedings of the 2002 International Symposium on Low Power Electronics
and Design, 2002, Monterey, California, USA, August 12-14, 2002},
pages = {313--318},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/566408.566489},
doi = {10.1145/566408.566489},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/AthasYR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ClarkDDR02,
author = {Lawrence T. Clark and
Neil Deutscher and
Shay Demmons and
Franco Ricci},
editor = {Vivek De and
Mary Jane Irwin and
Ingrid Verbauwhede and
Christian Piguet},
title = {Standby power management for a 0.18{\(\mathrm{\mu}\)}m microprocessor},
booktitle = {Proceedings of the 2002 International Symposium on Low Power Electronics
and Design, 2002, Monterey, California, USA, August 12-14, 2002},
pages = {7--12},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/566408.566413},
doi = {10.1145/566408.566413},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/ClarkDDR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lcpc/YouLL02,
author = {Yi{-}Ping You and
Chingren Lee and
Jenq Kuen Lee},
editor = {William W. Pugh and
Chau{-}Wen Tseng},
title = {Compiler Analysis and Supports for Leakage Power Reduction on Microprocessors},
booktitle = {Languages and Compilers for Parallel Computing, 15th Workshop, {LCPC}
2002, College Park, MD, USA, July 25-27, 2002, Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {2481},
pages = {45--60},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/11596110\_4},
doi = {10.1007/11596110\_4},
timestamp = {Mon, 04 Apr 2022 21:23:55 +0200},
biburl = {https://dblp.org/rec/conf/lcpc/YouLL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TendolkarRWLSA02,
author = {Nandu Tendolkar and
Rajesh Raina and
Rick Woltenberg and
Xijiang Lin and
Bruce Swanson and
Greg Aldrich},
title = {Novel Techniques for Achieving High At-Speed Transition Fault Test
Coverage for Motorola's Microprocessors Based on PowerPC(tm) Instruction
Set Architecture},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {3--8},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011103},
doi = {10.1109/VTS.2002.1011103},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/TendolkarRWLSA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/FurberEGLLT01,
author = {Stephen B. Furber and
Aristides Efthymiou and
Jim D. Garside and
David W. Lloyd and
Mike J. G. Lewis and
Steve Temple},
title = {Power Management in the Amulet Microprocessors},
journal = {{IEEE} Des. Test Comput.},
volume = {18},
number = {2},
pages = {42--52},
year = {2001},
url = {https://doi.org/10.1109/54.914617},
doi = {10.1109/54.914617},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/FurberEGLLT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ClarkHMBLSMVY01,
author = {Lawrence T. Clark and
Eric J. Hoffman and
Jay B. Miller and
Manish Biyani and
Yuyun Liao and
Stephen J. Strazdus and
Michael Morrow and
Kimberley E. Velarde and
Mark A. Yarch},
title = {An embedded 32-b microprocessor core for low-power and high-performance
applications},
journal = {{IEEE} J. Solid State Circuits},
volume = {36},
number = {11},
pages = {1599--1608},
year = {2001},
url = {https://doi.org/10.1109/4.962279},
doi = {10.1109/4.962279},
timestamp = {Wed, 08 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/ClarkHMBLSMVY01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OhP01,
author = {Jaewon Oh and
Massoud Pedram},
title = {Gated clock routing for low-power microprocessor design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {20},
number = {6},
pages = {715--722},
year = {2001},
url = {https://doi.org/10.1109/43.924825},
doi = {10.1109/43.924825},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OhP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/TakamizawaNBIK01,
author = {Yuichiro Takamizawa and
Kouhei Nadehara and
Max Boegli and
Masao Ikekawa and
Ichiro Kuroda},
title = {{MPEG-2} {AAC} 5.1-Channel Decoder Software for a Low-Power Embedded
{RISC} Microprocessor},
journal = {J. {VLSI} Signal Process.},
volume = {29},
number = {3},
pages = {247--254},
year = {2001},
url = {https://doi.org/10.1023/A:1012239731371},
doi = {10.1023/A:1012239731371},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/TakamizawaNBIK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HsiehCP01,
author = {Cheng{-}Ta Hsieh and
Lung{-}sheng Chen and
Massoud Pedram},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {Microprocessor power analysis by labeled simulation},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {182--189},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915022},
doi = {10.1109/DATE.2001.915022},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HsiehCP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZengABA01,
author = {Jing Zeng and
Magdy S. Abadir and
Jayanta Bhadra and
Jacob A. Abraham},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {Full chip false timing path identification: applications to the PowerPCTM
microprocessors},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {514--519},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915072},
doi = {10.1109/DATE.2001.915072},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ZengABA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BuyuktosunogluASBBC01,
author = {Alper Buyuktosunoglu and
David H. Albonesi and
Stanley Schuster and
David M. Brooks and
Pradip Bose and
Peter W. Cook},
editor = {Kaushik Roy and
Sung{-}Mo Kang and
Cheng{-}Kok Koh},
title = {A circuit level implementation of an adaptive issue queue for power-aware
microprocessors},
booktitle = {Proceedings of the 11th {ACM} Great Lakes Symposium on {VLSI} 2001,
West Lafayette, Indiana, USA, 2001},
pages = {73--78},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/368122.368807},
doi = {10.1145/368122.368807},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BuyuktosunogluASBBC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/CurranGMBMA01,
author = {Brian W. Curran and
Mary Gifaldi and
Jason Martin and
Alper Buyuktosunoglu and
Martin Margala and
David H. Albonesi},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Low-Voltage 0, 25 {\(\mathrm{\mu}\)}m {CMOS} Improved Power Adaptive
Issue Queue for Embedded Microprocessors},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {289--300},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 16:01:37 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/CurranGMBMA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/JosephM01,
author = {Russ Joseph and
Margaret Martonosi},
editor = {Enrico Macii and
Vivek De and
Mary Jane Irwin},
title = {Run-time power estimation in high performance microprocessors},
booktitle = {Proceedings of the 2001 International Symposium on Low Power Electronics
and Design, 2001, Huntington Beach, California, USA, 2001},
pages = {135--140},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/383082.383119},
doi = {10.1145/383082.383119},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/JosephM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/VahidG01,
author = {Frank Vahid and
Ann Gordon{-}Ross},
editor = {Enrico Macii and
Vivek De and
Mary Jane Irwin},
title = {A self-optimizing embedded microprocessor using a loop table for low
power},
booktitle = {Proceedings of the 2001 International Symposium on Low Power Electronics
and Design, 2001, Huntington Beach, California, USA, 2001},
pages = {219--224},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/383082.383138},
doi = {10.1145/383082.383138},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/VahidG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KartschokeH01,
author = {Paul Kartschoke and
Shervin Hojat},
title = {Techniques that Improved the Timing Convergence of the Gekko PowerPC
Microprocessor},
booktitle = {2nd International Symposium on Quality of Electronic Design {(ISQED}
2001), 26-28 March 2001, San Jose, CA, {USA}},
pages = {65--70},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ISQED.2001.915207},
doi = {10.1109/ISQED.2001.915207},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/KartschokeH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Vandling01,
author = {Gilbert Vandling},
title = {Modeling and testing the Gekko microprocessor, an {IBM} PowerPC derivative
for Nintendo},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {593--599},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966678},
doi = {10.1109/TEST.2001.966678},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Vandling01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mobicom/PouwelseLS01,
author = {Johan A. Pouwelse and
Koen Langendoen and
Henk J. Sips},
editor = {Christopher Rose},
title = {Dynamic voltage scaling on a low-power microprocessor},
booktitle = {{MOBICOM} 2001, Proceedings of the seventh annual international conference
on Mobile computing and networking, Rome, Italy, July 16-21, 2001},
pages = {251--259},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/381677.381701},
doi = {10.1145/381677.381701},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mobicom/PouwelseLS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AbadirZW01,
author = {Magdy S. Abadir and
Juhong Zhu and
Li{-}C. Wang},
title = {Analysis of Testing Methodologies for Custom Designs in PowerPCTM
Microprocessor},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {252--259},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/VTS.2001.923447},
doi = {10.1109/VTS.2001.923447},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AbadirZW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/KrishnamurthyMAA00,
author = {Narayanan Krishnamurthy and
Andrew K. Martin and
Magdy S. Abadir and
Jacob A. Abraham},
title = {Validating PowerPC Microprocessor Custom Memories},
journal = {{IEEE} Des. Test Comput.},
volume = {17},
number = {4},
pages = {61--76},
year = {2000},
url = {https://doi.org/10.1109/54.895007},
doi = {10.1109/54.895007},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/KrishnamurthyMAA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/WangA00,
author = {Li{-}C. Wang and
Magdy S. Abadir},
title = {On Efficiently Producing Quality Tests for Custom Circuits in PowerPC\({}^{\mbox{TM}}\)
Microprocessors},
journal = {J. Electron. Test.},
volume = {16},
number = {1-2},
pages = {121--130},
year = {2000},
url = {https://doi.org/10.1023/A:1008353109659},
doi = {10.1023/A:1008353109659},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/WangA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/AthasTMPLCMSB00,
author = {William C. Athas and
Nestoras Tzartzanis and
Weihua Mao and
Lena Peterson and
Rajat Lal and
Kisup Chong and
Joong{-}Seok Moon and
Lars J. Svensson and
Michael Bolotski},
title = {The design and implementation of a low-power clock-powered microprocessor},
journal = {{IEEE} J. Solid State Circuits},
volume = {35},
number = {11},
pages = {1561--1570},
year = {2000},
url = {https://doi.org/10.1109/4.881200},
doi = {10.1109/4.881200},
timestamp = {Fri, 08 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/AthasTMPLCMSB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BrooksBSJKBWZGC00,
author = {David M. Brooks and
Pradip Bose and
Stanley Schuster and
Hans M. Jacobson and
Prabhakar Kudva and
Alper Buyuktosunoglu and
John{-}David Wellman and
Victor V. Zyuban and
Manish Gupta and
Peter W. Cook},
title = {Power-Aware Microarchitecture: Design and Modeling Challenges for
Next-Generation Microprocessors},
journal = {{IEEE} Micro},
volume = {20},
number = {6},
pages = {26--44},
year = {2000},
url = {https://doi.org/10.1109/40.888701},
doi = {10.1109/40.888701},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/BrooksBSJKBWZGC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/BhadraAA00,
author = {Jayanta Bhadra and
Magdy S. Abadir and
Jacob A. Abraham},
title = {A quick and inexpensive method to identify false critical paths using
{ATPG} techniques: an experiment with a PowerPC\({}^{\mbox{TM}}\)
microprocessor},
booktitle = {Proceedings of the {IEEE} 2000 Custom Integrated Circuits Conference,
{CICC} 2000, Orlando, FL, USA, May 21-24, 2000},
pages = {71--74},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/CICC.2000.852620},
doi = {10.1109/CICC.2000.852620},
timestamp = {Mon, 10 Oct 2022 09:13:21 +0200},
biburl = {https://dblp.org/rec/conf/cicc/BhadraAA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/QuKUP00,
author = {Gang Qu and
Naoyuki Kawabe and
Kimiyoshi Usami and
Miodrag Potkonjak},
editor = {Giovanni De Micheli},
title = {Function-level power estimation methodology for microprocessors},
booktitle = {Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000},
pages = {810--813},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/337292.337786},
doi = {10.1145/337292.337786},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/QuKUP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/YenY00,
author = {Jen{-}Tien Yen and
Qichao Richard Yin},
editor = {Giovanni De Micheli},
title = {Multiprocessing design verification methodology for Motorola {MPC74XX}
PowerPC microprocessor},
booktitle = {Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000},
pages = {718--723},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/337292.337755},
doi = {10.1145/337292.337755},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/YenY00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euromicro/MorenoPPT00,
author = {Rafael A. Moreno and
Luis Pi{\~{n}}uel and
Silvia Del Pino and
Francisco Tirado},
title = {Power-Efficient Value Speculation for High-Performance Microprocessors},
booktitle = {26th {EUROMICRO} 2000 Conference, Informatics: Inventing the Future,
5-7 September 2000, Maastricht, The Netherlands},
pages = {1292--1299},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/EURMIC.2000.874645},
doi = {10.1109/EURMIC.2000.874645},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/euromicro/MorenoPPT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/NachtergaeleTD00,
author = {Lode Nachtergaele and
Vivek Tiwari and
Nikil D. Dutt},
editor = {Ellen Sentovich},
title = {System and Architecture-Level Power Reduction for Microprocessor-Based
Communication and Multi-Media Applications},
booktitle = {Proceedings of the 2000 {IEEE/ACM} International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {569--573},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCAD.2000.896533},
doi = {10.1109/ICCAD.2000.896533},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/NachtergaeleTD00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChengBS00,
author = {Yi{-}Kan Cheng and
David Bearden and
Kanti Suryadevara},
title = {Application-Based, Transistor-Level Full-Chip Power Analysis for 700
MHz PowerPC\({}^{\mbox{TM}}\) Microprocessor},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design:
{VLSI} In Computers {\&} Processors, {ICCD} '00, Austin, Texas,
USA, September 17-20, 2000},
pages = {215--220},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCD.2000.878288},
doi = {10.1109/ICCD.2000.878288},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChengBS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HakenesM00,
author = {Rolf Hakenes and
Yiannos Manoli},
title = {A Novel Low-Power Microprocessor Architecture},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design:
{VLSI} In Computers {\&} Processors, {ICCD} '00, Austin, Texas,
USA, September 17-20, 2000},
pages = {141--146},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCD.2000.878280},
doi = {10.1109/ICCD.2000.878280},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HakenesM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MorenoPPT00,
author = {Rafael A. Moreno and
Luis Pi{\~{n}}uel and
Silvia Del Pino and
Francisco Tirado},
title = {A Power Perspective of Value Speculation for Superscalar Microprocessors},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design:
{VLSI} In Computers {\&} Processors, {ICCD} '00, Austin, Texas,
USA, September 17-20, 2000},
pages = {147--154},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCD.2000.878281},
doi = {10.1109/ICCD.2000.878281},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MorenoPPT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/RupleyH00,
author = {Jess Rupley II and
David C. Holloway},
title = {Performance tradeoffs in sequencer design on a new {G4} PowerPC\({}^{\mbox{TM}}\)
microprocessor},
booktitle = {2000 {IEEE} International Symposium on Performance Analysis of Systems
and Software, April 24-35, 2000, Austin, Texas, USA, Proceedings},
pages = {88--94},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ISPASS.2000.842286},
doi = {10.1109/ISPASS.2000.842286},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/RupleyH00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RainaBBKMPR00,
author = {Rajesh Raina and
Robert Bailey and
Dawit Belete and
Vikram Khosa and
Robert F. Molyneaux and
Javier Prado and
Ashutosh Razdan},
title = {{DFT} advances in Motorola's Next-Generation 74xx PowerPC\({}^{\mbox{TM}}\)
microprocessor},
booktitle = {Proceedings {IEEE} International Test Conference 2000, Atlantic City,
NJ, USA, October 2000},
pages = {131--140},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/TEST.2000.894200},
doi = {10.1109/TEST.2000.894200},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RainaBBKMPR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YamaguchiSHNRIW00,
author = {Takahiro J. Yamaguchi and
Mani Soma and
David Halter and
Jim Nissen and
Rajesh Raina and
Masahiro Ishida and
Toshifumi Watanabe},
title = {Jitter measurements of a PowerPC\({}^{\mbox{TM}}\) microprocessor
using an analytic signal method},
booktitle = {Proceedings {IEEE} International Test Conference 2000, Atlantic City,
NJ, USA, October 2000},
pages = {955--964},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/TEST.2000.894307},
doi = {10.1109/TEST.2000.894307},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/YamaguchiSHNRIW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/BatraAA00,
author = {Jayanta Batra and
Magdy S. Abadir and
Jacob A. Abraham},
title = {A Quick and Inexpensive Method to Identify False Critical Paths Using
{ATPG} Techniques: an Experiment with a PowerPC Microprocessor},
booktitle = {1st Latin American Test Workshop, {LATW} 2000, Rio de Janeiro, RJ,
Brazil, March 13-15, 2000},
pages = {72--76},
publisher = {{IEEE}},
year = {2000},
timestamp = {Tue, 25 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/BatraAA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pacs/BrooksMWB00,
author = {David M. Brooks and
Margaret Martonosi and
John{-}David Wellman and
Pradip Bose},
editor = {Babak Falsafi and
T. N. Vijaykumar},
title = {Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor},
booktitle = {Power-Aware Computer Systems, First International Workshop, {PACS}
2000, Cambridge, MA, USA, November 12, 2000, Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {2008},
pages = {126--136},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44572-2\_10},
doi = {10.1007/3-540-44572-2\_10},
timestamp = {Tue, 14 May 2019 10:00:41 +0200},
biburl = {https://dblp.org/rec/conf/pacs/BrooksMWB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TendolkarMPR00,
author = {Nandu Tendolkar and
Robert F. Molyneaux and
Carol Pyron and
Rajesh Raina},
title = {At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm)
Microprocessor},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {3--8},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843819},
doi = {10.1109/VTEST.2000.843819},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/TendolkarMPR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/WangA99,
author = {Li{-}C. Wang and
Magdy S. Abadir},
title = {Experience in Validation of PowerPCTM Microprocessor Embedded Arrays},
journal = {J. Electron. Test.},
volume = {15},
number = {1-2},
pages = {191--205},
year = {1999},
url = {https://doi.org/10.1023/A:1008352805631},
doi = {10.1023/A:1008352805631},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/WangA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/AipperspachACPS99,
author = {Anthony G. Aipperspach and
David H. Allen and
Dennis T. Cox and
Nghia Phan and
Salvatore N. Storino},
title = {A 0.2-{\(\mu\)}m, 1.8-V, SOI, 550-MHZ, 64-b PowerPC microprocessor
with copper interconnects},
journal = {{IEEE} J. Solid State Circuits},
volume = {34},
number = {11},
pages = {1430--1435},
year = {1999},
url = {https://doi.org/10.1109/4.799846},
doi = {10.1109/4.799846},
timestamp = {Wed, 06 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/AipperspachACPS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/SchmooklerPMTNRSPL99,
author = {Martin S. Schmookler and
Michael Putrino and
Anh Mather and
Jon Tyler and
Huy Van Nguyen and
Charles Roth and
Mukesh Sharma and
Mydung N. Pham and
Jeff Lent},
title = {A Low-Power, High-Speed Implementation of a PowerPC(tm) Microprocessor
Vector Extension},
booktitle = {14th {IEEE} Symposium on Computer Arithmetic (Arith-14 '99), 14-16
April 1999, Adelaide, Australia},
pages = {12},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ARITH.1999.762823},
doi = {10.1109/ARITH.1999.762823},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/SchmooklerPMTNRSPL99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/BiereCRZ99,
author = {Armin Biere and
Edmund M. Clarke and
Richard Raimi and
Yunshan Zhu},
editor = {Nicolas Halbwachs and
Doron A. Peled},
title = {Verifiying Safety Properties of a Power {PC} Microprocessor Using
Symbolic Model Checking without BDDs},
booktitle = {Computer Aided Verification, 11th International Conference, {CAV}
'99, Trento, Italy, July 6-10, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1633},
pages = {60--71},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/3-540-48683-6\_8},
doi = {10.1007/3-540-48683-6\_8},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/cav/BiereCRZ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/RaimiA99,
author = {Richard Raimi and
Jacob A. Abraham},
editor = {Mary Jane Irwin},
title = {Detecting False Timing Paths: Experiments on PowerPC Microprocessors},
booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
LA, USA, June 21-25, 1999},
pages = {737--741},
publisher = {{ACM} Press},
year = {1999},
url = {https://doi.org/10.1145/309847.310047},
doi = {10.1145/309847.310047},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/RaimiA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/FornaciariSS99,
author = {William Fornaciari and
Donatella Sciuto and
Cristina Silvano},
title = {Power Estimation of System-Level Buses for Microprocessor-Based Architectures:
{A} Case Study},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design,
{VLSI} in Computers and Processors, {ICCD} '99, Austin, Texas, USA,
October 10-13, 1999},
pages = {131},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICCD.1999.808417},
doi = {10.1109/ICCD.1999.808417},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/FornaciariSS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipccc/DeutyM99,
author = {S. Deuty and
C. S. Mitter},
title = {Transistor paradigm shift required to meet the power demands for microprocessors},
booktitle = {Proceedings of the {IEEE} International Performance Computing and
Communications Conference, {IPCCC} 1999, Phoenix/Scottsdale, Arizona,
USA, 10-12 February 1999},
pages = {483--488},
publisher = {{IEEE}},
year = {1999},
url = {https://doi.org/10.1109/PCCC.1999.749476},
doi = {10.1109/PCCC.1999.749476},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/ipccc/DeutyM99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/AbadirR99,
author = {Magdy S. Abadir and
Rajesh Raina},
title = {Design-for-test methodology for Motorola PowerPC microprocessors},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {810--819},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805812},
doi = {10.1109/TEST.1999.805812},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/AbadirR99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PyronAGJLMRT99,
author = {Carol Pyron and
Mike Alexander and
James Golab and
George Joos and
Bruce Long and
Robert F. Molyneaux and
Rajesh Raina and
Nandu Tendolkar},
title = {{DFT} advances in the Motorola's MPC7400, a PowerPC {G4} microprocessor},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {137--146},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805623},
doi = {10.1109/TEST.1999.805623},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/PyronAGJLMRT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/WangA99,
author = {Li{-}C. Wang and
Magdy S. Abadir},
title = {Tradeoff analysis for producing high quality tests for custom circuits
in PowerPC microprocessors},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {830--838},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805814},
doi = {10.1109/TEST.1999.805814},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/WangA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/PyronPG98,
author = {Carol Pyron and
Javier Prado and
James Golab},
title = {Test Strategy for the PowerPC 750 Microprocessor},
journal = {{IEEE} Des. Test Comput.},
volume = {15},
number = {3},
pages = {90--97},
year = {1998},
url = {https://doi.org/10.1109/54.706039},
doi = {10.1109/54.706039},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/PyronPG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/WangA98,
author = {Li{-}C. Wang and
Magdy S. Abadir},
title = {Test Generation Based on High-Level Assertion Specification for PowerPCTM
Microprocessor Embedded Arrays},
journal = {J. Electron. Test.},
volume = {13},
number = {2},
pages = {121--135},
year = {1998},
url = {https://doi.org/10.1023/A:1008353704141},
doi = {10.1023/A:1008353704141},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/WangA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/Kaenel98,
author = {Vincent R. von Kaenel},
title = {A high-speed, low-power clock generator for a microprocessor application},
journal = {{IEEE} J. Solid State Circuits},
volume = {33},
number = {11},
pages = {1634--1639},
year = {1998},
url = {https://doi.org/10.1109/4.726549},
doi = {10.1109/4.726549},
timestamp = {Tue, 05 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/Kaenel98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HsiehP98,
author = {Cheng{-}Ta Hsieh and
Massoud Pedram},
title = {Microprocessor power estimation using profile-driven program synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {17},
number = {11},
pages = {1080--1089},
year = {1998},
url = {https://doi.org/10.1109/43.736182},
doi = {10.1109/43.736182},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HsiehP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/WangAZ98,
author = {Li{-}C. Wang and
Magdy S. Abadir and
Jing Zeng},
title = {On measuring the effectiveness of various design validation approaches
for PowerPC microprocessor embedded arrays},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {3},
number = {4},
pages = {524--532},
year = {1998},
url = {https://doi.org/10.1145/296333.296335},
doi = {10.1145/296333.296335},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/WangAZ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OhP98,
author = {Jaewon Oh and
Massoud Pedram},
title = {Power Reduction in Microprocessor Chips by Gated Clock Routing},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {313--318},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669478},
doi = {10.1109/ASPDAC.1998.669478},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/OhP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DharchoudhuryPBVTB98,
author = {Abhijit Dharchoudhury and
Rajendran Panda and
David T. Blaauw and
Ravi Vaidyanathan and
Bogdan Tutuianu and
David Bearden},
editor = {Basant R. Chawla and
Randal E. Bryant and
Jan M. Rabaey},
title = {Design and Analysis of Power Distribution Networks in PowerPC Microprocessors},
booktitle = {Proceedings of the 35th Conference on Design Automation, Moscone center,
San Francico, California, USA, June 15-19, 1998},
pages = {738--743},
publisher = {{ACM} Press},
year = {1998},
url = {https://doi.org/10.1145/277044.277229},
doi = {10.1145/277044.277229},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DharchoudhuryPBVTB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GowanBJ98,
author = {Michael K. Gowan and
Larry L. Biro and
Daniel B. Jackson},
editor = {Basant R. Chawla and
Randal E. Bryant and
Jan M. Rabaey},
title = {Power Considerations in the Design of the Alpha 21264 Microprocessor},
booktitle = {Proceedings of the 35th Conference on Design Automation, Moscone center,
San Francico, California, USA, June 15-19, 1998},
pages = {726--731},
publisher = {{ACM} Press},
year = {1998},
url = {https://doi.org/10.1145/277044.277226},
doi = {10.1145/277044.277226},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/GowanBJ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/TiwariSRMPB98,
author = {Vivek Tiwari and
Deo Singh and
Suresh Rajgopal and
Gaurav Mehta and
Rakesh Patel and
Franklin Baez},
editor = {Basant R. Chawla and
Randal E. Bryant and
Jan M. Rabaey},
title = {Reducing Power in High-Performance Microprocessors},
booktitle = {Proceedings of the 35th Conference on Design Automation, Moscone center,
San Francico, California, USA, June 15-19, 1998},
pages = {732--737},
publisher = {{ACM} Press},
year = {1998},
url = {https://doi.org/10.1145/277044.277227},
doi = {10.1145/277044.277227},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/TiwariSRMPB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WangAK98,
author = {Li{-}C. Wang and
Magdy S. Abadir and
Nari Krishnamurthy},
editor = {Basant R. Chawla and
Randal E. Bryant and
Jan M. Rabaey},
title = {Automatic Generation of Assertions for Formal Verification of PowerPC
Microprocessor Arrays Using Symbolic Trajectory Evaluation},
booktitle = {Proceedings of the 35th Conference on Design Automation, Moscone center,
San Francico, California, USA, June 15-19, 1998},
pages = {534--537},
publisher = {{ACM} Press},
year = {1998},
url = {https://doi.org/10.1145/277044.277188},
doi = {10.1145/277044.277188},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/WangAK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WangAZ98,
author = {Li{-}C. Wang and
Magdy S. Abadir and
Jing Zeng},
editor = {Patrick M. Dewilde and
Franz J. Rammig and
Gerry Musgrave},
title = {Measuring the Effectiveness of Various Design Validation Approaches
For PowerPC(TM) Microprocessor Arrays},
booktitle = {1998 Design, Automation and Test in Europe {(DATE} '98), February
23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
pages = {273--277},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/DATE.1998.655867},
doi = {10.1109/DATE.1998.655867},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WangAZ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChandraWA98,
author = {Arun Chandra and
Li{-}C. Wang and
Magdy S. Abadir},
title = {Practical Considerations in Formal Equivalence Checking of PowerPC(tm)
Microprocessors},
booktitle = {8th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '98), 19-21 February
1998, Lafayette, LA, {USA}},
pages = {362--367},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/GLSV.1998.665314},
doi = {10.1109/GLSV.1998.665314},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChandraWA98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RainaM98,
author = {Rajesh Raina and
Robert F. Molyneaux},
title = {Random Self-Test Method - Applications on PowerPC (tm) Microprocessor
Caches},
booktitle = {8th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '98), 19-21 February
1998, Lafayette, LA, {USA}},
pages = {222--229},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/GLSV.1998.665230},
doi = {10.1109/GLSV.1998.665230},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RainaM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/NadeharaLK98,
author = {Kouhei Nadehara and
Hanno Lieske and
Ichiro Kuroda},
title = {Software {MPEG-2} video decoder on a 200-MHz, low-power multimedia
microprocessor},
booktitle = {Proceedings of the 1998 {IEEE} International Conference on Acoustics,
Speech and Signal Processing, {ICASSP} '98, Seattle, Washington, USA,
May 12-15, 1998},
pages = {3141--3144},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ICASSP.1998.678192},
doi = {10.1109/ICASSP.1998.678192},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icassp/NadeharaLK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HunterG98,
author = {Craig Hunter and
Justin Gaither},
title = {Design and implementation of the "G2" PowerPC 603e-embedded microprocessor
core},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {473--479},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743188},
doi = {10.1109/TEST.1998.743188},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HunterG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WangAZ98,
author = {Li{-}C. Wang and
Magdy S. Abadir and
Jing Zeng},
title = {On Logic and Transistor Level Design Error Detection of Various Validation
Approaches for PowerPC(tm) Microprocessor Arrays},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {260--265},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670878},
doi = {10.1109/VTEST.1998.670878},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/WangAZ98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/LevineR97,
author = {Frank E. Levine and
Charles P. Roth},
title = {A programmer's view of performance monitoring in the PowerPC microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {41},
number = {3},
pages = {345--356},
year = {1997},
url = {https://doi.org/10.1147/rd.413.0345},
doi = {10.1147/RD.413.0345},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/LevineR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/SandonLCSM97,
author = {Peter A. Sandon and
Yu{-}Chung Liao and
Thomas E. Cook and
David M. Schultz and
Pedro Martin{-}de{-}Nicolas},
title = {NStrace: {A} bus-driven instruction trace tool for PowerPC microprocessors},
journal = {{IBM} J. Res. Dev.},
volume = {41},
number = {3},
pages = {331--344},
year = {1997},
url = {https://doi.org/10.1147/rd.413.0331},
doi = {10.1147/RD.413.0331},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/SandonLCSM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/AthasTSP97,
author = {William C. Athas and
Nestoras Tzartzanis and
Lars J. Svensson and
Lena Peterson},
title = {A low-power microprocessor based on resonant energy},
journal = {{IEEE} J. Solid State Circuits},
volume = {32},
number = {11},
pages = {1693--1701},
year = {1997},
url = {https://doi.org/10.1109/4.641689},
doi = {10.1109/4.641689},
timestamp = {Thu, 07 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/AthasTSP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/GerosaAACDKNNPR97,
author = {Gianfranco Gerosa and
Mike Alexander and
Jose Alvarez and
Cody Croxton and
Michael D'Addeo and
A. Richard Kennedy and
Carmine Nicoletta and
James P. Nissen and
Ross Philip and
Paul Reed and
Hector Sanchez and
Scott A. Taylor and
Brad Burgess},
title = {A 250-MHz 5-W PowerPC microprocessor with on-chip {L2} cache controller},
journal = {{IEEE} J. Solid State Circuits},
volume = {32},
number = {11},
pages = {1635--1649},
year = {1997},
url = {https://doi.org/10.1109/4.641684},
doi = {10.1109/4.641684},
timestamp = {Thu, 07 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/GerosaAACDKNNPR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/GangulyLP97,
author = {Shantanu Ganguly and
Daksh Lehther and
Satyamurthy Pullela},
title = {Clock Distribution Methodology for PowerPC\({}^{\mbox{TM}}\) Microprocessors},
journal = {J. {VLSI} Signal Process.},
volume = {16},
number = {2-3},
pages = {181--189},
year = {1997},
url = {https://doi.org/10.1023/A:1007991007969},
doi = {10.1023/A:1007991007969},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/GangulyLP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/KennedyAFLKPPPC97,
author = {A. Richard Kennedy and
Mike Alexander and
Eric Fiene and
Jose A. Lyon and
Belli Kuttanna and
Rajesh Patel and
Mydung N. Pham and
Michael Putrino and
Cody Croxton and
Suzanne Litch and
Brad Burgess},
title = {A {G3} PowerPC{\texttrademark} superscalar low-power microprocessor},
booktitle = {Proceedings {IEEE} {COMPCON} 97, San Jose, California, USA, February
23-26, 1997, Digest of Papers},
pages = {315--324},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/CMPCON.1997.584742},
doi = {10.1109/CMPCON.1997.584742},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/KennedyAFLKPPPC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/Reinold97,
author = {J{\"{u}}rgen Reinold},
title = {Performance implications of next generation PowerPC{\texttrademark}
microprocessor cache architectures},
booktitle = {Proceedings {IEEE} {COMPCON} 97, San Jose, California, USA, February
23-26, 1997, Digest of Papers},
pages = {331--338},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/CMPCON.1997.584746},
doi = {10.1109/CMPCON.1997.584746},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/Reinold97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/SanchezKOAGPA97,
author = {Hector Sanchez and
Belli Kuttanna and
Tim Olson and
Mike Alexander and
Gianfranco Gerosa and
Ross Philip and
Jose Alvarez},
title = {Thermal management system for high performance PowerPC{\texttrademark}
microprocessors},
booktitle = {Proceedings {IEEE} {COMPCON} 97, San Jose, California, USA, February
23-26, 1997, Digest of Papers},
pages = {325--330},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/CMPCON.1997.584744},
doi = {10.1109/CMPCON.1997.584744},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/SanchezKOAGPA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BeniniMMSS97,
author = {Luca Benini and
Giovanni De Micheli and
Enrico Macii and
Donatella Sciuto and
Cristina Silvano},
title = {Asymptotic Zero-Transition Activity Encoding for Address Busses in
Low-Power Microprocessor-Based Systems},
booktitle = {7th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '97), 13-15 March
1997, Urbana, IL, {USA}},
pages = {77--82},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/GLSV.1997.580414},
doi = {10.1109/GLSV.1997.580414},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BeniniMMSS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/DharchoudhuryBNPD97,
author = {Abhijit Dharchoudhury and
David T. Blaauw and
Joe Norton and
Satyamurthy Pullela and
J. Dunning},
title = {Transistor-level Sizing and Timing Verification of Domino Circuits
in the Power {PC} Microprocessor},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {143--148},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628861},
doi = {10.1109/ICCD.1997.628861},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/DharchoudhuryBNPD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HojatV97,
author = {Shervin Hojat and
Paul Villarrubia},
title = {An Integrated Placement and Synthesis Approach for Timing Closure
of PowerPC Microprocessors},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {206--210},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628869},
doi = {10.1109/ICCD.1997.628869},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HojatV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/AthasTSPLJWL97,
author = {William C. Athas and
Nestoras Tzartzanis and
Lars J. Svensson and
Lena Peterson and
Huimin Li and
Xing Yu Jiang and
Peiqing Wang and
W.{-}C. Liu},
editor = {Brock Barton and
Massoud Pedram and
Anantha P. Chandrakasan and
Sayfe Kiaei},
title = {{AC-1:} a clock-powered microprocessor},
booktitle = {Proceedings of the 1997 International Symposium on Low Power Electronics
and Design, 1997, Monterey, California, USA, August 18-20, 1997},
pages = {328--333},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/263272.263366},
doi = {10.1145/263272.263366},
timestamp = {Mon, 27 Sep 2021 11:47:11 +0200},
biburl = {https://dblp.org/rec/conf/islped/AthasTSPLJWL97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PyronPG97,
author = {Carol Pyron and
Javier Prado and
James Golab},
title = {Next-Generation PowerPC\({}^{\mbox{TM}}\) Microprocessor Test Strategy
Improvements},
booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington,
DC, USA, November 3-5, 1997},
pages = {414--423},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/TEST.1997.639644},
doi = {10.1109/TEST.1997.639644},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/PyronPG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/RaimiL97,
author = {Richard Raimi and
James Lear},
title = {Analyzing a PowerPC\({}^{\mbox{TM}}\)620 Microprocessor Silicon Failure
Using Model Checking},
booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington,
DC, USA, November 3-5, 1997},
pages = {964--973},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/TEST.1997.639712},
doi = {10.1109/TEST.1997.639712},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/RaimiL97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/WangA97,
author = {Li{-}C. Wang and
Magdy S. Abadir},
title = {A New Validation Methodology Combining Test and Formal Verification
for PowerPC\({}^{\mbox{TM}}\) Microprocessor Arrays},
booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington,
DC, USA, November 3-5, 1997},
pages = {954--963},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/TEST.1997.639711},
doi = {10.1109/TEST.1997.639711},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/WangA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/RothTJN97,
author = {Charles Roth and
Jon Tyler and
Paul Jagodik and
Huy Nguyen},
title = {Divide and conquer approach to functional verification of PowerPC
\({}^{\mbox{TM}}\) microprocessors},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618888},
doi = {10.1109/IWRSP.1997.618888},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/RothTJN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TiwariDMG97,
author = {Vivek Tiwari and
Ryan Donnelly and
Sharad Malik and
Ricardo Gonzalez},
title = {Dynamic Power Management for Microprocessors: {A} Case Study},
booktitle = {10th International Conference on {VLSI} Design {(VLSI} Design 1997),
4-7 January 1997, Hyderabad, India},
pages = {185--192},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICVD.1997.568074},
doi = {10.1109/ICVD.1997.568074},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/TiwariDMG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/BishopCJMMPRSW96,
author = {James W. Bishop and
Michael J. Campion and
Thomas L. Jeremiah and
Stephen J. Mercier and
Edmond J. Mohring and
Kerry P. Pfarr and
Bruce G. Rudolph and
Gregory S. Still and
Tennis S. White},
title = {PowerPC {AS} {A10} 64-bit {RISC} microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {40},
number = {4},
pages = {495--506},
year = {1996},
url = {https://doi.org/10.1147/rd.404.0495},
doi = {10.1147/RD.404.0495},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/BishopCJMMPRSW96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/JessaniO96,
author = {Romesh M. Jessani and
Christopher H. Olson},
title = {The floating-point unit of the PowerPC 603e microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {40},
number = {5},
pages = {559--566},
year = {1996},
url = {https://doi.org/10.1147/rd.405.0559},
doi = {10.1147/RD.405.0559},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/JessaniO96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/DenmanAS96,
author = {Marvin Denman and
Paul Anderson and
Mike Snyder},
title = {Design of the PowerPC 604e(tm) Microprocessor},
booktitle = {Forty-First {IEEE} Computer Society International Conference: Technologies
for the Information Superhighway, {COMPCON} 1996, Santa Clara, California,
USA, February 25-28, 1996, Digest of Papers},
pages = {126--131},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/CMPCON.1996.501758},
doi = {10.1109/CMPCON.1996.501758},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/DenmanAS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MonacoHR96,
author = {James Monaco and
David Holloway and
Rajesh Raina},
editor = {Thomas Pennino and
Ellen J. Yoffa},
title = {Functional Verification Methodology for the PowerPC 604 Microprocessor},
booktitle = {Proceedings of the 33st Conference on Design Automation, Las Vegas,
Nevada, USA, Las Vegas Convention Center, June 3-7, 1996},
pages = {319--324},
publisher = {{ACM} Press},
year = {1996},
url = {https://doi.org/10.1145/240518.240579},
doi = {10.1145/240518.240579},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/MonacoHR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euromicro/PiguetSMADS96,
author = {Christian Piguet and
Thierry Schneider and
Jean{-}Marc Masgonty and
Claude Arm and
Serge Durand and
M. Stegers},
title = {Low-Power Embedded Microprocessor Design},
booktitle = {22rd {EUROMICRO} Conference '96, Beyond 2000: Hardware and Software
Design Strategies, September 2-5, 1996, Prague, Czech Republic},
pages = {600--605},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EURMIC.1996.546487},
doi = {10.1109/EURMIC.1996.546487},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/euromicro/PiguetSMADS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AlvarezSCANG96,
author = {Jose Alvarez and
Hector Sanchez and
Roger Countryman and
Mike Alexander and
Carmine Nicoletta and
Gianfranco Gerosa},
title = {A Scalable Resistor-less {PLL} Design for PowerPCTM Microprocessors},
booktitle = {1996 International Conference on Computer Design {(ICCD} '96), {VLSI}
in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings},
pages = {293--300},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ICCD.1996.563570},
doi = {10.1109/ICCD.1996.563570},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AlvarezSCANG96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/KhoeiH96,
author = {Abdullah Khoei and
Khairollah Hadidi},
title = {Microprocessor based closed-loop speed control system for {DC} motor
using power {MOSFET}},
booktitle = {Proceedings of Third International Conference on Electronics, Circuits,
and Systems, {ICECS} 1996, Rodos, Greece, October 13-16, 1996},
pages = {1247--1250},
publisher = {{IEEE}},
year = {1996},
url = {https://doi.org/10.1109/ICECS.1996.584658},
doi = {10.1109/ICECS.1996.584658},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/KhoeiH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/Dobberpuhl96,
author = {Dan Dobberpuhl},
editor = {Mark Horowitz and
Jan M. Rabaey and
Brock Barton and
Massoud Pedram},
title = {The design of a high performance low power microprocessor},
booktitle = {Proceedings of the 1996 International Symposium on Low Power Electronics
and Design, 1996, Monterey, California, USA, August 12-14, 1996},
pages = {11--16},
publisher = {{IEEE}},
year = {1996},
url = {https://doi.org/10.1109/LPE.1996.542723},
doi = {10.1109/LPE.1996.542723},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/islped/Dobberpuhl96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Rajgopal96,
author = {Suresh Rajgopal},
title = {Challenges in Low Power Microprocessor Design},
booktitle = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
3-6 January 1996, Bangalore, India},
pages = {329--330},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ICVD.1996.489625},
doi = {10.1109/ICVD.1996.489625},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Rajgopal96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/BernsteinBHNW95,
author = {Kerry Bernstein and
John E. Bertsch and
Lawrence G. Heller and
Edward J. Nowak and
Francis R. White},
title = {Reduced-voltage power/performance optimization of the 3.6-volt PowerPC
601 Microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {39},
number = {1-2},
pages = {33--42},
year = {1995},
url = {https://doi.org/10.1147/rd.391.0033},
doi = {10.1147/RD.391.0033},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/BernsteinBHNW95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/AlvarezSGC95,
author = {Jose Alvarez and
Hector Sanchez and
Gianfranco Gerosa and
Roger Countryman},
title = {A wide-bandwidth low-voltage {PLL} for PowerPC microprocessors},
journal = {{IEEE} J. Solid State Circuits},
volume = {30},
number = {4},
pages = {383--391},
year = {1995},
url = {https://doi.org/10.1109/4.375957},
doi = {10.1109/4.375957},
timestamp = {Wed, 03 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/AlvarezSGC95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/LevitanTT95,
author = {David Levitan and
Thomas Thomas and
Paul Tu},
title = {The PowerPC 620 Microprocessor: {A} High Performance Superscalar {RISC}
Microprocessor},
booktitle = {{COMPCON} '95: Technologies for the Information Superhighway, Digest
of Papers, San Francisco, California, USA, March 5-9, 1995},
pages = {285--291},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/CMPCON.1995.512398},
doi = {10.1109/CMPCON.1995.512398},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/LevitanTT95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/OgdenKLMP95,
author = {Deene Ogden and
Belli Kuttanna and
Albert J. Loper and
Soummya Mallick and
Michael Putrino},
title = {A New PowerPC Microprocessor for Low Power Computing Systems},
booktitle = {{COMPCON} '95: Technologies for the Information Superhighway, Digest
of Papers, San Francisco, California, USA, March 5-9, 1995},
pages = {281--284},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/CMPCON.1995.512397},
doi = {10.1109/CMPCON.1995.512397},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/OgdenKLMP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/Thamm95,
author = {Howard C. Thamm},
title = {Developing Windows {NT} Applications for PowerPC Microprocessor Based
Systems},
booktitle = {{COMPCON} '95: Technologies for the Information Superhighway, Digest
of Papers, San Francisco, California, USA, March 5-9, 1995},
pages = {315--319},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/CMPCON.1995.512402},
doi = {10.1109/CMPCON.1995.512402},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/Thamm95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/YuanTLT95,
author = {John K. Yuan and
Michael P. Taborn and
David C. Lee and
Albert Tsay},
title = {The PowerPC 620 Microprocessor in Distributed Computing},
booktitle = {{COMPCON} '95: Technologies for the Information Superhighway, Digest
of Papers, San Francisco, California, USA, March 5-9, 1995},
pages = {308--314},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/CMPCON.1995.512401},
doi = {10.1109/CMPCON.1995.512401},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/YuanTLT95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MalleyD95,
author = {Charles H. Malley and
Max Dieudonn{\'{e}}},
editor = {Bryan Preas},
title = {Logic Verification Methodology for PowerPC Microprocessors},
booktitle = {Proceedings of the 32st Conference on Design Automation, San Francisco,
California, USA, Moscone Center, June 12-16, 1995},
pages = {234--240},
publisher = {{ACM} Press},
year = {1995},
url = {https://doi.org/10.1145/217474.217535},
doi = {10.1145/217474.217535},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/MalleyD95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Vida-TorkuMPR95,
author = {E. Kofi Vida{-}Torku and
Charles H. Malley and
Sung Park and
R. Reed},
title = {Design and test of the PowerPC 603 microprocessor},
booktitle = {1995 European Design and Test Conference, ED{\&}TC 1995, Paris,
France, March 6-9, 1995},
pages = {378--384},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/EDTC.1995.470368},
doi = {10.1109/EDTC.1995.470368},
timestamp = {Fri, 20 May 2022 15:41:46 +0200},
biburl = {https://dblp.org/rec/conf/date/Vida-TorkuMPR95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/GangulyH95,
author = {Shantanu Ganguly and
Shervin Hojat},
editor = {Richard L. Rudell},
title = {Clock distribution design and verification for PowerPC microprocessors},
booktitle = {Proceedings of the 1995 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1995, San Jose, California, USA, November 5-9, 1995},
pages = {58--61},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1995},
url = {https://doi.org/10.1109/ICCAD.1995.479991},
doi = {10.1109/ICCAD.1995.479991},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/GangulyH95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/DalalLM95,
author = {Alexander Dalal and
Lavi Lev and
Sundari Mitra},
title = {Design of an efficient power distribution network for the UltraSPARC-I
microprocessor},
booktitle = {1995 International Conference on Computer Design {(ICCD} '95), {VLSI}
in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings},
pages = {118--123},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICCD.1995.528799},
doi = {10.1109/ICCD.1995.528799},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/DalalLM95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MontemayorSYWEK95,
author = {Carlos Montemayor and
Marie Sullivan and
Jen{-}Tien Yen and
Pete Wilson and
Richard Evers and
K. R. Kishore},
title = {The PowerPC 603e microprocessor: an enhanced, low-power, superscalar
microprocessor},
booktitle = {1995 International Conference on Computer Design {(ICCD} '95), {VLSI}
in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings},
pages = {196--203},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICCD.1995.528810},
doi = {10.1109/ICCD.1995.528810},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MontemayorSYWEK95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RothLW95,
author = {Charles P. Roth and
Frank E. Levine and
Edward H. Welbon},
title = {Performance monitoring on the PowerPC 604 microprocessor},
booktitle = {1995 International Conference on Computer Design {(ICCD} '95), {VLSI}
in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings},
pages = {212--215},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ICCD.1995.528812},
doi = {10.1109/ICCD.1995.528812},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RothLW95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PyronB95,
author = {Carol Pyron and
William C. Bruce},
title = {Implementing 1149.1 in the PowerPC\({}^{\mbox{TM}}\) {RISC} Microprocessor
Family},
booktitle = {Proceedings {IEEE} International Test Conference 1995, Driving Down
the Cost of Test, Washington, DC, USA, October 21-25, 1995},
pages = {844--850},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/TEST.1995.529916},
doi = {10.1109/TEST.1995.529916},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/PyronB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/BurgessUOO94,
author = {Brad Burgess and
Nasr Ullah and
Peter Van Overen and
Deene Ogden},
title = {The PowerPC 603 Microprocessor},
journal = {Commun. {ACM}},
volume = {37},
number = {6},
pages = {34--42},
year = {1994},
url = {https://doi.org/10.1145/175208.175212},
doi = {10.1145/175208.175212},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cacm/BurgessUOO94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/SuessmithP94,
author = {Brad W. Suessmith and
George Paap III},
title = {PowerPC 603 Microprocessor Power Management},
journal = {Commun. {ACM}},
volume = {37},
number = {6},
pages = {43--46},
year = {1994},
url = {https://doi.org/10.1145/175208.175213},
doi = {10.1145/175208.175213},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cacm/SuessmithP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/GaryIGDES94,
author = {Sonya Gary and
Pete Ippolito and
Gianfranco Gerosa and
Carl Dietz and
Jim Eno and
Hector Sanchez},
title = {PowerPC 603, {A} Microprocessor for Portable Computers},
journal = {{IEEE} Des. Test Comput.},
volume = {11},
number = {4},
pages = {14--23},
year = {1994},
url = {https://doi.org/10.1109/54.329447},
doi = {10.1109/54.329447},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/GaryIGDES94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/BrodnaxBGP94,
author = {Timothy B. Brodnax and
Richard V. Billings and
Scott C. Glenn and
P. T. Patel},
title = {Implementation of the PowerPC 601 microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {38},
number = {5},
pages = {621--632},
year = {1994},
url = {https://doi.org/10.1147/rd.385.0621},
doi = {10.1147/RD.385.0621},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/BrodnaxBGP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/VadenMMPR94,
author = {Michael T. Vaden and
Lawrence J. Merkel and
Charles R. Moore and
Terence M. Potter and
Robert James Reese},
title = {Design considerations for the PowerPC 601 microprocessor},
journal = {{IBM} J. Res. Dev.},
volume = {38},
number = {5},
pages = {605--620},
year = {1994},
url = {https://doi.org/10.1147/rd.385.0605},
doi = {10.1147/RD.385.0605},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/VadenMMPR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/SongDC94,
author = {S. Peter Song and
Marvin Denman and
Joe Chang},
title = {The PowerPC 604 {RISC} microprocessor},
journal = {{IEEE} Micro},
volume = {14},
number = {5},
pages = {8--17},
year = {1994},
url = {https://doi.org/10.1109/MM.1994.363071},
doi = {10.1109/MM.1994.363071},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/SongDC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigplan/Butt94,
author = {Farooq Butt},
title = {Rapid Development of a Source-Level Debugger for PowerPC Microprocessors},
journal = {{ACM} {SIGPLAN} Notices},
volume = {29},
number = {12},
pages = {73--77},
year = {1994},
url = {https://doi.org/10.1145/193209.193226},
doi = {10.1145/193209.193226},
timestamp = {Tue, 26 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigplan/Butt94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/BurgessAHLMOPS94,
author = {Brad Burgess and
Mike Alexander and
Ying{-}wai Ho and
Suzanne Plummer Litch and
Soummya Mallick and
Deene Ogden and
Sung{-}Ho Park and
Jeff Slaton},
title = {The PowerPC 603 Microprocessor: {A} High Performance, Low Power, Superscalar
{RISC} Microprocessor},
booktitle = {Spring {COMPCON} 94, Digest of Papers, San Francisco, California,
USA, February 28 - March 4, 1994},
pages = {300--306},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/CMPCON.1994.282895},
doi = {10.1109/CMPCON.1994.282895},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/compcon/BurgessAHLMOPS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/Freet94,
author = {Paul Freet},
title = {The {SH} Microprocessor: 16-Bit Fixed Length Instruction Set Provides
Better Power and Die Size},
booktitle = {Spring {COMPCON} 94, Digest of Papers, San Francisco, California,
USA, February 28 - March 4, 1994},
pages = {486--488},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/CMPCON.1994.282879},
doi = {10.1109/CMPCON.1994.282879},
timestamp = {Mon, 29 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/compcon/Freet94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/GaryDEGPS94,
author = {Sonya Gary and
Carl Dietz and
Jim Eno and
Gianfranco Gerosa and
Sung{-}Ho Park and
Hector Sanchez},
title = {The PowerPC 603 Microprocessor: {A} Low-Power Design for Portable
Applications},
booktitle = {Spring {COMPCON} 94, Digest of Papers, San Francisco, California,
USA, February 28 - March 4, 1994},
pages = {307--315},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/CMPCON.1994.282894},
doi = {10.1109/CMPCON.1994.282894},
timestamp = {Mon, 29 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/compcon/GaryDEGPS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/Holle94,
author = {Matt Holle},
title = {The Windows {NT} Operating System on a PowerPC Microprocessor},
booktitle = {Spring {COMPCON} 94, Digest of Papers, San Francisco, California,
USA, February 28 - March 4, 1994},
pages = {332--336},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/CMPCON.1994.282910},
doi = {10.1109/CMPCON.1994.282910},
timestamp = {Mon, 29 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/compcon/Holle94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/PoursepanjOBGDLSP94,
author = {Ali Poursepanj and
Deene Ogden and
Brad Burgess and
Sonya Gary and
Carl Dietz and
David Lee and
S. Surya and
Mike Peters},
title = {The PowerPC 603 Microprocessor: Performance Analysis and Design Trade-offs},
booktitle = {Spring {COMPCON} 94, Digest of Papers, San Francisco, California,
USA, February 28 - March 4, 1994},
pages = {316--323},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/CMPCON.1994.282893},
doi = {10.1109/CMPCON.1994.282893},
timestamp = {Mon, 29 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/compcon/PoursepanjOBGDLSP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/YeungZE94,
author = {Norman Yeung and
Barbara Zivkov and
G{\"{u}}lbin Ezer},
title = {Unified Datapath: An Innovative Approach to the Design of a Low-Cost,
Low-Power, High-Performance Microprocessor},
booktitle = {Spring {COMPCON} 94, Digest of Papers, San Francisco, California,
USA, February 28 - March 4, 1994},
pages = {32--37},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/CMPCON.1994.282948},
doi = {10.1109/CMPCON.1994.282948},
timestamp = {Mon, 29 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/compcon/YeungZE94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GarciaR94,
author = {Michael J. Garcia and
Brian K. Reynolds},
title = {Single Chip {PCI} Bridge and Memory Controller for PowerPC\({}^{\mbox{TM}}\)
Microprocessors},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {409--412},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331938},
doi = {10.1109/ICCD.1994.331938},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GarciaR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RothLB94,
author = {Charles P. Roth and
Ricky Lewelling and
Timothy B. Brodnax},
title = {The PowerPC\({}^{\mbox{TM}}\) 604 Microprocessor Design Methodology},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {404--408},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331937},
doi = {10.1109/ICCD.1994.331937},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RothLB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HunterSEJD94,
author = {Craig Hunter and
Jeff Slaton and
Jim Eno and
Romesh M. Jessani and
Carl Dietz},
title = {The PowerPC 603\({}^{\mbox{TM}}\) Microprocessor: An Array Built-In
Self-Test Mechanism},
booktitle = {Proceedings {IEEE} International Test Conference 1994, {TEST:} The
Next 25 Years, Washington, DC, USA, October 2-6, 1994},
pages = {388--394},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/TEST.1994.527980},
doi = {10.1109/TEST.1994.527980},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HunterSEJD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HunterVL94,
author = {Craig Hunter and
E. Kofi Vida{-}Torku and
Johnny J. LeBlanc},
title = {Balancing Structured and Ad-hoc Design for Test: Testing of the PowerPC
603\({}^{\mbox{TM}}\) Microprocessor},
booktitle = {Proceedings {IEEE} International Test Conference 1994, {TEST:} The
Next 25 Years, Washington, DC, USA, October 2-6, 1994},
pages = {76--83},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/TEST.1994.527938},
doi = {10.1109/TEST.1994.527938},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HunterVL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GlennMRB94,
author = {Scott Glenn and
Gavin Meil and
Ed Rodriguez and
Jeff Brooks},
title = {Functional design verification for the PowerPC 601 microprocessor},
booktitle = {12th {IEEE} {VLSI} Test Symposium (VTS'94), April 25-28, 1994, Cherry
Hill, New Jersey, {USA}},
pages = {334--339},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/VTEST.1994.292292},
doi = {10.1109/VTEST.1994.292292},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GlennMRB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BeckerAMMT93,
author = {Michael C. Becker and
Michael S. Allen and
Charles R. Moore and
John S. Muhich and
David P. Tuttle},
title = {The Power {PC} 601 microprocessor},
journal = {{IEEE} Micro},
volume = {13},
number = {5},
pages = {54--68},
year = {1993},
url = {https://doi.org/10.1109/40.238002},
doi = {10.1109/40.238002},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/BeckerAMMT93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/robotica/Fox90a,
author = {H. L. Fox},
title = {\emph{Interfacing Microprocessors In Hydraulic Systems (Fluid Power
and Control Series/9)}, by Alan Kleman Marcel Dekker, New York, 1989,
v 244 pp., index ({\textdollar}79.75 in {US} and Canada; {\textdollar}95.50
elsewhere)},
journal = {Robotica},
volume = {8},
number = {2},
pages = {169},
year = {1990},
url = {https://doi.org/10.1017/S0263574700007773},
doi = {10.1017/S0263574700007773},
timestamp = {Sun, 28 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/robotica/Fox90a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/NicoudS86,
author = {Jean{-}Daniel Nicoud and
K. Skala},
editor = {Hideo Aiso},
title = {REYSM, {A} High Performance, Low Power Multi-Microprocessor Bus},
booktitle = {Proceedings of the 13th Annual Symposium on Computer Architecture,
Tokyo, Japan, June 1986},
pages = {169--174},
publisher = {{IEEE} Computer Society},
year = {1986},
url = {https://doi.org/10.1145/17356.17375},
doi = {10.1145/17356.17375},
timestamp = {Mon, 12 Jul 2021 17:55:24 +0200},
biburl = {https://dblp.org/rec/conf/isca/NicoudS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/Gallacher85,
author = {Joe Gallacher},
title = {Microprocessors in fluid power engineering: Institute of Mechanical
Engineers Conference Publications, London, {UK} {\textsterling}16
pp 137},
journal = {Microprocess. Microsystems},
volume = {9},
number = {1},
pages = {33--34},
year = {1985},
url = {https://doi.org/10.1016/0141-9331(85)90221-2},
doi = {10.1016/0141-9331(85)90221-2},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/Gallacher85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/SaidD85,
author = {S. M. Said and
Keith R. Dimond},
title = {Powerful trace facility for the {MC68000} microprocessor system},
journal = {Microprocess. Microsystems},
volume = {9},
number = {1},
pages = {3--7},
year = {1985},
url = {https://doi.org/10.1016/0141-9331(85)90208-X},
doi = {10.1016/0141-9331(85)90208-X},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/SaidD85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/Knudsen83,
author = {M. J. Knudsen},
title = {MUSEC, a powerful network of signal microprocessors},
booktitle = {{IEEE} International Conference on Acoustics, Speech, and Signal Processing,
{ICASSP} '83, Boston, Massachusetts, USA, April 14-16, 1983},
pages = {431--434},
publisher = {{IEEE}},
year = {1983},
url = {https://doi.org/10.1109/ICASSP.1983.1172203},
doi = {10.1109/ICASSP.1983.1172203},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icassp/Knudsen83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigsmall/RummerK79,
author = {Dale I. Rummer and
Mladen Kezunovic},
editor = {Fred J. Maryanski},
title = {Microprocessor systems and architectures for applications to the control
and protection of electric power systems},
booktitle = {Proceedings of the Second symposium on Small systems, {SIGSMALL/PC}
1979, Dallas, Texas, USA, October 1-3, 1979},
pages = {1--8},
publisher = {{ACM}},
year = {1979},
url = {https://doi.org/10.1145/1113549.1113550},
doi = {10.1145/1113549.1113550},
timestamp = {Fri, 06 Aug 2021 14:24:14 +0200},
biburl = {https://dblp.org/rec/conf/sigsmall/RummerK79.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/PowersH78,
author = {V. Michael Powers and
Jos{\'{e}} H. Hernandez},
title = {Microsystems Microprogram Assemblers for Bit Slice Microprocessors},
journal = {Computer},
volume = {11},
number = {7},
pages = {108--120},
year = {1978},
url = {https://doi.org/10.1109/C-M.1978.218274},
doi = {10.1109/C-M.1978.218274},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/PowersH78.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/Powers78,
author = {Ian Powers},
title = {{MC6809} microprocessor},
journal = {Microprocess.},
volume = {2},
number = {3},
pages = {162},
year = {1978},
url = {https://doi.org/10.1016/0308-5953(78)90010-7},
doi = {10.1016/0308-5953(78)90010-7},
timestamp = {Thu, 21 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/Powers78.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MulderF76,
author = {Michael C. Mulder and
Patrick P. Fasang},
editor = {Michael J. Flynn and
Oscar N. Garcia and
Daniel P. Siewiorek},
title = {A Microprocessor Oriented Data Acquisition and Control System for
Power System Control},
booktitle = {Proceedings of the 3rd Annual Symposium on Computer Architecture,
Clearwater, FL, USA, January 1976},
pages = {74--78},
publisher = {{ACM}},
year = {1976},
url = {https://doi.org/10.1145/800110.803553},
doi = {10.1145/800110.803553},
timestamp = {Mon, 19 Jul 2021 11:32:48 +0200},
biburl = {https://dblp.org/rec/conf/isca/MulderF76.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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