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@article{DBLP:journals/access/BalasubramanianSRDC24,
author = {Karthikeyan Kalyanasundaram Balasubramanian and
Mirco Di Salvo and
Walter Rocchia and
Sergio Decherchi and
Marco Crepaldi},
title = {Designing {RISC-V} Instruction Set Extensions for Artificial Neural
Networks: An {LLVM} Compiler-Driven Perspective},
journal = {{IEEE} Access},
volume = {12},
pages = {55925--55944},
year = {2024},
url = {https://doi.org/10.1109/ACCESS.2024.3389673},
doi = {10.1109/ACCESS.2024.3389673},
timestamp = {Mon, 29 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/BalasubramanianSRDC24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/LeeKNK24,
author = {Seungmin Lee and
Youngsok Kim and
Dukyun Nam and
Jong Kim},
title = {Gem5-AVX: Extension of the Gem5 Simulator to Support {AVX} Instruction
Sets},
journal = {{IEEE} Access},
volume = {12},
pages = {20767--20778},
year = {2024},
url = {https://doi.org/10.1109/ACCESS.2024.3359296},
doi = {10.1109/ACCESS.2024.3359296},
timestamp = {Sat, 16 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/LeeKNK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cryptography/UzunerK24,
author = {Hakan Uzuner and
Elif Bilge Kavun},
title = {{NLU-V:} {A} Family of Instruction Set Extensions for Efficient Symmetric
Cryptography on {RISC-V}},
journal = {Cryptogr.},
volume = {8},
number = {1},
pages = {9},
year = {2024},
url = {https://doi.org/10.3390/cryptography8010009},
doi = {10.3390/CRYPTOGRAPHY8010009},
timestamp = {Mon, 15 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cryptography/UzunerK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiQYW24,
author = {Lu Li and
Guofeng Qin and
Yang Yu and
Weijia Wang},
title = {Compact Instruction Set Extensions for Kyber},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {43},
number = {3},
pages = {756--760},
year = {2024},
url = {https://doi.org/10.1109/TCAD.2023.3327104},
doi = {10.1109/TCAD.2023.3327104},
timestamp = {Sat, 16 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiQYW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/OppermannDMMJ024,
author = {Julian Oppermann and
Brindusa Mihaela Damian{-}Kosterhon and
Florian Meisel and
Tammo M{\"{u}}rmann and
Eyck Jentzsch and
Andreas Koch},
editor = {Rajiv Gupta and
Nael B. Abu{-}Ghazaleh and
Madan Musuvathi and
Dan Tsafrir},
title = {Longnail: High-Level Synthesis of Portable Custom Instruction Set
Extensions for {RISC-V} Processors from Descriptions in the Open-Source
CoreDSL Language},
booktitle = {Proceedings of the 29th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 3,
{ASPLOS} 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024},
pages = {591--606},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3620666.3651375},
doi = {10.1145/3620666.3651375},
timestamp = {Thu, 25 Apr 2024 09:21:33 +0200},
biburl = {https://dblp.org/rec/conf/asplos/OppermannDMMJ024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Payvar23,
author = {Saman Payvar},
title = {GPU-based Architecture Modeling and Instruction Set Extension for
Signal Processing Applications},
school = {University of Tampere, Finland},
year = {2023},
url = {https://trepo.tuni.fi/handle/10024/144270},
timestamp = {Thu, 02 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/basesearch/Payvar23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/CuiLW23,
author = {Enfang Cui and
Tianzheng Li and
Qian Wei},
title = {{RISC-V} Instruction Set Architecture Extensions: {A} Survey},
journal = {{IEEE} Access},
volume = {11},
pages = {24696--24711},
year = {2023},
url = {https://doi.org/10.1109/ACCESS.2023.3246491},
doi = {10.1109/ACCESS.2023.3246491},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/CuiLW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/OhL23,
author = {Hyun Woo Oh and
Seung Eun Lee},
title = {The Design of Optimized {RISC} Processor for Edge Artificial Intelligence
Based on Custom Instruction Set Extension},
journal = {{IEEE} Access},
volume = {11},
pages = {49409--49421},
year = {2023},
url = {https://doi.org/10.1109/ACCESS.2023.3276411},
doi = {10.1109/ACCESS.2023.3276411},
timestamp = {Fri, 02 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/OhL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cybersec/LiuWWZ23,
author = {Chang Liu and
Yan{-}Jun Wu and
Jing{-}Zheng Wu and
Chen Zhao},
title = {A buffer overflow detection and defense method based on {RISC-V} instruction
set extension},
journal = {Cybersecur.},
volume = {6},
number = {1},
pages = {45},
year = {2023},
url = {https://doi.org/10.1186/s42400-023-00164-x},
doi = {10.1186/S42400-023-00164-X},
timestamp = {Wed, 01 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cybersec/LiuWWZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcst/LiPSJZ23,
author = {Ruoshi Li and
Ping Peng and
Zhiyuan Shao and
Hai Jin and
Ran Zheng},
title = {Evaluating {RISC-V} Vector Instruction Set Architecture Extension
with Computer Vision Workloads},
journal = {J. Comput. Sci. Technol.},
volume = {38},
number = {4},
pages = {807--820},
year = {2023},
url = {https://doi.org/10.1007/s11390-023-1266-6},
doi = {10.1007/S11390-023-1266-6},
timestamp = {Tue, 21 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcst/LiPSJZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tches/ChengGMPP23,
author = {Hao Cheng and
Johann Gro{\ss}sch{\"{a}}dl and
Ben Marshall and
Dan Page and
Thinh Hung Pham},
title = {{RISC-V} Instruction Set Extensions for Lightweight Symmetric Cryptography},
journal = {{IACR} Trans. Cryptogr. Hardw. Embed. Syst.},
volume = {2023},
number = {1},
pages = {193--237},
year = {2023},
url = {https://doi.org/10.46586/tches.v2023.i1.193-237},
doi = {10.46586/TCHES.V2023.I1.193-237},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tches/ChengGMPP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JiangZWL23,
author = {Shijie Jiang and
Yi Zou and
Hao Wang and
Wanwan Li},
title = {An {FFT} Accelerator Using Deeply-coupled {RISC-V} Instruction Set
Extension for Arbitrary Number of Points},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {165--171},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00036},
doi = {10.1109/ASAP57973.2023.00036},
timestamp = {Thu, 19 Oct 2023 20:45:03 +0200},
biburl = {https://dblp.org/rec/conf/asap/JiangZWL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ZhangLLLLYHZ23,
author = {Jiaming Zhang and
Jiahao Lu and
Dongsheng Liu and
Aobo Li and
Xiang Li and
Shuo Yang and
Ang Hu and
Xuecheng Zou},
title = {Flexible and Efficient Implementation of {CRYSTALS-KYBER} {SIMD} {RISC-V}
Coprocessor Based on Customized Vector Instruction-Set Extension},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2023, Haikou,
China, November 5-8, 2023},
pages = {1--3},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/A-SSCC58667.2023.10347942},
doi = {10.1109/A-SSCC58667.2023.10347942},
timestamp = {Sat, 27 Jan 2024 20:22:56 +0100},
biburl = {https://dblp.org/rec/conf/asscc/ZhangLLLLYHZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CuiB23,
author = {Songqiao Cui and
Josep Balasch},
title = {Efficient Software Masking of {AES} through Instruction Set Extensions},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.23919/DATE56975.2023.10137150},
doi = {10.23919/DATE56975.2023.10137150},
timestamp = {Wed, 07 Jun 2023 22:08:03 +0200},
biburl = {https://dblp.org/rec/conf/date/CuiB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BrohetVR23,
author = {Marco Brohet and
Felipe Valencia and
Francesco Regazzoni},
title = {Invited Paper: Instruction Set Extensions for Post-Quantum Cryptography},
booktitle = {{IEEE/ACM} International Conference on Computer Aided Design, {ICCAD}
2023, San Francisco, CA, USA, October 28 - Nov. 2, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ICCAD57390.2023.10323931},
doi = {10.1109/ICCAD57390.2023.10323931},
timestamp = {Wed, 03 Jan 2024 08:34:26 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BrohetVR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/DoblasLACFBMM23,
author = {Max Doblas and
Oscar Lostes{-}Cazorla and
Quim Aguado{-}Puig and
Nick Cebry and
Pau Fontova{-}Must{\'{e}} and
Christopher Frances Batten and
Santiago Marco{-}Sola and
Miquel Moret{\'{o}}},
title = {{GMX:} Instruction Set Extensions for Fast, Scalable, and Efficient
Genome Sequence Alignment},
booktitle = {Proceedings of the 56th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2023, Toronto, ON, Canada, 28 October
2023 - 1 November 2023},
pages = {1466--1480},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3613424.3614306},
doi = {10.1145/3613424.3614306},
timestamp = {Sun, 31 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/DoblasLACFBMM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/LozachmeurT23,
author = {Fabrice Lozachmeur and
Arnaud Tisserand},
title = {A {RISC-V} Instruction Set Extension for Flexible Hardware/Software
Protection of Cryptosystems Masked at High Orders},
booktitle = {66th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2023, Tempe, AZ, USA, August 6-9, 2023},
pages = {360--364},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MWSCAS57524.2023.10405991},
doi = {10.1109/MWSCAS57524.2023.10405991},
timestamp = {Sat, 24 Feb 2024 20:42:53 +0100},
biburl = {https://dblp.org/rec/conf/mwscas/LozachmeurT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/GesperSWV23,
author = {Sven Gesper and
Fabian Stuckmann and
Lucy W{\"{o}}bbekind and
Guillermo Pay{\'{a}} Vay{\'{a}}},
editor = {Cristina Silvano and
Christian Pilato and
Marc Reichenbach},
title = {{PATARA:} Extension of a Verification Framework for {RISC-V} Instruction
Set Implementations},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation
- 23rd International Conference, {SAMOS} 2023, Samos, Greece, July
2-6, 2023, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {14385},
pages = {225--240},
publisher = {Springer},
year = {2023},
url = {https://doi.org/10.1007/978-3-031-46077-7\_15},
doi = {10.1007/978-3-031-46077-7\_15},
timestamp = {Sun, 10 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/samos/GesperSWV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/GewehrM23,
author = {Carlos Gabriel de Araujo Gewehr and
Fernando Gehm Moraes},
title = {Improving the Efficiency of Cryptography Algorithms on Resource-Constrained
Embedded Systems via {RISC-V} Instruction Set Extensions},
booktitle = {36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems
Design, {SBCCI} 2023, Rio de Janeiro, Brazil, August 28 - Sept. 1,
2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/SBCCI60457.2023.10261964},
doi = {10.1109/SBCCI60457.2023.10261964},
timestamp = {Wed, 11 Oct 2023 10:11:30 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/GewehrM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/dnb/Fritzmann22,
author = {Tim Fritzmann},
title = {Towards Secure Coprocessors and Instruction Set Extensions for Acceleration
of Post-Quantum Cryptography},
school = {Technical University of Munich, Germany},
year = {2022},
url = {https://nbn-resolving.org/urn:nbn:de:bvb:91-diss-20221222-1650057-1-3},
urn = {urn:nbn:de:bvb:91-diss-20221222-1650057-1-3},
timestamp = {Thu, 20 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/dnb/Fritzmann22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/MousavikiaGMY22,
author = {Seyed Kian Mousavikia and
Erfan Gholizadehazari and
Morteza Mousazadeh and
Siddika Berna {\"{O}}rs Yal{\c{c}}in},
title = {Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness
Detection},
journal = {{IEEE} Access},
volume = {10},
pages = {58151--58162},
year = {2022},
url = {https://doi.org/10.1109/ACCESS.2022.3177743},
doi = {10.1109/ACCESS.2022.3177743},
timestamp = {Mon, 13 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/MousavikiaGMY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/scn/YoussefADBM22,
author = {Wajih El Hadj Youssef and
Ali Abdelli and
Fethi Dridi and
Rim Brahim and
Mohsen Machhout},
title = {An Efficient Lightweight Cryptographic Instructions Set Extension
for IoT Device Security},
journal = {Secur. Commun. Networks},
volume = {2022},
pages = {9709601:1--9709601:17},
year = {2022},
url = {https://doi.org/10.1155/2022/9709601},
doi = {10.1155/2022/9709601},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/scn/YoussefADBM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/ParkKKK22,
author = {Seonghwan Park and
Dongwook Kang and
Jeonghwan Kang and
Donghyun Kwon},
title = {Bratter: An Instruction Set Extension for Forward Control-Flow Integrity
in {RISC-V}},
journal = {Sensors},
volume = {22},
number = {4},
pages = {1392},
year = {2022},
url = {https://doi.org/10.3390/s22041392},
doi = {10.3390/S22041392},
timestamp = {Fri, 01 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sensors/ParkKKK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tches/FritzmannBRKSVS22,
author = {Tim Fritzmann and
Michiel Van Beirendonck and
Debapriya Basu Roy and
Patrick Karl and
Thomas Schamberger and
Ingrid Verbauwhede and
Georg Sigl},
title = {Masked Accelerators and Instruction Set Extensions for Post-Quantum
Cryptography},
journal = {{IACR} Trans. Cryptogr. Hardw. Embed. Syst.},
volume = {2022},
number = {1},
pages = {414--460},
year = {2022},
url = {https://doi.org/10.46586/tches.v2022.i1.414-460},
doi = {10.46586/TCHES.V2022.I1.414-460},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tches/FritzmannBRKSVS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ACISicis/GaoZC22,
author = {Zhanyuan Gao and
Laiping Zhao and
Haonan Chen},
editor = {Zheng{-}an Yao and
Simon Xu and
Jixin Ma and
Wencai Du and
Wei Lu},
title = {A Trigonometric Function Instruction Set Extension Method Based on
{RISC-V}},
booktitle = {22nd {IEEE/ACIS} International Conference on Computer and Information
Science, {ICIS} 2022, Zhuhai, China, June 26-28, 2022},
pages = {119--126},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICIS54925.2022.9882453},
doi = {10.1109/ICIS54925.2022.9882453},
timestamp = {Wed, 09 Nov 2022 21:30:35 +0100},
biburl = {https://dblp.org/rec/conf/ACISicis/GaoZC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/FunckHD22,
author = {Milan Funck and
Vladimir Herdt and
Rolf Drechsler},
title = {Virtual Prototype driven Design, Implementation and Evaluation of
{RISC-V} Instruction Set Extensions},
booktitle = {25th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2022, Prague, Czech Republic, April
6-8, 2022},
pages = {14--19},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DDECS54261.2022.9770108},
doi = {10.1109/DDECS54261.2022.9770108},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/FunckHD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/ChengGMPP22,
author = {Hao Cheng and
Johann Gro{\ss}sch{\"{a}}dl and
Ben Marshall and
Dan Page and
Thinh Hung Pham},
title = {{RISC-V} Instruction Set Extensions for Lightweight Symmetric Cryptography},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {1697},
year = {2022},
url = {https://eprint.iacr.org/2022/1697},
timestamp = {Thu, 05 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iacr/ChengGMPP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/Guo22a,
author = {Weiji Guo},
title = {Efficient Constant-Time Implementation of {SM4} with Intel {GFNI}
instruction set extension and Arm {NEON} coprocessor},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {1154},
year = {2022},
url = {https://eprint.iacr.org/2022/1154},
timestamp = {Tue, 27 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/Guo22a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/NannipieriMZASF21,
author = {Pietro Nannipieri and
Stefano Di Matteo and
Luca Zulberti and
Francesco Albicocchi and
Sergio Saponara and
Luca Fanucci},
title = {A {RISC-V} Post Quantum Cryptography Instruction Set Extension for
Number Theoretic Transform to Speed-Up {CRYSTALS} Algorithms},
journal = {{IEEE} Access},
volume = {9},
pages = {150798--150808},
year = {2021},
url = {https://doi.org/10.1109/ACCESS.2021.3126208},
doi = {10.1109/ACCESS.2021.3126208},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/NannipieriMZASF21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijsi/LouWGZ21,
author = {Wenqi Lou and
Chao Wang and
Lei Gong and
Xuehai Zhou},
title = {Neural Network Instruction Set Extension and Code Mapping Mechanism},
journal = {Int. J. Softw. Informatics},
volume = {11},
number = {2},
pages = {243--258},
year = {2021},
url = {https://doi.org/10.21655/ijsi.1673-7288.00251},
doi = {10.21655/IJSI.1673-7288.00251},
timestamp = {Mon, 14 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijsi/LouWGZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tches/GaoGMPPR21,
author = {Si Gao and
Johann Gro{\ss}sch{\"{a}}dl and
Ben Marshall and
Dan Page and
Thinh Hung Pham and
Francesco Regazzoni},
title = {An Instruction Set Extension to Support Software-Based Masking},
journal = {{IACR} Trans. Cryptogr. Hardw. Embed. Syst.},
volume = {2021},
number = {4},
pages = {283--325},
year = {2021},
url = {https://doi.org/10.46586/tches.v2021.i4.283-325},
doi = {10.46586/TCHES.V2021.I4.283-325},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tches/GaoGMPPR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tches/MarshallNPSW21,
author = {Ben Marshall and
G. Richard Newell and
Dan Page and
Markku{-}Juhani O. Saarinen and
Claire Wolf},
title = {The design of scalar {AES} Instruction Set Extensions for {RISC-V}},
journal = {{IACR} Trans. Cryptogr. Hardw. Embed. Syst.},
volume = {2021},
number = {1},
pages = {109--136},
year = {2021},
url = {https://doi.org/10.46586/tches.v2021.i1.109-136},
doi = {10.46586/TCHES.V2021.I1.109-136},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tches/MarshallNPSW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2103-08910,
author = {Bobby Sleeba and
Mikael Collin and
Mats Brorsson},
title = {An {ASIC} Implementation and Evaluation of a Profiled Low-Energy Instruction
Set Architecture Extension},
journal = {CoRR},
volume = {abs/2103.08910},
year = {2021},
url = {https://arxiv.org/abs/2103.08910},
eprinttype = {arXiv},
eprint = {2103.08910},
timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2103-08910.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/FritzmannBRKSVS21,
author = {Tim Fritzmann and
Michiel Van Beirendonck and
Debapriya Basu Roy and
Patrick Karl and
Thomas Schamberger and
Ingrid Verbauwhede and
Georg Sigl},
title = {Masked Accelerators and Instruction Set Extensions for Post-Quantum
Cryptography},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {479},
year = {2021},
url = {https://eprint.iacr.org/2021/479},
timestamp = {Thu, 22 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/FritzmannBRKSVS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/MarcinekP20,
author = {Krzysztof Marcinek and
Witold A. Pleskacz},
title = {{GNSS-ISE:} Instruction Set Extension for {GNSS} Baseband Processing},
journal = {Sensors},
volume = {20},
number = {2},
pages = {465},
year = {2020},
url = {https://doi.org/10.3390/s20020465},
doi = {10.3390/S20020465},
timestamp = {Sat, 30 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sensors/MarcinekP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bdet/ZhouJX20,
author = {Yuzhi Zhou and
Xi Jin and
Tian Xiang},
title = {{RISC-V} Graphics Rendering Instruction Set Extensions for Embedded
{AI} Chips Implementation},
booktitle = {{BDET} 2020: 2nd International Conference on Big Data Engineering
and Technology, Singapore, January 3-5, 2020},
pages = {85--88},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3378904.3378926},
doi = {10.1145/3378904.3378926},
timestamp = {Wed, 07 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/bdet/ZhouJX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/EisenkraemerMOC20,
author = {Gabriel H. Eisenkraemer and
Fernando Gehm Moraes and
Leonardo L. de Oliveira and
Everton Carara},
title = {Lightweight Cryptographic Instruction Set Extension on Xtensa Processor},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180579},
doi = {10.1109/ISCAS45731.2020.9180579},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/EisenkraemerMOC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/GrossschadlMPPR20,
author = {Johann Gro{\ss}sch{\"{a}}dl and
Ben Marshall and
Dan Page and
Thinh Hung Pham and
Francesco Regazzoni},
title = {An Instruction Set Extension to Support Software-Based Masking},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {773},
year = {2020},
url = {https://eprint.iacr.org/2020/773},
timestamp = {Tue, 30 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/GrossschadlMPPR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/MarshallNPSW20,
author = {Ben Marshall and
G. Richard Newell and
Dan Page and
Markku{-}Juhani O. Saarinen and
Claire Wolf},
title = {The design of scalar {AES} Instruction Set Extensions for {RISC-V}},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {930},
year = {2020},
url = {https://eprint.iacr.org/2020/930},
timestamp = {Wed, 02 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/MarshallNPSW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ewdts/VariciSIYGAIAU19,
author = {Abdullah Varici and
Gurol Saglam and
Seckin Ipek and
Abdullah Yildiz and
Sezer G{\"{o}}ren and
Aydin Aysu and
Deniz Iskender and
T. Baris Aktemur and
H. Fatih Ugurdag},
title = {Fast and Efficient Implementation of Lightweight Crypto Algorithm
{PRESENT} on {FPGA} through Processor Instruction Set Extension},
booktitle = {2019 {IEEE} East-West Design {\&} Test Symposium, {EWDTS} 2019,
Batumi, Georgia, September 13-16, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/EWDTS.2019.8884397},
doi = {10.1109/EWDTS.2019.8884397},
timestamp = {Tue, 16 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ewdts/VariciSIYGAIAU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icccnt/GaneshS19,
author = {V. Ganesh and
B. V. H. Sandilya},
title = {Implementation of {SIMD} Instruction Set Extension for {BLAKE2}},
booktitle = {10th International Conference on Computing, Communication and Networking
Technologies, {ICCCNT} 2019, Kanpur, India, July 6-8, 2019},
pages = {1--7},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ICCCNT45670.2019.8944835},
doi = {10.1109/ICCCNT45670.2019.8944835},
timestamp = {Sun, 22 Mar 2020 17:01:59 +0100},
biburl = {https://dblp.org/rec/conf/icccnt/GaneshS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/RaveendranJMVS19,
author = {Aneesh Raveendran and
Sandra Jean and
J. Mervin and
Vivian Desalphine and
A. David Selvakumar},
editor = {Anirban Sengupta and
Sudeb Dasgupta and
Virendra Singh and
Rohit Sharma and
Santosh Kumar Vishvakarma},
title = {{RISC-V} Half Precision Floating Point Instruction Set Extensions
and Co-processor},
booktitle = {{VLSI} Design and Test - 23rd International Symposium, {VDAT} 2019,
Indore, India, July 4-6, 2019, Revised Selected Papers},
series = {Communications in Computer and Information Science},
volume = {1066},
pages = {482--495},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-981-32-9767-8\_40},
doi = {10.1007/978-981-32-9767-8\_40},
timestamp = {Fri, 19 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vdat/RaveendranJMVS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1909-02871,
author = {Stephan M. G{\"{u}}nther and
Nicolas Appel and
Georg Carle},
title = {Galois Field Arithmetics for Linear Network Coding using {AVX512}
Instruction Set Extensions},
journal = {CoRR},
volume = {abs/1909.02871},
year = {2019},
url = {http://arxiv.org/abs/1909.02871},
eprinttype = {arXiv},
eprint = {1909.02871},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1909-02871.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/PatsidisKND18,
author = {Karyofyllis Patsidis and
Dimitris Konstantinou and
Chrysostomos Nicopoulos and
Giorgos Dimitrakopoulos},
title = {A low-cost synthesizable {RISC-V} dual-issue processor core leveraging
the compressed Instruction Set Extension},
journal = {Microprocess. Microsystems},
volume = {61},
pages = {1--10},
year = {2018},
url = {https://doi.org/10.1016/j.micpro.2018.05.007},
doi = {10.1016/J.MICPRO.2018.05.007},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/PatsidisKND18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RawatS17,
author = {Hemendra K. Rawat and
Patrick Schaumont},
title = {Vector Instruction Set Extensions for Efficient Computation of Keccak},
journal = {{IEEE} Trans. Computers},
volume = {66},
number = {10},
pages = {1778--1789},
year = {2017},
url = {https://doi.org/10.1109/TC.2017.2700795},
doi = {10.1109/TC.2017.2700795},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/RawatS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/PangHZHZ17,
author = {Yalong Pang and
Jun Han and
Jianmin Zeng and
Yujie Huang and
Xiaoyang Zeng},
title = {Instruction set extension and hardware acceleration for {SVM} application
toward a vector processor},
booktitle = {International SoC Design Conference, {ISOCC} 2017, Seoul, South Korea,
November 5-8, 2017},
pages = {42--43},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISOCC.2017.8368818},
doi = {10.1109/ISOCC.2017.8368818},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isocc/PangHZHZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EissaESAF16,
author = {Ahmed S. Eissa and
Mahmoud A. Elmohr and
Mostafa A. Saleh and
Khaled E. Ahmed and
Mohammed M. Farag},
title = {{SHA-3} Instruction Set Extension for {A} 32-bit {RISC} processor
architecture},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {233--234},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760804},
doi = {10.1109/ASAP.2016.7760804},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EissaESAF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RegazzoniI16,
author = {Francesco Regazzoni and
Paolo Ienne},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {Instruction Set Extensions for secure applications},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {1529--1534},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459556/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RegazzoniI16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RawatS16,
author = {Hemendra K. Rawat and
Patrick Schaumont},
title = {{SIMD} Instruction Set Extensions for Keccak with Applications to
SHA-3, Keyak and Ketje},
booktitle = {Proceedings of the Hardware and Architectural Support for Security
and Privacy 2016, HASP@ICSA 2016, Seoul, Republic of Korea, June 18,
2016},
pages = {4:1--4:8},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2948618.2948622},
doi = {10.1145/2948618.2948622},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/RawatS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/SaabRH16,
author = {Sami Saab and
Pankaj Rohatgi and
Craig Hampel},
title = {Side-Channel Protections for Cryptographic Instruction Set Extensions},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {700},
year = {2016},
url = {http://eprint.iacr.org/2016/700},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/SaabRH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AhmedH15,
author = {Tanvir Ahmed and
Yuko Hara{-}Azumi},
title = {Timing speculation-aware instruction set extension for resource-constrained
embedded systems},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {30--34},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245701},
doi = {10.1109/ASAP.2015.7245701},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AhmedH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dasip/WangXLCY15,
author = {Shanshan Wang and
Chenglong Xiao and
Wanjun Liu and
Emmanuel Casseau and
Xiao Yang},
title = {Selecting most profitable instruction-set extensions using ant colony
heuristic},
booktitle = {2015 Conference on Design and Architectures for Signal and Image Processing,
{DASIP} 2015, Krakow, Poland, September 23-25, 2015},
pages = {1--7},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/DASIP.2015.7367250},
doi = {10.1109/DASIP.2015.7367250},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/dasip/WangXLCY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GautschiTPBSFBA15,
author = {Michael Gautschi and
Andreas Traber and
Antonio Pullini and
Luca Benini and
Michele Scandale and
Alessandro Di Federico and
Michele Beretta and
Giovanni Agosta},
title = {Tailoring instruction-set extensions for an ultra-low power tightly-coupled
cluster of OpenRISC cores},
booktitle = {2015 {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015},
pages = {25--30},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/VLSI-SoC.2015.7314386},
doi = {10.1109/VLSI-SOC.2015.7314386},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/GautschiTPBSFBA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/KluterBBCI14,
author = {Theo Kluter and
Samuel Burri and
Philip Brisk and
Edoardo Charbon and
Paolo Ienne},
title = {Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with
Architecturally Visible Storage},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {11},
number = {2},
pages = {15:1--15:26},
year = {2014},
url = {https://doi.org/10.1145/2576877},
doi = {10.1145/2576877},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/KluterBBCI14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tjs/AzarpeyvandSF14,
author = {Ali Azarpeyvand and
Mostafa E. Salehi and
Sied Mehdi Fakhraie},
title = {An analytical method for reliability aware instruction set extension},
journal = {J. Supercomput.},
volume = {67},
number = {1},
pages = {104--130},
year = {2014},
url = {https://doi.org/10.1007/s11227-013-0990-z},
doi = {10.1007/S11227-013-0990-Z},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tjs/AzarpeyvandSF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KluterBCI14,
author = {Theo Kluter and
Philip Brisk and
Edoardo Charbon and
Paolo Ienne},
title = {Way Stealing: {A} Unified Data Cache and Architecturally Visible Storage
for Instruction Set Extensions},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {22},
number = {1},
pages = {62--75},
year = {2014},
url = {https://doi.org/10.1109/TVLSI.2012.2236689},
doi = {10.1109/TVLSI.2012.2236689},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/KluterBCI14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccst/YoussefYMTT14,
author = {Noura Ben Hadjy Youssef and
Wajih El Hadj Youssef and
Mohsen Machhout and
Rached Tourki and
Kholdoun Torki},
title = {Instruction set extensions of {AES} algorithms for 32-bit processors},
booktitle = {International Carnahan Conference on Security Technology, {ICCST}
2014, Rome, Italy, October 13-16, 2014},
pages = {1--5},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/CCST.2014.6986988},
doi = {10.1109/CCST.2014.6986988},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccst/YoussefYMTT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/issoc/ArnoldNF14,
author = {Oliver Arnold and
Felix Neumaerker and
Gerhard P. Fettweis},
editor = {Jari Nurmi and
Peeter Ellervee and
Dragomir Milojevic and
Ondrej Daniel and
Tommi Paakki},
title = {L2{\_}ISA++: Instruction set architecture extensions for 4G and LTE-advanced
MPSoCs},
booktitle = {2014 International Symposium on System-on-Chip, SoC 2014, Tampere,
Finland, October 28-29, 2014},
pages = {1--8},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSOC.2014.6972439},
doi = {10.1109/ISSOC.2014.6972439},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/issoc/ArnoldNF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/MentzerVBER14,
author = {Nico Mentzer and
Guillermo Pay{\'{a}} Vay{\'{a}} and
Holger Blume and
Nora von Egloffstein and
Werner Ritter},
title = {Instruction-set extension for an ASIP-based {SIFT} feature extraction},
booktitle = {XIVth International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos,
Greece, July 14-17, 2014},
pages = {335--342},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SAMOS.2014.6893230},
doi = {10.1109/SAMOS.2014.6893230},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/MentzerVBER14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vldb/ArnoldHFSKKL14,
author = {Oliver Arnold and
Sebastian Haas and
Gerhard P. Fettweis and
Benjamin Schlegel and
Thomas Kissinger and
Tomas Karnagel and
Wolfgang Lehner},
editor = {Rajesh Bordawekar and
Tirthankar Lahiri and
Bugra Gedik and
Christian A. Lang},
title = {{HASHI:} An Application Specific Instruction Set Extension for Hashing},
booktitle = {International Workshop on Accelerating Data Management Systems Using
Modern Processor and Storage Architectures - {ADMS} 2014, Hangzhou,
China, September 1, 2014},
pages = {25--33},
year = {2014},
url = {http://www.adms-conf.org/2014/adms14\_arnold.pdf},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vldb/ArnoldHFSKKL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcp/XiaQYW13,
author = {Bingbing Xia and
Fei Qiao and
Huazhong Yang and
Hui Wang},
title = {Design Methodology of the Heterogeneous Multi-core Processor With
the Combination of Parallelized Multi-core Simulator and Common Register
File-Based Instruction Set Extension Architecture},
journal = {J. Comput.},
volume = {8},
number = {2},
pages = {356--364},
year = {2013},
url = {http://www.jcomputers.us/index.php?m=content\&c=index\&a=show\&catid=52\&id=602},
doi = {10.4304/JCP.8.2.356-364},
timestamp = {Thu, 25 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcp/XiaQYW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/SenthilvelanSISG13,
author = {Murugappan Senthilvelan and
Mihai Sima and
Daniel Iancu and
Michael J. Schulte and
John Glossner},
title = {Instruction Set Extensions for Matrix Decompositions on Software Defined
Radio Architectures},
journal = {J. Signal Process. Syst.},
volume = {70},
number = {3},
pages = {289--303},
year = {2013},
url = {https://doi.org/10.1007/s11265-012-0665-7},
doi = {10.1007/S11265-012-0665-7},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/SenthilvelanSISG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arith/EngelsKPYM13,
author = {Susanne Engels and
Elif Bilge Kavun and
Christof Paar and
Tolga Yal{\c{c}}in and
Hristina Mihajloska},
editor = {Alberto Nannarelli and
Peter{-}Michael Seidel and
Ping Tak Peter Tang},
title = {A Non-Linear/Linear Instruction Set Extension for Lightweight Ciphers},
booktitle = {21st {IEEE} Symposium on Computer Arithmetic, {ARITH} 2013, Austin,
TX, USA, April 7-10, 2013},
pages = {67--75},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ARITH.2013.36},
doi = {10.1109/ARITH.2013.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/arith/EngelsKPYM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/TarangoKB13,
author = {Joseph Tarango and
Eamonn J. Keogh and
Philip Brisk},
title = {Instruction set extensions for Dynamic Time Warping},
booktitle = {Proceedings of the International Conference on Hardware/Software Codesign
and System Synthesis, {CODES+ISSS} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {18:1--18:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CODES-ISSS.2013.6659005},
doi = {10.1109/CODES-ISSS.2013.6659005},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/TarangoKB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Hara-AzumiFKT13,
author = {Yuko Hara{-}Azumi and
Farshad Firouzi and
Saman Kiamehr and
Mehdi Baradaran Tahoori},
editor = {Enrico Macii},
title = {Instruction-set extension under process variation and aging effects},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {182--187},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.051},
doi = {10.7873/DATE.2013.051},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/Hara-AzumiFKT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KochBL13,
author = {Dirk Koch and
Christian Beckhoff and
Guy G. F. Lemieux},
title = {An efficient {FPGA} overlay for portable custom instruction set extensions},
booktitle = {23rd International Conference on Field programmable Logic and Applications,
{FPL} 2013, Porto, Portugal, September 2-4, 2013},
pages = {1--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPL.2013.6645517},
doi = {10.1109/FPL.2013.6645517},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KochBL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpec/KeltcherWH13,
author = {Paul Keltcher and
David Whelihan and
Jeffrey J. Hughes},
title = {Instruction set extensions for photonic synchronous coalesced accesses},
booktitle = {{IEEE} High Performance Extreme Computing Conference, {HPEC} 2013,
Waltham, MA, USA, September 10-12, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/HPEC.2013.6670326},
doi = {10.1109/HPEC.2013.6670326},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/hpec/KeltcherWH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ica3pp/NeryNFJC13,
author = {Alexandre Solon Nery and
Nadia Nedjah and
Felipe M. G. Fran{\c{c}}a and
Lech J{\'{o}}zwiak and
Henk Corporaal},
editor = {Joanna Kolodziej and
Beniamino Di Martino and
Domenico Talia and
Kaiqi Xiong},
title = {A Reconfigurable Ray-Tracing Multi-Processor SoC with Hardware Replication-Aware
Instruction Set Extension},
booktitle = {Algorithms and Architectures for Parallel Processing - 13th International
Conference, {ICA3PP} 2013, Vietri sul Mare, Italy, December 18-20,
2013, Proceedings, Part {I}},
series = {Lecture Notes in Computer Science},
volume = {8285},
pages = {346--356},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-319-03859-9\_30},
doi = {10.1007/978-3-319-03859-9\_30},
timestamp = {Mon, 05 Feb 2024 20:31:37 +0100},
biburl = {https://dblp.org/rec/conf/ica3pp/NeryNFJC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijrc/GradP12,
author = {Mariusz Grad and
Christian Plessl},
title = {On the Feasibility and Limitations of Just-in-Time Instruction Set
Extension for FPGA-Based Reconfigurable Processors},
journal = {Int. J. Reconfigurable Comput.},
volume = {2012},
pages = {418315:1--418315:21},
year = {2012},
url = {https://doi.org/10.1155/2012/418315},
doi = {10.1155/2012/418315},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijrc/GradP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jce/GrabherGHJPTW12,
author = {Philipp Grabher and
Johann Gro{\ss}sch{\"{a}}dl and
Simon Hoerder and
Kimmo J{\"{a}}rvinen and
Daniel Page and
Stefan Tillich and
Marcin W{\'{o}}jcik},
title = {An exploration of mechanisms for dynamic cryptographic instruction
set extension},
journal = {J. Cryptogr. Eng.},
volume = {2},
number = {1},
pages = {1--18},
year = {2012},
url = {https://doi.org/10.1007/s13389-011-0025-8},
doi = {10.1007/S13389-011-0025-8},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jce/GrabherGHJPTW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/FaviKMC12,
author = {Claudio Favi and
Theo Kluter and
Christian Mester and
Edoardo Charbon},
title = {Optically-Clocked Instruction Set Extensions for High Efficiency Embedded
Processors},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {59-I},
number = {3},
pages = {604--615},
year = {2012},
url = {https://doi.org/10.1109/TCSI.2011.2169730},
doi = {10.1109/TCSI.2011.2169730},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/FaviKMC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/0004F12,
author = {Hai Lin and
Yunsi Fei},
title = {Resource Sharing of Pipelined Custom Hardware Extension for Energy-Efficient
Application-Specific Instruction Set Processor Design},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {17},
number = {4},
pages = {39:1--39:20},
year = {2012},
url = {https://doi.org/10.1145/2348839.2348843},
doi = {10.1145/2348839.2348843},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/0004F12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ConstantinBG12,
author = {Jeremy Constantin and
Andreas Burg and
Frank K. G{\"{u}}rkaynak},
title = {Instruction Set Extensions for Cryptographic Hash Functions on a Microcontroller
Architecture},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {117--124},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.13},
doi = {10.1109/ASAP.2012.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ConstantinBG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/MurrayF12,
author = {Alastair Colin Murray and
Bj{\"{o}}rn Franke},
editor = {Carol Eidt and
Anne M. Holler and
Uma Srinivasan and
Saman P. Amarasinghe},
title = {Compiling for automatically generated instruction set extensions},
booktitle = {10th Annual {IEEE/ACM} International Symposium on Code Generation
and Optimization, {CGO} 2012, San Jose, CA, USA, March 31 - April
04, 2012},
pages = {13--22},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2259016.2259019},
doi = {10.1145/2259016.2259019},
timestamp = {Wed, 20 Sep 2023 07:55:33 +0200},
biburl = {https://dblp.org/rec/conf/cgo/MurrayF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ArnoldNF12,
author = {Oliver Arnold and
Benedikt Noethen and
Gerhard P. Fettweis},
title = {Instruction Set Architecture Extensions for a Dynamic Task Scheduling
Unit},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2012, Amherst,
MA, USA, August 19-21, 2012},
pages = {249--254},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISVLSI.2012.51},
doi = {10.1109/ISVLSI.2012.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ArnoldNF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rfidsec/GrossP12,
author = {Hannes Gro{\ss} and
Thomas Plos},
editor = {Jaap{-}Henk Hoepman and
Ingrid Verbauwhede},
title = {On Using Instruction-Set Extensions for Minimizing the Hardware-Implementation
Costs of Symmetric-Key Algorithms on a Low-Resource Microcontroller},
booktitle = {Radio Frequency Identification. Security and Privacy Issues - 8th
International Workshop, RFIDSec 2012, Nijmegen, The Netherlands, July
2-3, 2012, Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {7739},
pages = {149--164},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-36140-1\_11},
doi = {10.1007/978-3-642-36140-1\_11},
timestamp = {Tue, 14 May 2019 10:00:38 +0200},
biburl = {https://dblp.org/rec/conf/rfidsec/GrossP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/ConstantinBG12,
author = {Jeremy Constantin and
Andreas Burg and
Frank K. G{\"{u}}rkaynak},
title = {Investigating the Potential of Custom Instruction Set Extensions for
{SHA-3} Candidates on a 16-bit Microcontroller Architecture},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {50},
year = {2012},
url = {http://eprint.iacr.org/2012/050},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/ConstantinBG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Chen11e,
author = {Zhimin Chen},
title = {SCA-Resistant and High-Performance Embedded Cryptography Using Instruction
Set Extensions and Multi-Core Processors},
school = {Virginia Tech, Blacksburg, VA, {USA}},
year = {2011},
url = {https://hdl.handle.net/10919/51256},
timestamp = {Thu, 05 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/basesearch/Chen11e.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Bennett11,
author = {Richard Vincent Bennett},
title = {Increasing the efficacy of automated instruction set extension},
school = {University of Edinburgh, {UK}},
year = {2011},
url = {https://hdl.handle.net/1842/5789},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/Bennett11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/WuCS11,
author = {I{-}Wei Wu and
Chung{-}Ping Chung and
Jean Jyh{-}Jiun Shann},
title = {Area-Efficient Instruction Set Extension Exploration with Hardware
Design Space Exploration},
journal = {J. Inf. Sci. Eng.},
volume = {27},
number = {5},
pages = {1641--1657},
year = {2011},
url = {http://www.iis.sinica.edu.tw/page/jise/2011/201109\_08.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/WuCS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/GaluzziB11,
author = {Carlo Galuzzi and
Koen Bertels},
title = {The Instruction-Set Extension Problem: {A} Survey},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {4},
number = {2},
pages = {18:1--18:28},
year = {2011},
url = {https://doi.org/10.1145/1968502.1968509},
doi = {10.1145/1968502.1968509},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/GaluzziB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BanzDCB11,
author = {Christian Banz and
Carsten Dolar and
Fabian Cholewa and
Holger Blume},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Instruction set extension for high throughput disparity estimation
in stereo image processing},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {169--175},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043265},
doi = {10.1109/ASAP.2011.6043265},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BanzDCB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/GrabherGHJPTW11,
author = {Philipp Grabher and
Johann Gro{\ss}sch{\"{a}}dl and
Simon Hoerder and
Kimmo J{\"{a}}rvinen and
Dan Page and
Stefan Tillich and
Marcin W{\'{o}}jcik},
editor = {Bart Preneel and
Tsuyoshi Takagi},
title = {An Exploration of Mechanisms for Dynamic Cryptographic Instruction
Set Extension},
booktitle = {Cryptographic Hardware and Embedded Systems - {CHES} 2011 - 13th International
Workshop, Nara, Japan, September 28 - October 1, 2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6917},
pages = {1--16},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-23951-9\_1},
doi = {10.1007/978-3-642-23951-9\_1},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ches/GrabherGHJPTW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AhmedSBH11,
author = {Waheed Ahmed and
Muhammad Shafique and
Lars Bauer and
J{\"{o}}rg Henkel},
title = {mRTS: Run-time system for reconfigurable processors with multi-grained
instruction-set extensions},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {1554--1559},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763246},
doi = {10.1109/DATE.2011.5763246},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/AhmedSBH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/GradP11,
author = {Mariusz Grad and
Christian Plessl},
title = {Just-in-Time Instruction Set Extension - Feasibility and Limitations
for an FPGA-Based Reconfigurable {ASIP} Architecture},
booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings},
pages = {278--285},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IPDPS.2011.153},
doi = {10.1109/IPDPS.2011.153},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/GradP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/parallel/Salapura11,
author = {Valentina Salapura},
editor = {David A. Padua},
title = {Vector Extensions, Instruction-Set Architecture {(ISA)}},
booktitle = {Encyclopedia of Parallel Computing},
pages = {2129--2135},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-0-387-09766-4\_259},
doi = {10.1007/978-0-387-09766-4\_259},
timestamp = {Wed, 12 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/parallel/Salapura11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ch/Kluter10,
author = {Ties Kluter},
title = {Architectural Support for Coherent Architecturally Visible Storage
in Instruction Set Extensions},
school = {EPFL, Switzerland},
year = {2010},
url = {https://doi.org/10.5075/epfl-thesis-4672},
doi = {10.5075/EPFL-THESIS-4672},
timestamp = {Tue, 02 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ch/Kluter10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ethos/Zuluaga10,
author = {Marcela Zuluaga},
title = {Efficient design-space exploration of custom instruction-set extensions},
school = {University of Edinburgh, {UK}},
year = {2010},
url = {https://hdl.handle.net/1842/4630},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ethos/Zuluaga10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Martin10a,
author = {Kevin J. M. Martin},
title = {G{\'{e}}n{\'{e}}ration automatique d'extensions de jeux
d'instructions de processeurs. (Automatic Generation of Instruction-set
Extensions)},
school = {University of Rennes 1, France},
year = {2010},
url = {https://tel.archives-ouvertes.fr/tel-00526133},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Martin10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpsa/JenkinsSG10,
author = {Christipher D. Jenkins and
Michael J. Schulte and
John Glossner},
title = {Instruction set extensions for the advanced encryption standard on
a multithreaded software defined radio platform},
journal = {Int. J. High Perform. Syst. Archit.},
volume = {2},
number = {3/4},
pages = {203--214},
year = {2010},
url = {https://doi.org/10.1504/IJHPSA.2010.034541},
doi = {10.1504/IJHPSA.2010.034541},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijhpsa/JenkinsSG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ipsj/KumuraTITI10,
author = {Takahiro Kumura and
Soichiro Taga and
Nagisa Ishiura and
Yoshinori Takeuchi and
Masaharu Imai},
title = {Software Development Tool Generation Method Suitable for Instruction
Set Extension of Embedded Processors},
journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.},
volume = {3},
pages = {207--221},
year = {2010},
url = {https://doi.org/10.2197/ipsjtsldm.3.207},
doi = {10.2197/IPSJTSLDM.3.207},
timestamp = {Tue, 29 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ipsj/KumuraTITI10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/OMeliaE10,
author = {Sean O'Melia and
Adam J. Elbirt},
title = {Enhancing the Performance of Symmetric-Key Cryptography via Instruction
Set Extensions},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {11},
pages = {1505--1518},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2025171},
doi = {10.1109/TVLSI.2009.2025171},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/OMeliaE10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PothineniBIKP10,
author = {Nagaraju Pothineni and
Philip Brisk and
Paolo Ienne and
Anshul Kumar and
Kolin Paul},
title = {A high-level synthesis flow for custom instruction set extensions
for application-specific processors},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {707--712},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419795},
doi = {10.1109/ASPDAC.2010.5419795},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/PothineniBIKP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccece/DigeserTKSB10,
author = {Philipp Digeser and
Marco Tubolino and
Martin Klemm and
Daniel Shapiro and
Miodrag Bolic},
title = {Instruction set extension in the {NIOS} {II:} {A} floating point divider
for complex numbers},
booktitle = {Proceedings of the 23rd Canadian Conference on Electrical and Computer
Engineering, {CCECE} 2010, Calgary, Alberta, Canada, 2-5 May, 2010},
pages = {1--5},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/CCECE.2010.5575173},
doi = {10.1109/CCECE.2010.5575173},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/ccece/DigeserTKSB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/DanekKKS10,
author = {Martin Danek and
Leos Kafka and
Lukas Kohout and
Jaroslav Sykora},
editor = {Elena Gramatov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Andreas Steininger and
Heinrich Theodor Vierhaus and
Horst Zimmermann},
title = {Instruction set extensions for multi-threading in {LEON3}},
booktitle = {13th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2010, Vienna, Austria, April 14-16,
2010},
pages = {237--242},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DDECS.2010.5491777},
doi = {10.1109/DDECS.2010.5491777},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/DanekKKS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChenPF10,
author = {Zhimin Chen and
Richard Neil Pittman and
Alessandro Forin},
editor = {Peter Y. K. Cheung and
John Wawrzynek},
title = {Combining multicore and reconfigurable instruction set extensions},
booktitle = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
February 21-23, 2010},
pages = {33--36},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1723112.1723119},
doi = {10.1145/1723112.1723119},
timestamp = {Thu, 05 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/ChenPF10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/KluterBBCI10,
author = {Theo Kluter and
Samuel Burri and
Philip Brisk and
Edoardo Charbon and
Paolo Ienne},
editor = {Yale N. Patt and
Pierfrancesco Foglia and
Evelyn Duesterwald and
Paolo Faraboschi and
Xavier Martorell},
title = {Virtual Ways: Efficient Coherence for Architecturally Visible Storage
in Automatic Instruction Set Extensions},
booktitle = {High Performance Embedded Architectures and Compilers, 5th International
Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5952},
pages = {126--140},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-11515-8\_11},
doi = {10.1007/978-3-642-11515-8\_11},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipeac/KluterBBCI10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/MamidiBSGIIMJ09,
author = {Suman Mamidi and
Emily R. Blem and
Michael J. Schulte and
John Glossner and
Daniel Iancu and
Andrei Iancu and
Mayan Moudgill and
Sanjay Jinturkar},
title = {Instruction set extensions for software defined radio},
journal = {Microprocess. Microsystems},
volume = {33},
number = {4},
pages = {260--272},
year = {2009},
url = {https://doi.org/10.1016/j.micpro.2009.02.005},
doi = {10.1016/J.MICPRO.2009.02.005},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/MamidiBSGIIMJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZuluagaT09,
author = {Marcela Zuluaga and
Nigel P. Topham},
title = {Design-Space Exploration of Resource-Sharing Solutions for Custom
Instruction Set Extensions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {28},
number = {12},
pages = {1788--1801},
year = {2009},
url = {https://doi.org/10.1109/TCAD.2009.2026355},
doi = {10.1109/TCAD.2009.2026355},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZuluagaT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MurrayBFT09,
author = {Alastair Colin Murray and
Richard Vincent Bennett and
Bj{\"{o}}rn Franke and
Nigel P. Topham},
title = {Code transformation and instruction set extension},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {8},
number = {4},
pages = {26:1--26:31},
year = {2009},
url = {https://doi.org/10.1145/1550987.1550989},
doi = {10.1145/1550987.1550989},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MurrayBFT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/RegazzoniCSBKBLI09,
author = {Francesco Regazzoni and
Alessandro Cevrero and
Fran{\c{c}}ois{-}Xavier Standaert and
St{\'{e}}phane Badel and
Theo Kluter and
Philip Brisk and
Yusuf Leblebici and
Paolo Ienne},
editor = {Christophe Clavier and
Kris Gaj},
title = {A Design Flow and Evaluation Framework for DPA-Resistant Instruction
Set Extensions},
booktitle = {Cryptographic Hardware and Embedded Systems - {CHES} 2009, 11th International
Workshop, Lausanne, Switzerland, September 6-9, 2009, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5747},
pages = {205--219},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-04138-9\_15},
doi = {10.1007/978-3-642-04138-9\_15},
timestamp = {Tue, 31 Mar 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ches/RegazzoniCSBKBLI09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KluterBIC09,
author = {Theo Kluter and
Philip Brisk and
Paolo Ienne and
Edoardo Charbon},
title = {Way Stealing: cache-assisted automatic instruction set extensions},
booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
San Francisco, CA, USA, July 26-31, 2009},
pages = {31--36},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629911.1629923},
doi = {10.1145/1629911.1629923},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KluterBIC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GaluzziTMB09,
author = {Carlo Galuzzi and
Dimitris Theodoropoulos and
Roel Meeuws and
Koen Bertels},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Algorithms for the automatic extension of an instruction-set},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {548--553},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090724},
doi = {10.1109/DATE.2009.5090724},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/GaluzziTMB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/GradP09,
author = {Mariusz Grad and
Christian Plessl},
editor = {Toomas P. Plaks},
title = {Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set
Extension On Xilinx Virtex-4 {FX}},
booktitle = {Proceedings of the 2009 International Conference on Engineering of
Reconfigurable Systems {\&} Algorithms, {ERSA} 2009, July 13-16,
2009, Las Vegas Nevada, {USA}},
pages = {319--322},
publisher = {{CSREA} Press},
year = {2009},
timestamp = {Tue, 03 Nov 2009 10:35:19 +0100},
biburl = {https://dblp.org/rec/conf/ersa/GradP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/AthanasopoulosBLI09,
author = {Panagiotis Athanasopoulos and
Philip Brisk and
Yusuf Leblebici and
Paolo Ienne},
editor = {Jaijeet S. Roychowdhury},
title = {Memory organization and data layout for instruction set extensions
with architecturally visible storage},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {689--696},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687527},
doi = {10.1145/1687399.1687527},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/AthanasopoulosBLI09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LinF09,
author = {Hai Lin and
Yunsi Fei},
title = {Resource sharing of pipelined custom hardware extension for energy-efficient
application-specific instruction set processor design},
booktitle = {27th International Conference on Computer Design, {ICCD} 2009, Lake
Tahoe, CA, USA, October 4-7, 2009},
pages = {158--165},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ICCD.2009.5413161},
doi = {10.1109/ICCD.2009.5413161},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LinF09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/KaruriLAM09,
author = {Kingshuk Karuri and
Rainer Leupers and
Gerd Ascheid and
Heinrich Meyr},
editor = {Koen Bertels and
Nikitas J. Dimopoulos and
Cristina Silvano and
Stephan Wong},
title = {A Generic Design Flow for Application Specific Processor Customization
through Instruction-Set Extensions (ISEs)},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
9th International Workshop, {SAMOS} 2009, Samos, Greece, July 20-23,
2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5657},
pages = {204--214},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-03138-0\_22},
doi = {10.1007/978-3-642-03138-0\_22},
timestamp = {Tue, 14 May 2019 10:00:45 +0200},
biburl = {https://dblp.org/rec/conf/samos/KaruriLAM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sasp/ZuluagaKBTI09,
author = {Marcela Zuluaga and
Theo Kluter and
Philip Brisk and
Nigel P. Topham and
Paolo Ienne},
title = {Introducing control-flow inclusion to support pipelining in custom
instruction set extensions},
booktitle = {Proceedings of the {IEEE} 7th Symposium on Application Specific Processors,
{SASP} 2009, San Francisco, CA, {USA} , July 27-28, 2009},
pages = {114--121},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/SASP.2009.5226328},
doi = {10.1109/SASP.2009.5226328},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sasp/ZuluagaKBTI09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/koc09/BartoliniGM09,
author = {Sandro Bartolini and
Roberto Giorgi and
Enrico Martinelli},
editor = {{\c{C}}etin Kaya Ko{\c{c}}},
title = {Instruction Set Extensions for Cryptographic Applications},
booktitle = {Cryptographic Engineering},
pages = {191--233},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-0-387-71817-0\_9},
doi = {10.1007/978-0-387-71817-0\_9},
timestamp = {Tue, 26 Jun 2018 16:12:55 +0200},
biburl = {https://dblp.org/rec/books/sp/koc09/BartoliniGM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/LoloeyanA08,
author = {Payman Loloeyan and
Maghsoud Abbaspour},
title = {An automatic method for Instruction-set extension generation using
the center of gravity concept},
journal = {{IEICE} Electron. Express},
volume = {5},
number = {15},
pages = {543--549},
year = {2008},
url = {https://doi.org/10.1587/elex.5.543},
doi = {10.1587/ELEX.5.543},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/LoloeyanA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcs/Elbirt08,
author = {Adam J. Elbirt},
title = {Accelerated {AES} implementations via generalized instruction set
extensions},
journal = {J. Comput. Secur.},
volume = {16},
number = {3},
pages = {265--288},
year = {2008},
url = {https://doi.org/10.3233/jcs-2008-16302},
doi = {10.3233/JCS-2008-16302},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcs/Elbirt08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BartoliniBGM08,
author = {Sandro Bartolini and
Irina Branovic and
Roberto Giorgi and
Enrico Martinelli},
title = {Effects of Instruction-Set Extensions on an Embedded Processor: {A}
Case Study on Elliptic Curve Cryptography over GF(2\({}^{\mbox{m}}\))},
journal = {{IEEE} Trans. Computers},
volume = {57},
number = {5},
pages = {672--685},
year = {2008},
url = {https://doi.org/10.1109/TC.2007.70832},
doi = {10.1109/TC.2007.70832},
timestamp = {Wed, 28 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BartoliniBGM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acsac/OMeliaE08,
author = {Sean O'Melia and
Adam J. Elbirt},
title = {Instruction Set Extensions for Enhancing the Performance of Symmetric-Key
Cryptography},
booktitle = {Twenty-Fourth Annual Computer Security Applications Conference, {ACSAC}
2008, Anaheim, California, USA, 8-12 December 2008},
pages = {465--474},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ACSAC.2008.10},
doi = {10.1109/ACSAC.2008.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acsac/OMeliaE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/GaluzziB08,
author = {Carlo Galuzzi and
Koen Bertels},
editor = {Roger F. Woods and
Katherine Compton and
Christos{-}Savvas Bouganis and
Pedro C. Diniz},
title = {The Instruction-Set Extension Problem: {A} Survey},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 4th
International Workshop, {ARC} 2008, London, UK, March 26-28, 2008.
Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4943},
pages = {207--218},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-78610-8\_21},
doi = {10.1007/978-3-540-78610-8\_21},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/arc/GaluzziB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/GaluzziB08a,
author = {Carlo Galuzzi and
Koen Bertels},
editor = {Roger F. Woods and
Katherine Compton and
Christos{-}Savvas Bouganis and
Pedro C. Diniz},
title = {A Framework for the Automatic Generation of Instruction-Set Extensions
for Reconfigurable Architectures},
booktitle = {Reconfigurable Computing: Architectures, Tools and Applications, 4th
International Workshop, {ARC} 2008, London, UK, March 26-28, 2008.
Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4943},
pages = {278--283},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-78610-8\_29},
doi = {10.1007/978-3-540-78610-8\_29},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/GaluzziB08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/VermaBI08,
author = {Ajay Kumar Verma and
Philip Brisk and
Paolo Ienne},
editor = {Chong{-}Min Kyung and
Kiyoung Choi and
Soonhoi Ha},
title = {Fast, quasi-optimal, and pipelined instruction-set extensions},
booktitle = {Proceedings of the 13th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008},
pages = {334--339},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ASPDAC.2008.4483970},
doi = {10.1109/ASPDAC.2008.4483970},
timestamp = {Tue, 03 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/VermaBI08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/GrabherGP08,
author = {Philipp Grabher and
Johann Gro{\ss}sch{\"{a}}dl and
Dan Page},
editor = {Elisabeth Oswald and
Pankaj Rohatgi},
title = {Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography},
booktitle = {Cryptographic Hardware and Embedded Systems - {CHES} 2008, 10th International
Workshop, Washington, D.C., USA, August 10-13, 2008. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5154},
pages = {331--345},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-85053-3\_21},
doi = {10.1007/978-3-540-85053-3\_21},
timestamp = {Thu, 14 Oct 2021 10:28:51 +0200},
biburl = {https://dblp.org/rec/conf/ches/GrabherGP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/KluterBIC08,
author = {Theo Kluter and
Philip Brisk and
Paolo Ienne and
Edoardo Charbon},
editor = {Catherine H. Gebotys and
Grant Martin},
title = {Speculative {DMA} for architecturally visible storage in instruction
set extensions},
booktitle = {Proceedings of the 6th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {243--248},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450135.1450191},
doi = {10.1145/1450135.1450191},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/KluterBIC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WuCSC08,
author = {I{-}Wei Wu and
Zhiyuan Chen and
Jean Jyh{-}Jiun Shann and
Chung{-}Ping Chung},
editor = {Donatella Sciuto},
title = {Instruction Set Extension Exploration in Multiple-Issue Architecture},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {764--769},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484771},
doi = {10.1109/DATE.2008.4484771},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WuCSC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itng/PuttmannSP08,
author = {Christoph Puttmann and
Jamshid Shokrollahi and
Mario Porrmann},
editor = {Shahram Latifi},
title = {Resource Efficiency of Instruction Set Extensions for Elliptic Curve
Cryptography},
booktitle = {Fifth International Conference on Information Technology: New Generations
{(ITNG} 2008), 7-8 April 2008, Las Vegas, Nevada, {USA}},
pages = {131--136},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ITNG.2008.130},
doi = {10.1109/ITNG.2008.130},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itng/PuttmannSP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/GaluzziTMB08,
author = {Carlo Galuzzi and
Dimitris Theodoropoulos and
Roel Meeuws and
Koen Bertels},
title = {Automatic Instruction-Set Extensions with the Linear Complexity Spiral
Search},
booktitle = {ReConFig'08: 2008 International Conference on Reconfigurable Computing
and FPGAs, 3-5 December 2008, Cancun, Mexico, Proceedings},
pages = {31--36},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ReConFig.2008.79},
doi = {10.1109/RECONFIG.2008.79},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/GaluzziTMB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/SiderisPE08,
author = {Isidoros Sideris and
Kiamal Z. Pekmestzi and
George Economakos},
editor = {Walid A. Najjar and
Holger Blume},
title = {An instruction set extension for java bytecodes translation acceleration},
booktitle = {Proceedings of the 2008 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2008),
Samos, Greece, July 21-24, 2008},
pages = {116--123},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSAMOS.2008.4664854},
doi = {10.1109/ICSAMOS.2008.4664854},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/SiderisPE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sasp/ZuluagaT08,
author = {Marcela Zuluaga and
Nigel P. Topham},
title = {Resource Sharing in Custom Instruction Set Extensions},
booktitle = {Proceedings of the {IEEE} Symposium on Application Specific Processors,
{SASP} 2008, held in conjunction with the {DAC} 2008, June 8-9, 2008,
Anaheim, California, {USA}},
pages = {7--13},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/SASP.2008.4570779},
doi = {10.1109/SASP.2008.4570779},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sasp/ZuluagaT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/MajzoubD07,
author = {Sohaib Majzoub and
Hassan B. Diab},
title = {Instruction-Set Extension for Cryptographic Applications on Reconfigurable
Platform},
journal = {J. Circuits Syst. Comput.},
volume = {16},
number = {6},
pages = {911--927},
year = {2007},
url = {https://doi.org/10.1142/S0218126607004076},
doi = {10.1142/S0218126607004076},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcsc/MajzoubD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BiswasDPI07,
author = {Partha Biswas and
Nikil D. Dutt and
Laura Pozzi and
Paolo Ienne},
title = {Introduction of Architecturally Visible Storage in Instruction Set
Extensions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {3},
pages = {435--446},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2006.890582},
doi = {10.1109/TCAD.2006.890582},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BiswasDPI07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aina/Elbirt07,
author = {Adam J. Elbirt},
title = {Fast and Efficient Implementation of {AES} via Instruction Set Extensions},
booktitle = {21st International Conference on Advanced Information Networking and
Applications {(AINA} 2007), Workshops Proceedings, Volume 1, May 21-23,
2007, Niagara Falls, Canada},
pages = {396--403},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/AINAW.2007.182},
doi = {10.1109/AINAW.2007.182},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aina/Elbirt07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeLC07,
author = {Imyong Lee and
Dongwook Lee and
Kiyoung Choi},
title = {Memory Operation Inclusive Instruction-Set Extensions and Data Path
Generation},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {383--390},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459294},
doi = {10.1109/ASAP.2007.4459294},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeLC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdes/PothineniKP07,
author = {Nagaraju Pothineni and
Anshul Kumar and
Kolin Paul},
editor = {Hamid R. Arabnia},
title = {Recurring Pattern Identification and its Application to Instruction
Set Extension},
booktitle = {Proceedings of the 2007 International Conference on Computer Design,
{CDES} 2007, Las Vegas, Nevada, USA, June 25-28, 2007},
pages = {67--73},
publisher = {{CSREA} Press},
year = {2007},
timestamp = {Thu, 20 Dec 2007 08:07:47 +0100},
biburl = {https://dblp.org/rec/conf/cdes/PothineniKP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/TillichG07,
author = {Stefan Tillich and
Johann Gro{\ss}sch{\"{a}}dl},
editor = {Pascal Paillier and
Ingrid Verbauwhede},
title = {Power Analysis Resistant {AES} Implementation with Instruction Set
Extensions},
booktitle = {Cryptographic Hardware and Embedded Systems - {CHES} 2007, 9th International
Workshop, Vienna, Austria, September 10-13, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4727},
pages = {303--319},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74735-2\_21},
doi = {10.1007/978-3-540-74735-2\_21},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/ches/TillichG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BonziniP07,
author = {Paolo Bonzini and
Laura Pozzi},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Polynomial-time subgraph enumeration for automated instruction set
extension},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {1331--1336},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://dl.acm.org/citation.cfm?id=1266657},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/BonziniP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/GrossschadlTS07,
author = {Johann Gro{\ss}sch{\"{a}}dl and
Stefan Tillich and
Alexander Szekely},
title = {Performance Evaluation of Instruction Set Extensions for Long Integer
Modular Arithmetic on a {SPARC} {V8} Processor},
booktitle = {Tenth Euromicro Conference on Digital System Design: Architectures,
Methods and Tools {(DSD} 2007), 29-31 August 2007, L{\"{u}}beck,
Germany},
pages = {680--689},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DSD.2007.4341542},
doi = {10.1109/DSD.2007.4341542},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/dsd/GrossschadlTS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/WolinskiK07,
author = {Christophe Wolinski and
Krzysztof Kuchcinski},
editor = {Toomas P. Plaks},
title = {Computation Patterns Identification for Instruction Set Extensions
Implemented as Reconfigurable Hardware},
booktitle = {Proceedings of the 2007 International Conference on Engineering of
Reconfigurable Systems {\&} Algorithms, {ERSA} 2007, Las Vegas,
Nevada, USA, June 25-28, 2007},
pages = {175--181},
publisher = {{CSREA} Press},
year = {2007},
timestamp = {Fri, 14 Dec 2007 20:45:54 +0100},
biburl = {https://dblp.org/rec/conf/ersa/WolinskiK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/GaluzziBV07,
author = {Carlo Galuzzi and
Koen Bertels and
Stamatis Vassiliadis},
editor = {Hideharu Amano and
Andy Ye and
Takeshi Ikenaga},
title = {The Spiral Search: {A} Linear Complexity Algorithm for the Generation
of Convex {MIMO} Instruction-Set Extensions},
booktitle = {2007 International Conference on Field-Programmable Technology, {ICFPT}
2007, Kitakyushu, Japan, December 12-14, 2007},
pages = {337--340},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPT.2007.4439280},
doi = {10.1109/FPT.2007.4439280},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/GaluzziBV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/WuHCS07,
author = {I{-}Wei Wu and
Shih{-}Chia Huang and
Chung{-}Ping Chung and
Jean Jyh{-}Jiun Shann},
editor = {Koen De Bosschere and
David R. Kaeli and
Per Stenstr{\"{o}}m and
David B. Whalley and
Theo Ungerer},
title = {Instruction Set Extension Generation with Considering Physical Constraints},
booktitle = {High Performance Embedded Architectures and Compilers, Second International
Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4367},
pages = {291--305},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-69338-3\_20},
doi = {10.1007/978-3-540-69338-3\_20},
timestamp = {Tue, 14 May 2019 10:00:51 +0200},
biburl = {https://dblp.org/rec/conf/hipeac/WuHCS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KaruriCHLAM07,
author = {Kingshuk Karuri and
Anupam Chattopadhyay and
Manuel Hohenauer and
Rainer Leupers and
Gerd Ascheid and
Heinrich Meyr},
editor = {Georges G. E. Gielen},
title = {Increasing data-bandwidth to instruction-set extensions through register
clustering},
booktitle = {2007 International Conference on Computer-Aided Design, {ICCAD} 2007,
San Jose, CA, USA, November 5-8, 2007},
pages = {166--171},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICCAD.2007.4397261},
doi = {10.1109/ICCAD.2007.4397261},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/KaruriCHLAM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/BennettMFT07,
author = {Richard Vincent Bennett and
Alastair Colin Murray and
Bj{\"{o}}rn Franke and
Nigel P. Topham},
editor = {Santosh Pande and
Zhiyuan Li},
title = {Combining source-to-source transformations and processor instruction
set extensions for the automated design-space exploration of embedded
systems},
booktitle = {Proceedings of the 2007 {ACM} {SIGPLAN/SIGBED} Conference on Languages,
Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, California,
USA, June 13-15, 2007},
pages = {83--92},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1254766.1254779},
doi = {10.1145/1254766.1254779},
timestamp = {Sun, 02 Oct 2022 16:11:14 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/BennettMFT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pairing/VejdaPG07,
author = {Tobias Vejda and
Dan Page and
Johann Gro{\ss}sch{\"{a}}dl},
editor = {Tsuyoshi Takagi and
Tatsuaki Okamoto and
Eiji Okamoto and
Takeshi Okamoto},
title = {Instruction Set Extensions for Pairing-Based Cryptography},
booktitle = {Pairing-Based Cryptography - Pairing 2007, First International Conference,
Tokyo, Japan, July 2-4, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4575},
pages = {208--224},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-73489-5\_11},
doi = {10.1007/978-3-540-73489-5\_11},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/pairing/VejdaPG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/VassiliadisTN07,
author = {Nikolaos Vassiliadis and
George Theodoridis and
Spiridon Nikolaidis},
editor = {Holger Blume and
Georgi Gaydadjiev and
C. John Glossner and
Peter M. W. Knijnenburg},
title = {The {ARISE} Reconfigurable Instruction Set Extensions Framework},
booktitle = {Proceedings of the 2007 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2007),
Samos, Greece, July 16-19, 2007},
pages = {153--160},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICSAMOS.2007.4285746},
doi = {10.1109/ICSAMOS.2007.4285746},
timestamp = {Tue, 04 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/VassiliadisTN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0710-4820,
author = {Partha Biswas and
Sudarshan Banerjee and
Nikil D. Dutt and
Laura Pozzi and
Paolo Ienne},
title = {{ISEGEN:} Generation of High-Quality Instruction Set Extensions by
Iterative Improvement},
journal = {CoRR},
volume = {abs/0710.4820},
year = {2007},
url = {http://arxiv.org/abs/0710.4820},
eprinttype = {arXiv},
eprint = {0710.4820},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-0710-4820.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PozziAI06,
author = {Laura Pozzi and
Kubilay Atasu and
Paolo Ienne},
title = {Exact and approximate algorithms for the extension of embedded processor
instruction sets},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {25},
number = {7},
pages = {1209--1229},
year = {2006},
url = {https://doi.org/10.1109/TCAD.2005.855950},
doi = {10.1109/TCAD.2005.855950},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PozziAI06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/TillichG06,
author = {Stefan Tillich and
Johann Gro{\ss}sch{\"{a}}dl},
editor = {Louis Goubin and
Mitsuru Matsui},
title = {Instruction Set Extensions for Efficient {AES} Implementation on 32-bit
Processors},
booktitle = {Cryptographic Hardware and Embedded Systems - {CHES} 2006, 8th International
Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4249},
pages = {270--284},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11894063\_22},
doi = {10.1007/11894063\_22},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/ches/TillichG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/GaluzziPYBV06,
author = {Carlo Galuzzi and
Elena Moscu Panainte and
Yana Yankova and
Koen Bertels and
Stamatis Vassiliadis},
editor = {Reinaldo A. Bergamaschi and
Kiyoung Choi},
title = {Automatic selection of application-specific instruction-set extensions},
booktitle = {Proceedings of the 4th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2006, Seoul, Korea, October
22-25, 2006},
pages = {160--165},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176254.1176293},
doi = {10.1145/1176254.1176293},
timestamp = {Mon, 26 Nov 2018 12:14:45 +0100},
biburl = {https://dblp.org/rec/conf/codes/GaluzziPYBV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/JayaseelanLM06,
author = {Ramkumar Jayaseelan and
Haibin Liu and
Tulika Mitra},
editor = {Ellen Sentovich},
title = {Exploiting forwarding to improve data bandwidth of instruction-set
extensions},
booktitle = {Proceedings of the 43rd Design Automation Conference, {DAC} 2006,
San Francisco, CA, USA, July 24-28, 2006},
pages = {43--48},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1146909.1146924},
doi = {10.1145/1146909.1146924},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/JayaseelanLM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeupersKKP06,
author = {Rainer Leupers and
Kingshuk Karuri and
Stefan Kraemer and
Manas Pandey},
editor = {Georges G. E. Gielen},
title = {A design flow for configurable embedded processors based on optimized
instruction set extension synthesis},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {581--586},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.243972},
doi = {10.1109/DATE.2006.243972},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/LeupersKKP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icppw/BaumstarkW06,
author = {Lewis Benton Baumstark Jr. and
Linda M. Wills},
title = {Multidimensional Dataflow-based Parallelization for Multimedia Instruction
Set Extensions},
booktitle = {2006 International Conference on Parallel Processing Workshops {(ICPP}
Workshops 2006), 14-18 August 2006, Columbus, Ohio, {USA}},
pages = {319--326},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ICPPW.2006.57},
doi = {10.1109/ICPPW.2006.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icppw/BaumstarkW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/VassiliadisTN06,
author = {Nikolaos Vassiliadis and
George Theodoridis and
Spiridon Nikolaidis},
title = {An automated development framework for a {RISC} processor with reconfigurable
instruction set extensions},
booktitle = {20th International Parallel and Distributed Processing Symposium {(IPDPS}
2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/IPDPS.2006.1639476},
doi = {10.1109/IPDPS.2006.1639476},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/VassiliadisTN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/VealeATJ06,
author = {Brian F. Veale and
John K. Antonio and
Monte P. Tull and
Sean A. Jones},
title = {Selection of instruction set extensions for an {FPGA} embedded processor
core},
booktitle = {20th International Parallel and Distributed Processing Symposium {(IPDPS}
2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/IPDPS.2006.1639455},
doi = {10.1109/IPDPS.2006.1639455},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/VealeATJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BiswasBDIP06,
author = {Partha Biswas and
Sudarshan Banerjee and
Nikil D. Dutt and
Paolo Ienne and
Laura Pozzi},
title = {Performance and Energy Benefits of Instruction Set Extensions in an
{FPGA} Soft Core},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {651--656},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.131},
doi = {10.1109/VLSID.2006.131},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BiswasBDIP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasCD06,
author = {Samik Das and
P. P. Chakrabarti and
Pallab Dasgupta},
title = {Instruction-Set-Extension Exploration Using Decomposable Heuristic
Search},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {293--298},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.106},
doi = {10.1109/VLSID.2006.106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasCD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/BeckerT05,
author = {J{\"{u}}rgen Becker and
Alexander Thomas},
title = {Scalable Processor Instruction Set Extension},
journal = {{IEEE} Des. Test Comput.},
volume = {22},
number = {2},
pages = {136--148},
year = {2005},
url = {https://doi.org/10.1109/MDT.2005.43},
doi = {10.1109/MDT.2005.43},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/BeckerT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BiswasD05,
author = {Partha Biswas and
Nikil D. Dutt},
title = {Code Size Reduction in Heterogeneous-Connectivity-Based DSPs Using
Instruction Set Extensions},
journal = {{IEEE} Trans. Computers},
volume = {54},
number = {10},
pages = {1216--1226},
year = {2005},
url = {https://doi.org/10.1109/TC.2005.157},
doi = {10.1109/TC.2005.157},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BiswasD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KavvadiasN05,
author = {Nikolaos Kavvadias and
Spiridon Nikolaidis},
title = {Automated Instruction-Set Extension of Embedded Processors with Application
to {MPEG-4} Video Encoding},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {140--145},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.20},
doi = {10.1109/ASAP.2005.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KavvadiasN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MamidiIISG05,
author = {Suman Mamidi and
Daniel Iancu and
Andrei Iancu and
Michael J. Schulte and
John Glossner},
title = {Instruction Set Extensions for Reed-Solomon Encoding and Decoding},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {364--369},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.42},
doi = {10.1109/ASAP.2005.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MamidiIISG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MamidiBSGIIMJ05,
author = {Suman Mamidi and
Emily R. Blem and
Michael J. Schulte and
C. John Glossner and
Daniel Iancu and
Andrei Iancu and
Mayan Moudgill and
Sanjay Jinturkar},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Instruction set extensions for software defined radio on a multithreaded
processor},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {266--273},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086332},
doi = {10.1145/1086297.1086332},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MamidiBSGIIMJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PozziI05,
author = {Laura Pozzi and
Paolo Ienne},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Exploiting pipelining to relax register-file port constraints of instruction-set
extensions},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {2--10},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086300},
doi = {10.1145/1086297.1086300},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PozziI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cms/TillichGS05,
author = {Stefan Tillich and
Johann Gro{\ss}sch{\"{a}}dl and
Alexander Szekely},
editor = {Jana Dittmann and
Stefan Katzenbeisser and
Andreas Uhl},
title = {An Instruction Set Extension for Fast and Memory-Efficient {AES} Implementation},
booktitle = {Communications and Multimedia Security, 9th {IFIP} {TC-6} {TC-11}
International Conference, {CMS} 2005, Salzburg, Austria, September
19-21, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3677},
pages = {11--21},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11552055\_2},
doi = {10.1007/11552055\_2},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/cms/TillichGS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/AtasuDO05,
author = {Kubilay Atasu and
G{\"{u}}nhan D{\"{u}}ndar and
Can C. {\"{O}}zturan},
editor = {Petru Eles and
Axel Jantsch and
Reinaldo A. Bergamaschi},
title = {An integer linear programming approach for identifying instruction-set
extensions},
booktitle = {Proceedings of the 3rd {IEEE/ACM/IFIP} International Conference on
Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2005,
Jersey City, NJ, USA, September 19-21, 2005},
pages = {172--177},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1084834.1084880},
doi = {10.1145/1084834.1084880},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/AtasuDO05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BiswasBDPI05,
author = {Partha Biswas and
Sudarshan Banerjee and
Nikil D. Dutt and
Laura Pozzi and
Paolo Ienne},
title = {{ISEGEN:} Generation of High-Quality Instruction Set Extensions by
Iterative Improvement},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {1246--1251},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.191},
doi = {10.1109/DATE.2005.191},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BiswasBDPI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CongFHJRZ05,
author = {Jason Cong and
Yiping Fan and
Guoling Han and
Ashok Jagannathan and
Glenn Reinman and
Zhiru Zhang},
editor = {Herman Schmit and
Steven J. E. Wilton},
title = {Instruction set extension with shadow registers for configurable processors},
booktitle = {Proceedings of the {ACM/SIGDA} 13th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2005, Monterey, California, USA,
February 20-22, 2005},
pages = {99--106},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1046192.1046206},
doi = {10.1145/1046192.1046206},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CongFHJRZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Lazanyi05,
author = {J{\'{a}}nos Laz{\'{a}}nyi},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {Instruction Set Extension Using Microblaze Processor},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {729--730},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515829},
doi = {10.1109/FPL.2005.1515829},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Lazanyi05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccsa/TillichG05,
author = {Stefan Tillich and
Johann Gro{\ss}sch{\"{a}}dl},
editor = {Osvaldo Gervasi and
Marina L. Gavrilova and
Vipin Kumar and
Antonio Lagan{\`{a}} and
Heow Pueh Lee and
Youngsong Mun and
David Taniar and
Chih Jeng Kenneth Tan},
title = {Accelerating {AES} Using Instruction Set Extensions for Elliptic Curve
Cryptography},
booktitle = {Computational Science and Its Applications - {ICCSA} 2005, International
Conference, Singapore, May 9-12, 2005, Proceedings, Part {II}},
series = {Lecture Notes in Computer Science},
volume = {3481},
pages = {665--675},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11424826\_70},
doi = {10.1007/11424826\_70},
timestamp = {Thu, 28 Apr 2022 16:17:38 +0200},
biburl = {https://dblp.org/rec/conf/iccsa/TillichG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FiskiranL04,
author = {A. Murat Fiskiran and
Ruby B. Lee},
title = {Evaluating Instruction Set Extensions for Fast Arithmetic on Binary
Finite Fields},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {125--136},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10003},
doi = {10.1109/ASAP.2004.10003},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FiskiranL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/GrossschadlS04,
author = {Johann Gro{\ss}sch{\"{a}}dl and
Erkay Savas},
editor = {Marc Joye and
Jean{-}Jacques Quisquater},
title = {Instruction Set Extensions for Fast Arithmetic in Finite Fields {GF(}
p) and GF(2\({}^{\mbox{m}}\))},
booktitle = {Cryptographic Hardware and Embedded Systems - {CHES} 2004: 6th International
Workshop Cambridge, MA, USA, August 11-13, 2004. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3156},
pages = {133--147},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-28632-5\_10},
doi = {10.1007/978-3-540-28632-5\_10},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/ches/GrossschadlS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BiswasCAPID04,
author = {Partha Biswas and
Vinay Choudhary and
Kubilay Atasu and
Laura Pozzi and
Paolo Ienne and
Nikil D. Dutt},
editor = {Sharad Malik and
Limor Fix and
Andrew B. Kahng},
title = {Introduction of local memory elements in instruction set extensions},
booktitle = {Proceedings of the 41th Design Automation Conference, {DAC} 2004,
San Diego, CA, USA, June 7-11, 2004},
pages = {729--734},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/996566.996765},
doi = {10.1145/996566.996765},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/BiswasCAPID04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KumarP04,
author = {Sandeep S. Kumar and
Christof Paar},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {Reconfigurable Instruction Set Extension for Enabling {ECC} on an
8-Bit Processor},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {586--595},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_60},
doi = {10.1007/978-3-540-30117-2\_60},
timestamp = {Fri, 19 Jul 2019 13:02:47 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KumarP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/KastensLST04,
author = {Uwe Kastens and
Dinh Khoi Le and
Adrian Slowik and
Michael Thies},
editor = {David B. Whalley and
Ron Cytron},
title = {Feedback driven instruction-set extension},
booktitle = {Proceedings of the 2004 {ACM} {SIGPLAN/SIGBED} Conference on Languages,
Compilers, and Tools for Embedded Systems (LCTES'04), Washington,
DC, USA, June 11-13, 2004},
pages = {126--135},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/997163.997182},
doi = {10.1145/997163.997182},
timestamp = {Fri, 25 Jun 2021 14:48:54 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/KastensLST04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/parelec/GrunewaldLKNPRST04,
author = {Matthias Gr{\"{u}}newald and
Dinh Khoi Le and
Uwe Kastens and
J{\"{o}}rg{-}Christian Niemann and
Mario Porrmann and
Ulrich R{\"{u}}ckert and
Adrian Slowik and
Michael Thies},
title = {Network Application Driven Instruction Set Extensions for Embedded
Processing Clusters},
booktitle = {2004 International Conference on Parallel Computing in Electrical
Engineering {(PARELEC} 2004), 7-10 September 2004, Dresden, Germany},
pages = {209--214},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/PCEE.2004.45},
doi = {10.1109/PCEE.2004.45},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/parelec/GrunewaldLKNPRST04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/AtasuPI03,
author = {Kubilay Atasu and
Laura Pozzi and
Paolo Ienne},
title = {Automatic Application-Specific Instruction-Set Extensions Under Microarchitectural
Constraints},
journal = {Int. J. Parallel Program.},
volume = {31},
number = {6},
pages = {411--428},
year = {2003},
url = {https://doi.org/10.1023/B:IJPP.0000004508.14594.b9},
doi = {10.1023/B:IJPP.0000004508.14594.B9},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/AtasuPI03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/ClarkZTM03,
author = {Nathan Clark and
Hongtao Zhong and
Wilkin Tang and
Scott A. Mahlke},
title = {Automatic Design of Application Specific Instruction Set Extensions
Through Dataflow Graph Exploration},
journal = {Int. J. Parallel Program.},
volume = {31},
number = {6},
pages = {429--449},
year = {2003},
url = {https://doi.org/10.1023/B:IJPP.0000004509.87424.3a},
doi = {10.1023/B:IJPP.0000004509.87424.3A},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/ClarkZTM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GrossschadlK03,
author = {Johann Gro{\ss}sch{\"{a}}dl and
Guy{-}Armand Kamendje},
title = {Instruction Set Extension for Fast Elliptic Curve Cryptography over
Binary Finite Fields GF(2m)},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {455},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212868},
doi = {10.1109/ASAP.2003.1212868},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GrossschadlK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PeymandoustPIM03,
author = {Armita Peymandoust and
Laura Pozzi and
Paolo Ienne and
Giovanni De Micheli},
title = {Automatic Instruction Set Extension and Utilization for Embedded Processors},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {108},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212834},
doi = {10.1109/ASAP.2003.1212834},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PeymandoustPIM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BiswasD03,
author = {Partha Biswas and
Nikil D. Dutt},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Reducing code size for heterogeneous-connectivity-based {VLIW} DSPs
through synthesis of instruction set extensions},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {104--112},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951726},
doi = {10.1145/951710.951726},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BiswasD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AtasuPI03,
author = {Kubilay Atasu and
Laura Pozzi and
Paolo Ienne},
title = {Automatic application-specific instruction-set extensions under microarchitectural
constraints},
booktitle = {Proceedings of the 40th Design Automation Conference, {DAC} 2003,
Anaheim, CA, USA, June 2-6, 2003},
pages = {256--261},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/775832.775897},
doi = {10.1145/775832.775897},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AtasuPI03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/BeckerTS03,
author = {J{\"{u}}rgen Becker and
Alexander Thomas and
Maik Scheer},
title = {Efficient Processor Instruction Set Extension by Asynchronous Reconfigurable
Datapath Integration},
booktitle = {Proceedings of the 16th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2003, Sao Paulo, Brazil, September 8-11, 2003},
pages = {237--242},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/SBCCI.2003.1232835},
doi = {10.1109/SBCCI.2003.1232835},
timestamp = {Fri, 17 Jun 2022 15:49:04 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/BeckerTS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiG02,
author = {Bengu Li and
Rajiv Gupta},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Bit section instruction set extension of {ARM} for embedded applications},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {69--78},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581642},
doi = {10.1145/581630.581642},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LiG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PozziVI02,
author = {Laura Pozzi and
Miljan Vuletic and
Paolo Ienne},
title = {Automatic Topology-Based Identification of Instruction-Set Extensions
for Embedded Processors},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {1138},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998496},
doi = {10.1109/DATE.2002.998496},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PozziVI02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/CheresizJVW02,
author = {Dmitry Cheresiz and
Ben H. H. Juurlink and
Stamatis Vassiliadis and
Harry A. G. Wijshoff},
editor = {Burkhard Monien and
Rainer Feldmann},
title = {Performance Scalability of Multimedia Instruction Set Extensions},
booktitle = {Euro-Par 2002, Parallel Processing, 8th International Euro-Par Conference
Paderborn, Germany, August 27-30, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2400},
pages = {849--860},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-45706-2\_120},
doi = {10.1007/3-540-45706-2\_120},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/CheresizJVW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/Grossschadl02,
author = {Johann Gro{\ss}sch{\"{a}}dl},
title = {Instruction Set Extension for Long Integer Modulo Arithmetic on RISC-Based
Smart Cards},
booktitle = {14th Symposium on Computer Architecture and High Performance Computing
{(SBAC-PAD} 2002), 28-30 October 2002, Vitoria, Espirito Santo, Brazil},
pages = {13--19},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/CAHPC.2002.1180754},
doi = {10.1109/CAHPC.2002.1180754},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbac-pad/Grossschadl02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/BerekovicSKPMRKS99,
author = {Mladen Berekovic and
Hans{-}Joachim Stolberg and
Mark Bernd Kulaczewski and
Peter Pirsch and
Henning M{\"{o}}ller and
Holger Runge and
Johannes Kneip and
Benno Stabernack},
title = {Instruction Set Extensions for {MPEG-4} Video},
journal = {J. {VLSI} Signal Process.},
volume = {23},
number = {1},
pages = {27--49},
year = {1999},
url = {https://doi.org/10.1023/A:1008188618930},
doi = {10.1023/A:1008188618930},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/BerekovicSKPMRKS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/LempelPW97,
author = {Oded Lempel and
Alex Peleg and
Uri C. Weiser},
title = {Intel's MMX{\texttrademark} technology-a new instruction set extension},
booktitle = {Proceedings {IEEE} {COMPCON} 97, San Jose, California, USA, February
23-26, 1997, Digest of Papers},
pages = {255--259},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/CMPCON.1997.584723},
doi = {10.1109/CMPCON.1997.584723},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/compcon/LempelPW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/Wakerly80,
author = {John F. Wakerly},
title = {Pascal extensions for describing computer instruction sets},
journal = {{SIGARCH} Comput. Archit. News},
volume = {8},
number = {7},
pages = {15--23},
year = {1980},
url = {https://doi.org/10.1145/641926.641929},
doi = {10.1145/641926.641929},
timestamp = {Thu, 15 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/Wakerly80.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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