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export results for "Simulation Analysis of Low Power Synchronous Token Ring Based VLIW processor under GALS Multi-processor technology with improved efficiency."
@inproceedings{DBLP:conf/cdes/VijayaraghavanKS05, author = {Arun Vijayaraghavan and M. Kannan and R. Seshasayanan}, editor = {Laurence Tianruo Yang and Hamid R. Arabnia and Yiming Li and Salam N. Salloum and Jos{\'{e}} G. Delgado{-}Frias}, title = {Simulation Analysis of Low Power Synchronous Token Ring Based {VLIW} processor under {GALS} Multi-processor technology with improved efficiency}, booktitle = {Proceedings of the 2005 International Conference on Computer Design, {CDES} 2005, Las Vegas, Nevada, USA, June 27-30, 2005}, pages = {143--152}, publisher = {{CSREA} Press}, year = {2005}, timestamp = {Thu, 02 Feb 2006 13:39:57 +0100}, biburl = {https://dblp.org/rec/conf/cdes/VijayaraghavanKS05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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