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@inproceedings{DBLP:conf/hpca/FerraiuoloWZMS16,
  author    = {Andrew Ferraiuolo and
               Yao Wang and
               Danfeng Zhang and
               Andrew C. Myers and
               G. Edward Suh},
  title     = {Lattice priority scheduling: Low-overhead timing-channel protection
               for a shared memory controller},
  booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
               {HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
  pages     = {382--393},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {https://doi.org/10.1109/HPCA.2016.7446080},
  doi       = {10.1109/HPCA.2016.7446080},
  timestamp = {Wed, 11 Dec 2019 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/hpca/FerraiuoloWZMS16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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