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@article{DBLP:journals/ijcta/KumarM24,
  author       = {Sandeep Kumar and
                  Atin Mukherjee},
  title        = {Low cost and high performance double-node upset resilient latch for
                  low orbit space applications},
  journal      = {Int. J. Circuit Theory Appl.},
  volume       = {52},
  number       = {5},
  pages        = {2534--2549},
  year         = {2024},
  url          = {https://doi.org/10.1002/cta.3855},
  doi          = {10.1002/CTA.3855},
  timestamp    = {Thu, 06 Jun 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijcta/KumarM24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/cssp/GonM23,
  author       = {Anusaka Gon and
                  Atin Mukherjee},
  title        = {FPGA-Based Low-Cost Architecture for R-Peak Detection and Heart-Rate
                  Calculation Using Lifting-Based Discrete Wavelet Transform},
  journal      = {Circuits Syst. Signal Process.},
  volume       = {42},
  number       = {1},
  pages        = {580--600},
  year         = {2023},
  url          = {https://doi.org/10.1007/s00034-022-02148-7},
  doi          = {10.1007/S00034-022-02148-7},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cssp/GonM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/KumarM23,
  author       = {Sandeep Kumar and
                  Atin Mukherjee},
  title        = {High performance radiation-hardened {SRAM} cell design for robust
                  applications},
  journal      = {Microelectron. J.},
  volume       = {140},
  pages        = {105934},
  year         = {2023},
  url          = {https://doi.org/10.1016/j.mejo.2023.105934},
  doi          = {10.1016/J.MEJO.2023.105934},
  timestamp    = {Fri, 27 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/KumarM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc-asia/SamalKM23,
  author       = {Anwesh Kumar Samal and
                  Sandeep Kumar and
                  Atin Mukherjee},
  title        = {Design of Single Node Upset Resilient Latch for Low Power, Low Cost
                  and Highly Robust Applications},
  booktitle    = {{IEEE} International Test Conference in Asia, ITC-Asia 2023, Matsue,
                  Japan, September 12-14, 2023},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ITC-Asia58802.2023.10301176},
  doi          = {10.1109/ITC-ASIA58802.2023.10301176},
  timestamp    = {Mon, 27 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc-asia/SamalKM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/KumarM21,
  author       = {Sandeep Kumar and
                  Atin Mukherjee},
  title        = {A Highly Robust and Low-Power Real-Time Double Node Upset Self-Healing
                  Latch for Radiation-Prone Applications},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {29},
  number       = {12},
  pages        = {2076--2085},
  year         = {2021},
  url          = {https://doi.org/10.1109/TVLSI.2021.3110135},
  doi          = {10.1109/TVLSI.2021.3110135},
  timestamp    = {Wed, 15 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/KumarM21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dft/KumarM21,
  author       = {Sandeep Kumar and
                  Atin Mukherjee},
  editor       = {Luigi Dilillo and
                  Luca Cassano and
                  Athanasios Papadimitriou},
  title        = {A Self-Healing, High Performance and Low-Cost Radiation Hardened Latch
                  Design},
  booktitle    = {36th {IEEE} International Symposium on Defect and Fault Tolerance
                  in {VLSI} and Nanotechnology Systems, {DFT} 2021, Athens, Greece,
                  October 6-8, 2021},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/DFT52944.2021.9568359},
  doi          = {10.1109/DFT52944.2021.9568359},
  timestamp    = {Fri, 22 Oct 2021 15:23:35 +0200},
  biburl       = {https://dblp.org/rec/conf/dft/KumarM21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/tencon/Mukherjee20,
  author       = {Atin Mukherjee},
  title        = {Defect Tolerant Approach for Reliable Majority Voter Design Using
                  Quadded Transistor Logic},
  booktitle    = {2020 {IEEE} Region 10 Conference, {TENCON} 2020, Osaka, Japan, November
                  16-19, 2020},
  pages        = {165--169},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/TENCON50793.2020.9293826},
  doi          = {10.1109/TENCON50793.2020.9293826},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/tencon/Mukherjee20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/MukherjeeD19,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  title        = {Triple transistor based triple modular redundancy with embedded voter
                  circuit},
  journal      = {Microelectron. J.},
  volume       = {87},
  pages        = {101--109},
  year         = {2019},
  url          = {https://doi.org/10.1016/j.mejo.2019.03.014},
  doi          = {10.1016/J.MEJO.2019.03.014},
  timestamp    = {Sat, 22 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/mj/MukherjeeD19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ises/0001D19,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  title        = {Defect Tolerant Majority Voter Design Using Triple Transistor Redundancy},
  booktitle    = {{IEEE} International Symposium on Smart Electronic Systems, iSES 2019
                  (Formerly iNiS), Rourkela, India, December 16-18, 2019},
  pages        = {63--68},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/iSES47678.2019.00026},
  doi          = {10.1109/ISES47678.2019.00026},
  timestamp    = {Sat, 05 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ises/0001D19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/cssp/MukherjeeD18,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  title        = {Reliable {VLSI} Architecture Design Using Modulo-Quad-Transistor Redundancy
                  Method},
  journal      = {Circuits Syst. Signal Process.},
  volume       = {37},
  number       = {12},
  pages        = {5595--5615},
  year         = {2018},
  url          = {https://doi.org/10.1007/s00034-018-0837-1},
  doi          = {10.1007/S00034-018-0837-1},
  timestamp    = {Sun, 21 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cssp/MukherjeeD18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1803-03800,
  author       = {Srayanta Mukherjee and
                  Devashish Shankar and
                  Atin Ghosh and
                  Nilam Tathawadekar and
                  Pramod Kompalli and
                  Sunita Sarawagi and
                  Krishnendu Chaudhury},
  title        = {{ARMDN:} Associative and Recurrent Mixture Density Networks for eRetail
                  Demand Forecasting},
  journal      = {CoRR},
  volume       = {abs/1803.03800},
  year         = {2018},
  url          = {http://arxiv.org/abs/1803.03800},
  eprinttype    = {arXiv},
  eprint       = {1803.03800},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1803-03800.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1810-06885,
  author       = {Atin Mukherjee and
                  Debesh Choudhury},
  title        = {An Area Efficient 2D Fourier Transform Architecture for {FPGA} Implementation},
  journal      = {CoRR},
  volume       = {abs/1810.06885},
  year         = {2018},
  url          = {http://arxiv.org/abs/1810.06885},
  eprinttype    = {arXiv},
  eprint       = {1810.06885},
  timestamp    = {Tue, 30 Oct 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1810-06885.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/MukherjeeD17,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  title        = {Triple transistor based fault tolerance for resource constrained applications},
  journal      = {Microelectron. J.},
  volume       = {68},
  pages        = {1--6},
  year         = {2017},
  url          = {https://doi.org/10.1016/j.mejo.2017.08.005},
  doi          = {10.1016/J.MEJO.2017.08.005},
  timestamp    = {Sat, 22 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/mj/MukherjeeD17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tim/MuduliMM17,
  author       = {Priya Ranjan Muduli and
                  Atindra Kanti Mandal and
                  Anirban Mukherjee},
  title        = {An Antinoise-Folding Algorithm for the Recovery of Biomedical Signals
                  From Noisy Measurements},
  journal      = {{IEEE} Trans. Instrum. Meas.},
  volume       = {66},
  number       = {11},
  pages        = {2909--2916},
  year         = {2017},
  url          = {https://doi.org/10.1109/TIM.2017.2734018},
  doi          = {10.1109/TIM.2017.2734018},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tim/MuduliMM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mr/MukherjeeD16,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  title        = {Choice of granularity for reliable circuit design using dynamic reconfiguration},
  journal      = {Microelectron. Reliab.},
  volume       = {63},
  pages        = {291--303},
  year         = {2016},
  url          = {https://doi.org/10.1016/j.microrel.2016.04.001},
  doi          = {10.1016/J.MICROREL.2016.04.001},
  timestamp    = {Sat, 22 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/mr/MukherjeeD16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mr/MukherjeeD15,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  title        = {Real-time fault-tolerance with hot-standby topology for conditional
                  sum adder},
  journal      = {Microelectron. Reliab.},
  volume       = {55},
  number       = {3-4},
  pages        = {704--712},
  year         = {2015},
  url          = {https://doi.org/10.1016/j.microrel.2014.12.011},
  doi          = {10.1016/J.MICROREL.2014.12.011},
  timestamp    = {Sat, 22 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/mr/MukherjeeD15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/0001D15,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  title        = {New triple-transistor based defect-tolerant systems for reliable digital
                  architectures},
  booktitle    = {2015 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  2015, Lisbon, Portugal, May 24-27, 2015},
  pages        = {1917--1920},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISCAS.2015.7169047},
  doi          = {10.1109/ISCAS.2015.7169047},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/0001D15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/MukherjeeSC15,
  author       = {Atin Mukherjee and
                  Amitabha Sinha and
                  Debesh Choudhury},
  title        = {A Novel Architecture of Area Efficient {FFT} Algorithm for {FPGA}
                  Implementation},
  journal      = {CoRR},
  volume       = {abs/1502.07055},
  year         = {2015},
  url          = {http://arxiv.org/abs/1502.07055},
  eprinttype    = {arXiv},
  eprint       = {1502.07055},
  timestamp    = {Mon, 13 Aug 2018 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/MukherjeeSC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/sigarch/MukherjeeSC14,
  author       = {Atin Mukherjee and
                  Amitabha Sinha and
                  Debesh Choudhury},
  title        = {A Novel Architecture of Area Efficient {FFT} Algorithm for {FPGA}
                  Implementation},
  journal      = {{SIGARCH} Comput. Archit. News},
  volume       = {42},
  number       = {5},
  pages        = {1--6},
  year         = {2014},
  url          = {https://doi.org/10.1145/2935687.2935689},
  doi          = {10.1145/2935687.2935689},
  timestamp    = {Thu, 30 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/sigarch/MukherjeeSC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ised/0001D12,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  title        = {Design of a Self-Reconfigurable Adder for Fault-Tolerant {VLSI} Architecture},
  booktitle    = {International Symposium on Electronic System Design, ISEDs 2012, Kolkata,
                  India, December 19-22, 2012},
  pages        = {92--96},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISED.2012.21},
  doi          = {10.1109/ISED.2012.21},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/ised/0001D12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vdat/MukherjeeD12,
  author       = {Atin Mukherjee and
                  Anindya Sundar Dhar},
  editor       = {Hafizur Rahaman and
                  Sanatan Chattopadhyay and
                  Santanu Chattopadhyay},
  title        = {Design of a Fault-Tolerant Conditional Sum Adder},
  booktitle    = {Progress in {VLSI} Design and Test - 16th International Symposium,
                  {VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {7373},
  pages        = {217--222},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-642-31494-0\_25},
  doi          = {10.1007/978-3-642-31494-0\_25},
  timestamp    = {Tue, 22 Oct 2019 15:21:19 +0200},
  biburl       = {https://dblp.org/rec/conf/vdat/MukherjeeD12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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