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@article{DBLP:journals/jsa/MosqueraEHKMJ24,
  author       = {Fernando Mosquera and
                  Ashen Ekanayake and
                  William Hua and
                  Krishna Kavi and
                  Gayatri Mehta and
                  Lizy Kurian John},
  title        = {SecurityCloak: Protection against cache timing and speculative memory
                  access attacks},
  journal      = {J. Syst. Archit.},
  volume       = {150},
  pages        = {103107},
  year         = {2024},
  url          = {https://doi.org/10.1016/j.sysarc.2024.103107},
  doi          = {10.1016/J.SYSARC.2024.103107},
  timestamp    = {Fri, 31 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/MosqueraEHKMJ24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icpp/WuE0BJ22,
  author       = {Qinzhe Wu and
                  Ashen Ekanayake and
                  Ruihao Li and
                  Jonathan Beard and
                  Lizy Kurian John},
  title        = {SPAMeR: Speculative Push for Anticipated Message Requests in Multi-Core
                  Systems},
  booktitle    = {Proceedings of the 51st International Conference on Parallel Processing,
                  {ICPP} 2022, Bordeaux, France, 29 August 2022 - 1 September 2022},
  pages        = {58:1--58:12},
  publisher    = {{ACM}},
  year         = {2022},
  url          = {https://doi.org/10.1145/3545008.3545044},
  doi          = {10.1145/3545008.3545044},
  timestamp    = {Mon, 16 Jan 2023 12:15:09 +0100},
  biburl       = {https://dblp.org/rec/conf/icpp/WuE0BJ22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ipps/WuBEGJ21,
  author       = {Qinzhe Wu and
                  Jonathan Beard and
                  Ashen Ekanayake and
                  Andreas Gerstlauer and
                  Lizy K. John},
  title        = {Virtual-Link: {A} Scalable Multi-Producer Multi-Consumer Message Queue
                  Architecture for Cross-Core Communication},
  booktitle    = {35th {IEEE} International Parallel and Distributed Processing Symposium,
                  {IPDPS} 2021, Portland, OR, USA, May 17-21, 2021},
  pages        = {182--191},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/IPDPS49936.2021.00027},
  doi          = {10.1109/IPDPS49936.2021.00027},
  timestamp    = {Fri, 02 Jul 2021 14:10:24 +0200},
  biburl       = {https://dblp.org/rec/conf/ipps/WuBEGJ21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2012-05181,
  author       = {Qinzhe Wu and
                  Jonathan Beard and
                  Ashen Ekanayake and
                  Andreas Gerstlauer and
                  Lizy K. John},
  title        = {Virtual-Link: {A} Scalable Multi-Producer, Multi-Consumer Message
                  Queue Architecture for Cross-Core Communication},
  journal      = {CoRR},
  volume       = {abs/2012.05181},
  year         = {2020},
  url          = {https://arxiv.org/abs/2012.05181},
  eprinttype    = {arXiv},
  eprint       = {2012.05181},
  timestamp    = {Sat, 02 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2012-05181.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/WijeratneEJRP19,
  author       = {Sasindu Wijeratne and
                  Ashen Ekanayake and
                  Sandaruwan Jayaweera and
                  Danuka Ravishan and
                  Ajith Pasqual},
  editor       = {Kia Bazargan and
                  Stephen Neuendorffer},
  title        = {Scalable High Performance {SDN} Switch Architecture on {FPGA} for
                  Core Networks},
  booktitle    = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable
                  Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019},
  pages        = {117},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3289602.3293933},
  doi          = {10.1145/3289602.3293933},
  timestamp    = {Tue, 05 Mar 2019 07:04:43 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/WijeratneEJRP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1910-13683,
  author       = {Sasindu Wijeratne and
                  Ashen Ekanayake and
                  Sandaruwan Jayaweera and
                  Danuka Ravishan and
                  Ajith Pasqual},
  title        = {Scalable High Performance {SDN} Switch Architecture on {FPGA} for
                  Core Networks},
  journal      = {CoRR},
  volume       = {abs/1910.13683},
  year         = {2019},
  url          = {http://arxiv.org/abs/1910.13683},
  eprinttype    = {arXiv},
  eprint       = {1910.13683},
  timestamp    = {Thu, 31 Oct 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1910-13683.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asap/SenanayakeLWAAT17,
  author       = {Rishan Senanayake and
                  Namitha Liyanage and
                  Sasindu Wijeratne and
                  Sachille Atapattu and
                  Kasun Athukorala and
                  P. M. K. Tharaka and
                  Geethan Karunaratne and
                  R. M. A. U. Senarath and
                  Ishantha Perera and
                  Ashen Ekanayake and
                  Ajith Pasqual},
  title        = {High performance hardware architectures for Intra Block Copy and Palette
                  Coding for {HEVC} screen content coding extension},
  booktitle    = {28th {IEEE} International Conference on Application-specific Systems,
                  Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
                  10-12, 2017},
  pages        = {164--169},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/ASAP.2017.7995274},
  doi          = {10.1109/ASAP.2017.7995274},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/asap/SenanayakeLWAAT17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}