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export results for "17.3 A 28nm 256kb 6T-SRAM with 280mV improvement in VMIN using a dual-split-control assist scheme."

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@inproceedings{DBLP:conf/isscc/ChangCCSWY15,
  author       = {Meng{-}Fan Chang and
                  Chien{-}Fu Chen and
                  Ting{-}Hao Chang and
                  Chi{-}Chang Shuai and
                  Yen{-}Yao Wang and
                  Hiroyuki Yamauchi},
  title        = {17.3 {A} 28nm 256kb 6T-SRAM with 280mV improvement in {VMIN} using
                  a dual-split-control assist scheme},
  booktitle    = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2015, Digest of Technical Papers, San Francisco, CA, USA, February
                  22-26, 2015},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISSCC.2015.7063052},
  doi          = {10.1109/ISSCC.2015.7063052},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ChangCCSWY15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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