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export results for "17.2 5.6Mb/mm2 1R1W 8T SRAM arrays operating down to 560mV utilizing small-signal sensing with charge-shared bitline and asymmetric sense amplifier in 14nm FinFET CMOS technology"
@inproceedings{DBLP:conf/isscc/KeaneKKNGKZ16, author = {John Keane and Jaydeep Kulkarni and Kyung{-}Hoae Koo and Satyanand Nalam and Zheng Guo and Eric Karl and Kevin Zhang}, title = {17.2 5.6Mb/mm2 1R1W 8T {SRAM} arrays operating down to 560mV utilizing small-signal sensing with charge-shared bitline and asymmetric sense amplifier in 14nm FinFET {CMOS} technology}, booktitle = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2016, San Francisco, CA, USA, January 31 - February 4, 2016}, pages = {308--309}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ISSCC.2016.7418030}, doi = {10.1109/ISSCC.2016.7418030}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/KeaneKKNGKZ16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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