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export results for "A Performance-Driven Multilevel Framework for the X-Based Full-Chip Router"
@inproceedings{DBLP:conf/patmos/Ho08, author = {Tsung{-}Yi Ho}, title = {A Performance-Driven Multilevel Framework for the X-Based Full-Chip Router}, booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 18th International Workshop, {PATMOS} 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers}, pages = {209--218}, year = {2008}, crossref = {DBLP:conf/patmos/2008}, url = {https://doi.org/10.1007/978-3-540-95948-9\_21}, doi = {10.1007/978-3-540-95948-9\_21}, timestamp = {Wed, 23 Feb 2022 16:05:31 +0100}, biburl = {https://dblp.org/rec/conf/patmos/Ho08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/patmos/2008, editor = {Lars Svensson and Jos{\'{e}} Monteiro}, title = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 18th International Workshop, {PATMOS} 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {5349}, publisher = {Springer}, year = {2009}, url = {https://doi.org/10.1007/978-3-540-95948-9}, doi = {10.1007/978-3-540-95948-9}, isbn = {978-3-540-95947-2}, timestamp = {Sun, 16 Jun 2024 11:57:21 +0200}, biburl = {https://dblp.org/rec/conf/patmos/2008.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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