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@inproceedings{DBLP:conf/cicc/ChinosiZG99, author = {Mauro Chinosi and Roberto Zafalon and Carlo Guardiani}, title = {Fast and accurate power verification of a Viterbi decoder {IP} based on mixed-level power simulation technique with automatic spatio-temporal circuit partitioning}, booktitle = {Proceedings of the {IEEE} 1999 Custom Integrated Circuits Conference, {CICC} 1999, San Diego, CA, USA, May 16-19, 1999}, pages = {31--34}, publisher = {{IEEE}}, year = {1999}, url = {https://doi.org/10.1109/CICC.1999.777238}, doi = {10.1109/CICC.1999.777238}, timestamp = {Fri, 07 Jul 2023 11:00:51 +0200}, biburl = {https://dblp.org/rec/conf/cicc/ChinosiZG99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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