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export results for "Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis."
@inproceedings{DBLP:conf/fpga/DaiZLSGBZ17, author = {Steve Dai and Ritchie Zhao and Gai Liu and Shreesha Srinath and Udit Gupta and Christopher Batten and Zhiru Zhang}, editor = {Jonathan W. Greene and Jason Helge Anderson}, title = {Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis}, booktitle = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017}, pages = {189--194}, publisher = {{ACM}}, year = {2017}, url = {http://dl.acm.org/citation.cfm?id=3021754}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/DaiZLSGBZ17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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