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export results for "latency bottleneck"
@inproceedings{DBLP:conf/ispass/EyermanHH22, author = {Stijn Eyerman and Wim Heirman and Ibrahim Hur}, title = {{DRAM} Bandwidth and Latency Stacks: Visualizing {DRAM} Bottlenecks}, booktitle = {{ISPASS}}, pages = {322--331}, publisher = {{IEEE}}, year = {2022} }
@article{DBLP:journals/ijcta/RadhaSN19, author = {Subramanyam Radha and David Sundararaj Shylu and Perattur Nagabushanam}, title = {Power efficient low latency architecture for decoder: Breaking the {ACS} bottleneck}, journal = {Int. J. Circuit Theory Appl.}, volume = {47}, number = {9}, pages = {1513--1528}, year = {2019} }
@inproceedings{DBLP:conf/isit/SpeidelPB17, author = {Ulrich Speidel and Sven Puchinger and Martin Bossert}, title = {Constraints for coded tunnels across long latency bottlenecks with ARQ-based congestion control}, booktitle = {{ISIT}}, pages = {271--275}, publisher = {{IEEE}}, year = {2017} }
@phdthesis{DBLP:phd/basesearch/Wang15l, author = {Qingyang Wang}, title = {A study of transient bottlenecks: understanding and reducing latency long-tail problem in n-tier web applications}, school = {Georgia Institute of Technology, Atlanta, GA, {USA}}, year = {2015} }
@article{DBLP:journals/tvlsi/DasygenisBDCST06, author = {Minas Dasygenis and Erik Brockmeyer and Bart Durinck and Francky Catthoor and Dimitrios Soudris and Adonios Thanailakis}, title = {A combined {DMA} and application-specific prefetching approach for tackling the memory latency bottleneck}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {14}, number = {3}, pages = {279--291}, year = {2006} }
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