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@article{DBLP:journals/vlsisp/CalhounA06,
  author       = {Vince D. Calhoun and
                  T{\"{u}}lay Adali},
  title        = {Complex Infomax: Convergence and Approximation of Infomax with Complex
                  Nonlinearities},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {173--190},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-7514-5},
  doi          = {10.1007/S11265-006-7514-5},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsisp/CalhounA06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/CartaPR06,
  author       = {Salvatore Carta and
                  Danilo Pani and
                  Luigi Raffo},
  title        = {Reconfigurable Coprocessor for Multimedia Application Domain},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {135--152},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-7512-7},
  doi          = {10.1007/S11265-006-7512-7},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/CartaPR06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/ChanX06,
  author       = {S. C. Chan and
                  Xuemei Xie},
  title        = {Biorthogonal Recombination Nonuniform Cosine-Modulated Filter Banks
                  and their Multiplier-Less Realizations},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {5--23},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-005-4175-8},
  doi          = {10.1007/S11265-005-4175-8},
  timestamp    = {Tue, 02 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsisp/ChanX06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/ChandarMG06,
  author       = {Subash Chandar G. and
                  Mahesh Mehendale and
                  R. Govindarajan},
  title        = {Area and Power Reduction of Embedded {DSP} Systems using Instruction
                  Compression and Re-configurable Encoding},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {3},
  pages        = {245--267},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-8538-6},
  doi          = {10.1007/S11265-006-8538-6},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/ChandarMG06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/ChangHCC06,
  author       = {Yung{-}Chi Chang and
                  Chih{-}Wei Hsu and
                  Wei{-}Min Chao and
                  Liang{-}Gee Chen},
  title        = {Interactive Content-aware Video Streaming System with Fine Granularity
                  Scalability},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {117--134},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-7511-8},
  doi          = {10.1007/S11265-006-7511-8},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/ChangHCC06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/GaoP06,
  author       = {Lijun Gao and
                  Keshab K. Parhi},
  title        = {Models for Architectural Power and Power Grid Noise Analysis on Data
                  Bus},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {25--46},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-4176-2},
  doi          = {10.1007/S11265-006-4176-2},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/GaoP06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/GasteratosGA06,
  author       = {Ioannis Gasteratos and
                  Antonios Gasteratos and
                  Ioannis Andreadis},
  title        = {An Algorithm for Adaptive Mean Filtering and Its Hardware Implementation},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {63--78},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-5920-3},
  doi          = {10.1007/S11265-006-5920-3},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/GasteratosGA06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/GuoC06,
  author       = {Yuanbin Guo and
                  Joseph R. Cavallaro},
  title        = {A Low Complexity and Low Power SoC Design Architecture for Adaptive
                  {MAI} Suppression in {CDMA} Systems},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {3},
  pages        = {195--217},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-8535-9},
  doi          = {10.1007/S11265-006-8535-9},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsisp/GuoC06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/GuoN06,
  author       = {Zhan Guo and
                  Peter Nilsson},
  title        = {A {VLSI} Architecture of the Square Root Algorithm for {V-BLAST} Detection},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {3},
  pages        = {219--230},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-8536-8},
  doi          = {10.1007/S11265-006-8536-8},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/GuoN06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/HongCDB06,
  author       = {Sangjin Hong and
                  Shu{-}Shin Chin and
                  Petar M. Djuric and
                  Miodrag Bolic},
  title        = {Design and Implementation of Flexible Resampling Mechanism for High-Speed
                  Parallel Particle Filters},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {47--62},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-5919-9},
  doi          = {10.1007/S11265-006-5919-9},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/HongCDB06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/HosemannF06a,
  author       = {Michael Hosemann and
                  Gerhard P. Fettweis},
  title        = {On enhancing SIMD-controlled DSPs for performing recursive filtering},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {191},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-9714-4},
  doi          = {10.1007/S11265-006-9714-4},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/HosemannF06a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/KangasHK06,
  author       = {Tero Kangas and
                  Timo D. H{\"{a}}m{\"{a}}l{\"{a}}inen and
                  Kimmo Kuusilinna},
  title        = {Scalable Architecture for SoC Video Encoders},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {79--95},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-5918-x},
  doi          = {10.1007/S11265-006-5918-X},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/KangasHK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/KimK06,
  author       = {Young{-}Jun Kim and
                  Taewhan Kim},
  title        = {A {HW/SW} Partitioner for Multi-Mode Multi-Task Embedded Applications},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {3},
  pages        = {269--283},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-8539-5},
  doi          = {10.1007/S11265-006-8539-5},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/KimK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/KroupisZDTAST06,
  author       = {Nikolas Kroupis and
                  Nikolaos D. Zervas and
                  Minas Dasygenis and
                  Konstantinos Tatas and
                  Antonios Argyriou and
                  Dimitrios Soudris and
                  Antonios Thanailakis},
  title        = {Behavioral-Level Performance and Power Exploration of Data-Intensive
                  Applications Mapped on Programmable Processors},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {153--171},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-7513-6},
  doi          = {10.1007/S11265-006-7513-6},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/KroupisZDTAST06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/TsuiC06,
  author       = {Kai Man Tsui and
                  Shing{-}Chow Chan},
  title        = {Error Analysis and Efficient Realization of the Multiplier-Less FFT-Like
                  Transformation {(ML-FFT)} and Related Sinusoidal Transformations},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {1-2},
  pages        = {97--115},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-7510-9},
  doi          = {10.1007/S11265-006-7510-9},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/TsuiC06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/UmK06,
  author       = {Junhyung Um and
                  Taewhan Kim},
  title        = {Resource Sharing Combined with Layout Effects in High-Level Synthesis},
  journal      = {J. {VLSI} Signal Process.},
  volume       = {44},
  number       = {3},
  pages        = {231--243},
  year         = {2006},
  url          = {https://doi.org/10.1007/s11265-006-8537-7},
  doi          = {10.1007/S11265-006-8537-7},
  timestamp    = {Wed, 20 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/UmK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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