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@article{DBLP:journals/trets/BouganisPCC09,
  author       = {Christos{-}Savvas Bouganis and
                  Sung{-}Boem Park and
                  George A. Constantinides and
                  Peter Y. K. Cheung},
  title        = {Synthesis and Optimization of 2D Filter Designs for Heterogeneous
                  FPGAs},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {4},
  pages        = {24:1--24:28},
  year         = {2009},
  url          = {https://doi.org/10.1145/1462586.1462593},
  doi          = {10.1145/1462586.1462593},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/BouganisPCC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/ChinW09,
  author       = {Scott Y. L. Chin and
                  Steven J. E. Wilton},
  title        = {Static and Dynamic Memory Footprint Reduction for {FPGA} Routing Algorithms},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {4},
  pages        = {18:1--18:20},
  year         = {2009},
  url          = {https://doi.org/10.1145/1462586.1462587},
  doi          = {10.1145/1462586.1462587},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/ChinW09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/El-ArabyGE09,
  author       = {Esam El{-}Araby and
                  Iv{\'{a}}n Gonz{\'{a}}lez and
                  Tarek A. El{-}Ghazawi},
  title        = {Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable
                  Computing},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {4},
  pages        = {21:1--21:23},
  year         = {2009},
  url          = {https://doi.org/10.1145/1462586.1462590},
  doi          = {10.1145/1462586.1462590},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/El-ArabyGE09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/HollandNG09,
  author       = {Brian Holland and
                  Karthik Nagarajan and
                  Alan D. George},
  title        = {{RAT:} {RC} Amenability Test for Rapid Performance Prediction},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {4},
  pages        = {22:1--22:31},
  year         = {2009},
  url          = {https://doi.org/10.1145/1462586.1462591},
  doi          = {10.1145/1462586.1462591},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/HollandNG09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/MurtazaHS09,
  author       = {S. Murtaza and
                  Alfons G. Hoekstra and
                  Peter M. A. Sloot},
  title        = {Compute Bound and {I/O} Bound Cellular Automata Simulations on {FPGA}
                  Logic},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {4},
  pages        = {23:1--23:21},
  year         = {2009},
  url          = {https://doi.org/10.1145/1462586.1462592},
  doi          = {10.1145/1462586.1462592},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/MurtazaHS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/PattersonEMDSKC09,
  author       = {Cameron D. Patterson and
                  Steven W. Ellingson and
                  Brian S. Martin and
                  K. Deshpande and
                  John H. Simonetti and
                  Michael Kavic and
                  Sean E. Cutchin},
  title        = {Searching for Transient Pulses with the {ETA} Radio Telescope},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {4},
  pages        = {20:1--20:19},
  year         = {2009},
  url          = {https://doi.org/10.1145/1462586.1462589},
  doi          = {10.1145/1462586.1462589},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/PattersonEMDSKC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/XuCGZH09,
  author       = {Ningyi Xu and
                  Xiongfei Cai and
                  Rui Gao and
                  Lei Zhang and
                  Feng{-}Hsiung Hsu},
  title        = {{FPGA} Acceleration of RankBoost in Web Search Engines},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {4},
  pages        = {19:1--19:19},
  year         = {2009},
  url          = {https://doi.org/10.1145/1462586.1462588},
  doi          = {10.1145/1462586.1462588},
  timestamp    = {Tue, 21 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/trets/XuCGZH09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/BeecklerG08,
  author       = {John Sachs Beeckler and
                  Warren J. Gross},
  title        = {Particle graphics on reconfigurable hardware},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {3},
  pages        = {15:1--15:27},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391732.1391735},
  doi          = {10.1145/1391732.1391735},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/BeecklerG08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/BuellL08,
  author       = {Duncan A. Buell and
                  Wayne Luk},
  title        = {Introduction},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {1},
  pages        = {1:1--1:2},
  year         = {2008},
  url          = {https://doi.org/10.1145/1331897.1331898},
  doi          = {10.1145/1331897.1331898},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/BuellL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/DeHonH08,
  author       = {Andr{\'{e}} DeHon and
                  Mike Hutton},
  title        = {Guest Editorial: {TRETS} Special Edition on the 15th International
                  Symposium on FPGAs},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {1},
  pages        = {2:1--2:3},
  year         = {2008},
  url          = {https://doi.org/10.1145/1331897.1341292},
  doi          = {10.1145/1331897.1341292},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/DeHonH08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/FengK08,
  author       = {Wenyi Feng and
                  Sinan Kaptanoglu},
  title        = {Designing Efficient Input Interconnect Blocks for {LUT} Clusters Using
                  Counting and Entropy},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {1},
  pages        = {6:1--6:28},
  year         = {2008},
  url          = {https://doi.org/10.1145/1331897.1331902},
  doi          = {10.1145/1331897.1331902},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/FengK08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/GorjiaraRG08,
  author       = {Bita Gorjiara and
                  Mehrdad Reshadi and
                  Daniel Gajski},
  title        = {Merged Dictionary Code Compression for {FPGA} Implementation of Custom
                  Microcoded PEs},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {2},
  pages        = {11:1--11:21},
  year         = {2008},
  url          = {https://doi.org/10.1145/1371579.1371583},
  doi          = {10.1145/1371579.1371583},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/GorjiaraRG08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/GrantL08,
  author       = {David Grant and
                  Guy G. Lemieux},
  title        = {Perturb+mutate: Semisynthetic circuit generation for incremental placement
                  and routing},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {3},
  pages        = {16:1--16:24},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391732.1391736},
  doi          = {10.1145/1391732.1391736},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/GrantL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/GuneysuPP08,
  author       = {Tim G{\"{u}}neysu and
                  Christof Paar and
                  Jan Pelzl},
  title        = {Special-Purpose Hardware for Solving the Elliptic Curve Discrete Logarithm
                  Problem},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {2},
  pages        = {8:1--8:21},
  year         = {2008},
  url          = {https://doi.org/10.1145/1371579.1371580},
  doi          = {10.1145/1371579.1371580},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/GuneysuPP08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/HsiungLL08,
  author       = {Pao{-}Ann Hsiung and
                  Chao{-}Sheng Lin and
                  Chih{-}Feng Liao},
  title        = {Perfecto: {A} systemc-based design-space exploration framework for
                  dynamically reconfigurable architectures},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {3},
  pages        = {17:1--17:30},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391732.1391737},
  doi          = {10.1145/1391732.1391737},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/HsiungLL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/JacobLBHC08,
  author       = {Arpith C. Jacob and
                  Joseph M. Lancaster and
                  Jeremy Buhler and
                  Brandon Harris and
                  Roger D. Chamberlain},
  title        = {Mercury {BLASTP:} Accelerating Protein Sequence Alignment},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {2},
  pages        = {9:1--9:44},
  year         = {2008},
  url          = {https://doi.org/10.1145/1371579.1371581},
  doi          = {10.1145/1371579.1371581},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/trets/JacobLBHC08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/LamoureuxW08,
  author       = {Julien Lamoureux and
                  Steven J. E. Wilton},
  title        = {On the trade-off between power and flexibility of {FPGA} clock networks},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {3},
  pages        = {13:1--13:33},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391732.1391733},
  doi          = {10.1145/1391732.1391733},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/LamoureuxW08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/LuYSKK08,
  author       = {Shih{-}Lien Lu and
                  Peter Yiannacouras and
                  Taeweon Suh and
                  Rolf Kassa and
                  Michael Konow},
  title        = {A Desktop Computer with a Reconfigurable Pentium{\textregistered}},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {1},
  pages        = {5:1--5:15},
  year         = {2008},
  url          = {https://doi.org/10.1145/1331897.1331901},
  doi          = {10.1145/1331897.1331901},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/LuYSKK08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/MatsumotoHKKTNS08,
  author       = {Yohei Matsumoto and
                  Masakazu Hioki and
                  Takashi Kawanami and
                  Hanpei Koike and
                  Toshiyuki Tsutsumi and
                  Tadashi Nakagawa and
                  Toshihiro Sekigawa},
  title        = {Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {1},
  pages        = {3:1--3:31},
  year         = {2008},
  url          = {https://doi.org/10.1145/1331897.1331899},
  doi          = {10.1145/1331897.1331899},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/MatsumotoHKKTNS08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/SedcoleC08,
  author       = {N. Pete Sedcole and
                  Peter Y. K. Cheung},
  title        = {Parametric Yield Modeling and Simulations of {FPGA} Circuits Considering
                  Within-Die Delay Variations},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {2},
  pages        = {10:1--10:28},
  year         = {2008},
  url          = {https://doi.org/10.1145/1371579.1371582},
  doi          = {10.1145/1371579.1371582},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/SedcoleC08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/SivaswamyB08,
  author       = {Satish Sivaswamy and
                  Kia Bazargan},
  title        = {Statistical Analysis and Process Variation-Aware Routing and Skew
                  Assignment for FPGAs},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {1},
  pages        = {4:1--4:35},
  year         = {2008},
  url          = {https://doi.org/10.1145/1331897.1331900},
  doi          = {10.1145/1331897.1331900},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/SivaswamyB08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/SlogsnatGNB08,
  author       = {David Slogsnat and
                  Alexander Giese and
                  Mondrian N{\"{u}}ssle and
                  Ulrich Br{\"{u}}ning},
  title        = {An open-source HyperTransport core},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {3},
  pages        = {14:1--14:21},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391732.1391734},
  doi          = {10.1145/1391732.1391734},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/SlogsnatGNB08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/ThomasL08,
  author       = {David B. Thomas and
                  Wayne Luk},
  title        = {Multivariate Gaussian Random Number Generation Targeting Reconfigurable
                  Hardware},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {2},
  pages        = {12:1--12:29},
  year         = {2008},
  url          = {https://doi.org/10.1145/1371579.1371584},
  doi          = {10.1145/1371579.1371584},
  timestamp    = {Fri, 24 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/ThomasL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/WiltonHQLL08,
  author       = {Steven J. E. Wilton and
                  Chun Hok Ho and
                  Bradley R. Quinton and
                  Philip Heng Wai Leong and
                  Wayne Luk},
  title        = {A Synthesizable Datapath-Oriented Embedded {FPGA} Fabric for Silicon
                  Debug Applications},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {1},
  number       = {1},
  pages        = {7:1--7:25},
  year         = {2008},
  url          = {https://doi.org/10.1145/1331897.1331903},
  doi          = {10.1145/1331897.1331903},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/trets/WiltonHQLL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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