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@article{DBLP:journals/todaes/0001CKCB15,
  author       = {Sudip Roy and
                  Partha Pratim Chakrabarti and
                  Srijan Kumar and
                  Krishnendu Chakrabarty and
                  Bhargab B. Bhattacharya},
  title        = {Layout-Aware Mixture Preparation of Biochemical Fluids on Application-Specific
                  Digital Microfluidic Biochips},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {45:1--45:34},
  year         = {2015},
  url          = {https://doi.org/10.1145/2714562},
  doi          = {10.1145/2714562},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/0001CKCB15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/AsadiniaAS15,
  author       = {Marjan Asadinia and
                  Mohammad Arjomand and
                  Hamid Sarbazi{-}Azad},
  title        = {Prolonging Lifetime of PCM-Based Main Memories through On-Demand Page
                  Pairing},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {23:1--23:24},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699867},
  doi          = {10.1145/2699867},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/AsadiniaAS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/BaharJX15,
  author       = {R. Iris Bahar and
                  Alex K. Jones and
                  Yuan Xie},
  title        = {Introduction to the Special Issue on Reliable, Resilient, and Robust
                  Design of Circuits and Systems},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {59:1--59:2},
  year         = {2015},
  url          = {https://doi.org/10.1145/2796541},
  doi          = {10.1145/2796541},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/BaharJX15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/BaranowskiKW15,
  author       = {Rafal Baranowski and
                  Michael A. Kochte and
                  Hans{-}Joachim Wunderlich},
  title        = {Reconfigurable Scan Networks: Modeling, Verification, and Optimal
                  Pattern Generation},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {30:1--30:27},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699863},
  doi          = {10.1145/2699863},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/BaranowskiKW15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/BezniaBEM15,
  author       = {Kamel Beznia and
                  Ahc{\`{e}}ne Bounceur and
                  Reinhardt Euler and
                  Salvador Mir},
  title        = {A Tool for Analog/RF {BIST} Evaluation Using Statistical Models of
                  Circuit Parameters},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {31:1--31:22},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699837},
  doi          = {10.1145/2699837},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/BezniaBEM15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/BombieriFV15,
  author       = {Nicola Bombieri and
                  Franco Fummi and
                  Sara Vinco},
  title        = {A Methodology to Recover {RTL} {IP} Functionality for Automatic Generation
                  of {SW} Applications},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {36:1--36:26},
  year         = {2015},
  url          = {https://doi.org/10.1145/2720019},
  doi          = {10.1145/2720019},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/BombieriFV15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ChangCH15,
  author       = {Nai{-}Wen Chang and
                  Eddie Cheng and
                  Sun{-}Yuan Hsieh},
  title        = {Conditional Diagnosability of Cayley Graphs Generated by Transposition
                  Trees under the {PMC} Model},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {20:1--20:16},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699854},
  doi          = {10.1145/2699854},
  timestamp    = {Sat, 01 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/ChangCH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ChangCHKL15,
  author       = {Hung{-}Sheng Chang and
                  Yuan{-}Hao Chang and
                  Pi{-}Cheng Hsiu and
                  Tei{-}Wei Kuo and
                  Hsiang{-}Pang Li},
  title        = {Marching-Based Wear-Leveling for PCM-Based Storage Systems},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {25:1--25:22},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699831},
  doi          = {10.1145/2699831},
  timestamp    = {Tue, 05 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/ChangCHKL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ChangCS15,
  author       = {Da{-}Wei Chang and
                  Hsin{-}Hung Chen and
                  Wei{-}Jian Su},
  title        = {{VSSD:} Performance Isolation in a Solid-State Drive},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {51:1--51:33},
  year         = {2015},
  url          = {https://doi.org/10.1145/2755560},
  doi          = {10.1145/2755560},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/ChangCS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/Chen0BK15,
  author       = {Gang Chen and
                  Kai Huang and
                  Christian Buckl and
                  Alois C. Knoll},
  title        = {Applying Pay-Burst-Only-Once Principle for Periodic Power Management
                  in Hard Real-Time Pipelined Multiprocessor Systems},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {26:1--26:27},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699865},
  doi          = {10.1145/2699865},
  timestamp    = {Wed, 19 May 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/Chen0BK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ChenLTHWW15,
  author       = {Hai{-}Bao Chen and
                  Ying{-}Chi Li and
                  Sheldon X.{-}D. Tan and
                  Xin Huang and
                  Hai Wang and
                  Ngai Wong},
  title        = {\emph{H}-Matrix-Based Finite-Element-Based Thermal Analysis for 3D
                  ICs},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {47:1--47:25},
  year         = {2015},
  url          = {https://doi.org/10.1145/2714563},
  doi          = {10.1145/2714563},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/ChenLTHWW15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/DelshadtehraniF15,
  author       = {Leila Delshadtehrani and
                  Hamed Farbeh and
                  Seyed Ghassem Miremadi},
  title        = {In-Scratchpad Memory Replication: Protecting Scratchpad Memories in
                  Multicore Embedded Systems against Soft Errors},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {61:1--61:28},
  year         = {2015},
  url          = {https://doi.org/10.1145/2770874},
  doi          = {10.1145/2770874},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/DelshadtehraniF15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/DuanKZCD15,
  author       = {Qing Duan and
                  Abhishek Koneru and
                  Jun Zeng and
                  Krishnendu Chakrabarty and
                  Gary Dispoto},
  title        = {Accurate Analysis and Prediction of Enterprise Service-Level Performance},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {52:1--52:23},
  year         = {2015},
  url          = {https://doi.org/10.1145/2757279},
  doi          = {10.1145/2757279},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/DuanKZCD15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/DuanZCD15,
  author       = {Qing Duan and
                  Jun Zeng and
                  Krishnendu Chakrabarty and
                  Gary Dispoto},
  title        = {Data-Driven Optimization of Order Admission Policies in a Digital
                  Print Factory},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {21:1--21:25},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699836},
  doi          = {10.1145/2699836},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/DuanZCD15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/FirouziYCT15,
  author       = {Farshad Firouzi and
                  Fangming Ye and
                  Krishnendu Chakrabarty and
                  Mehdi Baradaran Tahoori},
  title        = {Aging- and Variation-Aware Delay Monitoring Using Representative Critical
                  Path Selection},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {39:1--39:23},
  year         = {2015},
  url          = {https://doi.org/10.1145/2746237},
  doi          = {10.1145/2746237},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/FirouziYCT15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/GuoCZTLQC15,
  author       = {Qi Guo and
                  Tianshi Chen and
                  Zhi{-}Hua Zhou and
                  Olivier Temam and
                  Ling Li and
                  Depei Qian and
                  Yunji Chen},
  title        = {Robust Design Space Modeling},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {18:1--18:22},
  year         = {2015},
  url          = {https://doi.org/10.1145/2668118},
  doi          = {10.1145/2668118},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/GuoCZTLQC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/GupteVJ15,
  author       = {Adwait Gupte and
                  Sudhanshu Vyas and
                  Phillip H. Jones},
  title        = {A Fault-Aware Toolchain Approach for {FPGA} Fault Tolerance},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {32:1--32:22},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699838},
  doi          = {10.1145/2699838},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/GupteVJ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/HeoKLCLKP15,
  author       = {Ingoo Heo and
                  Minsu Kim and
                  Yongje Lee and
                  Changho Choi and
                  Jinyong Lee and
                  Brent ByungHoon Kang and
                  Yunheung Paek},
  title        = {Implementing an Application-Specific Instruction-Set Processor for
                  System-Level Dynamic Program Analysis Engines},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {53:1--53:32},
  year         = {2015},
  url          = {https://doi.org/10.1145/2746238},
  doi          = {10.1145/2746238},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/HeoKLCLKP15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/HeyseFBS15,
  author       = {Karel Heyse and
                  Brahim Al Farisi and
                  Karel Bruneel and
                  Dirk Stroobandt},
  title        = {{TCONMAP:} Technology Mapping for Parameterised {FPGA} Configurations},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {48:1--48:27},
  year         = {2015},
  url          = {https://doi.org/10.1145/2751558},
  doi          = {10.1145/2751558},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/HeyseFBS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/HolstIW15,
  author       = {Stefan Holst and
                  Michael E. Imhof and
                  Hans{-}Joachim Wunderlich},
  title        = {High-Throughput Logic Timing Simulation on GPGPUs},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {37:1--37:22},
  year         = {2015},
  url          = {https://doi.org/10.1145/2714564},
  doi          = {10.1145/2714564},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/HolstIW15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/HuangLGNC15,
  author       = {Xing Huang and
                  Genggeng Liu and
                  Wenzhong Guo and
                  Yuzhen Niu and
                  Guolong Chen},
  title        = {Obstacle-Avoiding Algorithm in X-Architecture Based on Discrete Particle
                  Swarm Optimization for {VLSI} Design},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {24:1--24:28},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699862},
  doi          = {10.1145/2699862},
  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/HuangLGNC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/IndrusiakHS15,
  author       = {Leandro Soares Indrusiak and
                  James Harbin and
                  Osmar Marchi dos Santos},
  title        = {Fast Simulation of Networks-on-Chip with Priority-Preemptive Arbitration},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {56:1--56:22},
  year         = {2015},
  url          = {https://doi.org/10.1145/2755559},
  doi          = {10.1145/2755559},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/IndrusiakHS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/JafariLJ15,
  author       = {Fahimeh Jafari and
                  Zhonghai Lu and
                  Axel Jantsch},
  title        = {Least Upper Delay Bound for {VBR} Flows in Networks-on-Chip with Virtual
                  Channels},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {35:1--35:33},
  year         = {2015},
  url          = {https://doi.org/10.1145/2733374},
  doi          = {10.1145/2733374},
  timestamp    = {Sat, 05 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/JafariLJ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/JiangZYZ15,
  author       = {Lei Jiang and
                  Bo Zhao and
                  Jun Yang and
                  Youtao Zhang},
  title        = {Constructing Large and Fast On-Chip Cache for Mobile Processors with
                  Multilevel Cell {STT-MRAM} Technology},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {54:1--54:24},
  year         = {2015},
  url          = {https://doi.org/10.1145/2764903},
  doi          = {10.1145/2764903},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/JiangZYZ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/KahngKLG15,
  author       = {Andrew B. Kahng and
                  Seokhyeong Kang and
                  Jiajia Li and
                  Jos{\'{e}} Pineda de Gyvez},
  title        = {An Improved Methodology for Resilient Design Implementation},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {66:1--66:26},
  year         = {2015},
  url          = {https://doi.org/10.1145/2749462},
  doi          = {10.1145/2749462},
  timestamp    = {Wed, 15 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/KahngKLG15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/KiddieRL15,
  author       = {Bradley T. Kiddie and
                  William H. Robinson and
                  Daniel B. Limbrick},
  title        = {Single-Event Multiple-Transient Characterization and Mitigation via
                  Alternative Standard Cell Placement Methods},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {60:1--60:22},
  year         = {2015},
  url          = {https://doi.org/10.1145/2740962},
  doi          = {10.1145/2740962},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/KiddieRL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/KimBVHGSM15,
  author       = {Hyungjun Kim and
                  Siva Bhanu Krishna Boga and
                  Arseniy Vitkovskiy and
                  Stavros Hadjitheophanous and
                  Paul V. Gratz and
                  Vassos Soteriou and
                  Maria K. Michael},
  title        = {Use It or Lose It: Proactive, Deterministic Longevity in Future Chip
                  Multiprocessors},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {65:1--65:26},
  year         = {2015},
  url          = {https://doi.org/10.1145/2770873},
  doi          = {10.1145/2770873},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/KimBVHGSM15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/KimLV15,
  author       = {Lok{-}Won Kim and
                  Dong{-}U Lee and
                  John D. Villasenor},
  title        = {Automated Iterative Pipelining for {ASIC} Design},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {28:1--28:24},
  year         = {2015},
  url          = {https://doi.org/10.1145/2660768},
  doi          = {10.1145/2660768},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/KimLV15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/LeeL15,
  author       = {Jong Chul Lee and
                  Roman L. Lysecky},
  title        = {System-Level Observation Framework for Non-Intrusive Runtime Monitoring
                  of Embedded Systems},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {42:1--42:27},
  year         = {2015},
  url          = {https://doi.org/10.1145/2717310},
  doi          = {10.1145/2717310},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/LeeL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/LinHKHL15,
  author       = {Cheng{-}Yen Lin and
                  Chung{-}Wen Huang and
                  Chi{-}Bang Kuan and
                  Shi{-}Yu Huang and
                  Jenq Kuen Lee},
  title        = {The Design and Experiments of {A} SID-Based Power-Aware Simulator
                  for Embedded Multicore Systems},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {22:1--22:27},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699834},
  doi          = {10.1145/2699834},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/LinHKHL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/LuCCSHTC15,
  author       = {Jingwei Lu and
                  Pengwen Chen and
                  Chin{-}Chih Chang and
                  Lu Sha and
                  Dennis Jen{-}Hsin Huang and
                  Chin{-}Chi Teng and
                  Chung{-}Kuan Cheng},
  title        = {ePlace: Electrostatics-Based Placement Using Fast Fourier Transform
                  and Nesterov's Method},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {17:1--17:34},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699873},
  doi          = {10.1145/2699873},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/LuCCSHTC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/MirtarDR15,
  author       = {Ali Mirtar and
                  Sujit Dey and
                  Anand Raghunathan},
  title        = {An Application Adaptation Approach to Mitigate the Impact of Dynamic
                  Thermal Management on Video Encoding},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {50:1--50:27},
  year         = {2015},
  url          = {https://doi.org/10.1145/2753758},
  doi          = {10.1145/2753758},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/MirtarDR15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/PapandreouPPMEC15,
  author       = {Nikolaos Papandreou and
                  Thomas P. Parnell and
                  Haralampos Pozidis and
                  Thomas Mittelholzer and
                  Evangelos Eleftheriou and
                  Charles Camp and
                  Thomas Griffin and
                  Gary A. Tressler and
                  Andrew Walls},
  title        = {Enhancing the Reliability of {MLC} {NAND} Flash Memory Systems by
                  Read Channel Optimization},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {62:1--62:24},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699866},
  doi          = {10.1145/2699866},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/PapandreouPPMEC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ParkMS15,
  author       = {HeeJong Park and
                  Avinash Malik and
                  Zoran A. Salcic},
  title        = {Scheduling Globally Asynchronous Locally Synchronous Programs for
                  Guaranteed Response Times},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {40:1--40:25},
  year         = {2015},
  url          = {https://doi.org/10.1145/2740961},
  doi          = {10.1145/2740961},
  timestamp    = {Fri, 30 Aug 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/ParkMS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/PeterG15,
  author       = {Steffen Peter and
                  Tony Givargis},
  title        = {Component-Based Synthesis of Embedded Systems Using Satisfiability
                  Modulo Theories},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {49:1--49:27},
  year         = {2015},
  url          = {https://doi.org/10.1145/2746235},
  doi          = {10.1145/2746235},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/PeterG15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/Pomeranz15,
  author       = {Irith Pomeranz},
  title        = {A Generalized Definition of Unnecessary Test Vectors in Functional
                  Test Sequences},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {29:1--29:13},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699853},
  doi          = {10.1145/2699853},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/Pomeranz15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/Pomeranz15a,
  author       = {Irith Pomeranz},
  title        = {{FOLD:} Extreme Static Test Compaction by Folding of Functional Test
                  Sequences},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {57:1--57:19},
  year         = {2015},
  url          = {https://doi.org/10.1145/2764455},
  doi          = {10.1145/2764455},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/Pomeranz15a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/SamavatianABS15,
  author       = {Mohammad Hossein Samavatian and
                  Mohammad Arjomand and
                  Ramin Bashizade and
                  Hamid Sarbazi{-}Azad},
  title        = {Architecting the Last-Level Cache for GPUs using {STT-RAM} Technology},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {55:1--55:24},
  year         = {2015},
  url          = {https://doi.org/10.1145/2764905},
  doi          = {10.1145/2764905},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/SamavatianABS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/SharmaPCRA15,
  author       = {Namita Sharma and
                  Preeti Ranjan Panda and
                  Francky Catthoor and
                  Praveen Raghavan and
                  Tom Vander Aa},
  title        = {Array Interleaving - An Energy-Efficient Data Layout Transformation},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {44:1--44:26},
  year         = {2015},
  url          = {https://doi.org/10.1145/2747875},
  doi          = {10.1145/2747875},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/SharmaPCRA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/SrivastavESN15,
  author       = {Meeta Srivastav and
                  Mohammed Ehteshamuddin and
                  Kyle Stegner and
                  Leyla Nazhandali},
  title        = {Design of Ultra-Low Power Scalable-Throughput Many-Core {DSP} Applications},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {34:1--34:21},
  year         = {2015},
  url          = {https://doi.org/10.1145/2720018},
  doi          = {10.1145/2720018},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/SrivastavESN15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/SureshOS15,
  author       = {Chandra K. H. Suresh and
                  Sule Ozev and
                  Ozgur Sinanoglu},
  title        = {Adaptive Generation of Unique IDs for Digital Chips through Analog
                  Excitation},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {46:1--46:18},
  year         = {2015},
  url          = {https://doi.org/10.1145/2732408},
  doi          = {10.1145/2732408},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/SureshOS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/TaouilHM15,
  author       = {Mottaqiallah Taouil and
                  Said Hamdioui and
                  Erik Jan Marinissen},
  title        = {Yield Improvement for 3D Wafer-to-Wafer Stacked ICs Using Wafer Matching},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {19:1--19:23},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699832},
  doi          = {10.1145/2699832},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/TaouilHM15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/WangCB15,
  author       = {Ran Wang and
                  Krishnendu Chakrabarty and
                  Sudipta Bhawmik},
  title        = {Built-In Self-Test and Test Scheduling for Interposer-Based 2.5D {IC}},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {58:1--58:24},
  year         = {2015},
  url          = {https://doi.org/10.1145/2757278},
  doi          = {10.1145/2757278},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/WangCB15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/XuLS15,
  author       = {Tong Xu and
                  Peng Li and
                  Savithri Sundareswaran},
  title        = {Decoupling Capacitance Design Strategies for Power Delivery Networks
                  with Power Gating},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {38:1--38:30},
  year         = {2015},
  url          = {https://doi.org/10.1145/2700825},
  doi          = {10.1145/2700825},
  timestamp    = {Tue, 13 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/XuLS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/XuNZY015,
  author       = {Cong Xu and
                  Dimin Niu and
                  Yang Zheng and
                  Shimeng Yu and
                  Yuan Xie},
  title        = {Impact of Cell Failure on Reliable Cross-Point Resistive Memory Design},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {63:1--63:21},
  year         = {2015},
  url          = {https://doi.org/10.1145/2753759},
  doi          = {10.1145/2753759},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/XuNZY015.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/YiYLZW15,
  author       = {Qiuping Yi and
                  Zijiang Yang and
                  Jian Liu and
                  Chen Zhao and
                  Chao Wang},
  title        = {Explaining Software Failures by Cascade Fault Localization},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {41:1--41:28},
  year         = {2015},
  url          = {https://doi.org/10.1145/2738038},
  doi          = {10.1145/2738038},
  timestamp    = {Wed, 10 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/YiYLZW15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/YongaMB15,
  author       = {Franck Yonga and
                  Michael Mefenza and
                  Christophe Bobda},
  title        = {ASP-Based Encoding Model of Architecture Synthesis for Smart Cameras
                  in Distributed Networks},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {27:1--27:28},
  year         = {2015},
  url          = {https://doi.org/10.1145/2701419},
  doi          = {10.1145/2701419},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/YongaMB15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ZhangK15,
  author       = {Renyuan Zhang and
                  Mineo Kaneko},
  title        = {Robust and Low-Power Digitally Programmable Delay Element Designs
                  Employing Neuron-MOS Mechanism},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {4},
  pages        = {64:1--64:19},
  year         = {2015},
  url          = {https://doi.org/10.1145/2740963},
  doi          = {10.1145/2740963},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/ZhangK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ZhangLQ15,
  author       = {Jiliang Zhang and
                  Yaping Lin and
                  Gang Qu},
  title        = {Reconfigurable Binding against {FPGA} Replay Attacks},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {33:1--33:20},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699833},
  doi          = {10.1145/2699833},
  timestamp    = {Tue, 14 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/ZhangLQ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ZhangLWZ0S15,
  author       = {Qi Zhang and
                  Xuandong Li and
                  Linzhang Wang and
                  Tian Zhang and
                  Yi Wang and
                  Zili Shao},
  title        = {Lazy-RTGC: {A} Real-Time Lazy Garbage Collection Mechanism with Jointly
                  Optimizing Average and Worst Performance for {NAND} Flash Memory Storage
                  Systems},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {3},
  pages        = {43:1--43:32},
  year         = {2015},
  url          = {https://doi.org/10.1145/2746236},
  doi          = {10.1145/2746236},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/ZhangLWZ0S15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/AksoyFM14,
  author       = {Levent Aksoy and
                  Paulo F. Flores and
                  Jos{\'{e}} Monteiro},
  title        = {Multiplierless Design of Folded {DSP} Blocks},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {14:1--14:24},
  year         = {2014},
  url          = {https://doi.org/10.1145/2663343},
  doi          = {10.1145/2663343},
  timestamp    = {Wed, 23 Feb 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/AksoyFM14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/BaekLNK14,
  author       = {Seungcheol Baek and
                  Hyung Gyu Lee and
                  Chrysostomos Nicopoulos and
                  Jongman Kim},
  title        = {Designing Hybrid {DRAM/PCM} Main Memory Systems Utilizing Dual-Phase
                  Compression},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {11:1--11:31},
  year         = {2014},
  url          = {https://doi.org/10.1145/2658989},
  doi          = {10.1145/2658989},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/BaekLNK14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/BolchiniS14,
  author       = {Cristiana Bolchini and
                  Chiara Sandionigi},
  title        = {Design of Hardened Embedded Systems on Multi-FPGA Platforms},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {16:1--16:26},
  year         = {2014},
  url          = {https://doi.org/10.1145/2676551},
  doi          = {10.1145/2676551},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/BolchiniS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ChangP014,
  author       = {Naehyuck Chang and
                  David Z. Pan and
                  Yuan Xie},
  title        = {Editorial: {ACM} Transactions on Design Automation of Electronics
                  Systems and Beyond},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {1:1--1:2},
  year         = {2014},
  url          = {https://doi.org/10.1145/2676865},
  doi          = {10.1145/2676865},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/ChangP014.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ChengYVBHJJ14,
  author       = {An{-}Che Cheng and
                  Chia{-}Chih Jack Yen and
                  Celina G. Val and
                  Sam Bayless and
                  Alan J. Hu and
                  Iris Hui{-}Ru Jiang and
                  Jing{-}Yang Jou},
  title        = {Efficient Coverage-Driven Stimulus Generation Using Simultaneous {SAT}
                  Solving, with Application to SystemVerilog},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {7:1--7:23},
  year         = {2014},
  url          = {https://doi.org/10.1145/2651400},
  doi          = {10.1145/2651400},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/ChengYVBHJJ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/GangeSS14,
  author       = {Graeme Gange and
                  Harald S{\o}ndergaard and
                  Peter J. Stuckey},
  title        = {Synthesizing Optimal Switching Lattices},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {6:1--6:14},
  year         = {2014},
  url          = {https://doi.org/10.1145/2661632},
  doi          = {10.1145/2661632},
  timestamp    = {Wed, 14 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/GangeSS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/HuMOMTSK14,
  author       = {Wei Hu and
                  Dejun Mu and
                  Jason Oberg and
                  Baolei Mao and
                  Mohit Tiwari and
                  Timothy Sherwood and
                  Ryan Kastner},
  title        = {Gate-Level Information Flow Tracking for Security Lattices},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {2:1--2:25},
  year         = {2014},
  url          = {https://doi.org/10.1145/2676548},
  doi          = {10.1145/2676548},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/HuMOMTSK14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/KuoLJ14,
  author       = {Hsien{-}Kai Kuo and
                  Bo{-}Cheng Charles Lai and
                  Jing{-}Yang Jou},
  title        = {Reducing Contention in Shared Last-Level Cache for Throughput Processors},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {12:1--12:28},
  year         = {2014},
  url          = {https://doi.org/10.1145/2676550},
  doi          = {10.1145/2676550},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/KuoLJ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/LiYH014,
  author       = {Xueliang Li and
                  Guihai Yan and
                  Yinhe Han and
                  Xiaowei Li},
  title        = {SmartCap: Using Machine Learning for Power Adaptation of Smartphone's
                  Application Processor},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {8:1--8:16},
  year         = {2014},
  url          = {https://doi.org/10.1145/2651402},
  doi          = {10.1145/2651402},
  timestamp    = {Tue, 23 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/LiYH014.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/LiuV14,
  author       = {Lingyi Liu and
                  Shobha Vasudevan},
  title        = {Scaling Input Stimulus Generation through Hybrid Static and Dynamic
                  Analysis of {RTL}},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {4:1--4:33},
  year         = {2014},
  url          = {https://doi.org/10.1145/2676549},
  doi          = {10.1145/2676549},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/LiuV14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/MM14,
  author       = {M. Mohamed Asan Basiri and
                  Sk. Noor Mahammad},
  title        = {An Efficient Hardware-Based Higher Radix Floating Point {MAC} Design},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {15:1--15:25},
  year         = {2014},
  url          = {https://doi.org/10.1145/2667224},
  doi          = {10.1145/2667224},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/MM14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/MaricACV14,
  author       = {Bojan Maric and
                  Jaume Abella and
                  Francisco J. Cazorla and
                  Mateo Valero},
  title        = {Hybrid Cache Designs for Reliable Hybrid High and Ultra-Low Voltage
                  Operation},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {10:1--10:25},
  year         = {2014},
  url          = {https://doi.org/10.1145/2658988},
  doi          = {10.1145/2658988},
  timestamp    = {Tue, 18 May 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/MaricACV14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/ShihYHL14,
  author       = {Wen{-}Li Shih and
                  Yi{-}Ping You and
                  Chung{-}Wen Huang and
                  Jenq Kuen Lee},
  title        = {Compiler Optimization for Reducing Leakage Power in Multithread {BSP}
                  Programs},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {9:1--9:34},
  year         = {2014},
  url          = {https://doi.org/10.1145/2668119},
  doi          = {10.1145/2668119},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/ShihYHL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/SinhaGGR14,
  author       = {Roopak Sinha and
                  Alain Girault and
                  Gregor Goessler and
                  Partha S. Roop},
  title        = {A Formal Approach to Incremental Converter Synthesis for System-on-Chip
                  Design},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {13:1--13:30},
  year         = {2014},
  url          = {https://doi.org/10.1145/2663344},
  doi          = {10.1145/2663344},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/SinhaGGR14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/SinhaS14,
  author       = {Sharad Sinha and
                  Thambipillai Srikanthan},
  title        = {Dataflow Graph Partitioning for Area-Efficient High-Level Synthesis
                  with Systems Perspective},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {5:1--5:18},
  year         = {2014},
  url          = {https://doi.org/10.1145/2660769},
  doi          = {10.1145/2660769},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/todaes/SinhaS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/WangCCC14,
  author       = {Chun{-}Kai Wang and
                  Yeh{-}Chi Chang and
                  Hung{-}Ming Chen and
                  Ching{-}Yu Chin},
  title        = {Clock Tree Synthesis Considering Slew Effect on Supply Voltage Variation},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {1},
  pages        = {3:1--3:23},
  year         = {2014},
  url          = {https://doi.org/10.1145/2651401},
  doi          = {10.1145/2651401},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/WangCCC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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