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@article{DBLP:journals/tcad/Agrawal86,
author = {Prathima Agrawal},
title = {Concurrency and Communication in Hardware Simulators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {617--623},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270231},
doi = {10.1109/TCAD.1986.1270231},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Agrawal86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BartlettCGH86,
author = {Karen A. Bartlett and
William W. Cohen and
Aart J. de Geus and
Gary D. Hachtel},
title = {Synthesis and Optimization of Multilevel Logic under Timing Constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {582--596},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270229},
doi = {10.1109/TCAD.1986.1270229},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BartlettCGH86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Biswas86,
author = {Nripendra N. Biswas},
title = {Computer-Aided Minimization Procedure for Boolean Functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {303--304},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270199},
doi = {10.1109/TCAD.1986.1270199},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Biswas86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Brown86,
author = {Randy Lee Brown},
title = {Multiple Storage Quad Trees: {A} Simpler Faster Alternative to Bisector
List Quad Trees},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {413--419},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270210},
doi = {10.1109/TCAD.1986.1270210},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Brown86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChamberlainF86,
author = {Roger D. Chamberlain and
Mark A. Franklin},
title = {Collecting Data About Logic Simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {405--412},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270209},
doi = {10.1109/TCAD.1986.1270209},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChamberlainF86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenK86,
author = {Howard H. Chen and
Ernest S. Kuh},
title = {Glitter: {A} Gridless Variable-Width Channel Router},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {459--465},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270217},
doi = {10.1109/TCAD.1986.1270217},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenK86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChuFHL86,
author = {Kung{-}Chao Chu and
John P. Fishburn and
Peter Honeyman and
Y. Edmund Lien},
title = {A Database-Driven {VLSI} Design System},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {180--187},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270185},
doi = {10.1109/TCAD.1986.1270185},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChuFHL86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DagenaisAR86,
author = {Michel R. Dagenais and
Vinod K. Agarwal and
Nicholas C. Rumin},
title = {McBOOLE: {A} New Procedure for Exact Logic Minimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {229--238},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270191},
doi = {10.1109/TCAD.1986.1270191},
timestamp = {Mon, 13 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DagenaisAR86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ElhuniVK86,
author = {Hasan Elhuni and
Anastasios Vergis and
Larry L. Kinney},
title = {C-Testability of Two-Dimensional Iterative Arrays},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {573--581},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270228},
doi = {10.1109/TCAD.1986.1270228},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ElhuniVK86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FisherC86,
author = {Gregory J. Fisher and
J. Alvin Connelly},
title = {Modeling Time-Dependent Elements for {SPICE} Transient Analyses},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {429--432},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270212},
doi = {10.1109/TCAD.1986.1270212},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FisherC86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Giles86,
author = {Martin D. Giles},
title = {Ion Implantation Calculations in Two Dimensions Using the Boltzmann
Transport Equation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {679--684},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270237},
doi = {10.1109/TCAD.1986.1270237},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Giles86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GreeneS86,
author = {J. W. Greene and
Kenneth J. Supowit},
title = {Simulated Annealing Without Rejected Moves},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {221--228},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270190},
doi = {10.1109/TCAD.1986.1270190},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GreeneS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Hayes86,
author = {John P. Hayes},
title = {Digital Simulation with Multiple Logic Values},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {274--283},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270196},
doi = {10.1109/TCAD.1986.1270196},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Hayes86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HerrB86,
author = {Norm Herr and
John J. Barnes},
title = {Statistical Circuit Simulation Modeling of {CMOS} {VLSI}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {15--22},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270173},
doi = {10.1109/TCAD.1986.1270173},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HerrB86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HwangDB86,
author = {Sun Young Hwang and
Robert W. Dutton and
Tom Blank},
title = {A Best-First Search Algorithm for Optimal {PLA} Folding},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {433--442},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270213},
doi = {10.1109/TCAD.1986.1270213},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HwangDB86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HwangM86,
author = {Ki Soo Hwang and
M. Ray Mercer},
title = {Derivation and Refinement of Fan-Out Constraints to Generate Tests
in Combinational Logic Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {564--572},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270227},
doi = {10.1109/TCAD.1986.1270227},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HwangM86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HyunSC86,
author = {Choong H. Hyun and
Michael S. Shur and
Nicholas C. Cirillo Jr.},
title = {Simulation and Design Analysis of (A1Ga)As/GaAs {MODFET} Integrated
Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {284--292},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270197},
doi = {10.1109/TCAD.1986.1270197},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HyunSC86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Iosupovici86,
author = {Alexander Iosupovici},
title = {A Class of Array Architectures for Hardware Grid Routers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {245--255},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270193},
doi = {10.1109/TCAD.1986.1270193},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Iosupovici86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Jaeger86,
author = {Richard C. Jaeger},
title = {Computer-Aided Design of One-Dimensional {MOSFET} Impurity Profiles},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {198--203},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270187},
doi = {10.1109/TCAD.1986.1270187},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Jaeger86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KatzenelsonW86,
author = {Jacob Katzenelson and
E. Weitz},
title = {{VLSI} Simulation and Data Abstractions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {371--378},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270206},
doi = {10.1109/TCAD.1986.1270206},
timestamp = {Mon, 28 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KatzenelsonW86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KujiTN86,
author = {Norio Kuji and
Teruo Tamama and
M. Nagatani},
title = {{FINDER:} {A} {CAD} System-Based Electron Beam Tester for Fault Diagnosis
of {VLSI} Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {313--319},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270201},
doi = {10.1109/TCAD.1986.1270201},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KujiTN86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KundertS86,
author = {Kenneth S. Kundert and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Simulation of Nonlinear Circuits in the Frequency Domain},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {521--535},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270223},
doi = {10.1109/TCAD.1986.1270223},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KundertS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Kuzmicz86,
author = {Wieslaw Kuzmicz},
title = {Modeling of Minority Carrier Current in Heavily Doped Regions of Bipolar
Regions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {204--214},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270188},
doi = {10.1109/TCAD.1986.1270188},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Kuzmicz86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinM86,
author = {Tzu{-}Mu Lin and
Carver Mead},
title = {A Hierarchical Timing Simulation Model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {188--197},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270186},
doi = {10.1109/TCAD.1986.1270186},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinM86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaesMD86,
author = {W. Maes and
Kristin M. De Meyer and
Luc H. Dupas},
title = {{SIMPAR:} {A} Versatile Technology Independent Parameter Extraction
Program Using a New Optimized Fit-Strategy},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {320--325},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270202},
doi = {10.1109/TCAD.1986.1270202},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MaesMD86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MakarenkoT86,
author = {Darrell Makarenko and
John Tartar},
title = {A Statistical Analysis of {PLA} Folding},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {39--51},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270176},
doi = {10.1109/TCAD.1986.1270176},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MakarenkoT86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MalySD86,
author = {Wojciech Maly and
Andrzej J. Strojwas and
Stephen W. Director},
title = {{VLSI} Yield Prediction and Estimation: {A} Unified Framework},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {114--130},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270182},
doi = {10.1109/TCAD.1986.1270182},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MalySD86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MatsonG86,
author = {Mark Douglas Matson and
Lance A. Glasser},
title = {Macromodeling and Optimization of Digital {MOS} {VLSI} Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {659--678},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270236},
doi = {10.1109/TCAD.1986.1270236},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MatsonG86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Micheli86,
author = {Giovanni De Micheli},
title = {Symbolic Design of Combinational and Sequential Logic Circuits Implemented
by Two-Level Logic Macros},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {597--616},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270230},
doi = {10.1109/TCAD.1986.1270230},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Micheli86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MicheliBS86,
author = {Giovanni De Micheli and
Robert K. Brayton and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Correction to "Optimal State Assignment for Finite State Machines"},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {239},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270192},
doi = {10.1109/TCAD.1986.1270192},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MicheliBS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Moglestue86,
author = {C. C. Moglestue},
title = {A Self-Consistent Monte Carlo Particle Model to Analyze Semiconductor
Microcomponents of any Geometry},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {326--345},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270203},
doi = {10.1109/TCAD.1986.1270203},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Moglestue86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NassifSD86,
author = {Sani R. Nassif and
Andrzej J. Strojwas and
Stephen W. Director},
title = {A Methodology for Worst-Case Analysis of Integrated Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {104--113},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270181},
doi = {10.1109/TCAD.1986.1270181},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NassifSD86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OngaKOKD86,
author = {Shinji Onga and
Masami Konaka and
Akemi Ohmichi and
Kohichi Kanaka and
Ryo Dang},
title = {A Composite Two-Dimensional Process/Device Simulation System {(TOPMODE)}
and its Application for Total Process Designing in Submicron {VLSI}
{MOS} Device Phase},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {365--370},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270205},
doi = {10.1109/TCAD.1986.1270205},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OngaKOKD86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OpalskiS86,
author = {Leszek J. Opalski and
M. A. Styblinski},
title = {Generalization of Yield Optimization Problem: Maximum Income Approach},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {346--360},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270204},
doi = {10.1109/TCAD.1986.1270204},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OpalskiS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OwensI86,
author = {Robert Michael Owens and
Mary Jane Irwin},
title = {A System for Designing, Simulating, and Testing High Performance {VLSI}
Signal Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {420--428},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270211},
doi = {10.1109/TCAD.1986.1270211},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OwensI86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PeczalskiSHLV86,
author = {Andrzej Peczalski and
Michael S. Shur and
Choong H. Hyun and
Kang W. Lee and
Tho Truong Vu},
title = {Design Analysis of GaAs Direct Coupled Field Effect Transistor Logic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {266--273},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270195},
doi = {10.1109/TCAD.1986.1270195},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PeczalskiSHLV86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Posluszny86,
author = {Stephen D. Posluszny},
title = {{SLS:} An Advanced Symbolic Layout System for Bipolar and {FET} Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {450--458},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270216},
doi = {10.1109/TCAD.1986.1270216},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Posluszny86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PotinD86,
author = {David P. La Potin and
Stephen W. Director},
title = {Mason: {A} Global Floorplanning Approach for {VLSI} Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {477--489},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270219},
doi = {10.1109/TCAD.1986.1270219},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PotinD86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RazdanS86,
author = {Rahul Razdan and
Andrzej J. Strojwas},
title = {A Statistical Design Rule Developer},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {508--520},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270222},
doi = {10.1109/TCAD.1986.1270222},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RazdanS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Resnick86,
author = {Martin L. Resnick},
title = {{SPARTA:} {A} System Partitioning Aid},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {490--498},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270220},
doi = {10.1109/TCAD.1986.1270220},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Resnick86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RileyS86,
author = {David C. Riley and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Models for a New Profit-Based Methodology for Statistical Design of
Integrated Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {131--169},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270183},
doi = {10.1109/TCAD.1986.1270183},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RileyS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RuetzPB86,
author = {Peter A. Ruetz and
Stephen P. Pope and
Robert W. Brodersen},
title = {Computer Generation of Digital Filter Banks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {256--265},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270194},
doi = {10.1109/TCAD.1986.1270194},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RuetzPB86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SastryP86,
author = {Sarma Sastry and
Alice C. Parker},
title = {Stochastic Models for Wireability Analysis of Gate Arrays},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {52--65},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270177},
doi = {10.1109/TCAD.1986.1270177},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SastryP86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShihRA86,
author = {Hsi{-}Ching Shih and
Joseph T. Rahmeh and
Jacob A. Abraham},
title = {{FAUST:} An {MOS} Fault Simulator with Timing Information},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {557--563},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270226},
doi = {10.1109/TCAD.1986.1270226},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShihRA86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Shima86,
author = {Takeshi Shima},
title = {Table Lookup {MOSFET} Capacitance Model for Short-Channel Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {624--632},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270232},
doi = {10.1109/TCAD.1986.1270232},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Shima86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SpanosD86,
author = {Costas J. Spanos and
Stephen W. Director},
title = {Parameter Extraction for Statistical {IC} Process Characterization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {66--78},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270178},
doi = {10.1109/TCAD.1986.1270178},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SpanosD86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SpillingerS86,
author = {Ilan Y. Spillinger and
Gabriel M. Silberman},
title = {Improving the Performance of a Switch-Level Simulator Targeted for
a Logic Simulation Machine},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {396--404},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270208},
doi = {10.1109/TCAD.1986.1270208},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SpillingerS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SpotoCH86,
author = {J. P. Spoto and
W. T. Coston and
C. Paul Hernandez},
title = {Statistical Integrated Circuit Design and Characterization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {90--103},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270180},
doi = {10.1109/TCAD.1986.1270180},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SpotoCH86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Stein86,
author = {Michael L. Stein},
title = {An Efficient Method of Sampling for Statistical Circuit Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {23--29},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270174},
doi = {10.1109/TCAD.1986.1270174},
timestamp = {Mon, 29 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Stein86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Styblinski86,
author = {M. A. Styblinski},
title = {Problems of Yield Gradient Estimation for Truncated Probability Density
Functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {30--38},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270175},
doi = {10.1109/TCAD.1986.1270175},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Styblinski86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/StyblinskiO86,
author = {M. A. Styblinski and
Leszek J. Opalski},
title = {Algorithms and Software Tools for {IC} Yield Optimization Based on
Fundamental Fabrication Parameters},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {79--89},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270179},
doi = {10.1109/TCAD.1986.1270179},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/StyblinskiO86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SugimotoF86,
author = {Masunori Sugimoto and
Masao Fukuma},
title = {Standard Description Form for Device Characteristics in VLSI's},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {293--302},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270198},
doi = {10.1109/TCAD.1986.1270198},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SugimotoF86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SuzukiMTO86,
author = {Kei Suzuki and
Yusuke Matsunaga and
Masayoshi Tachibana and
Tatsuo Ohtsuki},
title = {A Hardware Maze Router with Application to Interactive Rip-Up and
Reroute},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {466--476},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270218},
doi = {10.1109/TCAD.1986.1270218},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SuzukiMTO86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TangL86,
author = {Jeffrey Yuh{-}Fong Tang and
Steven E. Laux},
title = {{MONTE:} {A} Program to Simulate the Heterojunction Devices in Two
Dimensions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {645--652},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270234},
doi = {10.1109/TCAD.1986.1270234},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/TangL86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TsaoC86,
author = {David Tsao and
Chin{-}Fu Chen},
title = {A Fast-Timing Simulator for Digital {MOS} Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {536--540},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270224},
doi = {10.1109/TCAD.1986.1270224},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TsaoC86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TsengS86,
author = {Chia{-}Jeng Tseng and
Daniel P. Siewiorek},
title = {Automated Synthesis of Data Paths in Digital Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {379--395},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270207},
doi = {10.1109/TCAD.1986.1270207},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TsengS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TurchettiPMPV86,
author = {Claudio Turchetti and
P. Prioretti and
Guido Masetti and
E. Profumo and
Massimo Vanzi},
title = {A Meyer-Like Approach for the Transient Analysis of Digital {MOS}
IC's},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {499--507},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270221},
doi = {10.1109/TCAD.1986.1270221},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TurchettiPMPV86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/UebbingF86,
author = {R. H. Uebbing and
Masao Fukuma},
title = {Process-Based Three-Dimensional Capacitance Simulation -- {TRICEPS}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {215--220},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270189},
doi = {10.1109/TCAD.1986.1270189},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/UebbingF86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VeeraraghavanFE86,
author = {Surya Veeraraghavan and
Jerry G. Fossum and
William R. Eisenstadt},
title = {{SPICE} Simulation of {SOI} {MOSFET} Integrated Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {653--658},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270235},
doi = {10.1109/TCAD.1986.1270235},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VeeraraghavanFE86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WaliPC86,
author = {U. V. Wali and
Ranendra N. Pal and
B. Chatterjee},
title = {Compact Modified Nodal Approach for Switched-Capacitor Network Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {3},
pages = {443--447},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270214},
doi = {10.1109/TCAD.1986.1270214},
timestamp = {Mon, 29 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WaliPC86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WalkerD86,
author = {D. M. H. Walker and
Stephen W. Director},
title = {{VLASIC:} {A} Catastrophic Fault Yield Simulator for Integrated Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {541--556},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270225},
doi = {10.1109/TCAD.1986.1270225},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WalkerD86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangLC86,
author = {Shui{-}Jinn Wang and
Jau{-}Yien Lee and
Chun{-}Yen Chang},
title = {An Efficient and Reliable Approach for Semiconductor Device Parameter
Extraction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {170--179},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270184},
doi = {10.1109/TCAD.1986.1270184},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangLC86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WeiS86,
author = {Ruey{-}Sing Wei and
Alberto L. Sangiovanni{-}Vincentelli},
title = {{PLATYPUS:} {A} {PLA} Test Pattern Generation Tool},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {4},
pages = {633--644},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270233},
doi = {10.1109/TCAD.1986.1270233},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WeiS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangHCMC86,
author = {Ping Yang and
Dale E. Hocevar and
Paul F. Cox and
Charles F. Machala III and
Pallab K. Chatterjee},
title = {An Integrated and Efficient Approach for {MOS} {VLSI} Statistical
Circuit Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {1},
pages = {5--14},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270172},
doi = {10.1109/TCAD.1986.1270172},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangHCMC86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Zukowski86,
author = {Charles A. Zukowski},
title = {Relaxing Bounds for Linear {RC} Mesh Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {5},
number = {2},
pages = {305--312},
year = {1986},
url = {https://doi.org/10.1109/TCAD.1986.1270200},
doi = {10.1109/TCAD.1986.1270200},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Zukowski86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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