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@article{DBLP:journals/integration/0005LZYZ13,
author = {Jian Sun and
Yinghai Lu and
Hai Zhou and
Changhao Yan and
Xuan Zeng},
title = {Post-routing layer assignment for double patterning with timing critical
paths consideration},
journal = {Integr.},
volume = {46},
number = {2},
pages = {153--164},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.02.003},
doi = {10.1016/J.VLSI.2012.02.003},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/0005LZYZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/AbdelhadiGKF13,
author = {Ameer Abdelhadi and
Ran Ginosar and
Avinoam Kolodny and
Eby G. Friedman},
title = {Timing-driven variation-aware synthesis of hybrid mesh/tree clock
distribution networks},
journal = {Integr.},
volume = {46},
number = {4},
pages = {382--391},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.12.001},
doi = {10.1016/J.VLSI.2012.12.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/AbdelhadiGKF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/AhmadH13,
author = {Nabihah Ahmad and
S. M. Rezaul Hasan},
title = {Low-power compact composite field {AES} S-Box/Inv S-Box design in
65 nm {CMOS} using Novel {XOR} Gate},
journal = {Integr.},
volume = {46},
number = {4},
pages = {333--344},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.06.002},
doi = {10.1016/J.VLSI.2012.06.002},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/AhmadH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/AinMDM13,
author = {Antara Ain and
Subhankar Mukherjee and
Pallab Dasgupta and
Siddhartha Mukhopadhyay},
title = {Post-silicon debugging of {PMU} integration errors using behavioral
models},
journal = {Integr.},
volume = {46},
number = {3},
pages = {310--321},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.03.003},
doi = {10.1016/J.VLSI.2012.03.003},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/AinMDM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/BarrioMMMH13,
author = {Alberto A. Del Barrio and
Seda Ogrenci Memik and
Mar{\'{\i}}a C. Molina and
Jos{\'{e}} M. Mend{\'{\i}}as and
Rom{\'{a}}n Hermida},
title = {A fragmentation aware High-Level Synthesis flow for low power heterogenous
datapaths},
journal = {Integr.},
volume = {46},
number = {2},
pages = {119--130},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.02.005},
doi = {10.1016/J.VLSI.2012.02.005},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/BarrioMMMH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Basir-KazeruniYGHLH13,
author = {Sina Basir{-}Kazeruni and
Hao Yu and
Fang Gong and
Yu Hu and
Chunchen Liu and
Lei He},
title = {{SPECO:} Stochastic Perturbation based Clock tree Optimization considering
temperature uncertainty},
journal = {Integr.},
volume = {46},
number = {1},
pages = {22--32},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.04.004},
doi = {10.1016/J.VLSI.2012.04.004},
timestamp = {Wed, 30 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/Basir-KazeruniYGHLH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/BasuMM13,
author = {Kanad Basu and
Chetan Murthy and
Prabhat Mishra},
title = {Bitmask aware compression of {NISC} control words},
journal = {Integr.},
volume = {46},
number = {2},
pages = {131--141},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.02.004},
doi = {10.1016/J.VLSI.2012.02.004},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/BasuMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Belloeil-DupuisCM13,
author = {Sophie Belloeil{-}Dupuis and
Roselyne Chotin{-}Avot and
Habib Mehrez},
title = {Exploring redundant arithmetics in computer-aided design of arithmetic
datapaths},
journal = {Integr.},
volume = {46},
number = {2},
pages = {104--118},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.02.002},
doi = {10.1016/J.VLSI.2012.02.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/Belloeil-DupuisCM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ChenY13,
author = {Zhi{-}Wei Chen and
Jin{-}Tai Yan},
title = {Routability-constrained multi-bit flip-flop construction for clock
power reduction},
journal = {Integr.},
volume = {46},
number = {3},
pages = {290--300},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.03.002},
doi = {10.1016/J.VLSI.2012.03.002},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/ChenY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/CuestaRAH13,
author = {David Cuesta and
Jos{\'{e}} Luis Risco{-}Mart{\'{\i}}n and
Jos{\'{e}} L. Ayala and
Jos{\'{e}} Ignacio Hidalgo},
title = {3D thermal-aware floorplanner using a {MOEA} approximation},
journal = {Integr.},
volume = {46},
number = {1},
pages = {10--21},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.04.003},
doi = {10.1016/J.VLSI.2012.04.003},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/CuestaRAH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/DamM13,
author = {Samiran Dam and
Pradip Mandal},
title = {Modeling and design of {CMOS} analog circuits through hierarchical
abstraction},
journal = {Integr.},
volume = {46},
number = {4},
pages = {449--462},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2013.02.001},
doi = {10.1016/J.VLSI.2013.02.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/DamM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/DasDK13,
author = {Shirshendu Das and
Parasara Sridhar Duggirala and
Hemangee K. Kapoor},
title = {A formal framework for interfacing mixed-timing systems},
journal = {Integr.},
volume = {46},
number = {3},
pages = {255--264},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.06.001},
doi = {10.1016/J.VLSI.2012.06.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/DasDK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ElhajiZMDT13,
author = {Majdi Elhaji and
Abdelkrim Zitouni and
Samy Meftali and
Jean{-}Luc Dekeyser and
Rached Tourki},
title = {A low-power oriented architecture for {H.264} variable block size
motion estimation based on a resource sharing scheme},
journal = {Integr.},
volume = {46},
number = {4},
pages = {404--412},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.09.001},
doi = {10.1016/J.VLSI.2012.09.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/ElhajiZMDT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/FariasNM13,
author = {Marcos Santana Farias and
Nadia Nedjah and
Luiza de Macedo Mourelle},
title = {Hardware implementation of subtractive clustering for radionuclide
identification},
journal = {Integr.},
volume = {46},
number = {3},
pages = {220--229},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.10.005},
doi = {10.1016/J.VLSI.2012.10.005},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/FariasNM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/GonzalezSPRMP13,
author = {Carlos Gonz{\'{a}}lez and
Sergio S{\'{a}}nchez and
Abel Paz and
Javier Resano and
Daniel Mozos and
Antonio Plaza},
title = {Use of {FPGA} or GPU-based architectures for remotely sensed hyperspectral
image processing},
journal = {Integr.},
volume = {46},
number = {2},
pages = {89--103},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.04.002},
doi = {10.1016/J.VLSI.2012.04.002},
timestamp = {Wed, 14 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/GonzalezSPRMP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/HaoTS13,
author = {Zhigang Hao and
Sheldon X.{-}D. Tan and
Guoyong Shi},
title = {Statistical full-chip total power estimation considering spatially
correlated process variations},
journal = {Integr.},
volume = {46},
number = {1},
pages = {80--88},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2011.12.004},
doi = {10.1016/J.VLSI.2011.12.004},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/HaoTS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ImanaHT13,
author = {Jos{\'{e}} Luis Ima{\~{n}}a and
Rom{\'{a}}n Hermida and
Francisco Tirado},
title = {Low complexity bit-parallel polynomial basis multipliers over binary
fields for special irreducible pentanomials},
journal = {Integr.},
volume = {46},
number = {2},
pages = {197--210},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2011.12.006},
doi = {10.1016/J.VLSI.2011.12.006},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/ImanaHT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/IskanderLK13,
author = {Ramy Iskander and
Marie{-}Minerve Lou{\"{e}}rat and
Andreas Kaiser},
title = {Hierarchical sizing and biasing of analog firm intellectual properties},
journal = {Integr.},
volume = {46},
number = {2},
pages = {172--188},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.01.001},
doi = {10.1016/J.VLSI.2012.01.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/IskanderLK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/LiMH13,
author = {Jiangpeng Li and
Jun Ma and
Guanghui He},
title = {A memory efficient parallel layered {QC-LDPC} decoder for {CMMB} systems},
journal = {Integr.},
volume = {46},
number = {4},
pages = {359--368},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2013.01.001},
doi = {10.1016/J.VLSI.2013.01.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/LiMH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/LiMZCXH13,
author = {Zuowei Li and
Yuchun Ma and
Qiang Zhou and
Yici Cai and
Yuan Xie and
Tingting Huang},
title = {Thermal-aware {P/G} {TSV} planning for {IR} drop reduction in 3D ICs},
journal = {Integr.},
volume = {46},
number = {1},
pages = {1--9},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.05.002},
doi = {10.1016/J.VLSI.2012.05.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/LiMZCXH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/Lopez-MorilloC0MRO13,
author = {Enrique L{\'{o}}pez{-}Morillo and
Fernando Mu{\~{n}}oz and
Antonio Torralba and
Fernando J. Marquez and
I. Rebollo and
Jos{\'{e}} Ram{\'{o}}n Garc{\'{\i}}a Oya},
title = {Compact low-power implementation for continuous-time {\(\Sigma\)}{\(\Delta\)}
modulators},
journal = {Integr.},
volume = {46},
number = {4},
pages = {441--448},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.10.001},
doi = {10.1016/J.VLSI.2012.10.001},
timestamp = {Tue, 08 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/Lopez-MorilloC0MRO13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/LuCLS13,
author = {Chao{-}Hung Lu and
Hung{-}Ming Chen and
Chien{-}Nan Jimmy Liu and
Wen{-}Yu Shih},
title = {Package routability- and IR-drop-aware finger/pad planning for single
chip and stacking {IC} designs},
journal = {Integr.},
volume = {46},
number = {3},
pages = {280--289},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.05.001},
doi = {10.1016/J.VLSI.2012.05.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/LuCLS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/MazreahS13,
author = {Arash Azizi Mazreah and
Mohammad T. Manzuri Shalmani},
title = {Low-leakage soft error tolerant port-less configuration memory cells
for FPGAs},
journal = {Integr.},
volume = {46},
number = {4},
pages = {413--426},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.08.001},
doi = {10.1016/J.VLSI.2012.08.001},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/MazreahS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/MoradiCVPMW13,
author = {Farshad Moradi and
Tuan Vu Cao and
Elena I. Vatajelu and
Ali Peiravi and
Hamid Mahmoodi and
Dag T. Wisland},
title = {Domino logic designs for high-performance and leakage-tolerant applications},
journal = {Integr.},
volume = {46},
number = {3},
pages = {247--254},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.04.005},
doi = {10.1016/J.VLSI.2012.04.005},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/MoradiCVPMW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/NedjahM13,
author = {Nadia Nedjah and
Luiza de Macedo Mourelle},
title = {Hardware for bioinformatics applications},
journal = {Integr.},
volume = {46},
number = {3},
pages = {219},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2013.03.003},
doi = {10.1016/J.VLSI.2013.03.003},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/NedjahM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/NiknafsM13,
author = {Aliakbar Niknafs and
Majid Mohammadi},
title = {Synthesis and optimization of multiple-valued combinational and sequential
reversible circuits with don't cares},
journal = {Integr.},
volume = {46},
number = {2},
pages = {189--196},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.01.002},
doi = {10.1016/J.VLSI.2012.01.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/NiknafsM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/PapadopoulosKPT13,
author = {Agathoklis Papadopoulos and
Ioannis Kirmitzoglou and
Vasilis J. Promponas and
Theocharis Theocharides},
title = {FPGA-based hardware acceleration for local complexity analysis of
massive genomic data},
journal = {Integr.},
volume = {46},
number = {3},
pages = {230--239},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.10.003},
doi = {10.1016/J.VLSI.2012.10.003},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/PapadopoulosKPT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/QianCY13,
author = {Hanhua Qian and
Chip{-}Hong Chang and
Hao Yu},
title = {An efficient channel clustering and flow rate allocation algorithm
for non-uniform microfluidic cooling of 3D integrated circuits},
journal = {Integr.},
volume = {46},
number = {1},
pages = {57--68},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2011.12.005},
doi = {10.1016/J.VLSI.2011.12.005},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/QianCY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/RedaNCA13,
author = {Sherief Reda and
Abdullah Nazma Nowroz and
Ryan Cochran and
Stefan Angelevski},
title = {Post-silicon power mapping techniques for integrated circuits},
journal = {Integr.},
volume = {46},
number = {1},
pages = {69--79},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2011.12.001},
doi = {10.1016/J.VLSI.2011.12.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/RedaNCA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/SaberkariAS13,
author = {Alireza Saberkari and
Eduard Alarc{\'{o}}n and
Shahriar B. Shokouhi},
title = {Fast transient current-steering {CMOS} {LDO} regulator based on current
feedback amplifier},
journal = {Integr.},
volume = {46},
number = {2},
pages = {165--171},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.02.001},
doi = {10.1016/J.VLSI.2012.02.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/SaberkariAS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/SankaranarayananMHRHSS13,
author = {Karthik Sankaranarayanan and
Brett H. Meyer and
Wei Huang and
Robert J. Ribando and
Hossein Haj{-}Hariri and
Mircea R. Stan and
Kevin Skadron},
title = {Architectural implications of spatial thermal filtering},
journal = {Integr.},
volume = {46},
number = {1},
pages = {44--56},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2011.12.002},
doi = {10.1016/J.VLSI.2011.12.002},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/SankaranarayananMHRHSS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/SaveNP13,
author = {Yogesh Dilip Save and
H. Narayanan and
Sachin B. Patkar},
title = {Solution of PDEs-electrically coupled systems with electrical analogy},
journal = {Integr.},
volume = {46},
number = {4},
pages = {427--440},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.10.002},
doi = {10.1016/J.VLSI.2012.10.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/SaveNP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/SegundoNM13,
author = {Edgar J. Garcia Neto Segundo and
Nadia Nedjah and
Luiza de Macedo Mourelle},
title = {A scalable parallel reconfigurable hardware architecture for {DNA}
matching},
journal = {Integr.},
volume = {46},
number = {3},
pages = {240--246},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2013.01.002},
doi = {10.1016/J.VLSI.2013.01.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/SegundoNM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ShengD13,
author = {Wenxu Sheng and
Sheqin Dong},
title = {Multi-bend bus-driven floorplanning considering fixed-outline constraints},
journal = {Integr.},
volume = {46},
number = {2},
pages = {142--152},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.02.006},
doi = {10.1016/J.VLSI.2012.02.006},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/ShengD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ShinkaiHO13,
author = {Kenichi Shinkai and
Masanori Hashimoto and
Takao Onoye},
title = {A gate-delay model focusing on current fluctuation over wide range
of process-voltage-temperature variations},
journal = {Integr.},
volume = {46},
number = {4},
pages = {345--358},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2013.01.003},
doi = {10.1016/J.VLSI.2013.01.003},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/ShinkaiHO13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/SiderisP13,
author = {Isidoros Sideris and
Kiamal Z. Pekmestzi},
title = {A column parity based fault detection mechanism for {FIFO} buffers},
journal = {Integr.},
volume = {46},
number = {3},
pages = {265--279},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.03.004},
doi = {10.1016/J.VLSI.2012.03.004},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/SiderisP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/WuH13,
author = {Po{-}Hsun Wu and
Tsung{-}Yi Ho},
title = {Bus-driven floorplanning with thermal consideration},
journal = {Integr.},
volume = {46},
number = {4},
pages = {369--381},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.11.002},
doi = {10.1016/J.VLSI.2012.11.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/WuH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/WuLL13,
author = {Tao Wu and
Shuguo Li and
Litian Liu},
title = {Fast, compact and symmetric modular exponentiation architecture by
common-multiplicand Montgomery modular multiplications},
journal = {Integr.},
volume = {46},
number = {4},
pages = {323--332},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.09.002},
doi = {10.1016/J.VLSI.2012.09.002},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/WuLL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/WuZYTZ13,
author = {Peng Wu and
Hai Zhou and
Changhao Yan and
Jun Tao and
Xuan Zeng},
title = {An efficient method for gradient-aware dummy fill synthesis},
journal = {Integr.},
volume = {46},
number = {3},
pages = {301--309},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.04.001},
doi = {10.1016/J.VLSI.2012.04.001},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/WuZYTZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ZakerolhosseiniN13,
author = {Ali Zakerolhosseini and
Morteza Nikooghadam},
title = {Low-power and high-speed design of a versatile bit-serial multiplier
in finite fields GF(2\({}^{\mbox{m}}\))},
journal = {Integr.},
volume = {46},
number = {2},
pages = {211--217},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.03.001},
doi = {10.1016/J.VLSI.2012.03.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/ZakerolhosseiniN13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ZaniniAM13,
author = {Francesco Zanini and
David Atienza and
Giovanni De Micheli},
title = {A combined sensor placement and convex optimization approach for thermal
management in 3D-MPSoC with liquid cooling},
journal = {Integr.},
volume = {46},
number = {1},
pages = {33--43},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2011.12.003},
doi = {10.1016/J.VLSI.2011.12.003},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/ZaniniAM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ZhiLZZ13,
author = {Yanling Zhi and
Wai{-}Shing Luk and
Hai Zhou and
Xuan Zeng},
title = {SmipRef: An efficient method for multi-domain clock skew scheduling},
journal = {Integr.},
volume = {46},
number = {4},
pages = {392--403},
year = {2013},
url = {https://doi.org/10.1016/j.vlsi.2012.11.001},
doi = {10.1016/J.VLSI.2012.11.001},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/ZhiLZZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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